1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 */
5
6 #include <linux/firmware.h>
7 #include <linux/fs.h>
8 #include "mt7996.h"
9 #include "mcu.h"
10 #include "mac.h"
11 #include "eeprom.h"
12
13 #define fw_name(_dev, name, ...) ({ \
14 char *_fw; \
15 switch (mt76_chip(&(_dev)->mt76)) { \
16 case 0x7992: \
17 _fw = MT7992_##name; \
18 break; \
19 case 0x7990: \
20 default: \
21 _fw = MT7996_##name; \
22 break; \
23 } \
24 _fw; \
25 })
26
27 struct mt7996_patch_hdr {
28 char build_date[16];
29 char platform[4];
30 __be32 hw_sw_ver;
31 __be32 patch_ver;
32 __be16 checksum;
33 u16 reserved;
34 struct {
35 __be32 patch_ver;
36 __be32 subsys;
37 __be32 feature;
38 __be32 n_region;
39 __be32 crc;
40 u32 reserved[11];
41 } desc;
42 } __packed;
43
44 struct mt7996_patch_sec {
45 __be32 type;
46 __be32 offs;
47 __be32 size;
48 union {
49 __be32 spec[13];
50 struct {
51 __be32 addr;
52 __be32 len;
53 __be32 sec_key_idx;
54 __be32 align_len;
55 u32 reserved[9];
56 } info;
57 };
58 } __packed;
59
60 struct mt7996_fw_trailer {
61 u8 chip_id;
62 u8 eco_code;
63 u8 n_region;
64 u8 format_ver;
65 u8 format_flag;
66 u8 reserved[2];
67 char fw_ver[10];
68 char build_date[15];
69 u32 crc;
70 } __packed;
71
72 struct mt7996_fw_region {
73 __le32 decomp_crc;
74 __le32 decomp_len;
75 __le32 decomp_blk_sz;
76 u8 reserved[4];
77 __le32 addr;
78 __le32 len;
79 u8 feature_set;
80 u8 reserved1[15];
81 } __packed;
82
83 #define MCU_PATCH_ADDRESS 0x200000
84
85 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
86 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
87 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p)
88
89 static bool sr_scene_detect = true;
90 module_param(sr_scene_detect, bool, 0644);
91 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
92
93 static u8
mt7996_mcu_get_sta_nss(u16 mcs_map)94 mt7996_mcu_get_sta_nss(u16 mcs_map)
95 {
96 u8 nss;
97
98 for (nss = 8; nss > 0; nss--) {
99 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
100
101 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
102 break;
103 }
104
105 return nss - 1;
106 }
107
108 static void
mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)109 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
110 u16 mcs_map)
111 {
112 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
113 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
114 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
115 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
116
117 for (nss = 0; nss < max_nss; nss++) {
118 int mcs;
119
120 switch ((mcs_map >> (2 * nss)) & 0x3) {
121 case IEEE80211_HE_MCS_SUPPORT_0_11:
122 mcs = GENMASK(11, 0);
123 break;
124 case IEEE80211_HE_MCS_SUPPORT_0_9:
125 mcs = GENMASK(9, 0);
126 break;
127 case IEEE80211_HE_MCS_SUPPORT_0_7:
128 mcs = GENMASK(7, 0);
129 break;
130 default:
131 mcs = 0;
132 }
133
134 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
135
136 switch (mcs) {
137 case 0 ... 7:
138 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
139 break;
140 case 8 ... 9:
141 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
142 break;
143 case 10 ... 11:
144 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
145 break;
146 default:
147 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
148 break;
149 }
150 mcs_map &= ~(0x3 << (nss * 2));
151 mcs_map |= mcs << (nss * 2);
152 }
153
154 *he_mcs = cpu_to_le16(mcs_map);
155 }
156
157 static void
mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)158 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
159 const u16 *mask)
160 {
161 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
162 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
163
164 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
165 switch (mcs_map & 0x3) {
166 case IEEE80211_VHT_MCS_SUPPORT_0_9:
167 mcs = GENMASK(9, 0);
168 break;
169 case IEEE80211_VHT_MCS_SUPPORT_0_8:
170 mcs = GENMASK(8, 0);
171 break;
172 case IEEE80211_VHT_MCS_SUPPORT_0_7:
173 mcs = GENMASK(7, 0);
174 break;
175 default:
176 mcs = 0;
177 }
178
179 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
180 }
181 }
182
183 static void
mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)184 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
185 const u8 *mask)
186 {
187 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
188
189 for (nss = 0; nss < max_nss; nss++)
190 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
191 }
192
193 static int
mt7996_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)194 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd,
195 struct sk_buff *skb, int seq)
196 {
197 struct mt7996_mcu_rxd *rxd;
198 struct mt7996_mcu_uni_event *event;
199 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
200 int ret = 0;
201
202 if (!skb) {
203 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
204 cmd, seq);
205 return -ETIMEDOUT;
206 }
207
208 rxd = (struct mt7996_mcu_rxd *)skb->data;
209 if (seq != rxd->seq)
210 return -EAGAIN;
211
212 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
213 skb_pull(skb, sizeof(*rxd) - 4);
214 ret = *skb->data;
215 } else if ((rxd->option & MCU_UNI_CMD_EVENT) &&
216 rxd->eid == MCU_UNI_EVENT_RESULT) {
217 skb_pull(skb, sizeof(*rxd));
218 event = (struct mt7996_mcu_uni_event *)skb->data;
219 ret = le32_to_cpu(event->status);
220 /* skip invalid event */
221 if (mcu_cmd != event->cid)
222 ret = -EAGAIN;
223 } else {
224 skb_pull(skb, sizeof(struct mt7996_mcu_rxd));
225 }
226
227 return ret;
228 }
229
230 static int
mt7996_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)231 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
232 int cmd, int *wait_seq)
233 {
234 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76);
235 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
236 struct mt76_connac2_mcu_uni_txd *uni_txd;
237 struct mt76_connac2_mcu_txd *mcu_txd;
238 enum mt76_mcuq_id qid;
239 __le32 *txd;
240 u32 val;
241 u8 seq;
242
243 mdev->mcu.timeout = 20 * HZ;
244
245 seq = ++dev->mt76.mcu.msg_seq & 0xf;
246 if (!seq)
247 seq = ++dev->mt76.mcu.msg_seq & 0xf;
248
249 if (cmd == MCU_CMD(FW_SCATTER)) {
250 qid = MT_MCUQ_FWDL;
251 goto exit;
252 }
253
254 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
255 txd = (__le32 *)skb_push(skb, txd_len);
256 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
257 qid = MT_MCUQ_WA;
258 else
259 qid = MT_MCUQ_WM;
260
261 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
262 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
263 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
264 txd[0] = cpu_to_le32(val);
265
266 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
267 txd[1] = cpu_to_le32(val);
268
269 if (cmd & __MCU_CMD_FIELD_UNI) {
270 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
271 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
272 uni_txd->cid = cpu_to_le16(mcu_cmd);
273 uni_txd->s2d_index = MCU_S2D_H2CN;
274 uni_txd->pkt_type = MCU_PKT_ID;
275 uni_txd->seq = seq;
276
277 if (cmd & __MCU_CMD_FIELD_QUERY)
278 uni_txd->option = MCU_CMD_UNI_QUERY_ACK;
279 else
280 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
281
282 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM))
283 uni_txd->s2d_index = MCU_S2D_H2CN;
284 else if (cmd & __MCU_CMD_FIELD_WA)
285 uni_txd->s2d_index = MCU_S2D_H2C;
286 else if (cmd & __MCU_CMD_FIELD_WM)
287 uni_txd->s2d_index = MCU_S2D_H2N;
288
289 goto exit;
290 }
291
292 mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
293 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
294 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
295 MT_TX_MCU_PORT_RX_Q0));
296 mcu_txd->pkt_type = MCU_PKT_ID;
297 mcu_txd->seq = seq;
298
299 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
300 mcu_txd->set_query = MCU_Q_NA;
301 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
302 if (mcu_txd->ext_cid) {
303 mcu_txd->ext_cid_ack = 1;
304
305 if (cmd & __MCU_CMD_FIELD_QUERY)
306 mcu_txd->set_query = MCU_Q_QUERY;
307 else
308 mcu_txd->set_query = MCU_Q_SET;
309 }
310
311 if (cmd & __MCU_CMD_FIELD_WA)
312 mcu_txd->s2d_index = MCU_S2D_H2C;
313 else
314 mcu_txd->s2d_index = MCU_S2D_H2N;
315
316 exit:
317 if (wait_seq)
318 *wait_seq = seq;
319
320 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
321 }
322
mt7996_mcu_wa_cmd(struct mt7996_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)323 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
324 {
325 struct {
326 __le32 args[3];
327 } req = {
328 .args = {
329 cpu_to_le32(a1),
330 cpu_to_le32(a2),
331 cpu_to_le32(a3),
332 },
333 };
334
335 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
336 }
337
338 static void
mt7996_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)339 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
340 {
341 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)
342 return;
343
344 ieee80211_csa_finish(vif, 0);
345 }
346
347 static void
mt7996_mcu_rx_radar_detected(struct mt7996_dev * dev,struct sk_buff * skb)348 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb)
349 {
350 struct mt76_phy *mphy = &dev->mt76.phy;
351 struct mt7996_mcu_rdd_report *r;
352
353 r = (struct mt7996_mcu_rdd_report *)skb->data;
354
355 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys))
356 return;
357
358 if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy)
359 return;
360
361 if (r->band_idx == MT_RX_SEL2)
362 mphy = dev->rdd2_phy->mt76;
363 else
364 mphy = dev->mt76.phys[r->band_idx];
365
366 if (!mphy)
367 return;
368
369 if (r->band_idx == MT_RX_SEL2)
370 cfg80211_background_radar_event(mphy->hw->wiphy,
371 &dev->rdd2_chandef,
372 GFP_ATOMIC);
373 else
374 ieee80211_radar_detected(mphy->hw);
375 dev->hw_pattern++;
376 }
377
378 static void
mt7996_mcu_rx_log_message(struct mt7996_dev * dev,struct sk_buff * skb)379 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb)
380 {
381 #define UNI_EVENT_FW_LOG_FORMAT 0
382 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
383 const char *data = (char *)&rxd[1] + 4, *type;
384 struct tlv *tlv = (struct tlv *)data;
385 int len;
386
387 if (!(rxd->option & MCU_UNI_CMD_EVENT)) {
388 len = skb->len - sizeof(*rxd);
389 data = (char *)&rxd[1];
390 goto out;
391 }
392
393 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT)
394 return;
395
396 data += sizeof(*tlv) + 4;
397 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4;
398
399 out:
400 switch (rxd->s2d_index) {
401 case 0:
402 if (mt7996_debugfs_rx_log(dev, data, len))
403 return;
404
405 type = "WM";
406 break;
407 case 2:
408 type = "WA";
409 break;
410 default:
411 type = "unknown";
412 break;
413 }
414
415 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
416 }
417
418 static void
mt7996_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)419 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
420 {
421 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)
422 return;
423
424 ieee80211_color_change_finish(vif, 0);
425 }
426
427 static void
mt7996_mcu_ie_countdown(struct mt7996_dev * dev,struct sk_buff * skb)428 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb)
429 {
430 #define UNI_EVENT_IE_COUNTDOWN_CSA 0
431 #define UNI_EVENT_IE_COUNTDOWN_BCC 1
432 struct header {
433 u8 band;
434 u8 rsv[3];
435 };
436 struct mt76_phy *mphy = &dev->mt76.phy;
437 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
438 const char *data = (char *)&rxd[1], *tail;
439 struct header *hdr = (struct header *)data;
440 struct tlv *tlv = (struct tlv *)(data + 4);
441
442 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys))
443 return;
444
445 if (hdr->band && dev->mt76.phys[hdr->band])
446 mphy = dev->mt76.phys[hdr->band];
447
448 tail = skb->data + skb->len;
449 data += sizeof(struct header);
450 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) {
451 switch (le16_to_cpu(tlv->tag)) {
452 case UNI_EVENT_IE_COUNTDOWN_CSA:
453 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
454 IEEE80211_IFACE_ITER_RESUME_ALL,
455 mt7996_mcu_csa_finish, mphy->hw);
456 break;
457 case UNI_EVENT_IE_COUNTDOWN_BCC:
458 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
459 IEEE80211_IFACE_ITER_RESUME_ALL,
460 mt7996_mcu_cca_finish, mphy->hw);
461 break;
462 }
463
464 data += le16_to_cpu(tlv->len);
465 tlv = (struct tlv *)data;
466 }
467 }
468
469 static int
mt7996_mcu_update_tx_gi(struct rate_info * rate,struct all_sta_trx_rate * mcu_rate)470 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate)
471 {
472 switch (mcu_rate->tx_mode) {
473 case MT_PHY_TYPE_CCK:
474 case MT_PHY_TYPE_OFDM:
475 break;
476 case MT_PHY_TYPE_HT:
477 case MT_PHY_TYPE_HT_GF:
478 case MT_PHY_TYPE_VHT:
479 if (mcu_rate->tx_gi)
480 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
481 else
482 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
483 break;
484 case MT_PHY_TYPE_HE_SU:
485 case MT_PHY_TYPE_HE_EXT_SU:
486 case MT_PHY_TYPE_HE_TB:
487 case MT_PHY_TYPE_HE_MU:
488 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2)
489 return -EINVAL;
490 rate->he_gi = mcu_rate->tx_gi;
491 break;
492 case MT_PHY_TYPE_EHT_SU:
493 case MT_PHY_TYPE_EHT_TRIG:
494 case MT_PHY_TYPE_EHT_MU:
495 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2)
496 return -EINVAL;
497 rate->eht_gi = mcu_rate->tx_gi;
498 break;
499 default:
500 return -EINVAL;
501 }
502
503 return 0;
504 }
505
506 static void
mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev * dev,struct sk_buff * skb)507 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb)
508 {
509 struct mt7996_mcu_all_sta_info_event *res;
510 u16 i;
511
512 skb_pull(skb, sizeof(struct mt7996_mcu_rxd));
513
514 res = (struct mt7996_mcu_all_sta_info_event *)skb->data;
515
516 for (i = 0; i < le16_to_cpu(res->sta_num); i++) {
517 u8 ac;
518 u16 wlan_idx;
519 struct mt76_wcid *wcid;
520
521 switch (le16_to_cpu(res->tag)) {
522 case UNI_ALL_STA_TXRX_RATE:
523 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx);
524 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
525
526 if (!wcid)
527 break;
528
529 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i]))
530 dev_err(dev->mt76.dev, "Failed to update TX GI\n");
531 break;
532 case UNI_ALL_STA_TXRX_ADM_STAT:
533 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx);
534 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
535
536 if (!wcid)
537 break;
538
539 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
540 wcid->stats.tx_bytes +=
541 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]);
542 wcid->stats.rx_bytes +=
543 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]);
544 }
545 break;
546 case UNI_ALL_STA_TXRX_MSDU_COUNT:
547 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx);
548 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
549
550 if (!wcid)
551 break;
552
553 wcid->stats.tx_packets +=
554 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt);
555 wcid->stats.rx_packets +=
556 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt);
557 break;
558 default:
559 break;
560 }
561 }
562 }
563
564 static void
mt7996_mcu_rx_thermal_notify(struct mt7996_dev * dev,struct sk_buff * skb)565 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb)
566 {
567 #define THERMAL_NOTIFY_TAG 0x4
568 #define THERMAL_NOTIFY 0x2
569 struct mt76_phy *mphy = &dev->mt76.phy;
570 struct mt7996_mcu_thermal_notify *n;
571 struct mt7996_phy *phy;
572
573 n = (struct mt7996_mcu_thermal_notify *)skb->data;
574
575 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG)
576 return;
577
578 if (n->event_id != THERMAL_NOTIFY)
579 return;
580
581 if (n->band_idx > MT_BAND2)
582 return;
583
584 mphy = dev->mt76.phys[n->band_idx];
585 if (!mphy)
586 return;
587
588 phy = (struct mt7996_phy *)mphy->priv;
589 phy->throttle_state = n->duty_percent;
590 }
591
592 static void
mt7996_mcu_rx_ext_event(struct mt7996_dev * dev,struct sk_buff * skb)593 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb)
594 {
595 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
596
597 switch (rxd->ext_eid) {
598 case MCU_EXT_EVENT_FW_LOG_2_HOST:
599 mt7996_mcu_rx_log_message(dev, skb);
600 break;
601 default:
602 break;
603 }
604 }
605
606 static void
mt7996_mcu_rx_unsolicited_event(struct mt7996_dev * dev,struct sk_buff * skb)607 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
608 {
609 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
610
611 switch (rxd->eid) {
612 case MCU_EVENT_EXT:
613 mt7996_mcu_rx_ext_event(dev, skb);
614 break;
615 case MCU_UNI_EVENT_THERMAL:
616 mt7996_mcu_rx_thermal_notify(dev, skb);
617 break;
618 default:
619 break;
620 }
621 dev_kfree_skb(skb);
622 }
623
624 static void
mt7996_mcu_wed_rro_event(struct mt7996_dev * dev,struct sk_buff * skb)625 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb)
626 {
627 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data;
628
629 if (!dev->has_rro)
630 return;
631
632 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4);
633
634 switch (le16_to_cpu(event->tag)) {
635 case UNI_WED_RRO_BA_SESSION_STATUS: {
636 struct mt7996_mcu_wed_rro_ba_event *e;
637
638 while (skb->len >= sizeof(*e)) {
639 struct mt76_rx_tid *tid;
640 struct mt76_wcid *wcid;
641 u16 idx;
642
643 e = (void *)skb->data;
644 idx = le16_to_cpu(e->wlan_id);
645 if (idx >= ARRAY_SIZE(dev->mt76.wcid))
646 break;
647
648 wcid = rcu_dereference(dev->mt76.wcid[idx]);
649 if (!wcid || !wcid->sta)
650 break;
651
652 if (e->tid >= ARRAY_SIZE(wcid->aggr))
653 break;
654
655 tid = rcu_dereference(wcid->aggr[e->tid]);
656 if (!tid)
657 break;
658
659 tid->id = le16_to_cpu(e->id);
660 skb_pull(skb, sizeof(*e));
661 }
662 break;
663 }
664 case UNI_WED_RRO_BA_SESSION_DELETE: {
665 struct mt7996_mcu_wed_rro_ba_delete_event *e;
666
667 while (skb->len >= sizeof(*e)) {
668 struct mt7996_wed_rro_session_id *session;
669
670 e = (void *)skb->data;
671 session = kzalloc(sizeof(*session), GFP_ATOMIC);
672 if (!session)
673 break;
674
675 session->id = le16_to_cpu(e->session_id);
676
677 spin_lock_bh(&dev->wed_rro.lock);
678 list_add_tail(&session->list, &dev->wed_rro.poll_list);
679 spin_unlock_bh(&dev->wed_rro.lock);
680
681 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work);
682 skb_pull(skb, sizeof(*e));
683 }
684 break;
685 }
686 default:
687 break;
688 }
689 }
690
691 static void
mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev * dev,struct sk_buff * skb)692 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
693 {
694 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
695
696 switch (rxd->eid) {
697 case MCU_UNI_EVENT_FW_LOG_2_HOST:
698 mt7996_mcu_rx_log_message(dev, skb);
699 break;
700 case MCU_UNI_EVENT_IE_COUNTDOWN:
701 mt7996_mcu_ie_countdown(dev, skb);
702 break;
703 case MCU_UNI_EVENT_RDD_REPORT:
704 mt7996_mcu_rx_radar_detected(dev, skb);
705 break;
706 case MCU_UNI_EVENT_ALL_STA_INFO:
707 mt7996_mcu_rx_all_sta_info_event(dev, skb);
708 break;
709 case MCU_UNI_EVENT_WED_RRO:
710 mt7996_mcu_wed_rro_event(dev, skb);
711 break;
712 default:
713 break;
714 }
715 dev_kfree_skb(skb);
716 }
717
mt7996_mcu_rx_event(struct mt7996_dev * dev,struct sk_buff * skb)718 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb)
719 {
720 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
721
722 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) {
723 mt7996_mcu_uni_rx_unsolicited_event(dev, skb);
724 return;
725 }
726
727 /* WA still uses legacy event*/
728 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
729 !rxd->seq)
730 mt7996_mcu_rx_unsolicited_event(dev, skb);
731 else
732 mt76_mcu_rx_event(&dev->mt76, skb);
733 }
734
735 static struct tlv *
mt7996_mcu_add_uni_tlv(struct sk_buff * skb,u16 tag,u16 len)736 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len)
737 {
738 struct tlv *ptlv = skb_put(skb, len);
739
740 ptlv->tag = cpu_to_le16(tag);
741 ptlv->len = cpu_to_le16(len);
742
743 return ptlv;
744 }
745
746 static void
mt7996_mcu_bss_rfch_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)747 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
748 struct mt7996_phy *phy)
749 {
750 static const u8 rlm_ch_band[] = {
751 [NL80211_BAND_2GHZ] = 1,
752 [NL80211_BAND_5GHZ] = 2,
753 [NL80211_BAND_6GHZ] = 3,
754 };
755 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
756 struct bss_rlm_tlv *ch;
757 struct tlv *tlv;
758 int freq1 = chandef->center_freq1;
759
760 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch));
761
762 ch = (struct bss_rlm_tlv *)tlv;
763 ch->control_channel = chandef->chan->hw_value;
764 ch->center_chan = ieee80211_frequency_to_channel(freq1);
765 ch->bw = mt76_connac_chan_bw(chandef);
766 ch->tx_streams = hweight8(phy->mt76->antenna_mask);
767 ch->rx_streams = hweight8(phy->mt76->antenna_mask);
768 ch->band = rlm_ch_band[chandef->chan->band];
769
770 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
771 int freq2 = chandef->center_freq2;
772
773 ch->center_chan2 = ieee80211_frequency_to_channel(freq2);
774 }
775 }
776
777 static void
mt7996_mcu_bss_ra_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)778 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
779 struct mt7996_phy *phy)
780 {
781 struct bss_ra_tlv *ra;
782 struct tlv *tlv;
783
784 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra));
785
786 ra = (struct bss_ra_tlv *)tlv;
787 ra->short_preamble = true;
788 }
789
790 static void
mt7996_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)791 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
792 struct mt7996_phy *phy)
793 {
794 #define DEFAULT_HE_PE_DURATION 4
795 #define DEFAULT_HE_DURATION_RTS_THRES 1023
796 const struct ieee80211_sta_he_cap *cap;
797 struct bss_info_uni_he *he;
798 struct tlv *tlv;
799
800 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
801
802 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he));
803
804 he = (struct bss_info_uni_he *)tlv;
805 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
806 if (!he->he_pe_duration)
807 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
808
809 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
810 if (!he->he_rts_thres)
811 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
812
813 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
814 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
815 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
816 }
817
818 static void
mt7996_mcu_bss_mbssid_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy,int enable)819 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
820 struct mt7996_phy *phy, int enable)
821 {
822 struct bss_info_uni_mbssid *mbssid;
823 struct tlv *tlv;
824
825 if (!vif->bss_conf.bssid_indicator)
826 return;
827
828 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid));
829
830 mbssid = (struct bss_info_uni_mbssid *)tlv;
831
832 if (enable) {
833 mbssid->max_indicator = vif->bss_conf.bssid_indicator;
834 mbssid->mbss_idx = vif->bss_conf.bssid_index;
835 mbssid->tx_bss_omac_idx = 0;
836 }
837 }
838
839 static void
mt7996_mcu_bss_bmc_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)840 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
841 struct mt7996_phy *phy)
842 {
843 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
844 struct bss_rate_tlv *bmc;
845 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
846 enum nl80211_band band = chandef->chan->band;
847 struct tlv *tlv;
848 u8 idx = mvif->mcast_rates_idx ?
849 mvif->mcast_rates_idx : mvif->basic_rates_idx;
850
851 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc));
852
853 bmc = (struct bss_rate_tlv *)tlv;
854
855 bmc->short_preamble = (band == NL80211_BAND_2GHZ);
856 bmc->bc_fixed_rate = idx;
857 bmc->mc_fixed_rate = idx;
858 }
859
860 static void
mt7996_mcu_bss_txcmd_tlv(struct sk_buff * skb,bool en)861 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en)
862 {
863 struct bss_txcmd_tlv *txcmd;
864 struct tlv *tlv;
865
866 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd));
867
868 txcmd = (struct bss_txcmd_tlv *)tlv;
869 txcmd->txcmd_mode = en;
870 }
871
872 static void
mt7996_mcu_bss_mld_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)873 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
874 {
875 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
876 struct bss_mld_tlv *mld;
877 struct tlv *tlv;
878
879 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld));
880
881 mld = (struct bss_mld_tlv *)tlv;
882 mld->group_mld_id = 0xff;
883 mld->own_mld_id = mvif->mt76.idx;
884 mld->remap_idx = 0xff;
885 }
886
887 static void
mt7996_mcu_bss_sec_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)888 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
889 {
890 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
891 struct bss_sec_tlv *sec;
892 struct tlv *tlv;
893
894 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec));
895
896 sec = (struct bss_sec_tlv *)tlv;
897 sec->cipher = mvif->cipher;
898 }
899
900 static int
mt7996_mcu_muar_config(struct mt7996_phy * phy,struct ieee80211_vif * vif,bool bssid,bool enable)901 mt7996_mcu_muar_config(struct mt7996_phy *phy, struct ieee80211_vif *vif,
902 bool bssid, bool enable)
903 {
904 #define UNI_MUAR_ENTRY 2
905 struct mt7996_dev *dev = phy->dev;
906 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
907 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
908 const u8 *addr = vif->addr;
909
910 struct {
911 struct {
912 u8 band;
913 u8 __rsv[3];
914 } hdr;
915
916 __le16 tag;
917 __le16 len;
918
919 bool smesh;
920 u8 bssid;
921 u8 index;
922 u8 entry_add;
923 u8 addr[ETH_ALEN];
924 u8 __rsv[2];
925 } __packed req = {
926 .hdr.band = phy->mt76->band_idx,
927 .tag = cpu_to_le16(UNI_MUAR_ENTRY),
928 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)),
929 .smesh = false,
930 .index = idx * 2 + bssid,
931 .entry_add = true,
932 };
933
934 if (bssid)
935 addr = vif->bss_conf.bssid;
936
937 if (enable)
938 memcpy(req.addr, addr, ETH_ALEN);
939
940 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req,
941 sizeof(req), true);
942 }
943
944 static void
mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)945 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
946 {
947 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
948 struct mt7996_phy *phy = mvif->phy;
949 struct bss_ifs_time_tlv *ifs_time;
950 struct tlv *tlv;
951 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
952
953 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time));
954
955 ifs_time = (struct bss_ifs_time_tlv *)tlv;
956 ifs_time->slot_valid = true;
957 ifs_time->sifs_valid = true;
958 ifs_time->rifs_valid = true;
959 ifs_time->eifs_valid = true;
960
961 ifs_time->slot_time = cpu_to_le16(phy->slottime);
962 ifs_time->sifs_time = cpu_to_le16(10);
963 ifs_time->rifs_time = cpu_to_le16(2);
964 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84);
965
966 if (is_2ghz) {
967 ifs_time->eifs_cck_valid = true;
968 ifs_time->eifs_cck_time = cpu_to_le16(314);
969 }
970 }
971
972 static int
mt7996_mcu_bss_basic_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct mt76_phy * phy,u16 wlan_idx,bool enable)973 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb,
974 struct ieee80211_vif *vif,
975 struct ieee80211_sta *sta,
976 struct mt76_phy *phy, u16 wlan_idx,
977 bool enable)
978 {
979 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
980 struct cfg80211_chan_def *chandef = &phy->chandef;
981 struct mt76_connac_bss_basic_tlv *bss;
982 u32 type = CONNECTION_INFRA_AP;
983 u16 sta_wlan_idx = wlan_idx;
984 struct tlv *tlv;
985 int idx;
986
987 switch (vif->type) {
988 case NL80211_IFTYPE_MESH_POINT:
989 case NL80211_IFTYPE_AP:
990 case NL80211_IFTYPE_MONITOR:
991 break;
992 case NL80211_IFTYPE_STATION:
993 if (enable) {
994 rcu_read_lock();
995 if (!sta)
996 sta = ieee80211_find_sta(vif,
997 vif->bss_conf.bssid);
998 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
999 if (sta) {
1000 struct mt76_wcid *wcid;
1001
1002 wcid = (struct mt76_wcid *)sta->drv_priv;
1003 sta_wlan_idx = wcid->idx;
1004 }
1005 rcu_read_unlock();
1006 }
1007 type = CONNECTION_INFRA_STA;
1008 break;
1009 case NL80211_IFTYPE_ADHOC:
1010 type = CONNECTION_IBSS_ADHOC;
1011 break;
1012 default:
1013 WARN_ON(1);
1014 break;
1015 }
1016
1017 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss));
1018
1019 bss = (struct mt76_connac_bss_basic_tlv *)tlv;
1020 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
1021 bss->dtim_period = vif->bss_conf.dtim_period;
1022 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx);
1023 bss->sta_idx = cpu_to_le16(sta_wlan_idx);
1024 bss->conn_type = cpu_to_le32(type);
1025 bss->omac_idx = mvif->omac_idx;
1026 bss->band_idx = mvif->band_idx;
1027 bss->wmm_idx = mvif->wmm_idx;
1028 bss->conn_state = !enable;
1029 bss->active = enable;
1030
1031 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1032 bss->hw_bss_idx = idx;
1033
1034 if (vif->type == NL80211_IFTYPE_MONITOR) {
1035 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
1036 return 0;
1037 }
1038
1039 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
1040 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
1041 bss->dtim_period = vif->bss_conf.dtim_period;
1042 bss->phymode = mt76_connac_get_phy_mode(phy, vif,
1043 chandef->chan->band, NULL);
1044 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, vif,
1045 chandef->chan->band);
1046
1047 return 0;
1048 }
1049
1050 static struct sk_buff *
__mt7996_mcu_alloc_bss_req(struct mt76_dev * dev,struct mt76_vif * mvif,int len)1051 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif *mvif, int len)
1052 {
1053 struct bss_req_hdr hdr = {
1054 .bss_idx = mvif->idx,
1055 };
1056 struct sk_buff *skb;
1057
1058 skb = mt76_mcu_msg_alloc(dev, NULL, len);
1059 if (!skb)
1060 return ERR_PTR(-ENOMEM);
1061
1062 skb_put_data(skb, &hdr, sizeof(hdr));
1063
1064 return skb;
1065 }
1066
mt7996_mcu_add_bss_info(struct mt7996_phy * phy,struct ieee80211_vif * vif,int enable)1067 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy,
1068 struct ieee80211_vif *vif, int enable)
1069 {
1070 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1071 struct mt7996_dev *dev = phy->dev;
1072 struct sk_buff *skb;
1073
1074 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
1075 mt7996_mcu_muar_config(phy, vif, false, enable);
1076 mt7996_mcu_muar_config(phy, vif, true, enable);
1077 }
1078
1079 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
1080 MT7996_BSS_UPDATE_MAX_SIZE);
1081 if (IS_ERR(skb))
1082 return PTR_ERR(skb);
1083
1084 /* bss_basic must be first */
1085 mt7996_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
1086 mvif->sta.wcid.idx, enable);
1087 mt7996_mcu_bss_sec_tlv(skb, vif);
1088
1089 if (vif->type == NL80211_IFTYPE_MONITOR)
1090 goto out;
1091
1092 if (enable) {
1093 mt7996_mcu_bss_rfch_tlv(skb, vif, phy);
1094 mt7996_mcu_bss_bmc_tlv(skb, vif, phy);
1095 mt7996_mcu_bss_ra_tlv(skb, vif, phy);
1096 mt7996_mcu_bss_txcmd_tlv(skb, true);
1097 mt7996_mcu_bss_ifs_timing_tlv(skb, vif);
1098
1099 if (vif->bss_conf.he_support)
1100 mt7996_mcu_bss_he_tlv(skb, vif, phy);
1101
1102 /* this tag is necessary no matter if the vif is MLD */
1103 mt7996_mcu_bss_mld_tlv(skb, vif);
1104 }
1105
1106 mt7996_mcu_bss_mbssid_tlv(skb, vif, phy, enable);
1107
1108 out:
1109 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1110 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
1111 }
1112
mt7996_mcu_set_timing(struct mt7996_phy * phy,struct ieee80211_vif * vif)1113 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif)
1114 {
1115 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1116 struct mt7996_dev *dev = phy->dev;
1117 struct sk_buff *skb;
1118
1119 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
1120 MT7996_BSS_UPDATE_MAX_SIZE);
1121 if (IS_ERR(skb))
1122 return PTR_ERR(skb);
1123
1124 mt7996_mcu_bss_ifs_timing_tlv(skb, vif);
1125
1126 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1127 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
1128 }
1129
1130 static int
mt7996_mcu_sta_ba(struct mt7996_dev * dev,struct mt76_vif * mvif,struct ieee80211_ampdu_params * params,bool enable,bool tx)1131 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif *mvif,
1132 struct ieee80211_ampdu_params *params,
1133 bool enable, bool tx)
1134 {
1135 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
1136 struct sta_rec_ba_uni *ba;
1137 struct sk_buff *skb;
1138 struct tlv *tlv;
1139
1140 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid,
1141 MT7996_STA_UPDATE_MAX_SIZE);
1142 if (IS_ERR(skb))
1143 return PTR_ERR(skb);
1144
1145 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
1146
1147 ba = (struct sta_rec_ba_uni *)tlv;
1148 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
1149 ba->winsize = cpu_to_le16(params->buf_size);
1150 ba->ssn = cpu_to_le16(params->ssn);
1151 ba->ba_en = enable << params->tid;
1152 ba->amsdu = params->amsdu;
1153 ba->tid = params->tid;
1154 ba->ba_rdd_rro = !tx && enable && dev->has_rro;
1155
1156 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1157 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1158 }
1159
1160 /** starec & wtbl **/
mt7996_mcu_add_tx_ba(struct mt7996_dev * dev,struct ieee80211_ampdu_params * params,bool enable)1161 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev,
1162 struct ieee80211_ampdu_params *params,
1163 bool enable)
1164 {
1165 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
1166 struct mt7996_vif *mvif = msta->vif;
1167
1168 if (enable && !params->amsdu)
1169 msta->wcid.amsdu = false;
1170
1171 return mt7996_mcu_sta_ba(dev, &mvif->mt76, params, enable, true);
1172 }
1173
mt7996_mcu_add_rx_ba(struct mt7996_dev * dev,struct ieee80211_ampdu_params * params,bool enable)1174 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev,
1175 struct ieee80211_ampdu_params *params,
1176 bool enable)
1177 {
1178 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
1179 struct mt7996_vif *mvif = msta->vif;
1180
1181 return mt7996_mcu_sta_ba(dev, &mvif->mt76, params, enable, false);
1182 }
1183
1184 static void
mt7996_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1185 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1186 {
1187 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
1188 struct ieee80211_he_mcs_nss_supp mcs_map;
1189 struct sta_rec_he_v2 *he;
1190 struct tlv *tlv;
1191 int i = 0;
1192
1193 if (!sta->deflink.he_cap.has_he)
1194 return;
1195
1196 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
1197
1198 he = (struct sta_rec_he_v2 *)tlv;
1199 for (i = 0; i < 11; i++) {
1200 if (i < 6)
1201 he->he_mac_cap[i] = elem->mac_cap_info[i];
1202 he->he_phy_cap[i] = elem->phy_cap_info[i];
1203 }
1204
1205 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
1206 switch (sta->deflink.bandwidth) {
1207 case IEEE80211_STA_RX_BW_160:
1208 if (elem->phy_cap_info[0] &
1209 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
1210 mt7996_mcu_set_sta_he_mcs(sta,
1211 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
1212 le16_to_cpu(mcs_map.rx_mcs_80p80));
1213
1214 mt7996_mcu_set_sta_he_mcs(sta,
1215 &he->max_nss_mcs[CMD_HE_MCS_BW160],
1216 le16_to_cpu(mcs_map.rx_mcs_160));
1217 fallthrough;
1218 default:
1219 mt7996_mcu_set_sta_he_mcs(sta,
1220 &he->max_nss_mcs[CMD_HE_MCS_BW80],
1221 le16_to_cpu(mcs_map.rx_mcs_80));
1222 break;
1223 }
1224
1225 he->pkt_ext = 2;
1226 }
1227
1228 static void
mt7996_mcu_sta_he_6g_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1229 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1230 {
1231 struct sta_rec_he_6g_capa *he_6g;
1232 struct tlv *tlv;
1233
1234 if (!sta->deflink.he_6ghz_capa.capa)
1235 return;
1236
1237 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g));
1238
1239 he_6g = (struct sta_rec_he_6g_capa *)tlv;
1240 he_6g->capa = sta->deflink.he_6ghz_capa.capa;
1241 }
1242
1243 static void
mt7996_mcu_sta_eht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1244 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1245 {
1246 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1247 struct ieee80211_vif *vif = container_of((void *)msta->vif,
1248 struct ieee80211_vif, drv_priv);
1249 struct ieee80211_eht_mcs_nss_supp *mcs_map;
1250 struct ieee80211_eht_cap_elem_fixed *elem;
1251 struct sta_rec_eht *eht;
1252 struct tlv *tlv;
1253
1254 if (!sta->deflink.eht_cap.has_eht)
1255 return;
1256
1257 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp;
1258 elem = &sta->deflink.eht_cap.eht_cap_elem;
1259
1260 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht));
1261
1262 eht = (struct sta_rec_eht *)tlv;
1263 eht->tid_bitmap = 0xff;
1264 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info);
1265 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info);
1266 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]);
1267
1268 if (vif->type != NL80211_IFTYPE_STATION &&
1269 (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] &
1270 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
1271 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
1272 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
1273 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) {
1274 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz,
1275 sizeof(eht->mcs_map_bw20));
1276 return;
1277 }
1278
1279 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80));
1280 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160));
1281 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320));
1282 }
1283
1284 static void
mt7996_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1285 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1286 {
1287 struct sta_rec_ht_uni *ht;
1288 struct tlv *tlv;
1289
1290 if (!sta->deflink.ht_cap.ht_supported)
1291 return;
1292
1293 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
1294
1295 ht = (struct sta_rec_ht_uni *)tlv;
1296 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
1297 ht->ampdu_param = u8_encode_bits(sta->deflink.ht_cap.ampdu_factor,
1298 IEEE80211_HT_AMPDU_PARM_FACTOR) |
1299 u8_encode_bits(sta->deflink.ht_cap.ampdu_density,
1300 IEEE80211_HT_AMPDU_PARM_DENSITY);
1301 }
1302
1303 static void
mt7996_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1304 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1305 {
1306 struct sta_rec_vht *vht;
1307 struct tlv *tlv;
1308
1309 /* For 6G band, this tlv is necessary to let hw work normally */
1310 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported)
1311 return;
1312
1313 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
1314
1315 vht = (struct sta_rec_vht *)tlv;
1316 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
1317 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
1318 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
1319 }
1320
1321 static void
mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1322 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1323 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1324 {
1325 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1326 struct sta_rec_amsdu *amsdu;
1327 struct tlv *tlv;
1328
1329 if (vif->type != NL80211_IFTYPE_STATION &&
1330 vif->type != NL80211_IFTYPE_MESH_POINT &&
1331 vif->type != NL80211_IFTYPE_AP)
1332 return;
1333
1334 if (!sta->deflink.agg.max_amsdu_len)
1335 return;
1336
1337 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
1338 amsdu = (struct sta_rec_amsdu *)tlv;
1339 amsdu->max_amsdu_num = 8;
1340 amsdu->amsdu_en = true;
1341 msta->wcid.amsdu = true;
1342
1343 switch (sta->deflink.agg.max_amsdu_len) {
1344 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
1345 amsdu->max_mpdu_size =
1346 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1347 return;
1348 case IEEE80211_MAX_MPDU_LEN_HT_7935:
1349 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1350 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1351 return;
1352 default:
1353 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1354 return;
1355 }
1356 }
1357
1358 static void
mt7996_mcu_sta_muru_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1359 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1360 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1361 {
1362 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
1363 struct sta_rec_muru *muru;
1364 struct tlv *tlv;
1365
1366 if (vif->type != NL80211_IFTYPE_STATION &&
1367 vif->type != NL80211_IFTYPE_AP)
1368 return;
1369
1370 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
1371
1372 muru = (struct sta_rec_muru *)tlv;
1373 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer ||
1374 vif->bss_conf.he_mu_beamformer ||
1375 vif->bss_conf.vht_mu_beamformer ||
1376 vif->bss_conf.vht_mu_beamformee;
1377 muru->cfg.ofdma_dl_en = true;
1378
1379 if (sta->deflink.vht_cap.vht_supported)
1380 muru->mimo_dl.vht_mu_bfee =
1381 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
1382
1383 if (!sta->deflink.he_cap.has_he)
1384 return;
1385
1386 muru->mimo_dl.partial_bw_dl_mimo =
1387 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
1388
1389 muru->mimo_ul.full_ul_mimo =
1390 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
1391 muru->mimo_ul.partial_ul_mimo =
1392 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
1393
1394 muru->ofdma_dl.punc_pream_rx =
1395 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
1396 muru->ofdma_dl.he_20m_in_40m_2g =
1397 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
1398 muru->ofdma_dl.he_20m_in_160m =
1399 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1400 muru->ofdma_dl.he_80m_in_160m =
1401 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1402
1403 muru->ofdma_ul.t_frame_dur =
1404 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
1405 muru->ofdma_ul.mu_cascading =
1406 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
1407 muru->ofdma_ul.uo_ra =
1408 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
1409 muru->ofdma_ul.rx_ctrl_frame_to_mbss =
1410 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);
1411 }
1412
1413 static inline bool
mt7996_is_ebf_supported(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1414 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif,
1415 struct ieee80211_sta *sta, bool bfee)
1416 {
1417 int sts = hweight16(phy->mt76->chainmask);
1418
1419 if (vif->type != NL80211_IFTYPE_STATION &&
1420 vif->type != NL80211_IFTYPE_AP)
1421 return false;
1422
1423 if (!bfee && sts < 2)
1424 return false;
1425
1426 if (sta->deflink.eht_cap.has_eht) {
1427 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1428 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1429
1430 if (bfee)
1431 return vif->bss_conf.eht_su_beamformee &&
1432 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]);
1433 else
1434 return vif->bss_conf.eht_su_beamformer &&
1435 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]);
1436 }
1437
1438 if (sta->deflink.he_cap.has_he) {
1439 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1440
1441 if (bfee)
1442 return vif->bss_conf.he_su_beamformee &&
1443 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1444 else
1445 return vif->bss_conf.he_su_beamformer &&
1446 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1447 }
1448
1449 if (sta->deflink.vht_cap.vht_supported) {
1450 u32 cap = sta->deflink.vht_cap.cap;
1451
1452 if (bfee)
1453 return vif->bss_conf.vht_su_beamformee &&
1454 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1455 else
1456 return vif->bss_conf.vht_su_beamformer &&
1457 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1458 }
1459
1460 return false;
1461 }
1462
1463 static void
mt7996_mcu_sta_sounding_rate(struct sta_rec_bf * bf)1464 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1465 {
1466 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1467 bf->ndp_rate = 0; /* mcs0 */
1468 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */
1469 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */
1470 }
1471
1472 static void
mt7996_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7996_phy * phy,struct sta_rec_bf * bf)1473 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1474 struct sta_rec_bf *bf)
1475 {
1476 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1477 u8 n = 0;
1478
1479 bf->tx_mode = MT_PHY_TYPE_HT;
1480
1481 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1482 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1483 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1484 mcs->tx_params);
1485 else if (mcs->rx_mask[3])
1486 n = 3;
1487 else if (mcs->rx_mask[2])
1488 n = 2;
1489 else if (mcs->rx_mask[1])
1490 n = 1;
1491
1492 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1;
1493 bf->ncol = min_t(u8, bf->nrow, n);
1494 bf->ibf_ncol = n;
1495 }
1496
1497 static void
mt7996_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7996_phy * phy,struct sta_rec_bf * bf,bool explicit)1498 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1499 struct sta_rec_bf *bf, bool explicit)
1500 {
1501 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1502 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1503 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1504 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1505 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1506
1507 bf->tx_mode = MT_PHY_TYPE_VHT;
1508
1509 if (explicit) {
1510 u8 sts, snd_dim;
1511
1512 mt7996_mcu_sta_sounding_rate(bf);
1513
1514 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1515 pc->cap);
1516 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1517 vc->cap);
1518 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1519 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1520 bf->ibf_ncol = bf->ncol;
1521
1522 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1523 bf->nrow = 1;
1524 } else {
1525 bf->nrow = tx_ant;
1526 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1527 bf->ibf_ncol = nss_mcs;
1528
1529 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1530 bf->ibf_nrow = 1;
1531 }
1532 }
1533
1534 static void
mt7996_mcu_sta_bfer_he(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7996_phy * phy,struct sta_rec_bf * bf)1535 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1536 struct mt7996_phy *phy, struct sta_rec_bf *bf)
1537 {
1538 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1539 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1540 const struct ieee80211_sta_he_cap *vc =
1541 mt76_connac_get_he_phy_cap(phy->mt76, vif);
1542 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1543 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1544 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1545 u8 snd_dim, sts;
1546
1547 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1548
1549 mt7996_mcu_sta_sounding_rate(bf);
1550
1551 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1552 pe->phy_cap_info[6]);
1553 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1554 pe->phy_cap_info[6]);
1555 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1556 ve->phy_cap_info[5]);
1557 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1558 pe->phy_cap_info[4]);
1559 bf->nrow = min_t(u8, snd_dim, sts);
1560 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1561 bf->ibf_ncol = bf->ncol;
1562
1563 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1564 return;
1565
1566 /* go over for 160MHz and 80p80 */
1567 if (pe->phy_cap_info[0] &
1568 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1569 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1570 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1571
1572 bf->ncol_gt_bw80 = nss_mcs;
1573 }
1574
1575 if (pe->phy_cap_info[0] &
1576 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1577 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1578 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1579
1580 if (bf->ncol_gt_bw80)
1581 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1582 else
1583 bf->ncol_gt_bw80 = nss_mcs;
1584 }
1585
1586 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1587 ve->phy_cap_info[5]);
1588 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1589 pe->phy_cap_info[4]);
1590
1591 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1592 }
1593
1594 static void
mt7996_mcu_sta_bfer_eht(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7996_phy * phy,struct sta_rec_bf * bf)1595 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1596 struct mt7996_phy *phy, struct sta_rec_bf *bf)
1597 {
1598 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1599 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1600 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp;
1601 const struct ieee80211_sta_eht_cap *vc =
1602 mt76_connac_get_eht_phy_cap(phy->mt76, vif);
1603 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem;
1604 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss,
1605 IEEE80211_EHT_MCS_NSS_RX) - 1;
1606 u8 snd_dim, sts;
1607
1608 bf->tx_mode = MT_PHY_TYPE_EHT_MU;
1609
1610 mt7996_mcu_sta_sounding_rate(bf);
1611
1612 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]);
1613 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]);
1614 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]);
1615 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) +
1616 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1);
1617 bf->nrow = min_t(u8, snd_dim, sts);
1618 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1619 bf->ibf_ncol = bf->ncol;
1620
1621 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160)
1622 return;
1623
1624 switch (sta->deflink.bandwidth) {
1625 case IEEE80211_STA_RX_BW_160:
1626 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]);
1627 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]);
1628 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss,
1629 IEEE80211_EHT_MCS_NSS_RX) - 1;
1630
1631 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts);
1632 bf->ncol_gt_bw80 = nss_mcs;
1633 break;
1634 case IEEE80211_STA_RX_BW_320:
1635 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) +
1636 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK,
1637 ve->phy_cap_info[3]) << 1);
1638 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]);
1639 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss,
1640 IEEE80211_EHT_MCS_NSS_RX) - 1;
1641
1642 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4;
1643 bf->ncol_gt_bw80 = nss_mcs << 4;
1644 break;
1645 default:
1646 break;
1647 }
1648 }
1649
1650 static void
mt7996_mcu_sta_bfer_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1651 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1652 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1653 {
1654 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1655 struct mt7996_phy *phy = mvif->phy;
1656 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1657 struct sta_rec_bf *bf;
1658 struct tlv *tlv;
1659 static const u8 matrix[4][4] = {
1660 {0, 0, 0, 0},
1661 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1662 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1663 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1664 };
1665 bool ebf;
1666
1667 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1668 return;
1669
1670 ebf = mt7996_is_ebf_supported(phy, vif, sta, false);
1671 if (!ebf && !dev->ibf)
1672 return;
1673
1674 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1675 bf = (struct sta_rec_bf *)tlv;
1676
1677 /* he/eht: eBF only, in accordance with spec
1678 * vht: support eBF and iBF
1679 * ht: iBF only, since mac80211 lacks of eBF support
1680 */
1681 if (sta->deflink.eht_cap.has_eht && ebf)
1682 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf);
1683 else if (sta->deflink.he_cap.has_he && ebf)
1684 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf);
1685 else if (sta->deflink.vht_cap.vht_supported)
1686 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1687 else if (sta->deflink.ht_cap.ht_supported)
1688 mt7996_mcu_sta_bfer_ht(sta, phy, bf);
1689 else
1690 return;
1691
1692 bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1693 bf->bw = sta->deflink.bandwidth;
1694 bf->ibf_dbw = sta->deflink.bandwidth;
1695 bf->ibf_nrow = tx_ant;
1696
1697 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1698 bf->ibf_timeout = 0x48;
1699 else
1700 bf->ibf_timeout = 0x18;
1701
1702 if (ebf && bf->nrow != tx_ant)
1703 bf->mem_20m = matrix[tx_ant][bf->ncol];
1704 else
1705 bf->mem_20m = matrix[bf->nrow][bf->ncol];
1706
1707 switch (sta->deflink.bandwidth) {
1708 case IEEE80211_STA_RX_BW_160:
1709 case IEEE80211_STA_RX_BW_80:
1710 bf->mem_total = bf->mem_20m * 2;
1711 break;
1712 case IEEE80211_STA_RX_BW_40:
1713 bf->mem_total = bf->mem_20m;
1714 break;
1715 case IEEE80211_STA_RX_BW_20:
1716 default:
1717 break;
1718 }
1719 }
1720
1721 static void
mt7996_mcu_sta_bfee_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1722 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1723 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1724 {
1725 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1726 struct mt7996_phy *phy = mvif->phy;
1727 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1728 struct sta_rec_bfee *bfee;
1729 struct tlv *tlv;
1730 u8 nrow = 0;
1731
1732 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1733 return;
1734
1735 if (!mt7996_is_ebf_supported(phy, vif, sta, true))
1736 return;
1737
1738 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1739 bfee = (struct sta_rec_bfee *)tlv;
1740
1741 if (sta->deflink.he_cap.has_he) {
1742 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1743
1744 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1745 pe->phy_cap_info[5]);
1746 } else if (sta->deflink.vht_cap.vht_supported) {
1747 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1748
1749 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1750 pc->cap);
1751 }
1752
1753 /* reply with identity matrix to avoid 2x2 BF negative gain */
1754 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1755 }
1756
1757 static void
mt7996_mcu_sta_tx_proc_tlv(struct sk_buff * skb)1758 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb)
1759 {
1760 struct sta_rec_tx_proc *tx_proc;
1761 struct tlv *tlv;
1762
1763 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc));
1764
1765 tx_proc = (struct sta_rec_tx_proc *)tlv;
1766 tx_proc->flag = cpu_to_le32(0);
1767 }
1768
1769 static void
mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev * dev,struct sk_buff * skb)1770 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb)
1771 {
1772 struct sta_rec_hdrt *hdrt;
1773 struct tlv *tlv;
1774
1775 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt));
1776
1777 hdrt = (struct sta_rec_hdrt *)tlv;
1778 hdrt->hdrt_mode = 1;
1779 }
1780
1781 static void
mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1782 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1783 struct ieee80211_vif *vif,
1784 struct ieee80211_sta *sta)
1785 {
1786 struct sta_rec_hdr_trans *hdr_trans;
1787 struct mt76_wcid *wcid;
1788 struct tlv *tlv;
1789
1790 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans));
1791 hdr_trans = (struct sta_rec_hdr_trans *)tlv;
1792 hdr_trans->dis_rx_hdr_tran = true;
1793
1794 if (vif->type == NL80211_IFTYPE_STATION)
1795 hdr_trans->to_ds = true;
1796 else
1797 hdr_trans->from_ds = true;
1798
1799 if (!sta)
1800 return;
1801
1802 wcid = (struct mt76_wcid *)sta->drv_priv;
1803 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
1804 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
1805 hdr_trans->to_ds = true;
1806 hdr_trans->from_ds = true;
1807 }
1808
1809 if (vif->type == NL80211_IFTYPE_MESH_POINT) {
1810 hdr_trans->to_ds = true;
1811 hdr_trans->from_ds = true;
1812 hdr_trans->mesh = true;
1813 }
1814 }
1815
1816 static enum mcu_mmps_mode
mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1817 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1818 {
1819 switch (smps) {
1820 case IEEE80211_SMPS_OFF:
1821 return MCU_MMPS_DISABLE;
1822 case IEEE80211_SMPS_STATIC:
1823 return MCU_MMPS_STATIC;
1824 case IEEE80211_SMPS_DYNAMIC:
1825 return MCU_MMPS_DYNAMIC;
1826 default:
1827 return MCU_MMPS_DISABLE;
1828 }
1829 }
1830
mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev * dev,void * data,u16 version)1831 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev,
1832 void *data, u16 version)
1833 {
1834 struct ra_fixed_rate *req;
1835 struct uni_header hdr;
1836 struct sk_buff *skb;
1837 struct tlv *tlv;
1838 int len;
1839
1840 len = sizeof(hdr) + sizeof(*req);
1841
1842 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
1843 if (!skb)
1844 return -ENOMEM;
1845
1846 skb_put_data(skb, &hdr, sizeof(hdr));
1847
1848 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req));
1849 req = (struct ra_fixed_rate *)tlv;
1850 req->version = cpu_to_le16(version);
1851 memcpy(&req->rate, data, sizeof(req->rate));
1852
1853 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1854 MCU_WM_UNI_CMD(RA), true);
1855 }
1856
mt7996_mcu_set_fixed_field(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * data,u32 field)1857 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1858 struct ieee80211_sta *sta, void *data, u32 field)
1859 {
1860 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1861 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1862 struct sta_phy_uni *phy = data;
1863 struct sta_rec_ra_fixed_uni *ra;
1864 struct sk_buff *skb;
1865 struct tlv *tlv;
1866
1867 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1868 &msta->wcid,
1869 MT7996_STA_UPDATE_MAX_SIZE);
1870 if (IS_ERR(skb))
1871 return PTR_ERR(skb);
1872
1873 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));
1874 ra = (struct sta_rec_ra_fixed_uni *)tlv;
1875
1876 switch (field) {
1877 case RATE_PARAM_AUTO:
1878 break;
1879 case RATE_PARAM_FIXED:
1880 case RATE_PARAM_FIXED_MCS:
1881 case RATE_PARAM_FIXED_GI:
1882 case RATE_PARAM_FIXED_HE_LTF:
1883 if (phy)
1884 ra->phy = *phy;
1885 break;
1886 case RATE_PARAM_MMPS_UPDATE:
1887 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode);
1888 break;
1889 default:
1890 break;
1891 }
1892 ra->field = cpu_to_le32(field);
1893
1894 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1895 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1896 }
1897
1898 static int
mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1899 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1900 struct ieee80211_sta *sta)
1901 {
1902 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1903 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1904 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1905 enum nl80211_band band = chandef->chan->band;
1906 struct sta_phy_uni phy = {};
1907 int ret, nrates = 0;
1908
1909 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \
1910 do { \
1911 u8 i, gi = mask->control[band]._gi; \
1912 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \
1913 phy.sgi = gi; \
1914 phy.he_ltf = mask->control[band].he_ltf; \
1915 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
1916 if (!mask->control[band]._mcs[i]) \
1917 continue; \
1918 nrates += hweight16(mask->control[band]._mcs[i]); \
1919 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \
1920 if (_ht) \
1921 phy.mcs += 8 * i; \
1922 } \
1923 } while (0)
1924
1925 if (sta->deflink.he_cap.has_he) {
1926 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);
1927 } else if (sta->deflink.vht_cap.vht_supported) {
1928 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);
1929 } else if (sta->deflink.ht_cap.ht_supported) {
1930 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);
1931 } else {
1932 nrates = hweight32(mask->control[band].legacy);
1933 phy.mcs = ffs(mask->control[band].legacy) - 1;
1934 }
1935 #undef __sta_phy_bitrate_mask_check
1936
1937 /* fall back to auto rate control */
1938 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&
1939 mask->control[band].he_gi == GENMASK(7, 0) &&
1940 mask->control[band].he_ltf == GENMASK(7, 0) &&
1941 nrates != 1)
1942 return 0;
1943
1944 /* fixed single rate */
1945 if (nrates == 1) {
1946 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy,
1947 RATE_PARAM_FIXED_MCS);
1948 if (ret)
1949 return ret;
1950 }
1951
1952 /* fixed GI */
1953 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||
1954 mask->control[band].he_gi != GENMASK(7, 0)) {
1955 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1956 u32 addr;
1957
1958 /* firmware updates only TXCMD but doesn't take WTBL into
1959 * account, so driver should update here to reflect the
1960 * actual txrate hardware sends out.
1961 */
1962 addr = mt7996_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);
1963 if (sta->deflink.he_cap.has_he)
1964 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);
1965 else
1966 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);
1967
1968 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy,
1969 RATE_PARAM_FIXED_GI);
1970 if (ret)
1971 return ret;
1972 }
1973
1974 /* fixed HE_LTF */
1975 if (mask->control[band].he_ltf != GENMASK(7, 0)) {
1976 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy,
1977 RATE_PARAM_FIXED_HE_LTF);
1978 if (ret)
1979 return ret;
1980 }
1981
1982 return 0;
1983 }
1984
1985 static void
mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1986 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev,
1987 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1988 {
1989 #define INIT_RCPI 180
1990 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1991 struct mt76_phy *mphy = mvif->phy->mt76;
1992 struct cfg80211_chan_def *chandef = &mphy->chandef;
1993 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1994 enum nl80211_band band = chandef->chan->band;
1995 struct sta_rec_ra_uni *ra;
1996 struct tlv *tlv;
1997 u32 supp_rate = sta->deflink.supp_rates[band];
1998 u32 cap = sta->wme ? STA_CAP_WMM : 0;
1999
2000 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
2001 ra = (struct sta_rec_ra_uni *)tlv;
2002
2003 ra->valid = true;
2004 ra->auto_rate = true;
2005 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta);
2006 ra->channel = chandef->chan->hw_value;
2007 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ?
2008 CMD_CBW_320MHZ : sta->deflink.bandwidth;
2009 ra->phy.bw = ra->bw;
2010 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode);
2011
2012 if (supp_rate) {
2013 supp_rate &= mask->control[band].legacy;
2014 ra->rate_len = hweight32(supp_rate);
2015
2016 if (band == NL80211_BAND_2GHZ) {
2017 ra->supp_mode = MODE_CCK;
2018 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
2019
2020 if (ra->rate_len > 4) {
2021 ra->supp_mode |= MODE_OFDM;
2022 ra->supp_ofdm_rate = supp_rate >> 4;
2023 }
2024 } else {
2025 ra->supp_mode = MODE_OFDM;
2026 ra->supp_ofdm_rate = supp_rate;
2027 }
2028 }
2029
2030 if (sta->deflink.ht_cap.ht_supported) {
2031 ra->supp_mode |= MODE_HT;
2032 ra->af = sta->deflink.ht_cap.ampdu_factor;
2033 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
2034
2035 cap |= STA_CAP_HT;
2036 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
2037 cap |= STA_CAP_SGI_20;
2038 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
2039 cap |= STA_CAP_SGI_40;
2040 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
2041 cap |= STA_CAP_TX_STBC;
2042 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
2043 cap |= STA_CAP_RX_STBC;
2044 if (vif->bss_conf.ht_ldpc &&
2045 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
2046 cap |= STA_CAP_LDPC;
2047
2048 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
2049 mask->control[band].ht_mcs);
2050 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
2051 }
2052
2053 if (sta->deflink.vht_cap.vht_supported) {
2054 u8 af;
2055
2056 ra->supp_mode |= MODE_VHT;
2057 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
2058 sta->deflink.vht_cap.cap);
2059 ra->af = max_t(u8, ra->af, af);
2060
2061 cap |= STA_CAP_VHT;
2062 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
2063 cap |= STA_CAP_VHT_SGI_80;
2064 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
2065 cap |= STA_CAP_VHT_SGI_160;
2066 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
2067 cap |= STA_CAP_VHT_TX_STBC;
2068 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
2069 cap |= STA_CAP_VHT_RX_STBC;
2070 if (vif->bss_conf.vht_ldpc &&
2071 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
2072 cap |= STA_CAP_VHT_LDPC;
2073
2074 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
2075 mask->control[band].vht_mcs);
2076 }
2077
2078 if (sta->deflink.he_cap.has_he) {
2079 ra->supp_mode |= MODE_HE;
2080 cap |= STA_CAP_HE;
2081
2082 if (sta->deflink.he_6ghz_capa.capa)
2083 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
2084 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
2085 }
2086 ra->sta_cap = cpu_to_le32(cap);
2087
2088 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi));
2089 }
2090
mt7996_mcu_add_rate_ctrl(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)2091 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2092 struct ieee80211_sta *sta, bool changed)
2093 {
2094 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2095 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
2096 struct sk_buff *skb;
2097 int ret;
2098
2099 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
2100 &msta->wcid,
2101 MT7996_STA_UPDATE_MAX_SIZE);
2102 if (IS_ERR(skb))
2103 return PTR_ERR(skb);
2104
2105 /* firmware rc algorithm refers to sta_rec_he for HE control.
2106 * once dev->rc_work changes the settings driver should also
2107 * update sta_rec_he here.
2108 */
2109 if (changed)
2110 mt7996_mcu_sta_he_tlv(skb, sta);
2111
2112 /* sta_rec_ra accommodates BW, NSS and only MCS range format
2113 * i.e 0-{7,8,9} for VHT.
2114 */
2115 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
2116
2117 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
2118 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
2119 if (ret)
2120 return ret;
2121
2122 return mt7996_mcu_add_rate_ctrl_fixed(dev, vif, sta);
2123 }
2124
2125 static int
mt7996_mcu_add_group(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2126 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2127 struct ieee80211_sta *sta)
2128 {
2129 #define MT_STA_BSS_GROUP 1
2130 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2131 struct mt7996_sta *msta;
2132 struct {
2133 u8 __rsv1[4];
2134
2135 __le16 tag;
2136 __le16 len;
2137 __le16 wlan_idx;
2138 u8 __rsv2[2];
2139 __le32 action;
2140 __le32 val;
2141 u8 __rsv3[8];
2142 } __packed req = {
2143 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL),
2144 .len = cpu_to_le16(sizeof(req) - 4),
2145 .action = cpu_to_le32(MT_STA_BSS_GROUP),
2146 .val = cpu_to_le32(mvif->mt76.idx % 16),
2147 };
2148
2149 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
2150 req.wlan_idx = cpu_to_le16(msta->wcid.idx);
2151
2152 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req,
2153 sizeof(req), true);
2154 }
2155
mt7996_mcu_add_sta(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool enable,bool newly)2156 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2157 struct ieee80211_sta *sta, bool enable, bool newly)
2158 {
2159 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2160 struct mt7996_sta *msta;
2161 struct sk_buff *skb;
2162 int ret;
2163
2164 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
2165
2166 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
2167 &msta->wcid,
2168 MT7996_STA_UPDATE_MAX_SIZE);
2169 if (IS_ERR(skb))
2170 return PTR_ERR(skb);
2171
2172 /* starec basic */
2173 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, sta, enable, newly);
2174
2175 if (!enable)
2176 goto out;
2177
2178 /* starec hdr trans */
2179 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta);
2180 /* starec tx proc */
2181 mt7996_mcu_sta_tx_proc_tlv(skb);
2182
2183 /* tag order is in accordance with firmware dependency. */
2184 if (sta) {
2185 /* starec hdrt mode */
2186 mt7996_mcu_sta_hdrt_tlv(dev, skb);
2187 /* starec bfer */
2188 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta);
2189 /* starec ht */
2190 mt7996_mcu_sta_ht_tlv(skb, sta);
2191 /* starec vht */
2192 mt7996_mcu_sta_vht_tlv(skb, sta);
2193 /* starec uapsd */
2194 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
2195 /* starec amsdu */
2196 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
2197 /* starec he */
2198 mt7996_mcu_sta_he_tlv(skb, sta);
2199 /* starec he 6g*/
2200 mt7996_mcu_sta_he_6g_tlv(skb, sta);
2201 /* starec eht */
2202 mt7996_mcu_sta_eht_tlv(skb, sta);
2203 /* starec muru */
2204 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta);
2205 /* starec bfee */
2206 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta);
2207 }
2208
2209 ret = mt7996_mcu_add_group(dev, vif, sta);
2210 if (ret) {
2211 dev_kfree_skb(skb);
2212 return ret;
2213 }
2214 out:
2215 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2216 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
2217 }
2218
2219 static int
mt7996_mcu_sta_key_tlv(struct mt76_wcid * wcid,struct sk_buff * skb,struct ieee80211_key_conf * key,enum set_key_cmd cmd)2220 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid,
2221 struct sk_buff *skb,
2222 struct ieee80211_key_conf *key,
2223 enum set_key_cmd cmd)
2224 {
2225 struct sta_rec_sec_uni *sec;
2226 struct tlv *tlv;
2227
2228 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
2229 sec = (struct sta_rec_sec_uni *)tlv;
2230 sec->add = cmd;
2231
2232 if (cmd == SET_KEY) {
2233 struct sec_key_uni *sec_key;
2234 u8 cipher;
2235
2236 cipher = mt76_connac_mcu_get_cipher(key->cipher);
2237 if (cipher == MCU_CIPHER_NONE)
2238 return -EOPNOTSUPP;
2239
2240 sec_key = &sec->key[0];
2241 sec_key->wlan_idx = cpu_to_le16(wcid->idx);
2242 sec_key->mgmt_prot = 0;
2243 sec_key->cipher_id = cipher;
2244 sec_key->cipher_len = sizeof(*sec_key);
2245 sec_key->key_id = key->keyidx;
2246 sec_key->key_len = key->keylen;
2247 sec_key->need_resp = 0;
2248 memcpy(sec_key->key, key->key, key->keylen);
2249
2250 if (cipher == MCU_CIPHER_TKIP) {
2251 /* Rx/Tx MIC keys are swapped */
2252 memcpy(sec_key->key + 16, key->key + 24, 8);
2253 memcpy(sec_key->key + 24, key->key + 16, 8);
2254 }
2255
2256 sec->n_cipher = 1;
2257 } else {
2258 sec->n_cipher = 0;
2259 }
2260
2261 return 0;
2262 }
2263
mt7996_mcu_add_key(struct mt76_dev * dev,struct ieee80211_vif * vif,struct ieee80211_key_conf * key,int mcu_cmd,struct mt76_wcid * wcid,enum set_key_cmd cmd)2264 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
2265 struct ieee80211_key_conf *key, int mcu_cmd,
2266 struct mt76_wcid *wcid, enum set_key_cmd cmd)
2267 {
2268 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2269 struct sk_buff *skb;
2270 int ret;
2271
2272 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
2273 MT7996_STA_UPDATE_MAX_SIZE);
2274 if (IS_ERR(skb))
2275 return PTR_ERR(skb);
2276
2277 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd);
2278 if (ret)
2279 return ret;
2280
2281 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
2282 }
2283
mt7996_mcu_get_pn(struct mt7996_dev * dev,struct ieee80211_vif * vif,u8 * pn)2284 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2285 u8 *pn)
2286 {
2287 #define TSC_TYPE_BIGTK_PN 2
2288 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2289 struct sta_rec_pn_info *pn_info;
2290 struct sk_buff *skb, *rskb;
2291 struct tlv *tlv;
2292 int ret;
2293
2294 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, &mvif->sta.wcid);
2295 if (IS_ERR(skb))
2296 return PTR_ERR(skb);
2297
2298 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info));
2299 pn_info = (struct sta_rec_pn_info *)tlv;
2300
2301 pn_info->tsc_type = TSC_TYPE_BIGTK_PN;
2302 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb,
2303 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE),
2304 true, &rskb);
2305 if (ret)
2306 return ret;
2307
2308 skb_pull(rskb, 4);
2309
2310 pn_info = (struct sta_rec_pn_info *)rskb->data;
2311 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO)
2312 memcpy(pn, pn_info->pn, 6);
2313
2314 dev_kfree_skb(rskb);
2315 return 0;
2316 }
2317
mt7996_mcu_bcn_prot_enable(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_key_conf * key)2318 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2319 struct ieee80211_key_conf *key)
2320 {
2321 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2322 struct mt7996_mcu_bcn_prot_tlv *bcn_prot;
2323 struct sk_buff *skb;
2324 struct tlv *tlv;
2325 u8 pn[6] = {};
2326 int len = sizeof(struct bss_req_hdr) +
2327 sizeof(struct mt7996_mcu_bcn_prot_tlv);
2328 int ret;
2329
2330 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len);
2331 if (IS_ERR(skb))
2332 return PTR_ERR(skb);
2333
2334 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot));
2335
2336 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv;
2337
2338 ret = mt7996_mcu_get_pn(dev, vif, pn);
2339 if (ret) {
2340 dev_kfree_skb(skb);
2341 return ret;
2342 }
2343
2344 switch (key->cipher) {
2345 case WLAN_CIPHER_SUITE_AES_CMAC:
2346 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128;
2347 break;
2348 case WLAN_CIPHER_SUITE_BIP_GMAC_128:
2349 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128;
2350 break;
2351 case WLAN_CIPHER_SUITE_BIP_GMAC_256:
2352 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256;
2353 break;
2354 case WLAN_CIPHER_SUITE_BIP_CMAC_256:
2355 default:
2356 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n");
2357 dev_kfree_skb(skb);
2358 return -EOPNOTSUPP;
2359 }
2360
2361 pn[0]++;
2362 memcpy(bcn_prot->pn, pn, 6);
2363 bcn_prot->enable = BP_SW_MODE;
2364 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN);
2365 bcn_prot->key_id = key->keyidx;
2366
2367 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2368 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2369 }
mt7996_mcu_add_dev_info(struct mt7996_phy * phy,struct ieee80211_vif * vif,bool enable)2370 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy,
2371 struct ieee80211_vif *vif, bool enable)
2372 {
2373 struct mt7996_dev *dev = phy->dev;
2374 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2375 struct {
2376 struct req_hdr {
2377 u8 omac_idx;
2378 u8 band_idx;
2379 u8 __rsv[2];
2380 } __packed hdr;
2381 struct req_tlv {
2382 __le16 tag;
2383 __le16 len;
2384 u8 active;
2385 u8 __rsv;
2386 u8 omac_addr[ETH_ALEN];
2387 } __packed tlv;
2388 } data = {
2389 .hdr = {
2390 .omac_idx = mvif->mt76.omac_idx,
2391 .band_idx = mvif->mt76.band_idx,
2392 },
2393 .tlv = {
2394 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
2395 .len = cpu_to_le16(sizeof(struct req_tlv)),
2396 .active = enable,
2397 },
2398 };
2399
2400 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
2401 return mt7996_mcu_muar_config(phy, vif, false, enable);
2402
2403 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
2404 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE),
2405 &data, sizeof(data), true);
2406 }
2407
2408 static void
mt7996_mcu_beacon_cntdwn(struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_mutable_offsets * offs)2409 mt7996_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
2410 struct sk_buff *skb,
2411 struct ieee80211_mutable_offsets *offs)
2412 {
2413 struct bss_bcn_cntdwn_tlv *info;
2414 struct tlv *tlv;
2415 u16 tag;
2416
2417 if (!offs->cntdwn_counter_offs[0])
2418 return;
2419
2420 tag = vif->bss_conf.csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC;
2421
2422 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info));
2423
2424 info = (struct bss_bcn_cntdwn_tlv *)tlv;
2425 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
2426 }
2427
2428 static void
mt7996_mcu_beacon_mbss(struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_vif * vif,struct bss_bcn_content_tlv * bcn,struct ieee80211_mutable_offsets * offs)2429 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,
2430 struct ieee80211_vif *vif, struct bss_bcn_content_tlv *bcn,
2431 struct ieee80211_mutable_offsets *offs)
2432 {
2433 struct bss_bcn_mbss_tlv *mbss;
2434 const struct element *elem;
2435 struct tlv *tlv;
2436
2437 if (!vif->bss_conf.bssid_indicator)
2438 return;
2439
2440 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss));
2441
2442 mbss = (struct bss_bcn_mbss_tlv *)tlv;
2443 mbss->offset[0] = cpu_to_le16(offs->tim_offset);
2444 mbss->bitmap = cpu_to_le32(1);
2445
2446 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,
2447 &skb->data[offs->mbssid_off],
2448 skb->len - offs->mbssid_off) {
2449 const struct element *sub_elem;
2450
2451 if (elem->datalen < 2)
2452 continue;
2453
2454 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {
2455 const struct ieee80211_bssid_index *idx;
2456 const u8 *idx_ie;
2457
2458 /* not a valid BSS profile */
2459 if (sub_elem->id || sub_elem->datalen < 4)
2460 continue;
2461
2462 /* Find WLAN_EID_MULTI_BSSID_IDX
2463 * in the merged nontransmitted profile
2464 */
2465 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,
2466 sub_elem->data, sub_elem->datalen);
2467 if (!idx_ie || idx_ie[1] < sizeof(*idx))
2468 continue;
2469
2470 idx = (void *)(idx_ie + 2);
2471 if (!idx->bssid_index || idx->bssid_index > 31)
2472 continue;
2473
2474 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie -
2475 skb->data);
2476 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));
2477 }
2478 }
2479 }
2480
2481 static void
mt7996_mcu_beacon_cont(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_bcn_content_tlv * bcn,struct ieee80211_mutable_offsets * offs)2482 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2483 struct sk_buff *rskb, struct sk_buff *skb,
2484 struct bss_bcn_content_tlv *bcn,
2485 struct ieee80211_mutable_offsets *offs)
2486 {
2487 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2488 u8 *buf;
2489
2490 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2491 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset);
2492
2493 if (offs->cntdwn_counter_offs[0]) {
2494 u16 offset = offs->cntdwn_counter_offs[0];
2495
2496 if (vif->bss_conf.csa_active)
2497 bcn->csa_ie_pos = cpu_to_le16(offset - 4);
2498 if (vif->bss_conf.color_change_active)
2499 bcn->bcc_ie_pos = cpu_to_le16(offset - 3);
2500 }
2501
2502 buf = (u8 *)bcn + sizeof(*bcn);
2503 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0,
2504 BSS_CHANGED_BEACON);
2505
2506 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2507 }
2508
mt7996_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,int en)2509 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw,
2510 struct ieee80211_vif *vif, int en)
2511 {
2512 struct mt7996_dev *dev = mt7996_hw_dev(hw);
2513 struct mt7996_phy *phy = mt7996_hw_phy(hw);
2514 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2515 struct ieee80211_mutable_offsets offs;
2516 struct ieee80211_tx_info *info;
2517 struct sk_buff *skb, *rskb;
2518 struct tlv *tlv;
2519 struct bss_bcn_content_tlv *bcn;
2520 int len;
2521
2522 if (vif->bss_conf.nontransmitted)
2523 return 0;
2524
2525 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
2526 MT7996_MAX_BSS_OFFLOAD_SIZE);
2527 if (IS_ERR(rskb))
2528 return PTR_ERR(rskb);
2529
2530 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2531 if (!skb) {
2532 dev_kfree_skb(rskb);
2533 return -EINVAL;
2534 }
2535
2536 if (skb->len > MT7996_MAX_BEACON_SIZE) {
2537 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2538 dev_kfree_skb(rskb);
2539 dev_kfree_skb(skb);
2540 return -EINVAL;
2541 }
2542
2543 info = IEEE80211_SKB_CB(skb);
2544 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2545
2546 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + skb->len, 4);
2547 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len);
2548 bcn = (struct bss_bcn_content_tlv *)tlv;
2549 bcn->enable = en;
2550 if (!en)
2551 goto out;
2552
2553 mt7996_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2554 mt7996_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs);
2555 mt7996_mcu_beacon_cntdwn(vif, rskb, skb, &offs);
2556 out:
2557 dev_kfree_skb(skb);
2558 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2559 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2560 }
2561
mt7996_mcu_beacon_inband_discov(struct mt7996_dev * dev,struct ieee80211_vif * vif,u32 changed)2562 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev,
2563 struct ieee80211_vif *vif, u32 changed)
2564 {
2565 #define OFFLOAD_TX_MODE_SU BIT(0)
2566 #define OFFLOAD_TX_MODE_MU BIT(1)
2567 struct ieee80211_hw *hw = mt76_hw(dev);
2568 struct mt7996_phy *phy = mt7996_hw_phy(hw);
2569 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2570 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
2571 enum nl80211_band band = chandef->chan->band;
2572 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2573 struct bss_inband_discovery_tlv *discov;
2574 struct ieee80211_tx_info *info;
2575 struct sk_buff *rskb, *skb = NULL;
2576 struct tlv *tlv;
2577 u8 *buf, interval;
2578 int len;
2579
2580 if (vif->bss_conf.nontransmitted)
2581 return 0;
2582
2583 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
2584 MT7996_MAX_BSS_OFFLOAD_SIZE);
2585 if (IS_ERR(rskb))
2586 return PTR_ERR(rskb);
2587
2588 if (changed & BSS_CHANGED_FILS_DISCOVERY &&
2589 vif->bss_conf.fils_discovery.max_interval) {
2590 interval = vif->bss_conf.fils_discovery.max_interval;
2591 skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
2592 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
2593 vif->bss_conf.unsol_bcast_probe_resp_interval) {
2594 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
2595 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
2596 }
2597
2598 if (!skb) {
2599 dev_kfree_skb(rskb);
2600 return -EINVAL;
2601 }
2602
2603 if (skb->len > MT7996_MAX_BEACON_SIZE) {
2604 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
2605 dev_kfree_skb(rskb);
2606 dev_kfree_skb(skb);
2607 return -EINVAL;
2608 }
2609
2610 info = IEEE80211_SKB_CB(skb);
2611 info->control.vif = vif;
2612 info->band = band;
2613 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2614
2615 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4);
2616 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len);
2617
2618 discov = (struct bss_inband_discovery_tlv *)tlv;
2619 discov->tx_mode = OFFLOAD_TX_MODE_SU;
2620 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
2621 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
2622 discov->tx_interval = interval;
2623 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2624 discov->enable = true;
2625 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED);
2626
2627 buf = (u8 *)tlv + sizeof(*discov);
2628
2629 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed);
2630
2631 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2632
2633 dev_kfree_skb(skb);
2634
2635 return mt76_mcu_skb_send_msg(&dev->mt76, rskb,
2636 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2637 }
2638
mt7996_driver_own(struct mt7996_dev * dev,u8 band)2639 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band)
2640 {
2641 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2642 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2643 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2644 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2645 return -EIO;
2646 }
2647
2648 /* clear irq when the driver own success */
2649 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2650 MT_TOP_LPCR_HOST_BAND_STAT);
2651
2652 return 0;
2653 }
2654
mt7996_patch_sec_mode(u32 key_info)2655 static u32 mt7996_patch_sec_mode(u32 key_info)
2656 {
2657 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0;
2658
2659 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN)
2660 return 0;
2661
2662 if (sec == MT7996_SEC_MODE_AES)
2663 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY);
2664 else
2665 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY);
2666
2667 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV |
2668 u32_encode_bits(key, MT7996_SEC_KEY_IDX);
2669 }
2670
mt7996_load_patch(struct mt7996_dev * dev)2671 static int mt7996_load_patch(struct mt7996_dev *dev)
2672 {
2673 const struct mt7996_patch_hdr *hdr;
2674 const struct firmware *fw = NULL;
2675 int i, ret, sem;
2676
2677 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1);
2678 switch (sem) {
2679 case PATCH_IS_DL:
2680 return 0;
2681 case PATCH_NOT_DL_SEM_SUCCESS:
2682 break;
2683 default:
2684 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n");
2685 return -EAGAIN;
2686 }
2687
2688 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev);
2689 if (ret)
2690 goto out;
2691
2692 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2693 dev_err(dev->mt76.dev, "Invalid firmware\n");
2694 ret = -EINVAL;
2695 goto out;
2696 }
2697
2698 hdr = (const struct mt7996_patch_hdr *)(fw->data);
2699
2700 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
2701 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
2702
2703 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
2704 struct mt7996_patch_sec *sec;
2705 const u8 *dl;
2706 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP;
2707
2708 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) +
2709 i * sizeof(*sec));
2710 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
2711 PATCH_SEC_TYPE_INFO) {
2712 ret = -EINVAL;
2713 goto out;
2714 }
2715
2716 addr = be32_to_cpu(sec->info.addr);
2717 len = be32_to_cpu(sec->info.len);
2718 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx);
2719 dl = fw->data + be32_to_cpu(sec->offs);
2720
2721 mode |= mt7996_patch_sec_mode(sec_key_idx);
2722
2723 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2724 mode);
2725 if (ret) {
2726 dev_err(dev->mt76.dev, "Download request failed\n");
2727 goto out;
2728 }
2729
2730 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2731 dl, len, 4096);
2732 if (ret) {
2733 dev_err(dev->mt76.dev, "Failed to send patch\n");
2734 goto out;
2735 }
2736 }
2737
2738 ret = mt76_connac_mcu_start_patch(&dev->mt76);
2739 if (ret)
2740 dev_err(dev->mt76.dev, "Failed to start patch\n");
2741
2742 out:
2743 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0);
2744 switch (sem) {
2745 case PATCH_REL_SEM_SUCCESS:
2746 break;
2747 default:
2748 ret = -EAGAIN;
2749 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n");
2750 break;
2751 }
2752 release_firmware(fw);
2753
2754 return ret;
2755 }
2756
2757 static int
mt7996_mcu_send_ram_firmware(struct mt7996_dev * dev,const struct mt7996_fw_trailer * hdr,const u8 * data,enum mt7996_ram_type type)2758 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
2759 const struct mt7996_fw_trailer *hdr,
2760 const u8 *data, enum mt7996_ram_type type)
2761 {
2762 int i, offset = 0;
2763 u32 override = 0, option = 0;
2764
2765 for (i = 0; i < hdr->n_region; i++) {
2766 const struct mt7996_fw_region *region;
2767 int err;
2768 u32 len, addr, mode;
2769
2770 region = (const struct mt7996_fw_region *)((const u8 *)hdr -
2771 (hdr->n_region - i) * sizeof(*region));
2772 /* DSP and WA use same mode */
2773 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
2774 region->feature_set,
2775 type != MT7996_RAM_TYPE_WM);
2776 len = le32_to_cpu(region->len);
2777 addr = le32_to_cpu(region->addr);
2778
2779 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2780 override = addr;
2781
2782 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2783 mode);
2784 if (err) {
2785 dev_err(dev->mt76.dev, "Download request failed\n");
2786 return err;
2787 }
2788
2789 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2790 data + offset, len, 4096);
2791 if (err) {
2792 dev_err(dev->mt76.dev, "Failed to send firmware.\n");
2793 return err;
2794 }
2795
2796 offset += len;
2797 }
2798
2799 if (override)
2800 option |= FW_START_OVERRIDE;
2801
2802 if (type == MT7996_RAM_TYPE_WA)
2803 option |= FW_START_WORKING_PDA_CR4;
2804 else if (type == MT7996_RAM_TYPE_DSP)
2805 option |= FW_START_WORKING_PDA_DSP;
2806
2807 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option);
2808 }
2809
__mt7996_load_ram(struct mt7996_dev * dev,const char * fw_type,const char * fw_file,enum mt7996_ram_type ram_type)2810 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type,
2811 const char *fw_file, enum mt7996_ram_type ram_type)
2812 {
2813 const struct mt7996_fw_trailer *hdr;
2814 const struct firmware *fw;
2815 int ret;
2816
2817 ret = request_firmware(&fw, fw_file, dev->mt76.dev);
2818 if (ret)
2819 return ret;
2820
2821 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2822 dev_err(dev->mt76.dev, "Invalid firmware\n");
2823 ret = -EINVAL;
2824 goto out;
2825 }
2826
2827 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2828 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n",
2829 fw_type, hdr->fw_ver, hdr->build_date);
2830
2831 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type);
2832 if (ret) {
2833 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type);
2834 goto out;
2835 }
2836
2837 snprintf(dev->mt76.hw->wiphy->fw_version,
2838 sizeof(dev->mt76.hw->wiphy->fw_version),
2839 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2840
2841 out:
2842 release_firmware(fw);
2843
2844 return ret;
2845 }
2846
mt7996_load_ram(struct mt7996_dev * dev)2847 static int mt7996_load_ram(struct mt7996_dev *dev)
2848 {
2849 int ret;
2850
2851 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM),
2852 MT7996_RAM_TYPE_WM);
2853 if (ret)
2854 return ret;
2855
2856 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP),
2857 MT7996_RAM_TYPE_DSP);
2858 if (ret)
2859 return ret;
2860
2861 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA),
2862 MT7996_RAM_TYPE_WA);
2863 }
2864
2865 static int
mt7996_firmware_state(struct mt7996_dev * dev,bool wa)2866 mt7996_firmware_state(struct mt7996_dev *dev, bool wa)
2867 {
2868 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2869 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2870
2871 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2872 state, 1000)) {
2873 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2874 return -EIO;
2875 }
2876 return 0;
2877 }
2878
2879 static int
mt7996_mcu_restart(struct mt76_dev * dev)2880 mt7996_mcu_restart(struct mt76_dev *dev)
2881 {
2882 struct {
2883 u8 __rsv1[4];
2884
2885 __le16 tag;
2886 __le16 len;
2887 u8 power_mode;
2888 u8 __rsv2[3];
2889 } __packed req = {
2890 .tag = cpu_to_le16(UNI_POWER_OFF),
2891 .len = cpu_to_le16(sizeof(req) - 4),
2892 .power_mode = 1,
2893 };
2894
2895 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req,
2896 sizeof(req), false);
2897 }
2898
mt7996_load_firmware(struct mt7996_dev * dev)2899 static int mt7996_load_firmware(struct mt7996_dev *dev)
2900 {
2901 int ret;
2902
2903 /* make sure fw is download state */
2904 if (mt7996_firmware_state(dev, false)) {
2905 /* restart firmware once */
2906 mt7996_mcu_restart(&dev->mt76);
2907 ret = mt7996_firmware_state(dev, false);
2908 if (ret) {
2909 dev_err(dev->mt76.dev,
2910 "Firmware is not ready for download\n");
2911 return ret;
2912 }
2913 }
2914
2915 ret = mt7996_load_patch(dev);
2916 if (ret)
2917 return ret;
2918
2919 ret = mt7996_load_ram(dev);
2920 if (ret)
2921 return ret;
2922
2923 ret = mt7996_firmware_state(dev, true);
2924 if (ret)
2925 return ret;
2926
2927 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2928
2929 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2930
2931 return 0;
2932 }
2933
mt7996_mcu_fw_log_2_host(struct mt7996_dev * dev,u8 type,u8 ctrl)2934 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl)
2935 {
2936 struct {
2937 u8 _rsv[4];
2938
2939 __le16 tag;
2940 __le16 len;
2941 u8 ctrl;
2942 u8 interval;
2943 u8 _rsv2[2];
2944 } __packed data = {
2945 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL),
2946 .len = cpu_to_le16(sizeof(data) - 4),
2947 .ctrl = ctrl,
2948 };
2949
2950 if (type == MCU_FW_LOG_WA)
2951 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG),
2952 &data, sizeof(data), true);
2953
2954 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2955 sizeof(data), true);
2956 }
2957
mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev * dev,u32 module,u8 level)2958 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level)
2959 {
2960 struct {
2961 u8 _rsv[4];
2962
2963 __le16 tag;
2964 __le16 len;
2965 __le32 module_idx;
2966 u8 level;
2967 u8 _rsv2[3];
2968 } data = {
2969 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL),
2970 .len = cpu_to_le16(sizeof(data) - 4),
2971 .module_idx = cpu_to_le32(module),
2972 .level = level,
2973 };
2974
2975 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2976 sizeof(data), false);
2977 }
2978
mt7996_mcu_set_mwds(struct mt7996_dev * dev,bool enabled)2979 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled)
2980 {
2981 struct {
2982 u8 enable;
2983 u8 _rsv[3];
2984 } __packed req = {
2985 .enable = enabled
2986 };
2987
2988 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2989 sizeof(req), false);
2990 }
2991
mt7996_add_rx_airtime_tlv(struct sk_buff * skb,u8 band_idx)2992 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx)
2993 {
2994 struct vow_rx_airtime *req;
2995 struct tlv *tlv;
2996
2997 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req));
2998 req = (struct vow_rx_airtime *)tlv;
2999 req->enable = true;
3000 req->band = band_idx;
3001
3002 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req));
3003 req = (struct vow_rx_airtime *)tlv;
3004 req->enable = true;
3005 req->band = band_idx;
3006 }
3007
3008 static int
mt7996_mcu_init_rx_airtime(struct mt7996_dev * dev)3009 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev)
3010 {
3011 struct uni_header hdr = {};
3012 struct sk_buff *skb;
3013 int len, num, i;
3014
3015 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) +
3016 mt7996_band_valid(dev, MT_BAND2));
3017 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime);
3018 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3019 if (!skb)
3020 return -ENOMEM;
3021
3022 skb_put_data(skb, &hdr, sizeof(hdr));
3023
3024 for (i = 0; i < __MT_MAX_BAND; i++) {
3025 if (mt7996_band_valid(dev, i))
3026 mt7996_add_rx_airtime_tlv(skb, i);
3027 }
3028
3029 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3030 MCU_WM_UNI_CMD(VOW), true);
3031 }
3032
mt7996_mcu_init_firmware(struct mt7996_dev * dev)3033 int mt7996_mcu_init_firmware(struct mt7996_dev *dev)
3034 {
3035 int ret;
3036
3037 /* force firmware operation mode into normal state,
3038 * which should be set before firmware download stage.
3039 */
3040 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
3041
3042 ret = mt7996_driver_own(dev, 0);
3043 if (ret)
3044 return ret;
3045 /* set driver own for band1 when two hif exist */
3046 if (dev->hif2) {
3047 ret = mt7996_driver_own(dev, 1);
3048 if (ret)
3049 return ret;
3050 }
3051
3052 ret = mt7996_load_firmware(dev);
3053 if (ret)
3054 return ret;
3055
3056 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
3057 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
3058 if (ret)
3059 return ret;
3060
3061 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
3062 if (ret)
3063 return ret;
3064
3065 ret = mt7996_mcu_set_mwds(dev, 1);
3066 if (ret)
3067 return ret;
3068
3069 ret = mt7996_mcu_init_rx_airtime(dev);
3070 if (ret)
3071 return ret;
3072
3073 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
3074 MCU_WA_PARAM_RED, 0, 0);
3075 }
3076
mt7996_mcu_init(struct mt7996_dev * dev)3077 int mt7996_mcu_init(struct mt7996_dev *dev)
3078 {
3079 static const struct mt76_mcu_ops mt7996_mcu_ops = {
3080 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */
3081 .mcu_skb_send_msg = mt7996_mcu_send_message,
3082 .mcu_parse_response = mt7996_mcu_parse_response,
3083 };
3084
3085 dev->mt76.mcu_ops = &mt7996_mcu_ops;
3086
3087 return mt7996_mcu_init_firmware(dev);
3088 }
3089
mt7996_mcu_exit(struct mt7996_dev * dev)3090 void mt7996_mcu_exit(struct mt7996_dev *dev)
3091 {
3092 mt7996_mcu_restart(&dev->mt76);
3093 if (mt7996_firmware_state(dev, false)) {
3094 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
3095 goto out;
3096 }
3097
3098 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
3099 if (dev->hif2)
3100 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
3101 MT_TOP_LPCR_HOST_FW_OWN);
3102 out:
3103 skb_queue_purge(&dev->mt76.mcu.res_q);
3104 }
3105
mt7996_mcu_set_hdr_trans(struct mt7996_dev * dev,bool hdr_trans)3106 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans)
3107 {
3108 struct {
3109 u8 __rsv[4];
3110 } __packed hdr;
3111 struct hdr_trans_blacklist *req_blacklist;
3112 struct hdr_trans_en *req_en;
3113 struct sk_buff *skb;
3114 struct tlv *tlv;
3115 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr);
3116
3117 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3118 if (!skb)
3119 return -ENOMEM;
3120
3121 skb_put_data(skb, &hdr, sizeof(hdr));
3122
3123 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en));
3124 req_en = (struct hdr_trans_en *)tlv;
3125 req_en->enable = hdr_trans;
3126
3127 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN,
3128 sizeof(struct hdr_trans_vlan));
3129
3130 if (hdr_trans) {
3131 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST,
3132 sizeof(*req_blacklist));
3133 req_blacklist = (struct hdr_trans_blacklist *)tlv;
3134 req_blacklist->enable = 1;
3135 req_blacklist->type = cpu_to_le16(ETH_P_PAE);
3136 }
3137
3138 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3139 MCU_WM_UNI_CMD(RX_HDR_TRANS), true);
3140 }
3141
mt7996_mcu_set_tx(struct mt7996_dev * dev,struct ieee80211_vif * vif)3142 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif)
3143 {
3144 #define MCU_EDCA_AC_PARAM 0
3145 #define WMM_AIFS_SET BIT(0)
3146 #define WMM_CW_MIN_SET BIT(1)
3147 #define WMM_CW_MAX_SET BIT(2)
3148 #define WMM_TXOP_SET BIT(3)
3149 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \
3150 WMM_CW_MAX_SET | WMM_TXOP_SET)
3151 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3152 struct {
3153 u8 bss_idx;
3154 u8 __rsv[3];
3155 } __packed hdr = {
3156 .bss_idx = mvif->mt76.idx,
3157 };
3158 struct sk_buff *skb;
3159 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca);
3160 int ac;
3161
3162 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3163 if (!skb)
3164 return -ENOMEM;
3165
3166 skb_put_data(skb, &hdr, sizeof(hdr));
3167
3168 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
3169 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
3170 struct edca *e;
3171 struct tlv *tlv;
3172
3173 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e));
3174
3175 e = (struct edca *)tlv;
3176 e->set = WMM_PARAM_SET;
3177 e->queue = ac;
3178 e->aifs = q->aifs;
3179 e->txop = cpu_to_le16(q->txop);
3180
3181 if (q->cw_min)
3182 e->cw_min = fls(q->cw_min);
3183 else
3184 e->cw_min = 5;
3185
3186 if (q->cw_max)
3187 e->cw_max = fls(q->cw_max);
3188 else
3189 e->cw_max = 10;
3190 }
3191
3192 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3193 MCU_WM_UNI_CMD(EDCA_UPDATE), true);
3194 }
3195
mt7996_mcu_set_fcc5_lpn(struct mt7996_dev * dev,int val)3196 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val)
3197 {
3198 struct {
3199 u8 _rsv[4];
3200
3201 __le16 tag;
3202 __le16 len;
3203
3204 __le32 ctrl;
3205 __le16 min_lpn;
3206 u8 rsv[2];
3207 } __packed req = {
3208 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
3209 .len = cpu_to_le16(sizeof(req) - 4),
3210
3211 .ctrl = cpu_to_le32(0x1),
3212 .min_lpn = cpu_to_le16(val),
3213 };
3214
3215 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3216 &req, sizeof(req), true);
3217 }
3218
mt7996_mcu_set_pulse_th(struct mt7996_dev * dev,const struct mt7996_dfs_pulse * pulse)3219 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev,
3220 const struct mt7996_dfs_pulse *pulse)
3221 {
3222 struct {
3223 u8 _rsv[4];
3224
3225 __le16 tag;
3226 __le16 len;
3227
3228 __le32 ctrl;
3229
3230 __le32 max_width; /* us */
3231 __le32 max_pwr; /* dbm */
3232 __le32 min_pwr; /* dbm */
3233 __le32 min_stgr_pri; /* us */
3234 __le32 max_stgr_pri; /* us */
3235 __le32 min_cr_pri; /* us */
3236 __le32 max_cr_pri; /* us */
3237 } __packed req = {
3238 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
3239 .len = cpu_to_le16(sizeof(req) - 4),
3240
3241 .ctrl = cpu_to_le32(0x3),
3242
3243 #define __req_field(field) .field = cpu_to_le32(pulse->field)
3244 __req_field(max_width),
3245 __req_field(max_pwr),
3246 __req_field(min_pwr),
3247 __req_field(min_stgr_pri),
3248 __req_field(max_stgr_pri),
3249 __req_field(min_cr_pri),
3250 __req_field(max_cr_pri),
3251 #undef __req_field
3252 };
3253
3254 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3255 &req, sizeof(req), true);
3256 }
3257
mt7996_mcu_set_radar_th(struct mt7996_dev * dev,int index,const struct mt7996_dfs_pattern * pattern)3258 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index,
3259 const struct mt7996_dfs_pattern *pattern)
3260 {
3261 struct {
3262 u8 _rsv[4];
3263
3264 __le16 tag;
3265 __le16 len;
3266
3267 __le32 ctrl;
3268 __le16 radar_type;
3269
3270 u8 enb;
3271 u8 stgr;
3272 u8 min_crpn;
3273 u8 max_crpn;
3274 u8 min_crpr;
3275 u8 min_pw;
3276 __le32 min_pri;
3277 __le32 max_pri;
3278 u8 max_pw;
3279 u8 min_crbn;
3280 u8 max_crbn;
3281 u8 min_stgpn;
3282 u8 max_stgpn;
3283 u8 min_stgpr;
3284 u8 rsv[2];
3285 __le32 min_stgpr_diff;
3286 } __packed req = {
3287 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
3288 .len = cpu_to_le16(sizeof(req) - 4),
3289
3290 .ctrl = cpu_to_le32(0x2),
3291 .radar_type = cpu_to_le16(index),
3292
3293 #define __req_field_u8(field) .field = pattern->field
3294 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
3295 __req_field_u8(enb),
3296 __req_field_u8(stgr),
3297 __req_field_u8(min_crpn),
3298 __req_field_u8(max_crpn),
3299 __req_field_u8(min_crpr),
3300 __req_field_u8(min_pw),
3301 __req_field_u32(min_pri),
3302 __req_field_u32(max_pri),
3303 __req_field_u8(max_pw),
3304 __req_field_u8(min_crbn),
3305 __req_field_u8(max_crbn),
3306 __req_field_u8(min_stgpn),
3307 __req_field_u8(max_stgpn),
3308 __req_field_u8(min_stgpr),
3309 __req_field_u32(min_stgpr_diff),
3310 #undef __req_field_u8
3311 #undef __req_field_u32
3312 };
3313
3314 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3315 &req, sizeof(req), true);
3316 }
3317
3318 static int
mt7996_mcu_background_chain_ctrl(struct mt7996_phy * phy,struct cfg80211_chan_def * chandef,int cmd)3319 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy,
3320 struct cfg80211_chan_def *chandef,
3321 int cmd)
3322 {
3323 struct mt7996_dev *dev = phy->dev;
3324 struct mt76_phy *mphy = phy->mt76;
3325 struct ieee80211_channel *chan = mphy->chandef.chan;
3326 int freq = mphy->chandef.center_freq1;
3327 struct mt7996_mcu_background_chain_ctrl req = {
3328 .tag = cpu_to_le16(0),
3329 .len = cpu_to_le16(sizeof(req) - 4),
3330 .monitor_scan_type = 2, /* simple rx */
3331 };
3332
3333 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
3334 return -EINVAL;
3335
3336 if (!cfg80211_chandef_valid(&mphy->chandef))
3337 return -EINVAL;
3338
3339 switch (cmd) {
3340 case CH_SWITCH_BACKGROUND_SCAN_START: {
3341 req.chan = chan->hw_value;
3342 req.central_chan = ieee80211_frequency_to_channel(freq);
3343 req.bw = mt76_connac_chan_bw(&mphy->chandef);
3344 req.monitor_chan = chandef->chan->hw_value;
3345 req.monitor_central_chan =
3346 ieee80211_frequency_to_channel(chandef->center_freq1);
3347 req.monitor_bw = mt76_connac_chan_bw(chandef);
3348 req.band_idx = phy->mt76->band_idx;
3349 req.scan_mode = 1;
3350 break;
3351 }
3352 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
3353 req.monitor_chan = chandef->chan->hw_value;
3354 req.monitor_central_chan =
3355 ieee80211_frequency_to_channel(chandef->center_freq1);
3356 req.band_idx = phy->mt76->band_idx;
3357 req.scan_mode = 2;
3358 break;
3359 case CH_SWITCH_BACKGROUND_SCAN_STOP:
3360 req.chan = chan->hw_value;
3361 req.central_chan = ieee80211_frequency_to_channel(freq);
3362 req.bw = mt76_connac_chan_bw(&mphy->chandef);
3363 req.tx_stream = hweight8(mphy->antenna_mask);
3364 req.rx_stream = mphy->antenna_mask;
3365 break;
3366 default:
3367 return -EINVAL;
3368 }
3369 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
3370
3371 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL),
3372 &req, sizeof(req), false);
3373 }
3374
mt7996_mcu_rdd_background_enable(struct mt7996_phy * phy,struct cfg80211_chan_def * chandef)3375 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy,
3376 struct cfg80211_chan_def *chandef)
3377 {
3378 struct mt7996_dev *dev = phy->dev;
3379 int err, region;
3380
3381 if (!chandef) { /* disable offchain */
3382 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2,
3383 0, 0);
3384 if (err)
3385 return err;
3386
3387 return mt7996_mcu_background_chain_ctrl(phy, NULL,
3388 CH_SWITCH_BACKGROUND_SCAN_STOP);
3389 }
3390
3391 err = mt7996_mcu_background_chain_ctrl(phy, chandef,
3392 CH_SWITCH_BACKGROUND_SCAN_START);
3393 if (err)
3394 return err;
3395
3396 switch (dev->mt76.region) {
3397 case NL80211_DFS_ETSI:
3398 region = 0;
3399 break;
3400 case NL80211_DFS_JP:
3401 region = 2;
3402 break;
3403 case NL80211_DFS_FCC:
3404 default:
3405 region = 1;
3406 break;
3407 }
3408
3409 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2,
3410 0, region);
3411 }
3412
mt7996_mcu_set_chan_info(struct mt7996_phy * phy,u16 tag)3413 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag)
3414 {
3415 static const u8 ch_band[] = {
3416 [NL80211_BAND_2GHZ] = 0,
3417 [NL80211_BAND_5GHZ] = 1,
3418 [NL80211_BAND_6GHZ] = 2,
3419 };
3420 struct mt7996_dev *dev = phy->dev;
3421 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3422 int freq1 = chandef->center_freq1;
3423 u8 band_idx = phy->mt76->band_idx;
3424 struct {
3425 /* fixed field */
3426 u8 __rsv[4];
3427
3428 __le16 tag;
3429 __le16 len;
3430 u8 control_ch;
3431 u8 center_ch;
3432 u8 bw;
3433 u8 tx_path_num;
3434 u8 rx_path; /* mask or num */
3435 u8 switch_reason;
3436 u8 band_idx;
3437 u8 center_ch2; /* for 80+80 only */
3438 __le16 cac_case;
3439 u8 channel_band;
3440 u8 rsv0;
3441 __le32 outband_freq;
3442 u8 txpower_drop;
3443 u8 ap_bw;
3444 u8 ap_center_ch;
3445 u8 rsv1[53];
3446 } __packed req = {
3447 .tag = cpu_to_le16(tag),
3448 .len = cpu_to_le16(sizeof(req) - 4),
3449 .control_ch = chandef->chan->hw_value,
3450 .center_ch = ieee80211_frequency_to_channel(freq1),
3451 .bw = mt76_connac_chan_bw(chandef),
3452 .tx_path_num = hweight16(phy->mt76->chainmask),
3453 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx],
3454 .band_idx = band_idx,
3455 .channel_band = ch_band[chandef->chan->band],
3456 };
3457
3458 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
3459 req.switch_reason = CH_SWITCH_NORMAL;
3460 else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL ||
3461 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
3462 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
3463 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
3464 NL80211_IFTYPE_AP))
3465 req.switch_reason = CH_SWITCH_DFS;
3466 else
3467 req.switch_reason = CH_SWITCH_NORMAL;
3468
3469 if (tag == UNI_CHANNEL_SWITCH)
3470 req.rx_path = hweight8(req.rx_path);
3471
3472 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
3473 int freq2 = chandef->center_freq2;
3474
3475 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
3476 }
3477
3478 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH),
3479 &req, sizeof(req), true);
3480 }
3481
mt7996_mcu_set_eeprom_flash(struct mt7996_dev * dev)3482 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev)
3483 {
3484 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
3485 #define PAGE_IDX_MASK GENMASK(4, 2)
3486 #define PER_PAGE_SIZE 0x400
3487 struct mt7996_mcu_eeprom req = {
3488 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3489 .buffer_mode = EE_MODE_BUFFER
3490 };
3491 u16 eeprom_size = MT7996_EEPROM_SIZE;
3492 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
3493 u8 *eep = (u8 *)dev->mt76.eeprom.data;
3494 int eep_len, i;
3495
3496 for (i = 0; i < total; i++, eep += eep_len) {
3497 struct sk_buff *skb;
3498 int ret, msg_len;
3499
3500 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
3501 eep_len = eeprom_size % PER_PAGE_SIZE;
3502 else
3503 eep_len = PER_PAGE_SIZE;
3504
3505 msg_len = sizeof(req) + eep_len;
3506 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len);
3507 if (!skb)
3508 return -ENOMEM;
3509
3510 req.len = cpu_to_le16(msg_len - 4);
3511 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
3512 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
3513 req.buf_len = cpu_to_le16(eep_len);
3514
3515 skb_put_data(skb, &req, sizeof(req));
3516 skb_put_data(skb, eep, eep_len);
3517
3518 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
3519 MCU_WM_UNI_CMD(EFUSE_CTRL), true);
3520 if (ret)
3521 return ret;
3522 }
3523
3524 return 0;
3525 }
3526
mt7996_mcu_set_eeprom(struct mt7996_dev * dev)3527 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
3528 {
3529 struct mt7996_mcu_eeprom req = {
3530 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3531 .len = cpu_to_le16(sizeof(req) - 4),
3532 .buffer_mode = EE_MODE_EFUSE,
3533 .format = EE_FORMAT_WHOLE
3534 };
3535
3536 if (dev->flash_mode)
3537 return mt7996_mcu_set_eeprom_flash(dev);
3538
3539 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
3540 &req, sizeof(req), true);
3541 }
3542
mt7996_mcu_get_eeprom(struct mt7996_dev * dev,u32 offset)3543 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset)
3544 {
3545 struct {
3546 u8 _rsv[4];
3547
3548 __le16 tag;
3549 __le16 len;
3550 __le32 addr;
3551 __le32 valid;
3552 u8 data[16];
3553 } __packed req = {
3554 .tag = cpu_to_le16(UNI_EFUSE_ACCESS),
3555 .len = cpu_to_le16(sizeof(req) - 4),
3556 .addr = cpu_to_le32(round_down(offset,
3557 MT7996_EEPROM_BLOCK_SIZE)),
3558 };
3559 struct sk_buff *skb;
3560 bool valid;
3561 int ret;
3562
3563 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3564 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL),
3565 &req, sizeof(req), true, &skb);
3566 if (ret)
3567 return ret;
3568
3569 valid = le32_to_cpu(*(__le32 *)(skb->data + 16));
3570 if (valid) {
3571 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12));
3572 u8 *buf = (u8 *)dev->mt76.eeprom.data + addr;
3573
3574 skb_pull(skb, 48);
3575 memcpy(buf, skb->data, MT7996_EEPROM_BLOCK_SIZE);
3576 }
3577
3578 dev_kfree_skb(skb);
3579
3580 return 0;
3581 }
3582
mt7996_mcu_get_eeprom_free_block(struct mt7996_dev * dev,u8 * block_num)3583 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num)
3584 {
3585 struct {
3586 u8 _rsv[4];
3587
3588 __le16 tag;
3589 __le16 len;
3590 u8 num;
3591 u8 version;
3592 u8 die_idx;
3593 u8 _rsv2;
3594 } __packed req = {
3595 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK),
3596 .len = cpu_to_le16(sizeof(req) - 4),
3597 .version = 2,
3598 };
3599 struct sk_buff *skb;
3600 int ret;
3601
3602 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req,
3603 sizeof(req), true, &skb);
3604 if (ret)
3605 return ret;
3606
3607 *block_num = *(u8 *)(skb->data + 8);
3608 dev_kfree_skb(skb);
3609
3610 return 0;
3611 }
3612
mt7996_mcu_get_chip_config(struct mt7996_dev * dev,u32 * cap)3613 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap)
3614 {
3615 #define NIC_CAP 3
3616 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21
3617 struct {
3618 u8 _rsv[4];
3619
3620 __le16 tag;
3621 __le16 len;
3622 } __packed req = {
3623 .tag = cpu_to_le16(NIC_CAP),
3624 .len = cpu_to_le16(sizeof(req) - 4),
3625 };
3626 struct sk_buff *skb;
3627 u8 *buf;
3628 int ret;
3629
3630 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3631 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req,
3632 sizeof(req), true, &skb);
3633 if (ret)
3634 return ret;
3635
3636 /* fixed field */
3637 skb_pull(skb, 4);
3638
3639 buf = skb->data;
3640 while (buf - skb->data < skb->len) {
3641 struct tlv *tlv = (struct tlv *)buf;
3642
3643 switch (le16_to_cpu(tlv->tag)) {
3644 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION:
3645 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv)));
3646 break;
3647 default:
3648 break;
3649 }
3650
3651 buf += le16_to_cpu(tlv->len);
3652 }
3653
3654 dev_kfree_skb(skb);
3655
3656 return 0;
3657 }
3658
mt7996_mcu_get_chan_mib_info(struct mt7996_phy * phy,bool chan_switch)3659 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch)
3660 {
3661 struct {
3662 struct {
3663 u8 band;
3664 u8 __rsv[3];
3665 } hdr;
3666 struct {
3667 __le16 tag;
3668 __le16 len;
3669 __le32 offs;
3670 } data[4];
3671 } __packed req = {
3672 .hdr.band = phy->mt76->band_idx,
3673 };
3674 /* strict order */
3675 static const u32 offs[] = {
3676 UNI_MIB_TX_TIME,
3677 UNI_MIB_RX_TIME,
3678 UNI_MIB_OBSS_AIRTIME,
3679 UNI_MIB_NON_WIFI_TIME,
3680 };
3681 struct mt76_channel_state *state = phy->mt76->chan_state;
3682 struct mt76_channel_state *state_ts = &phy->state_ts;
3683 struct mt7996_dev *dev = phy->dev;
3684 struct mt7996_mcu_mib *res;
3685 struct sk_buff *skb;
3686 int i, ret;
3687
3688 for (i = 0; i < 4; i++) {
3689 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA);
3690 req.data[i].len = cpu_to_le16(sizeof(req.data[i]));
3691 req.data[i].offs = cpu_to_le32(offs[i]);
3692 }
3693
3694 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO),
3695 &req, sizeof(req), true, &skb);
3696 if (ret)
3697 return ret;
3698
3699 skb_pull(skb, sizeof(req.hdr));
3700
3701 res = (struct mt7996_mcu_mib *)(skb->data);
3702
3703 if (chan_switch)
3704 goto out;
3705
3706 #define __res_u64(s) le64_to_cpu(res[s].data)
3707 state->cc_tx += __res_u64(1) - state_ts->cc_tx;
3708 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3709 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3710 state->cc_busy += __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3) -
3711 state_ts->cc_busy;
3712
3713 out:
3714 state_ts->cc_tx = __res_u64(1);
3715 state_ts->cc_bss_rx = __res_u64(2);
3716 state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3717 state_ts->cc_busy = __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3);
3718 #undef __res_u64
3719
3720 dev_kfree_skb(skb);
3721
3722 return 0;
3723 }
3724
mt7996_mcu_get_temperature(struct mt7996_phy * phy)3725 int mt7996_mcu_get_temperature(struct mt7996_phy *phy)
3726 {
3727 #define TEMPERATURE_QUERY 0
3728 #define GET_TEMPERATURE 0
3729 struct {
3730 u8 _rsv[4];
3731
3732 __le16 tag;
3733 __le16 len;
3734
3735 u8 rsv1;
3736 u8 action;
3737 u8 band_idx;
3738 u8 rsv2;
3739 } req = {
3740 .tag = cpu_to_le16(TEMPERATURE_QUERY),
3741 .len = cpu_to_le16(sizeof(req) - 4),
3742 .action = GET_TEMPERATURE,
3743 .band_idx = phy->mt76->band_idx,
3744 };
3745 struct mt7996_mcu_thermal {
3746 u8 _rsv[4];
3747
3748 __le16 tag;
3749 __le16 len;
3750
3751 __le32 rsv;
3752 __le32 temperature;
3753 } __packed * res;
3754 struct sk_buff *skb;
3755 int ret;
3756 u32 temp;
3757
3758 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3759 &req, sizeof(req), true, &skb);
3760 if (ret)
3761 return ret;
3762
3763 res = (void *)skb->data;
3764 temp = le32_to_cpu(res->temperature);
3765 dev_kfree_skb(skb);
3766
3767 return temp;
3768 }
3769
mt7996_mcu_set_thermal_throttling(struct mt7996_phy * phy,u8 state)3770 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state)
3771 {
3772 struct {
3773 u8 _rsv[4];
3774
3775 __le16 tag;
3776 __le16 len;
3777
3778 struct mt7996_mcu_thermal_ctrl ctrl;
3779 } __packed req = {
3780 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG),
3781 .len = cpu_to_le16(sizeof(req) - 4),
3782 .ctrl = {
3783 .band_idx = phy->mt76->band_idx,
3784 },
3785 };
3786 int level, ret;
3787
3788 /* set duty cycle and level */
3789 for (level = 0; level < 4; level++) {
3790 req.ctrl.duty.duty_level = level;
3791 req.ctrl.duty.duty_cycle = state;
3792 state /= 2;
3793
3794 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3795 &req, sizeof(req), false);
3796 if (ret)
3797 return ret;
3798 }
3799
3800 return 0;
3801 }
3802
mt7996_mcu_set_thermal_protect(struct mt7996_phy * phy,bool enable)3803 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable)
3804 {
3805 #define SUSTAIN_PERIOD 10
3806 struct {
3807 u8 _rsv[4];
3808
3809 __le16 tag;
3810 __le16 len;
3811
3812 struct mt7996_mcu_thermal_ctrl ctrl;
3813 struct mt7996_mcu_thermal_enable enable;
3814 } __packed req = {
3815 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)),
3816 .ctrl = {
3817 .band_idx = phy->mt76->band_idx,
3818 .type.protect_type = 1,
3819 .type.trigger_type = 1,
3820 },
3821 };
3822 int ret;
3823
3824 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE);
3825
3826 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3827 &req, sizeof(req) - sizeof(req.enable), false);
3828 if (ret || !enable)
3829 return ret;
3830
3831 /* set high-temperature trigger threshold */
3832 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE);
3833 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]);
3834 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);
3835 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD);
3836
3837 req.len = cpu_to_le16(sizeof(req) - 4);
3838
3839 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL),
3840 &req, sizeof(req), false);
3841 }
3842
mt7996_mcu_set_ser(struct mt7996_dev * dev,u8 action,u8 val,u8 band)3843 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band)
3844 {
3845 struct {
3846 u8 rsv[4];
3847
3848 __le16 tag;
3849 __le16 len;
3850
3851 union {
3852 struct {
3853 __le32 mask;
3854 } __packed set;
3855
3856 struct {
3857 u8 method;
3858 u8 band;
3859 u8 rsv2[2];
3860 } __packed trigger;
3861 };
3862 } __packed req = {
3863 .tag = cpu_to_le16(action),
3864 .len = cpu_to_le16(sizeof(req) - 4),
3865 };
3866
3867 switch (action) {
3868 case UNI_CMD_SER_SET:
3869 req.set.mask = cpu_to_le32(val);
3870 break;
3871 case UNI_CMD_SER_TRIGGER:
3872 req.trigger.method = val;
3873 req.trigger.band = band;
3874 break;
3875 default:
3876 return -EINVAL;
3877 }
3878
3879 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER),
3880 &req, sizeof(req), false);
3881 }
3882
mt7996_mcu_set_txbf(struct mt7996_dev * dev,u8 action)3883 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action)
3884 {
3885 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv)
3886 #define BF_PROCESSING 4
3887 struct uni_header hdr;
3888 struct sk_buff *skb;
3889 struct tlv *tlv;
3890 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE;
3891
3892 memset(&hdr, 0, sizeof(hdr));
3893
3894 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3895 if (!skb)
3896 return -ENOMEM;
3897
3898 skb_put_data(skb, &hdr, sizeof(hdr));
3899
3900 switch (action) {
3901 case BF_SOUNDING_ON: {
3902 struct bf_sounding_on *req_snd_on;
3903
3904 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on));
3905 req_snd_on = (struct bf_sounding_on *)tlv;
3906 req_snd_on->snd_mode = BF_PROCESSING;
3907 break;
3908 }
3909 case BF_HW_EN_UPDATE: {
3910 struct bf_hw_en_status_update *req_hw_en;
3911
3912 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en));
3913 req_hw_en = (struct bf_hw_en_status_update *)tlv;
3914 req_hw_en->ebf = true;
3915 req_hw_en->ibf = dev->ibf;
3916 break;
3917 }
3918 case BF_MOD_EN_CTRL: {
3919 struct bf_mod_en_ctrl *req_mod_en;
3920
3921 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en));
3922 req_mod_en = (struct bf_mod_en_ctrl *)tlv;
3923 req_mod_en->bf_num = 3;
3924 req_mod_en->bf_bitmap = GENMASK(2, 0);
3925 break;
3926 }
3927 default:
3928 return -EINVAL;
3929 }
3930
3931 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true);
3932 }
3933
3934 static int
mt7996_mcu_enable_obss_spr(struct mt7996_phy * phy,u16 action,u8 val)3935 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val)
3936 {
3937 struct mt7996_dev *dev = phy->dev;
3938 struct {
3939 u8 band_idx;
3940 u8 __rsv[3];
3941
3942 __le16 tag;
3943 __le16 len;
3944
3945 __le32 val;
3946 } __packed req = {
3947 .band_idx = phy->mt76->band_idx,
3948 .tag = cpu_to_le16(action),
3949 .len = cpu_to_le16(sizeof(req) - 4),
3950 .val = cpu_to_le32(val),
3951 };
3952
3953 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3954 &req, sizeof(req), true);
3955 }
3956
3957 static int
mt7996_mcu_set_obss_spr_pd(struct mt7996_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3958 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy,
3959 struct ieee80211_he_obss_pd *he_obss_pd)
3960 {
3961 struct mt7996_dev *dev = phy->dev;
3962 u8 max_th = 82, non_srg_max_th = 62;
3963 struct {
3964 u8 band_idx;
3965 u8 __rsv[3];
3966
3967 __le16 tag;
3968 __le16 len;
3969
3970 u8 pd_th_non_srg;
3971 u8 pd_th_srg;
3972 u8 period_offs;
3973 u8 rcpi_src;
3974 __le16 obss_pd_min;
3975 __le16 obss_pd_min_srg;
3976 u8 resp_txpwr_mode;
3977 u8 txpwr_restrict_mode;
3978 u8 txpwr_ref;
3979 u8 __rsv2[3];
3980 } __packed req = {
3981 .band_idx = phy->mt76->band_idx,
3982 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM),
3983 .len = cpu_to_le16(sizeof(req) - 4),
3984 .obss_pd_min = cpu_to_le16(max_th),
3985 .obss_pd_min_srg = cpu_to_le16(max_th),
3986 .txpwr_restrict_mode = 2,
3987 .txpwr_ref = 21
3988 };
3989 int ret;
3990
3991 /* disable firmware dynamical PD asjustment */
3992 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false);
3993 if (ret)
3994 return ret;
3995
3996 if (he_obss_pd->sr_ctrl &
3997 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3998 req.pd_th_non_srg = max_th;
3999 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
4000 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
4001 else
4002 req.pd_th_non_srg = non_srg_max_th;
4003
4004 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
4005 req.pd_th_srg = max_th - he_obss_pd->max_offset;
4006
4007 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
4008 &req, sizeof(req), true);
4009 }
4010
4011 static int
mt7996_mcu_set_obss_spr_siga(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)4012 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif,
4013 struct ieee80211_he_obss_pd *he_obss_pd)
4014 {
4015 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
4016 struct mt7996_dev *dev = phy->dev;
4017 u8 omac = mvif->mt76.omac_idx;
4018 struct {
4019 u8 band_idx;
4020 u8 __rsv[3];
4021
4022 __le16 tag;
4023 __le16 len;
4024
4025 u8 omac;
4026 u8 __rsv2[3];
4027 u8 flag[20];
4028 } __packed req = {
4029 .band_idx = phy->mt76->band_idx,
4030 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA),
4031 .len = cpu_to_le16(sizeof(req) - 4),
4032 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
4033 };
4034 int ret;
4035
4036 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
4037 req.flag[req.omac] = 0xf;
4038 else
4039 return 0;
4040
4041 /* switch to normal AP mode */
4042 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0);
4043 if (ret)
4044 return ret;
4045
4046 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
4047 &req, sizeof(req), true);
4048 }
4049
4050 static int
mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)4051 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy,
4052 struct ieee80211_he_obss_pd *he_obss_pd)
4053 {
4054 struct mt7996_dev *dev = phy->dev;
4055 struct {
4056 u8 band_idx;
4057 u8 __rsv[3];
4058
4059 __le16 tag;
4060 __le16 len;
4061
4062 __le32 color_l[2];
4063 __le32 color_h[2];
4064 __le32 bssid_l[2];
4065 __le32 bssid_h[2];
4066 } __packed req = {
4067 .band_idx = phy->mt76->band_idx,
4068 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP),
4069 .len = cpu_to_le16(sizeof(req) - 4),
4070 };
4071 u32 bitmap;
4072
4073 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
4074 req.color_l[req.band_idx] = cpu_to_le32(bitmap);
4075
4076 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
4077 req.color_h[req.band_idx] = cpu_to_le32(bitmap);
4078
4079 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
4080 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap);
4081
4082 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
4083 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap);
4084
4085 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req,
4086 sizeof(req), true);
4087 }
4088
mt7996_mcu_add_obss_spr(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)4089 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif,
4090 struct ieee80211_he_obss_pd *he_obss_pd)
4091 {
4092 int ret;
4093
4094 /* enable firmware scene detection algorithms */
4095 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD,
4096 sr_scene_detect);
4097 if (ret)
4098 return ret;
4099
4100 /* firmware dynamically adjusts PD threshold so skip manual control */
4101 if (sr_scene_detect && !he_obss_pd->enable)
4102 return 0;
4103
4104 /* enable spatial reuse */
4105 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE,
4106 he_obss_pd->enable);
4107 if (ret)
4108 return ret;
4109
4110 if (sr_scene_detect || !he_obss_pd->enable)
4111 return 0;
4112
4113 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true);
4114 if (ret)
4115 return ret;
4116
4117 /* set SRG/non-SRG OBSS PD threshold */
4118 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd);
4119 if (ret)
4120 return ret;
4121
4122 /* Set SR prohibit */
4123 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
4124 if (ret)
4125 return ret;
4126
4127 /* set SRG BSS color/BSSID bitmap */
4128 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
4129 }
4130
mt7996_mcu_update_bss_color(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct cfg80211_he_bss_color * he_bss_color)4131 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif,
4132 struct cfg80211_he_bss_color *he_bss_color)
4133 {
4134 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv);
4135 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
4136 struct bss_color_tlv *bss_color;
4137 struct sk_buff *skb;
4138 struct tlv *tlv;
4139
4140 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len);
4141 if (IS_ERR(skb))
4142 return PTR_ERR(skb);
4143
4144 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR,
4145 sizeof(*bss_color));
4146 bss_color = (struct bss_color_tlv *)tlv;
4147 bss_color->enable = he_bss_color->enabled;
4148 bss_color->color = he_bss_color->color;
4149
4150 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4151 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
4152 }
4153
4154 #define TWT_AGRT_TRIGGER BIT(0)
4155 #define TWT_AGRT_ANNOUNCE BIT(1)
4156 #define TWT_AGRT_PROTECT BIT(2)
4157
mt7996_mcu_twt_agrt_update(struct mt7996_dev * dev,struct mt7996_vif * mvif,struct mt7996_twt_flow * flow,int cmd)4158 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev,
4159 struct mt7996_vif *mvif,
4160 struct mt7996_twt_flow *flow,
4161 int cmd)
4162 {
4163 struct {
4164 /* fixed field */
4165 u8 bss;
4166 u8 _rsv[3];
4167
4168 __le16 tag;
4169 __le16 len;
4170 u8 tbl_idx;
4171 u8 cmd;
4172 u8 own_mac_idx;
4173 u8 flowid; /* 0xff for group id */
4174 __le16 peer_id; /* specify the peer_id (msb=0)
4175 * or group_id (msb=1)
4176 */
4177 u8 duration; /* 256 us */
4178 u8 bss_idx;
4179 __le64 start_tsf;
4180 __le16 mantissa;
4181 u8 exponent;
4182 u8 is_ap;
4183 u8 agrt_params;
4184 u8 __rsv2[23];
4185 } __packed req = {
4186 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE),
4187 .len = cpu_to_le16(sizeof(req) - 4),
4188 .tbl_idx = flow->table_id,
4189 .cmd = cmd,
4190 .own_mac_idx = mvif->mt76.omac_idx,
4191 .flowid = flow->id,
4192 .peer_id = cpu_to_le16(flow->wcid),
4193 .duration = flow->duration,
4194 .bss = mvif->mt76.idx,
4195 .bss_idx = mvif->mt76.idx,
4196 .start_tsf = cpu_to_le64(flow->tsf),
4197 .mantissa = flow->mantissa,
4198 .exponent = flow->exp,
4199 .is_ap = true,
4200 };
4201
4202 if (flow->protection)
4203 req.agrt_params |= TWT_AGRT_PROTECT;
4204 if (!flow->flowtype)
4205 req.agrt_params |= TWT_AGRT_ANNOUNCE;
4206 if (flow->trigger)
4207 req.agrt_params |= TWT_AGRT_TRIGGER;
4208
4209 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT),
4210 &req, sizeof(req), true);
4211 }
4212
mt7996_mcu_set_rts_thresh(struct mt7996_phy * phy,u32 val)4213 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val)
4214 {
4215 struct {
4216 u8 band_idx;
4217 u8 _rsv[3];
4218
4219 __le16 tag;
4220 __le16 len;
4221 __le32 len_thresh;
4222 __le32 pkt_thresh;
4223 } __packed req = {
4224 .band_idx = phy->mt76->band_idx,
4225 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD),
4226 .len = cpu_to_le16(sizeof(req) - 4),
4227 .len_thresh = cpu_to_le32(val),
4228 .pkt_thresh = cpu_to_le32(0x2),
4229 };
4230
4231 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
4232 &req, sizeof(req), true);
4233 }
4234
mt7996_mcu_set_radio_en(struct mt7996_phy * phy,bool enable)4235 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable)
4236 {
4237 struct {
4238 u8 band_idx;
4239 u8 _rsv[3];
4240
4241 __le16 tag;
4242 __le16 len;
4243 u8 enable;
4244 u8 _rsv2[3];
4245 } __packed req = {
4246 .band_idx = phy->mt76->band_idx,
4247 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE),
4248 .len = cpu_to_le16(sizeof(req) - 4),
4249 .enable = enable,
4250 };
4251
4252 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
4253 &req, sizeof(req), true);
4254 }
4255
mt7996_mcu_rdd_cmd(struct mt7996_dev * dev,int cmd,u8 index,u8 rx_sel,u8 val)4256 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index,
4257 u8 rx_sel, u8 val)
4258 {
4259 struct {
4260 u8 _rsv[4];
4261
4262 __le16 tag;
4263 __le16 len;
4264
4265 u8 ctrl;
4266 u8 rdd_idx;
4267 u8 rdd_rx_sel;
4268 u8 val;
4269 u8 rsv[4];
4270 } __packed req = {
4271 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM),
4272 .len = cpu_to_le16(sizeof(req) - 4),
4273 .ctrl = cmd,
4274 .rdd_idx = index,
4275 .rdd_rx_sel = rx_sel,
4276 .val = val,
4277 };
4278
4279 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
4280 &req, sizeof(req), true);
4281 }
4282
mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)4283 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev,
4284 struct ieee80211_vif *vif,
4285 struct ieee80211_sta *sta)
4286 {
4287 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
4288 struct mt7996_sta *msta;
4289 struct sk_buff *skb;
4290
4291 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
4292
4293 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
4294 &msta->wcid,
4295 MT7996_STA_UPDATE_MAX_SIZE);
4296 if (IS_ERR(skb))
4297 return PTR_ERR(skb);
4298
4299 /* starec hdr trans */
4300 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta);
4301 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4302 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
4303 }
4304
mt7996_mcu_set_fixed_rate_table(struct mt7996_phy * phy,u8 table_idx,u16 rate_idx,bool beacon)4305 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx,
4306 u16 rate_idx, bool beacon)
4307 {
4308 #define UNI_FIXED_RATE_TABLE_SET 0
4309 #define SPE_IXD_SELECT_TXD 0
4310 #define SPE_IXD_SELECT_BMC_WTBL 1
4311 struct mt7996_dev *dev = phy->dev;
4312 struct fixed_rate_table_ctrl req = {
4313 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET),
4314 .len = cpu_to_le16(sizeof(req) - 4),
4315 .table_idx = table_idx,
4316 .rate_idx = cpu_to_le16(rate_idx),
4317 .gi = 1,
4318 .he_ltf = 1,
4319 };
4320 u8 band_idx = phy->mt76->band_idx;
4321
4322 if (beacon) {
4323 req.spe_idx_sel = SPE_IXD_SELECT_TXD;
4324 req.spe_idx = 24 + band_idx;
4325 phy->beacon_rate = rate_idx;
4326 } else {
4327 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL;
4328 }
4329
4330 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE),
4331 &req, sizeof(req), false);
4332 }
4333
mt7996_mcu_rf_regval(struct mt7996_dev * dev,u32 regidx,u32 * val,bool set)4334 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set)
4335 {
4336 struct {
4337 u8 __rsv1[4];
4338
4339 __le16 tag;
4340 __le16 len;
4341 __le16 idx;
4342 u8 __rsv2[2];
4343 __le32 ofs;
4344 __le32 data;
4345 } __packed *res, req = {
4346 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC),
4347 .len = cpu_to_le16(sizeof(req) - 4),
4348
4349 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))),
4350 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
4351 .data = set ? cpu_to_le32(*val) : 0,
4352 };
4353 struct sk_buff *skb;
4354 int ret;
4355
4356 if (set)
4357 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS),
4358 &req, sizeof(req), true);
4359
4360 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
4361 MCU_WM_UNI_CMD_QUERY(REG_ACCESS),
4362 &req, sizeof(req), true, &skb);
4363 if (ret)
4364 return ret;
4365
4366 res = (void *)skb->data;
4367 *val = le32_to_cpu(res->data);
4368 dev_kfree_skb(skb);
4369
4370 return 0;
4371 }
4372
mt7996_mcu_trigger_assert(struct mt7996_dev * dev)4373 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev)
4374 {
4375 struct {
4376 __le16 tag;
4377 __le16 len;
4378 u8 enable;
4379 u8 rsv[3];
4380 } __packed req = {
4381 .len = cpu_to_le16(sizeof(req) - 4),
4382 .enable = true,
4383 };
4384
4385 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP),
4386 &req, sizeof(req), false);
4387 }
4388
mt7996_mcu_set_rro(struct mt7996_dev * dev,u16 tag,u16 val)4389 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val)
4390 {
4391 struct {
4392 u8 __rsv1[4];
4393 __le16 tag;
4394 __le16 len;
4395 union {
4396 struct {
4397 u8 type;
4398 u8 __rsv2[3];
4399 } __packed platform_type;
4400 struct {
4401 u8 type;
4402 u8 dest;
4403 u8 __rsv2[2];
4404 } __packed bypass_mode;
4405 struct {
4406 u8 path;
4407 u8 __rsv2[3];
4408 } __packed txfree_path;
4409 struct {
4410 __le16 flush_one;
4411 __le16 flush_all;
4412 u8 __rsv2[4];
4413 } __packed timeout;
4414 };
4415 } __packed req = {
4416 .tag = cpu_to_le16(tag),
4417 .len = cpu_to_le16(sizeof(req) - 4),
4418 };
4419
4420 switch (tag) {
4421 case UNI_RRO_SET_PLATFORM_TYPE:
4422 req.platform_type.type = val;
4423 break;
4424 case UNI_RRO_SET_BYPASS_MODE:
4425 req.bypass_mode.type = val;
4426 break;
4427 case UNI_RRO_SET_TXFREE_PATH:
4428 req.txfree_path.path = val;
4429 break;
4430 case UNI_RRO_SET_FLUSH_TIMEOUT:
4431 req.timeout.flush_one = cpu_to_le16(val);
4432 req.timeout.flush_all = cpu_to_le16(2 * val);
4433 break;
4434 default:
4435 return -EINVAL;
4436 }
4437
4438 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req,
4439 sizeof(req), true);
4440 }
4441
mt7996_mcu_get_all_sta_info(struct mt7996_phy * phy,u16 tag)4442 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag)
4443 {
4444 struct mt7996_dev *dev = phy->dev;
4445 struct {
4446 u8 _rsv[4];
4447
4448 __le16 tag;
4449 __le16 len;
4450 } __packed req = {
4451 .tag = cpu_to_le16(tag),
4452 .len = cpu_to_le16(sizeof(req) - 4),
4453 };
4454
4455 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO),
4456 &req, sizeof(req), false);
4457 }
4458
mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev * dev,u16 id)4459 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id)
4460 {
4461 struct {
4462 u8 __rsv[4];
4463
4464 __le16 tag;
4465 __le16 len;
4466 __le16 session_id;
4467 u8 pad[4];
4468 } __packed req = {
4469 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION),
4470 .len = cpu_to_le16(sizeof(req) - 4),
4471 .session_id = cpu_to_le16(id),
4472 };
4473
4474 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req,
4475 sizeof(req), true);
4476 }
4477
mt7996_mcu_set_txpower_sku(struct mt7996_phy * phy)4478 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy)
4479 {
4480 #define TX_POWER_LIMIT_TABLE_RATE 0
4481 struct mt7996_dev *dev = phy->dev;
4482 struct mt76_phy *mphy = phy->mt76;
4483 struct ieee80211_hw *hw = mphy->hw;
4484 struct tx_power_limit_table_ctrl {
4485 u8 __rsv1[4];
4486
4487 __le16 tag;
4488 __le16 len;
4489 u8 power_ctrl_id;
4490 u8 power_limit_type;
4491 u8 band_idx;
4492 } __packed req = {
4493 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL),
4494 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4),
4495 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL,
4496 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE,
4497 .band_idx = phy->mt76->band_idx,
4498 };
4499 struct mt76_power_limits la = {};
4500 struct sk_buff *skb;
4501 int i, tx_power;
4502
4503 tx_power = mt7996_get_power_bound(phy, hw->conf.power_level);
4504 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
4505 &la, tx_power);
4506 mphy->txpower_cur = tx_power;
4507
4508 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
4509 sizeof(req) + MT7996_SKU_PATH_NUM);
4510 if (!skb)
4511 return -ENOMEM;
4512
4513 skb_put_data(skb, &req, sizeof(req));
4514 /* cck and ofdm */
4515 skb_put_data(skb, &la.cck, sizeof(la.cck));
4516 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm));
4517 /* ht20 */
4518 skb_put_data(skb, &la.mcs[0], 8);
4519 /* ht40 */
4520 skb_put_data(skb, &la.mcs[1], 9);
4521
4522 /* vht */
4523 for (i = 0; i < 4; i++) {
4524 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i]));
4525 skb_put_zero(skb, 2); /* padding */
4526 }
4527
4528 /* he */
4529 skb_put_data(skb, &la.ru[0], sizeof(la.ru));
4530 /* eht */
4531 skb_put_data(skb, &la.eht[0], sizeof(la.eht));
4532
4533 /* padding */
4534 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM);
4535
4536 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
4537 MCU_WM_UNI_CMD(TXPOWER), true);
4538 }
4539
mt7996_mcu_cp_support(struct mt7996_dev * dev,u8 mode)4540 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode)
4541 {
4542 __le32 cp_mode;
4543
4544 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) ||
4545 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO))
4546 return -EINVAL;
4547
4548 cp_mode = cpu_to_le32(mode);
4549 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT),
4550 &cp_mode, sizeof(cp_mode), true);
4551 }
4552