1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <linux/blkdev.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/kthread.h>
31 #include <linux/pci.h>
32 #include <linux/spinlock.h>
33 #include <linux/sched/clock.h>
34 #include <linux/ctype.h>
35 #include <linux/slab.h>
36 #include <linux/firmware.h>
37 #include <linux/miscdevice.h>
38 #include <linux/percpu.h>
39 #include <linux/irq.h>
40 #include <linux/bitops.h>
41 #include <linux/crash_dump.h>
42 #include <linux/cpu.h>
43 #include <linux/cpuhotplug.h>
44
45 #include <scsi/scsi.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_host.h>
48 #include <scsi/scsi_transport_fc.h>
49 #include <scsi/scsi_tcq.h>
50 #include <scsi/fc/fc_fs.h>
51
52 #include "lpfc_hw4.h"
53 #include "lpfc_hw.h"
54 #include "lpfc_sli.h"
55 #include "lpfc_sli4.h"
56 #include "lpfc_nl.h"
57 #include "lpfc_disc.h"
58 #include "lpfc.h"
59 #include "lpfc_scsi.h"
60 #include "lpfc_nvme.h"
61 #include "lpfc_logmsg.h"
62 #include "lpfc_crtn.h"
63 #include "lpfc_vport.h"
64 #include "lpfc_version.h"
65 #include "lpfc_ids.h"
66
67 static enum cpuhp_state lpfc_cpuhp_state;
68 /* Used when mapping IRQ vectors in a driver centric manner */
69 static uint32_t lpfc_present_cpu;
70 static bool lpfc_pldv_detect;
71
72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
74 static void lpfc_cpuhp_add(struct lpfc_hba *phba);
75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
76 static int lpfc_post_rcv_buf(struct lpfc_hba *);
77 static int lpfc_sli4_queue_verify(struct lpfc_hba *);
78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
79 static int lpfc_setup_endian_order(struct lpfc_hba *);
80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
81 static void lpfc_free_els_sgl_list(struct lpfc_hba *);
82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
83 static void lpfc_init_sgl_list(struct lpfc_hba *);
84 static int lpfc_init_active_sgl_array(struct lpfc_hba *);
85 static void lpfc_free_active_sgl(struct lpfc_hba *);
86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
91 static void lpfc_sli4_disable_intr(struct lpfc_hba *);
92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *);
97 static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba);
98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba);
99
100 static struct scsi_transport_template *lpfc_transport_template = NULL;
101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
102 static DEFINE_IDR(lpfc_hba_index);
103 #define LPFC_NVMET_BUF_POST 254
104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport);
105 static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts);
106
107 /**
108 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
109 * @phba: pointer to lpfc hba data structure.
110 *
111 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
112 * mailbox command. It retrieves the revision information from the HBA and
113 * collects the Vital Product Data (VPD) about the HBA for preparing the
114 * configuration of the HBA.
115 *
116 * Return codes:
117 * 0 - success.
118 * -ERESTART - requests the SLI layer to reset the HBA and try again.
119 * Any other value - indicates an error.
120 **/
121 int
lpfc_config_port_prep(struct lpfc_hba * phba)122 lpfc_config_port_prep(struct lpfc_hba *phba)
123 {
124 lpfc_vpd_t *vp = &phba->vpd;
125 int i = 0, rc;
126 LPFC_MBOXQ_t *pmb;
127 MAILBOX_t *mb;
128 char *lpfc_vpd_data = NULL;
129 uint16_t offset = 0;
130 static char licensed[56] =
131 "key unlock for use with gnu public licensed code only\0";
132 static int init_key = 1;
133
134 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
135 if (!pmb) {
136 phba->link_state = LPFC_HBA_ERROR;
137 return -ENOMEM;
138 }
139
140 mb = &pmb->u.mb;
141 phba->link_state = LPFC_INIT_MBX_CMDS;
142
143 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
144 if (init_key) {
145 uint32_t *ptext = (uint32_t *) licensed;
146
147 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
148 *ptext = cpu_to_be32(*ptext);
149 init_key = 0;
150 }
151
152 lpfc_read_nv(phba, pmb);
153 memset((char*)mb->un.varRDnvp.rsvd3, 0,
154 sizeof (mb->un.varRDnvp.rsvd3));
155 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
156 sizeof (licensed));
157
158 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
159
160 if (rc != MBX_SUCCESS) {
161 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
162 "0324 Config Port initialization "
163 "error, mbxCmd x%x READ_NVPARM, "
164 "mbxStatus x%x\n",
165 mb->mbxCommand, mb->mbxStatus);
166 mempool_free(pmb, phba->mbox_mem_pool);
167 return -ERESTART;
168 }
169 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
170 sizeof(phba->wwnn));
171 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
172 sizeof(phba->wwpn));
173 }
174
175 /*
176 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
177 * which was already set in lpfc_get_cfgparam()
178 */
179 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
180
181 /* Setup and issue mailbox READ REV command */
182 lpfc_read_rev(phba, pmb);
183 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
184 if (rc != MBX_SUCCESS) {
185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
186 "0439 Adapter failed to init, mbxCmd x%x "
187 "READ_REV, mbxStatus x%x\n",
188 mb->mbxCommand, mb->mbxStatus);
189 mempool_free( pmb, phba->mbox_mem_pool);
190 return -ERESTART;
191 }
192
193
194 /*
195 * The value of rr must be 1 since the driver set the cv field to 1.
196 * This setting requires the FW to set all revision fields.
197 */
198 if (mb->un.varRdRev.rr == 0) {
199 vp->rev.rBit = 0;
200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
201 "0440 Adapter failed to init, READ_REV has "
202 "missing revision information.\n");
203 mempool_free(pmb, phba->mbox_mem_pool);
204 return -ERESTART;
205 }
206
207 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
208 mempool_free(pmb, phba->mbox_mem_pool);
209 return -EINVAL;
210 }
211
212 /* Save information as VPD data */
213 vp->rev.rBit = 1;
214 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
215 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
216 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
217 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
218 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
219 vp->rev.biuRev = mb->un.varRdRev.biuRev;
220 vp->rev.smRev = mb->un.varRdRev.smRev;
221 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
222 vp->rev.endecRev = mb->un.varRdRev.endecRev;
223 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
224 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
225 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
226 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
227 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
228 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
229
230 /* If the sli feature level is less then 9, we must
231 * tear down all RPIs and VPIs on link down if NPIV
232 * is enabled.
233 */
234 if (vp->rev.feaLevelHigh < 9)
235 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
236
237 if (lpfc_is_LC_HBA(phba->pcidev->device))
238 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
239 sizeof (phba->RandomData));
240
241 /* Get adapter VPD information */
242 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
243 if (!lpfc_vpd_data)
244 goto out_free_mbox;
245 do {
246 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
247 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
248
249 if (rc != MBX_SUCCESS) {
250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
251 "0441 VPD not present on adapter, "
252 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
253 mb->mbxCommand, mb->mbxStatus);
254 mb->un.varDmp.word_cnt = 0;
255 }
256 /* dump mem may return a zero when finished or we got a
257 * mailbox error, either way we are done.
258 */
259 if (mb->un.varDmp.word_cnt == 0)
260 break;
261
262 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
263 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
264 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
265 lpfc_vpd_data + offset,
266 mb->un.varDmp.word_cnt);
267 offset += mb->un.varDmp.word_cnt;
268 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
269
270 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
271
272 kfree(lpfc_vpd_data);
273 out_free_mbox:
274 mempool_free(pmb, phba->mbox_mem_pool);
275 return 0;
276 }
277
278 /**
279 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
280 * @phba: pointer to lpfc hba data structure.
281 * @pmboxq: pointer to the driver internal queue element for mailbox command.
282 *
283 * This is the completion handler for driver's configuring asynchronous event
284 * mailbox command to the device. If the mailbox command returns successfully,
285 * it will set internal async event support flag to 1; otherwise, it will
286 * set internal async event support flag to 0.
287 **/
288 static void
lpfc_config_async_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)289 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
290 {
291 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
292 phba->temp_sensor_support = 1;
293 else
294 phba->temp_sensor_support = 0;
295 mempool_free(pmboxq, phba->mbox_mem_pool);
296 return;
297 }
298
299 /**
300 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
301 * @phba: pointer to lpfc hba data structure.
302 * @pmboxq: pointer to the driver internal queue element for mailbox command.
303 *
304 * This is the completion handler for dump mailbox command for getting
305 * wake up parameters. When this command complete, the response contain
306 * Option rom version of the HBA. This function translate the version number
307 * into a human readable string and store it in OptionROMVersion.
308 **/
309 static void
lpfc_dump_wakeup_param_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)310 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
311 {
312 struct prog_id *prg;
313 uint32_t prog_id_word;
314 char dist = ' ';
315 /* character array used for decoding dist type. */
316 char dist_char[] = "nabx";
317
318 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
319 mempool_free(pmboxq, phba->mbox_mem_pool);
320 return;
321 }
322
323 prg = (struct prog_id *) &prog_id_word;
324
325 /* word 7 contain option rom version */
326 prog_id_word = pmboxq->u.mb.un.varWords[7];
327
328 /* Decode the Option rom version word to a readable string */
329 dist = dist_char[prg->dist];
330
331 if ((prg->dist == 3) && (prg->num == 0))
332 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
333 prg->ver, prg->rev, prg->lev);
334 else
335 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
336 prg->ver, prg->rev, prg->lev,
337 dist, prg->num);
338 mempool_free(pmboxq, phba->mbox_mem_pool);
339 return;
340 }
341
342 /**
343 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
344 * @vport: pointer to lpfc vport data structure.
345 *
346 *
347 * Return codes
348 * None.
349 **/
350 void
lpfc_update_vport_wwn(struct lpfc_vport * vport)351 lpfc_update_vport_wwn(struct lpfc_vport *vport)
352 {
353 struct lpfc_hba *phba = vport->phba;
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name))) {
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (phba->sli_rev == LPFC_SLI_REV4 &&
376 vport->port_type == LPFC_PHYSICAL_PORT &&
377 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
378 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
379 phba->sli4_hba.fawwpn_flag &=
380 ~LPFC_FAWWPN_FABRIC;
381 lpfc_printf_log(phba, KERN_INFO,
382 LOG_SLI | LOG_DISCOVERY | LOG_ELS,
383 "2701 FA-PWWN change WWPN from %llx to "
384 "%llx: vflag x%x fawwpn_flag x%x\n",
385 wwn_to_u64(vport->fc_portname.u.wwn),
386 wwn_to_u64
387 (vport->fc_sparam.portName.u.wwn),
388 vport->vport_flag,
389 phba->sli4_hba.fawwpn_flag);
390 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
391 sizeof(struct lpfc_name));
392 }
393 }
394
395 if (vport->fc_portname.u.wwn[0] == 0)
396 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
397 sizeof(struct lpfc_name));
398 else
399 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
400 sizeof(struct lpfc_name));
401 }
402
403 /**
404 * lpfc_config_port_post - Perform lpfc initialization after config port
405 * @phba: pointer to lpfc hba data structure.
406 *
407 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
408 * command call. It performs all internal resource and state setups on the
409 * port: post IOCB buffers, enable appropriate host interrupt attentions,
410 * ELS ring timers, etc.
411 *
412 * Return codes
413 * 0 - success.
414 * Any other value - error.
415 **/
416 int
lpfc_config_port_post(struct lpfc_hba * phba)417 lpfc_config_port_post(struct lpfc_hba *phba)
418 {
419 struct lpfc_vport *vport = phba->pport;
420 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
421 LPFC_MBOXQ_t *pmb;
422 MAILBOX_t *mb;
423 struct lpfc_dmabuf *mp;
424 struct lpfc_sli *psli = &phba->sli;
425 uint32_t status, timeout;
426 int i, j;
427 int rc;
428
429 spin_lock_irq(&phba->hbalock);
430 /*
431 * If the Config port completed correctly the HBA is not
432 * over heated any more.
433 */
434 if (phba->over_temp_state == HBA_OVER_TEMP)
435 phba->over_temp_state = HBA_NORMAL_TEMP;
436 spin_unlock_irq(&phba->hbalock);
437
438 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
439 if (!pmb) {
440 phba->link_state = LPFC_HBA_ERROR;
441 return -ENOMEM;
442 }
443 mb = &pmb->u.mb;
444
445 /* Get login parameters for NID. */
446 rc = lpfc_read_sparam(phba, pmb, 0);
447 if (rc) {
448 mempool_free(pmb, phba->mbox_mem_pool);
449 return -ENOMEM;
450 }
451
452 pmb->vport = vport;
453 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
454 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
455 "0448 Adapter failed init, mbxCmd x%x "
456 "READ_SPARM mbxStatus x%x\n",
457 mb->mbxCommand, mb->mbxStatus);
458 phba->link_state = LPFC_HBA_ERROR;
459 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
460 return -EIO;
461 }
462
463 mp = pmb->ctx_buf;
464
465 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no
466 * longer needed. Prevent unintended ctx_buf access as the mbox is
467 * reused.
468 */
469 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
470 lpfc_mbuf_free(phba, mp->virt, mp->phys);
471 kfree(mp);
472 pmb->ctx_buf = NULL;
473 lpfc_update_vport_wwn(vport);
474
475 /* Update the fc_host data structures with new wwn. */
476 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
477 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
478 fc_host_max_npiv_vports(shost) = phba->max_vpi;
479
480 /* If no serial number in VPD data, use low 6 bytes of WWNN */
481 /* This should be consolidated into parse_vpd ? - mr */
482 if (phba->SerialNumber[0] == 0) {
483 uint8_t *outptr;
484
485 outptr = &vport->fc_nodename.u.s.IEEE[0];
486 for (i = 0; i < 12; i++) {
487 status = *outptr++;
488 j = ((status & 0xf0) >> 4);
489 if (j <= 9)
490 phba->SerialNumber[i] =
491 (char)((uint8_t) 0x30 + (uint8_t) j);
492 else
493 phba->SerialNumber[i] =
494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 i++;
496 j = (status & 0xf);
497 if (j <= 9)
498 phba->SerialNumber[i] =
499 (char)((uint8_t) 0x30 + (uint8_t) j);
500 else
501 phba->SerialNumber[i] =
502 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
503 }
504 }
505
506 lpfc_read_config(phba, pmb);
507 pmb->vport = vport;
508 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
509 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
510 "0453 Adapter failed to init, mbxCmd x%x "
511 "READ_CONFIG, mbxStatus x%x\n",
512 mb->mbxCommand, mb->mbxStatus);
513 phba->link_state = LPFC_HBA_ERROR;
514 mempool_free( pmb, phba->mbox_mem_pool);
515 return -EIO;
516 }
517
518 /* Check if the port is disabled */
519 lpfc_sli_read_link_ste(phba);
520
521 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
522 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
523 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
524 "3359 HBA queue depth changed from %d to %d\n",
525 phba->cfg_hba_queue_depth,
526 mb->un.varRdConfig.max_xri);
527 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
528 }
529
530 phba->lmt = mb->un.varRdConfig.lmt;
531
532 /* Get the default values for Model Name and Description */
533 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
534
535 phba->link_state = LPFC_LINK_DOWN;
536
537 /* Only process IOCBs on ELS ring till hba_state is READY */
538 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
539 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
540 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
541 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
542
543 /* Post receive buffers for desired rings */
544 if (phba->sli_rev != 3)
545 lpfc_post_rcv_buf(phba);
546
547 /*
548 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
549 */
550 if (phba->intr_type == MSIX) {
551 rc = lpfc_config_msi(phba, pmb);
552 if (rc) {
553 mempool_free(pmb, phba->mbox_mem_pool);
554 return -EIO;
555 }
556 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
557 if (rc != MBX_SUCCESS) {
558 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
559 "0352 Config MSI mailbox command "
560 "failed, mbxCmd x%x, mbxStatus x%x\n",
561 pmb->u.mb.mbxCommand,
562 pmb->u.mb.mbxStatus);
563 mempool_free(pmb, phba->mbox_mem_pool);
564 return -EIO;
565 }
566 }
567
568 spin_lock_irq(&phba->hbalock);
569 /* Initialize ERATT handling flag */
570 clear_bit(HBA_ERATT_HANDLED, &phba->hba_flag);
571
572 /* Enable appropriate host interrupts */
573 if (lpfc_readl(phba->HCregaddr, &status)) {
574 spin_unlock_irq(&phba->hbalock);
575 return -EIO;
576 }
577 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
578 if (psli->num_rings > 0)
579 status |= HC_R0INT_ENA;
580 if (psli->num_rings > 1)
581 status |= HC_R1INT_ENA;
582 if (psli->num_rings > 2)
583 status |= HC_R2INT_ENA;
584 if (psli->num_rings > 3)
585 status |= HC_R3INT_ENA;
586
587 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
588 (phba->cfg_poll & DISABLE_FCP_RING_INT))
589 status &= ~(HC_R0INT_ENA);
590
591 writel(status, phba->HCregaddr);
592 readl(phba->HCregaddr); /* flush */
593 spin_unlock_irq(&phba->hbalock);
594
595 /* Set up ring-0 (ELS) timer */
596 timeout = phba->fc_ratov * 2;
597 mod_timer(&vport->els_tmofunc,
598 jiffies + msecs_to_jiffies(1000 * timeout));
599 /* Set up heart beat (HB) timer */
600 mod_timer(&phba->hb_tmofunc,
601 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
602 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
603 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
604 phba->last_completion_time = jiffies;
605 /* Set up error attention (ERATT) polling timer */
606 mod_timer(&phba->eratt_poll,
607 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
608
609 if (test_bit(LINK_DISABLED, &phba->hba_flag)) {
610 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
611 "2598 Adapter Link is disabled.\n");
612 lpfc_down_link(phba, pmb);
613 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
614 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
615 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
617 "2599 Adapter failed to issue DOWN_LINK"
618 " mbox command rc 0x%x\n", rc);
619
620 mempool_free(pmb, phba->mbox_mem_pool);
621 return -EIO;
622 }
623 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
624 mempool_free(pmb, phba->mbox_mem_pool);
625 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
626 if (rc)
627 return rc;
628 }
629 /* MBOX buffer will be freed in mbox compl */
630 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
631 if (!pmb) {
632 phba->link_state = LPFC_HBA_ERROR;
633 return -ENOMEM;
634 }
635
636 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
637 pmb->mbox_cmpl = lpfc_config_async_cmpl;
638 pmb->vport = phba->pport;
639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640
641 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
642 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
643 "0456 Adapter failed to issue "
644 "ASYNCEVT_ENABLE mbox status x%x\n",
645 rc);
646 mempool_free(pmb, phba->mbox_mem_pool);
647 }
648
649 /* Get Option rom version */
650 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
651 if (!pmb) {
652 phba->link_state = LPFC_HBA_ERROR;
653 return -ENOMEM;
654 }
655
656 lpfc_dump_wakeup_param(phba, pmb);
657 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
658 pmb->vport = phba->pport;
659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
660
661 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
662 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
663 "0435 Adapter failed "
664 "to get Option ROM version status x%x\n", rc);
665 mempool_free(pmb, phba->mbox_mem_pool);
666 }
667
668 return 0;
669 }
670
671 /**
672 * lpfc_sli4_refresh_params - update driver copy of params.
673 * @phba: Pointer to HBA context object.
674 *
675 * This is called to refresh driver copy of dynamic fields from the
676 * common_get_sli4_parameters descriptor.
677 **/
678 int
lpfc_sli4_refresh_params(struct lpfc_hba * phba)679 lpfc_sli4_refresh_params(struct lpfc_hba *phba)
680 {
681 LPFC_MBOXQ_t *mboxq;
682 struct lpfc_mqe *mqe;
683 struct lpfc_sli4_parameters *mbx_sli4_parameters;
684 int length, rc;
685
686 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
687 if (!mboxq)
688 return -ENOMEM;
689
690 mqe = &mboxq->u.mqe;
691 /* Read the port's SLI4 Config Parameters */
692 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
693 sizeof(struct lpfc_sli4_cfg_mhdr));
694 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
695 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
696 length, LPFC_SLI4_MBX_EMBED);
697
698 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
699 if (unlikely(rc)) {
700 mempool_free(mboxq, phba->mbox_mem_pool);
701 return rc;
702 }
703 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
704 phba->sli4_hba.pc_sli4_params.mi_cap =
705 bf_get(cfg_mi_ver, mbx_sli4_parameters);
706
707 /* Are we forcing MI off via module parameter? */
708 if (phba->cfg_enable_mi)
709 phba->sli4_hba.pc_sli4_params.mi_ver =
710 bf_get(cfg_mi_ver, mbx_sli4_parameters);
711 else
712 phba->sli4_hba.pc_sli4_params.mi_ver = 0;
713
714 phba->sli4_hba.pc_sli4_params.cmf =
715 bf_get(cfg_cmf, mbx_sli4_parameters);
716 phba->sli4_hba.pc_sli4_params.pls =
717 bf_get(cfg_pvl, mbx_sli4_parameters);
718
719 mempool_free(mboxq, phba->mbox_mem_pool);
720 return rc;
721 }
722
723 /**
724 * lpfc_hba_init_link - Initialize the FC link
725 * @phba: pointer to lpfc hba data structure.
726 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
727 *
728 * This routine will issue the INIT_LINK mailbox command call.
729 * It is available to other drivers through the lpfc_hba data
730 * structure for use as a delayed link up mechanism with the
731 * module parameter lpfc_suppress_link_up.
732 *
733 * Return code
734 * 0 - success
735 * Any other value - error
736 **/
737 static int
lpfc_hba_init_link(struct lpfc_hba * phba,uint32_t flag)738 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
739 {
740 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
741 }
742
743 /**
744 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
745 * @phba: pointer to lpfc hba data structure.
746 * @fc_topology: desired fc topology.
747 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
748 *
749 * This routine will issue the INIT_LINK mailbox command call.
750 * It is available to other drivers through the lpfc_hba data
751 * structure for use as a delayed link up mechanism with the
752 * module parameter lpfc_suppress_link_up.
753 *
754 * Return code
755 * 0 - success
756 * Any other value - error
757 **/
758 int
lpfc_hba_init_link_fc_topology(struct lpfc_hba * phba,uint32_t fc_topology,uint32_t flag)759 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
760 uint32_t flag)
761 {
762 struct lpfc_vport *vport = phba->pport;
763 LPFC_MBOXQ_t *pmb;
764 MAILBOX_t *mb;
765 int rc;
766
767 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
768 if (!pmb) {
769 phba->link_state = LPFC_HBA_ERROR;
770 return -ENOMEM;
771 }
772 mb = &pmb->u.mb;
773 pmb->vport = vport;
774
775 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
777 !(phba->lmt & LMT_1Gb)) ||
778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
779 !(phba->lmt & LMT_2Gb)) ||
780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
781 !(phba->lmt & LMT_4Gb)) ||
782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
783 !(phba->lmt & LMT_8Gb)) ||
784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
785 !(phba->lmt & LMT_10Gb)) ||
786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
787 !(phba->lmt & LMT_16Gb)) ||
788 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
789 !(phba->lmt & LMT_32Gb)) ||
790 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
791 !(phba->lmt & LMT_64Gb))) {
792 /* Reset link speed to auto */
793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
794 "1302 Invalid speed for this board:%d "
795 "Reset link speed to auto.\n",
796 phba->cfg_link_speed);
797 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
798 }
799 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
801 if (phba->sli_rev < LPFC_SLI_REV4)
802 lpfc_set_loopback_flag(phba);
803 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
804 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
805 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
806 "0498 Adapter failed to init, mbxCmd x%x "
807 "INIT_LINK, mbxStatus x%x\n",
808 mb->mbxCommand, mb->mbxStatus);
809 if (phba->sli_rev <= LPFC_SLI_REV3) {
810 /* Clear all interrupt enable conditions */
811 writel(0, phba->HCregaddr);
812 readl(phba->HCregaddr); /* flush */
813 /* Clear all pending interrupts */
814 writel(0xffffffff, phba->HAregaddr);
815 readl(phba->HAregaddr); /* flush */
816 }
817 phba->link_state = LPFC_HBA_ERROR;
818 if (rc != MBX_BUSY || flag == MBX_POLL)
819 mempool_free(pmb, phba->mbox_mem_pool);
820 return -EIO;
821 }
822 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
823 if (flag == MBX_POLL)
824 mempool_free(pmb, phba->mbox_mem_pool);
825
826 return 0;
827 }
828
829 /**
830 * lpfc_hba_down_link - this routine downs the FC link
831 * @phba: pointer to lpfc hba data structure.
832 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
833 *
834 * This routine will issue the DOWN_LINK mailbox command call.
835 * It is available to other drivers through the lpfc_hba data
836 * structure for use to stop the link.
837 *
838 * Return code
839 * 0 - success
840 * Any other value - error
841 **/
842 static int
lpfc_hba_down_link(struct lpfc_hba * phba,uint32_t flag)843 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
844 {
845 LPFC_MBOXQ_t *pmb;
846 int rc;
847
848 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
849 if (!pmb) {
850 phba->link_state = LPFC_HBA_ERROR;
851 return -ENOMEM;
852 }
853
854 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
855 "0491 Adapter Link is disabled.\n");
856 lpfc_down_link(phba, pmb);
857 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
858 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
859 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
861 "2522 Adapter failed to issue DOWN_LINK"
862 " mbox command rc 0x%x\n", rc);
863
864 mempool_free(pmb, phba->mbox_mem_pool);
865 return -EIO;
866 }
867 if (flag == MBX_POLL)
868 mempool_free(pmb, phba->mbox_mem_pool);
869
870 return 0;
871 }
872
873 /**
874 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
875 * @phba: pointer to lpfc HBA data structure.
876 *
877 * This routine will do LPFC uninitialization before the HBA is reset when
878 * bringing down the SLI Layer.
879 *
880 * Return codes
881 * 0 - success.
882 * Any other value - error.
883 **/
884 int
lpfc_hba_down_prep(struct lpfc_hba * phba)885 lpfc_hba_down_prep(struct lpfc_hba *phba)
886 {
887 struct lpfc_vport **vports;
888 int i;
889
890 if (phba->sli_rev <= LPFC_SLI_REV3) {
891 /* Disable interrupts */
892 writel(0, phba->HCregaddr);
893 readl(phba->HCregaddr); /* flush */
894 }
895
896 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
897 lpfc_cleanup_discovery_resources(phba->pport);
898 else {
899 vports = lpfc_create_vport_work_array(phba);
900 if (vports != NULL)
901 for (i = 0; i <= phba->max_vports &&
902 vports[i] != NULL; i++)
903 lpfc_cleanup_discovery_resources(vports[i]);
904 lpfc_destroy_vport_work_array(phba, vports);
905 }
906 return 0;
907 }
908
909 /**
910 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
911 * rspiocb which got deferred
912 *
913 * @phba: pointer to lpfc HBA data structure.
914 *
915 * This routine will cleanup completed slow path events after HBA is reset
916 * when bringing down the SLI Layer.
917 *
918 *
919 * Return codes
920 * void.
921 **/
922 static void
lpfc_sli4_free_sp_events(struct lpfc_hba * phba)923 lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
924 {
925 struct lpfc_iocbq *rspiocbq;
926 struct hbq_dmabuf *dmabuf;
927 struct lpfc_cq_event *cq_event;
928
929 clear_bit(HBA_SP_QUEUE_EVT, &phba->hba_flag);
930
931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
932 /* Get the response iocb from the head of work queue */
933 spin_lock_irq(&phba->hbalock);
934 list_remove_head(&phba->sli4_hba.sp_queue_event,
935 cq_event, struct lpfc_cq_event, list);
936 spin_unlock_irq(&phba->hbalock);
937
938 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
939 case CQE_CODE_COMPL_WQE:
940 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
941 cq_event);
942 lpfc_sli_release_iocbq(phba, rspiocbq);
943 break;
944 case CQE_CODE_RECEIVE:
945 case CQE_CODE_RECEIVE_V1:
946 dmabuf = container_of(cq_event, struct hbq_dmabuf,
947 cq_event);
948 lpfc_in_buf_free(phba, &dmabuf->dbuf);
949 }
950 }
951 }
952
953 /**
954 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
955 * @phba: pointer to lpfc HBA data structure.
956 *
957 * This routine will cleanup posted ELS buffers after the HBA is reset
958 * when bringing down the SLI Layer.
959 *
960 *
961 * Return codes
962 * void.
963 **/
964 static void
lpfc_hba_free_post_buf(struct lpfc_hba * phba)965 lpfc_hba_free_post_buf(struct lpfc_hba *phba)
966 {
967 struct lpfc_sli *psli = &phba->sli;
968 struct lpfc_sli_ring *pring;
969 struct lpfc_dmabuf *mp, *next_mp;
970 LIST_HEAD(buflist);
971 int count;
972
973 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
974 lpfc_sli_hbqbuf_free_all(phba);
975 else {
976 /* Cleanup preposted buffers on the ELS ring */
977 pring = &psli->sli3_ring[LPFC_ELS_RING];
978 spin_lock_irq(&phba->hbalock);
979 list_splice_init(&pring->postbufq, &buflist);
980 spin_unlock_irq(&phba->hbalock);
981
982 count = 0;
983 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
984 list_del(&mp->list);
985 count++;
986 lpfc_mbuf_free(phba, mp->virt, mp->phys);
987 kfree(mp);
988 }
989
990 spin_lock_irq(&phba->hbalock);
991 pring->postbufq_cnt -= count;
992 spin_unlock_irq(&phba->hbalock);
993 }
994 }
995
996 /**
997 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will cleanup the txcmplq after the HBA is reset when bringing
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * void
1005 **/
1006 static void
lpfc_hba_clean_txcmplq(struct lpfc_hba * phba)1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
1008 {
1009 struct lpfc_sli *psli = &phba->sli;
1010 struct lpfc_queue *qp = NULL;
1011 struct lpfc_sli_ring *pring;
1012 LIST_HEAD(completions);
1013 int i;
1014 struct lpfc_iocbq *piocb, *next_iocb;
1015
1016 if (phba->sli_rev != LPFC_SLI_REV4) {
1017 for (i = 0; i < psli->num_rings; i++) {
1018 pring = &psli->sli3_ring[i];
1019 spin_lock_irq(&phba->hbalock);
1020 /* At this point in time the HBA is either reset or DOA
1021 * Nothing should be on txcmplq as it will
1022 * NEVER complete.
1023 */
1024 list_splice_init(&pring->txcmplq, &completions);
1025 pring->txcmplq_cnt = 0;
1026 spin_unlock_irq(&phba->hbalock);
1027
1028 lpfc_sli_abort_iocb_ring(phba, pring);
1029 }
1030 /* Cancel all the IOCBs from the completions list */
1031 lpfc_sli_cancel_iocbs(phba, &completions,
1032 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1033 return;
1034 }
1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1036 pring = qp->pring;
1037 if (!pring)
1038 continue;
1039 spin_lock_irq(&pring->ring_lock);
1040 list_for_each_entry_safe(piocb, next_iocb,
1041 &pring->txcmplq, list)
1042 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ;
1043 list_splice_init(&pring->txcmplq, &completions);
1044 pring->txcmplq_cnt = 0;
1045 spin_unlock_irq(&pring->ring_lock);
1046 lpfc_sli_abort_iocb_ring(phba, pring);
1047 }
1048 /* Cancel all the IOCBs from the completions list */
1049 lpfc_sli_cancel_iocbs(phba, &completions,
1050 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1051 }
1052
1053 /**
1054 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1055 * @phba: pointer to lpfc HBA data structure.
1056 *
1057 * This routine will do uninitialization after the HBA is reset when bring
1058 * down the SLI Layer.
1059 *
1060 * Return codes
1061 * 0 - success.
1062 * Any other value - error.
1063 **/
1064 static int
lpfc_hba_down_post_s3(struct lpfc_hba * phba)1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1066 {
1067 lpfc_hba_free_post_buf(phba);
1068 lpfc_hba_clean_txcmplq(phba);
1069 return 0;
1070 }
1071
1072 /**
1073 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1074 * @phba: pointer to lpfc HBA data structure.
1075 *
1076 * This routine will do uninitialization after the HBA is reset when bring
1077 * down the SLI Layer.
1078 *
1079 * Return codes
1080 * 0 - success.
1081 * Any other value - error.
1082 **/
1083 static int
lpfc_hba_down_post_s4(struct lpfc_hba * phba)1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1085 {
1086 struct lpfc_io_buf *psb, *psb_next;
1087 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
1088 struct lpfc_sli4_hdw_queue *qp;
1089 LIST_HEAD(aborts);
1090 LIST_HEAD(nvme_aborts);
1091 LIST_HEAD(nvmet_aborts);
1092 struct lpfc_sglq *sglq_entry = NULL;
1093 int cnt, idx;
1094
1095
1096 lpfc_sli_hbqbuf_free_all(phba);
1097 lpfc_hba_clean_txcmplq(phba);
1098
1099 /* At this point in time the HBA is either reset or DOA. Either
1100 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1101 * on the lpfc_els_sgl_list so that it can either be freed if the
1102 * driver is unloading or reposted if the driver is restarting
1103 * the port.
1104 */
1105
1106 /* sgl_list_lock required because worker thread uses this
1107 * list.
1108 */
1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1110 list_for_each_entry(sglq_entry,
1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1112 sglq_entry->state = SGL_FREED;
1113
1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1115 &phba->sli4_hba.lpfc_els_sgl_list);
1116
1117
1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1119
1120 /* abts_xxxx_buf_list_lock required because worker thread uses this
1121 * list.
1122 */
1123 spin_lock_irq(&phba->hbalock);
1124 cnt = 0;
1125 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1126 qp = &phba->sli4_hba.hdwq[idx];
1127
1128 spin_lock(&qp->abts_io_buf_list_lock);
1129 list_splice_init(&qp->lpfc_abts_io_buf_list,
1130 &aborts);
1131
1132 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1133 psb->pCmd = NULL;
1134 psb->status = IOSTAT_SUCCESS;
1135 cnt++;
1136 }
1137 spin_lock(&qp->io_buf_list_put_lock);
1138 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1139 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1140 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1141 qp->abts_scsi_io_bufs = 0;
1142 qp->abts_nvme_io_bufs = 0;
1143 spin_unlock(&qp->io_buf_list_put_lock);
1144 spin_unlock(&qp->abts_io_buf_list_lock);
1145 }
1146 spin_unlock_irq(&phba->hbalock);
1147
1148 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1151 &nvmet_aborts);
1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1153 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1154 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
1155 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1156 }
1157 }
1158
1159 lpfc_sli4_free_sp_events(phba);
1160 return cnt;
1161 }
1162
1163 /**
1164 * lpfc_hba_down_post - Wrapper func for hba down post routine
1165 * @phba: pointer to lpfc HBA data structure.
1166 *
1167 * This routine wraps the actual SLI3 or SLI4 routine for performing
1168 * uninitialization after the HBA is reset when bring down the SLI Layer.
1169 *
1170 * Return codes
1171 * 0 - success.
1172 * Any other value - error.
1173 **/
1174 int
lpfc_hba_down_post(struct lpfc_hba * phba)1175 lpfc_hba_down_post(struct lpfc_hba *phba)
1176 {
1177 return (*phba->lpfc_hba_down_post)(phba);
1178 }
1179
1180 /**
1181 * lpfc_hb_timeout - The HBA-timer timeout handler
1182 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1183 *
1184 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1185 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1186 * work-port-events bitmap and the worker thread is notified. This timeout
1187 * event will be used by the worker thread to invoke the actual timeout
1188 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1189 * be performed in the timeout handler and the HBA timeout event bit shall
1190 * be cleared by the worker thread after it has taken the event bitmap out.
1191 **/
1192 static void
lpfc_hb_timeout(struct timer_list * t)1193 lpfc_hb_timeout(struct timer_list *t)
1194 {
1195 struct lpfc_hba *phba;
1196 uint32_t tmo_posted;
1197 unsigned long iflag;
1198
1199 phba = from_timer(phba, t, hb_tmofunc);
1200
1201 /* Check for heart beat timeout conditions */
1202 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1203 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1204 if (!tmo_posted)
1205 phba->pport->work_port_events |= WORKER_HB_TMO;
1206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1207
1208 /* Tell the worker thread there is work to do */
1209 if (!tmo_posted)
1210 lpfc_worker_wake_up(phba);
1211 return;
1212 }
1213
1214 /**
1215 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1216 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1217 *
1218 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1219 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1220 * work-port-events bitmap and the worker thread is notified. This timeout
1221 * event will be used by the worker thread to invoke the actual timeout
1222 * handler routine, lpfc_rrq_handler. Any periodical operations will
1223 * be performed in the timeout handler and the RRQ timeout event bit shall
1224 * be cleared by the worker thread after it has taken the event bitmap out.
1225 **/
1226 static void
lpfc_rrq_timeout(struct timer_list * t)1227 lpfc_rrq_timeout(struct timer_list *t)
1228 {
1229 struct lpfc_hba *phba;
1230
1231 phba = from_timer(phba, t, rrq_tmr);
1232 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1233 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1234 return;
1235 }
1236
1237 set_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1238 lpfc_worker_wake_up(phba);
1239 }
1240
1241 /**
1242 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1243 * @phba: pointer to lpfc hba data structure.
1244 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1245 *
1246 * This is the callback function to the lpfc heart-beat mailbox command.
1247 * If configured, the lpfc driver issues the heart-beat mailbox command to
1248 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1249 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1250 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1251 * heart-beat outstanding state. Once the mailbox command comes back and
1252 * no error conditions detected, the heart-beat mailbox command timer is
1253 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1254 * state is cleared for the next heart-beat. If the timer expired with the
1255 * heart-beat outstanding state set, the driver will put the HBA offline.
1256 **/
1257 static void
lpfc_hb_mbox_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)1258 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1259 {
1260 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
1261 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1262
1263 /* Check and reset heart-beat timer if necessary */
1264 mempool_free(pmboxq, phba->mbox_mem_pool);
1265 if (!test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) &&
1266 !(phba->link_state == LPFC_HBA_ERROR) &&
1267 !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1268 mod_timer(&phba->hb_tmofunc,
1269 jiffies +
1270 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1271 return;
1272 }
1273
1274 /*
1275 * lpfc_idle_stat_delay_work - idle_stat tracking
1276 *
1277 * This routine tracks per-eq idle_stat and determines polling decisions.
1278 *
1279 * Return codes:
1280 * None
1281 **/
1282 static void
lpfc_idle_stat_delay_work(struct work_struct * work)1283 lpfc_idle_stat_delay_work(struct work_struct *work)
1284 {
1285 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1286 struct lpfc_hba,
1287 idle_stat_delay_work);
1288 struct lpfc_queue *eq;
1289 struct lpfc_sli4_hdw_queue *hdwq;
1290 struct lpfc_idle_stat *idle_stat;
1291 u32 i, idle_percent;
1292 u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
1293
1294 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
1295 return;
1296
1297 if (phba->link_state == LPFC_HBA_ERROR ||
1298 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) ||
1299 phba->cmf_active_mode != LPFC_CFG_OFF)
1300 goto requeue;
1301
1302 for_each_present_cpu(i) {
1303 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1304 eq = hdwq->hba_eq;
1305
1306 /* Skip if we've already handled this eq's primary CPU */
1307 if (eq->chann != i)
1308 continue;
1309
1310 idle_stat = &phba->sli4_hba.idle_stat[i];
1311
1312 /* get_cpu_idle_time returns values as running counters. Thus,
1313 * to know the amount for this period, the prior counter values
1314 * need to be subtracted from the current counter values.
1315 * From there, the idle time stat can be calculated as a
1316 * percentage of 100 - the sum of the other consumption times.
1317 */
1318 wall_idle = get_cpu_idle_time(i, &wall, 1);
1319 diff_idle = wall_idle - idle_stat->prev_idle;
1320 diff_wall = wall - idle_stat->prev_wall;
1321
1322 if (diff_wall <= diff_idle)
1323 busy_time = 0;
1324 else
1325 busy_time = diff_wall - diff_idle;
1326
1327 idle_percent = div64_u64(100 * busy_time, diff_wall);
1328 idle_percent = 100 - idle_percent;
1329
1330 if (idle_percent < 15)
1331 eq->poll_mode = LPFC_QUEUE_WORK;
1332 else
1333 eq->poll_mode = LPFC_THREADED_IRQ;
1334
1335 idle_stat->prev_idle = wall_idle;
1336 idle_stat->prev_wall = wall;
1337 }
1338
1339 requeue:
1340 schedule_delayed_work(&phba->idle_stat_delay_work,
1341 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
1342 }
1343
1344 static void
lpfc_hb_eq_delay_work(struct work_struct * work)1345 lpfc_hb_eq_delay_work(struct work_struct *work)
1346 {
1347 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1348 struct lpfc_hba, eq_delay_work);
1349 struct lpfc_eq_intr_info *eqi, *eqi_new;
1350 struct lpfc_queue *eq, *eq_next;
1351 unsigned char *ena_delay = NULL;
1352 uint32_t usdelay;
1353 int i;
1354
1355 if (!phba->cfg_auto_imax ||
1356 test_bit(FC_UNLOADING, &phba->pport->load_flag))
1357 return;
1358
1359 if (phba->link_state == LPFC_HBA_ERROR ||
1360 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1361 goto requeue;
1362
1363 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1364 GFP_KERNEL);
1365 if (!ena_delay)
1366 goto requeue;
1367
1368 for (i = 0; i < phba->cfg_irq_chann; i++) {
1369 /* Get the EQ corresponding to the IRQ vector */
1370 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1371 if (!eq)
1372 continue;
1373 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
1374 eq->q_flag &= ~HBA_EQ_DELAY_CHK;
1375 ena_delay[eq->last_cpu] = 1;
1376 }
1377 }
1378
1379 for_each_present_cpu(i) {
1380 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1381 if (ena_delay[i]) {
1382 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
1383 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1384 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1385 } else {
1386 usdelay = 0;
1387 }
1388
1389 eqi->icnt = 0;
1390
1391 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1392 if (unlikely(eq->last_cpu != i)) {
1393 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1394 eq->last_cpu);
1395 list_move_tail(&eq->cpu_list, &eqi_new->list);
1396 continue;
1397 }
1398 if (usdelay != eq->q_mode)
1399 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1400 usdelay);
1401 }
1402 }
1403
1404 kfree(ena_delay);
1405
1406 requeue:
1407 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1408 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1409 }
1410
1411 /**
1412 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1413 * @phba: pointer to lpfc hba data structure.
1414 *
1415 * For each heartbeat, this routine does some heuristic methods to adjust
1416 * XRI distribution. The goal is to fully utilize free XRIs.
1417 **/
lpfc_hb_mxp_handler(struct lpfc_hba * phba)1418 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1419 {
1420 u32 i;
1421 u32 hwq_count;
1422
1423 hwq_count = phba->cfg_hdw_queue;
1424 for (i = 0; i < hwq_count; i++) {
1425 /* Adjust XRIs in private pool */
1426 lpfc_adjust_pvt_pool_count(phba, i);
1427
1428 /* Adjust high watermark */
1429 lpfc_adjust_high_watermark(phba, i);
1430
1431 #ifdef LPFC_MXP_STAT
1432 /* Snapshot pbl, pvt and busy count */
1433 lpfc_snapshot_mxp(phba, i);
1434 #endif
1435 }
1436 }
1437
1438 /**
1439 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command
1440 * @phba: pointer to lpfc hba data structure.
1441 *
1442 * If a HB mbox is not already in progrees, this routine will allocate
1443 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command,
1444 * and issue it. The HBA_HBEAT_INP flag means the command is in progress.
1445 **/
1446 int
lpfc_issue_hb_mbox(struct lpfc_hba * phba)1447 lpfc_issue_hb_mbox(struct lpfc_hba *phba)
1448 {
1449 LPFC_MBOXQ_t *pmboxq;
1450 int retval;
1451
1452 /* Is a Heartbeat mbox already in progress */
1453 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1454 return 0;
1455
1456 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1457 if (!pmboxq)
1458 return -ENOMEM;
1459
1460 lpfc_heart_beat(phba, pmboxq);
1461 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1462 pmboxq->vport = phba->pport;
1463 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
1464
1465 if (retval != MBX_BUSY && retval != MBX_SUCCESS) {
1466 mempool_free(pmboxq, phba->mbox_mem_pool);
1467 return -ENXIO;
1468 }
1469 set_bit(HBA_HBEAT_INP, &phba->hba_flag);
1470
1471 return 0;
1472 }
1473
1474 /**
1475 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command
1476 * @phba: pointer to lpfc hba data structure.
1477 *
1478 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO
1479 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless
1480 * of the value of lpfc_enable_hba_heartbeat.
1481 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always
1482 * try to issue a MBX_HEARTBEAT mbox command.
1483 **/
1484 void
lpfc_issue_hb_tmo(struct lpfc_hba * phba)1485 lpfc_issue_hb_tmo(struct lpfc_hba *phba)
1486 {
1487 if (phba->cfg_enable_hba_heartbeat)
1488 return;
1489 set_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1490 }
1491
1492 /**
1493 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1494 * @phba: pointer to lpfc hba data structure.
1495 *
1496 * This is the actual HBA-timer timeout handler to be invoked by the worker
1497 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1498 * handler performs any periodic operations needed for the device. If such
1499 * periodic event has already been attended to either in the interrupt handler
1500 * or by processing slow-ring or fast-ring events within the HBA-timer
1501 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1502 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1503 * is configured and there is no heart-beat mailbox command outstanding, a
1504 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1505 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1506 * to offline.
1507 **/
1508 void
lpfc_hb_timeout_handler(struct lpfc_hba * phba)1509 lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1510 {
1511 struct lpfc_vport **vports;
1512 struct lpfc_dmabuf *buf_ptr;
1513 int retval = 0;
1514 int i, tmo;
1515 struct lpfc_sli *psli = &phba->sli;
1516 LIST_HEAD(completions);
1517
1518 if (phba->cfg_xri_rebalancing) {
1519 /* Multi-XRI pools handler */
1520 lpfc_hb_mxp_handler(phba);
1521 }
1522
1523 vports = lpfc_create_vport_work_array(phba);
1524 if (vports != NULL)
1525 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1526 lpfc_rcv_seq_check_edtov(vports[i]);
1527 lpfc_fdmi_change_check(vports[i]);
1528 }
1529 lpfc_destroy_vport_work_array(phba, vports);
1530
1531 if (phba->link_state == LPFC_HBA_ERROR ||
1532 test_bit(FC_UNLOADING, &phba->pport->load_flag) ||
1533 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1534 return;
1535
1536 if (phba->elsbuf_cnt &&
1537 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1538 spin_lock_irq(&phba->hbalock);
1539 list_splice_init(&phba->elsbuf, &completions);
1540 phba->elsbuf_cnt = 0;
1541 phba->elsbuf_prev_cnt = 0;
1542 spin_unlock_irq(&phba->hbalock);
1543
1544 while (!list_empty(&completions)) {
1545 list_remove_head(&completions, buf_ptr,
1546 struct lpfc_dmabuf, list);
1547 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1548 kfree(buf_ptr);
1549 }
1550 }
1551 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1552
1553 /* If there is no heart beat outstanding, issue a heartbeat command */
1554 if (phba->cfg_enable_hba_heartbeat) {
1555 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */
1556 spin_lock_irq(&phba->pport->work_port_lock);
1557 if (time_after(phba->last_completion_time +
1558 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1559 jiffies)) {
1560 spin_unlock_irq(&phba->pport->work_port_lock);
1561 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1562 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1563 else
1564 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1565 goto out;
1566 }
1567 spin_unlock_irq(&phba->pport->work_port_lock);
1568
1569 /* Check if a MBX_HEARTBEAT is already in progress */
1570 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) {
1571 /*
1572 * If heart beat timeout called with HBA_HBEAT_INP set
1573 * we need to give the hb mailbox cmd a chance to
1574 * complete or TMO.
1575 */
1576 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1577 "0459 Adapter heartbeat still outstanding: "
1578 "last compl time was %d ms.\n",
1579 jiffies_to_msecs(jiffies
1580 - phba->last_completion_time));
1581 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1582 } else {
1583 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1584 (list_empty(&psli->mboxq))) {
1585
1586 retval = lpfc_issue_hb_mbox(phba);
1587 if (retval) {
1588 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1589 goto out;
1590 }
1591 phba->skipped_hb = 0;
1592 } else if (time_before_eq(phba->last_completion_time,
1593 phba->skipped_hb)) {
1594 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1595 "2857 Last completion time not "
1596 " updated in %d ms\n",
1597 jiffies_to_msecs(jiffies
1598 - phba->last_completion_time));
1599 } else
1600 phba->skipped_hb = jiffies;
1601
1602 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1603 goto out;
1604 }
1605 } else {
1606 /* Check to see if we want to force a MBX_HEARTBEAT */
1607 if (test_bit(HBA_HBEAT_TMO, &phba->hba_flag)) {
1608 retval = lpfc_issue_hb_mbox(phba);
1609 if (retval)
1610 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1611 else
1612 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1613 goto out;
1614 }
1615 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1616 }
1617 out:
1618 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo));
1619 }
1620
1621 /**
1622 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1623 * @phba: pointer to lpfc hba data structure.
1624 *
1625 * This routine is called to bring the HBA offline when HBA hardware error
1626 * other than Port Error 6 has been detected.
1627 **/
1628 static void
lpfc_offline_eratt(struct lpfc_hba * phba)1629 lpfc_offline_eratt(struct lpfc_hba *phba)
1630 {
1631 struct lpfc_sli *psli = &phba->sli;
1632
1633 spin_lock_irq(&phba->hbalock);
1634 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1635 spin_unlock_irq(&phba->hbalock);
1636 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1637
1638 lpfc_offline(phba);
1639 lpfc_reset_barrier(phba);
1640 spin_lock_irq(&phba->hbalock);
1641 lpfc_sli_brdreset(phba);
1642 spin_unlock_irq(&phba->hbalock);
1643 lpfc_hba_down_post(phba);
1644 lpfc_sli_brdready(phba, HS_MBRDY);
1645 lpfc_unblock_mgmt_io(phba);
1646 phba->link_state = LPFC_HBA_ERROR;
1647 return;
1648 }
1649
1650 /**
1651 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1652 * @phba: pointer to lpfc hba data structure.
1653 *
1654 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1655 * other than Port Error 6 has been detected.
1656 **/
1657 void
lpfc_sli4_offline_eratt(struct lpfc_hba * phba)1658 lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1659 {
1660 spin_lock_irq(&phba->hbalock);
1661 if (phba->link_state == LPFC_HBA_ERROR &&
1662 test_bit(HBA_PCI_ERR, &phba->bit_flags)) {
1663 spin_unlock_irq(&phba->hbalock);
1664 return;
1665 }
1666 phba->link_state = LPFC_HBA_ERROR;
1667 spin_unlock_irq(&phba->hbalock);
1668
1669 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1670 lpfc_sli_flush_io_rings(phba);
1671 lpfc_offline(phba);
1672 lpfc_hba_down_post(phba);
1673 lpfc_unblock_mgmt_io(phba);
1674 }
1675
1676 /**
1677 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1678 * @phba: pointer to lpfc hba data structure.
1679 *
1680 * This routine is invoked to handle the deferred HBA hardware error
1681 * conditions. This type of error is indicated by HBA by setting ER1
1682 * and another ER bit in the host status register. The driver will
1683 * wait until the ER1 bit clears before handling the error condition.
1684 **/
1685 static void
lpfc_handle_deferred_eratt(struct lpfc_hba * phba)1686 lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1687 {
1688 uint32_t old_host_status = phba->work_hs;
1689 struct lpfc_sli *psli = &phba->sli;
1690
1691 /* If the pci channel is offline, ignore possible errors,
1692 * since we cannot communicate with the pci card anyway.
1693 */
1694 if (pci_channel_offline(phba->pcidev)) {
1695 clear_bit(DEFER_ERATT, &phba->hba_flag);
1696 return;
1697 }
1698
1699 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1700 "0479 Deferred Adapter Hardware Error "
1701 "Data: x%x x%x x%x\n",
1702 phba->work_hs, phba->work_status[0],
1703 phba->work_status[1]);
1704
1705 spin_lock_irq(&phba->hbalock);
1706 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1707 spin_unlock_irq(&phba->hbalock);
1708
1709
1710 /*
1711 * Firmware stops when it triggred erratt. That could cause the I/Os
1712 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1713 * SCSI layer retry it after re-establishing link.
1714 */
1715 lpfc_sli_abort_fcp_rings(phba);
1716
1717 /*
1718 * There was a firmware error. Take the hba offline and then
1719 * attempt to restart it.
1720 */
1721 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1722 lpfc_offline(phba);
1723
1724 /* Wait for the ER1 bit to clear.*/
1725 while (phba->work_hs & HS_FFER1) {
1726 msleep(100);
1727 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1728 phba->work_hs = UNPLUG_ERR ;
1729 break;
1730 }
1731 /* If driver is unloading let the worker thread continue */
1732 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1733 phba->work_hs = 0;
1734 break;
1735 }
1736 }
1737
1738 /*
1739 * This is to ptrotect against a race condition in which
1740 * first write to the host attention register clear the
1741 * host status register.
1742 */
1743 if (!phba->work_hs && !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1744 phba->work_hs = old_host_status & ~HS_FFER1;
1745
1746 clear_bit(DEFER_ERATT, &phba->hba_flag);
1747 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1748 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1749 }
1750
1751 static void
lpfc_board_errevt_to_mgmt(struct lpfc_hba * phba)1752 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1753 {
1754 struct lpfc_board_event_header board_event;
1755 struct Scsi_Host *shost;
1756
1757 board_event.event_type = FC_REG_BOARD_EVENT;
1758 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1759 shost = lpfc_shost_from_vport(phba->pport);
1760 fc_host_post_vendor_event(shost, fc_get_event_number(),
1761 sizeof(board_event),
1762 (char *) &board_event,
1763 LPFC_NL_VENDOR_ID);
1764 }
1765
1766 /**
1767 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1768 * @phba: pointer to lpfc hba data structure.
1769 *
1770 * This routine is invoked to handle the following HBA hardware error
1771 * conditions:
1772 * 1 - HBA error attention interrupt
1773 * 2 - DMA ring index out of range
1774 * 3 - Mailbox command came back as unknown
1775 **/
1776 static void
lpfc_handle_eratt_s3(struct lpfc_hba * phba)1777 lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1778 {
1779 struct lpfc_vport *vport = phba->pport;
1780 struct lpfc_sli *psli = &phba->sli;
1781 uint32_t event_data;
1782 unsigned long temperature;
1783 struct temp_event temp_event_data;
1784 struct Scsi_Host *shost;
1785
1786 /* If the pci channel is offline, ignore possible errors,
1787 * since we cannot communicate with the pci card anyway.
1788 */
1789 if (pci_channel_offline(phba->pcidev)) {
1790 clear_bit(DEFER_ERATT, &phba->hba_flag);
1791 return;
1792 }
1793
1794 /* If resets are disabled then leave the HBA alone and return */
1795 if (!phba->cfg_enable_hba_reset)
1796 return;
1797
1798 /* Send an internal error event to mgmt application */
1799 lpfc_board_errevt_to_mgmt(phba);
1800
1801 if (test_bit(DEFER_ERATT, &phba->hba_flag))
1802 lpfc_handle_deferred_eratt(phba);
1803
1804 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1805 if (phba->work_hs & HS_FFER6)
1806 /* Re-establishing Link */
1807 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1808 "1301 Re-establishing Link "
1809 "Data: x%x x%x x%x\n",
1810 phba->work_hs, phba->work_status[0],
1811 phba->work_status[1]);
1812 if (phba->work_hs & HS_FFER8)
1813 /* Device Zeroization */
1814 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1815 "2861 Host Authentication device "
1816 "zeroization Data:x%x x%x x%x\n",
1817 phba->work_hs, phba->work_status[0],
1818 phba->work_status[1]);
1819
1820 spin_lock_irq(&phba->hbalock);
1821 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1822 spin_unlock_irq(&phba->hbalock);
1823
1824 /*
1825 * Firmware stops when it triggled erratt with HS_FFER6.
1826 * That could cause the I/Os dropped by the firmware.
1827 * Error iocb (I/O) on txcmplq and let the SCSI layer
1828 * retry it after re-establishing link.
1829 */
1830 lpfc_sli_abort_fcp_rings(phba);
1831
1832 /*
1833 * There was a firmware error. Take the hba offline and then
1834 * attempt to restart it.
1835 */
1836 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1837 lpfc_offline(phba);
1838 lpfc_sli_brdrestart(phba);
1839 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
1840 lpfc_unblock_mgmt_io(phba);
1841 return;
1842 }
1843 lpfc_unblock_mgmt_io(phba);
1844 } else if (phba->work_hs & HS_CRIT_TEMP) {
1845 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1846 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1847 temp_event_data.event_code = LPFC_CRIT_TEMP;
1848 temp_event_data.data = (uint32_t)temperature;
1849
1850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1851 "0406 Adapter maximum temperature exceeded "
1852 "(%ld), taking this port offline "
1853 "Data: x%x x%x x%x\n",
1854 temperature, phba->work_hs,
1855 phba->work_status[0], phba->work_status[1]);
1856
1857 shost = lpfc_shost_from_vport(phba->pport);
1858 fc_host_post_vendor_event(shost, fc_get_event_number(),
1859 sizeof(temp_event_data),
1860 (char *) &temp_event_data,
1861 SCSI_NL_VID_TYPE_PCI
1862 | PCI_VENDOR_ID_EMULEX);
1863
1864 spin_lock_irq(&phba->hbalock);
1865 phba->over_temp_state = HBA_OVER_TEMP;
1866 spin_unlock_irq(&phba->hbalock);
1867 lpfc_offline_eratt(phba);
1868
1869 } else {
1870 /* The if clause above forces this code path when the status
1871 * failure is a value other than FFER6. Do not call the offline
1872 * twice. This is the adapter hardware error path.
1873 */
1874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1875 "0457 Adapter Hardware Error "
1876 "Data: x%x x%x x%x\n",
1877 phba->work_hs,
1878 phba->work_status[0], phba->work_status[1]);
1879
1880 event_data = FC_REG_DUMP_EVENT;
1881 shost = lpfc_shost_from_vport(vport);
1882 fc_host_post_vendor_event(shost, fc_get_event_number(),
1883 sizeof(event_data), (char *) &event_data,
1884 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1885
1886 lpfc_offline_eratt(phba);
1887 }
1888 return;
1889 }
1890
1891 /**
1892 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1893 * @phba: pointer to lpfc hba data structure.
1894 * @mbx_action: flag for mailbox shutdown action.
1895 * @en_rn_msg: send reset/port recovery message.
1896 * This routine is invoked to perform an SLI4 port PCI function reset in
1897 * response to port status register polling attention. It waits for port
1898 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1899 * During this process, interrupt vectors are freed and later requested
1900 * for handling possible port resource change.
1901 **/
1902 static int
lpfc_sli4_port_sta_fn_reset(struct lpfc_hba * phba,int mbx_action,bool en_rn_msg)1903 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1904 bool en_rn_msg)
1905 {
1906 int rc;
1907 uint32_t intr_mode;
1908 LPFC_MBOXQ_t *mboxq;
1909
1910 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1911 LPFC_SLI_INTF_IF_TYPE_2) {
1912 /*
1913 * On error status condition, driver need to wait for port
1914 * ready before performing reset.
1915 */
1916 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1917 if (rc)
1918 return rc;
1919 }
1920
1921 /* need reset: attempt for port recovery */
1922 if (en_rn_msg)
1923 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1924 "2887 Reset Needed: Attempting Port "
1925 "Recovery...\n");
1926
1927 /* If we are no wait, the HBA has been reset and is not
1928 * functional, thus we should clear
1929 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags.
1930 */
1931 if (mbx_action == LPFC_MBX_NO_WAIT) {
1932 spin_lock_irq(&phba->hbalock);
1933 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
1934 if (phba->sli.mbox_active) {
1935 mboxq = phba->sli.mbox_active;
1936 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
1937 __lpfc_mbox_cmpl_put(phba, mboxq);
1938 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1939 phba->sli.mbox_active = NULL;
1940 }
1941 spin_unlock_irq(&phba->hbalock);
1942 }
1943
1944 lpfc_offline_prep(phba, mbx_action);
1945 lpfc_sli_flush_io_rings(phba);
1946 lpfc_offline(phba);
1947 /* release interrupt for possible resource change */
1948 lpfc_sli4_disable_intr(phba);
1949 rc = lpfc_sli_brdrestart(phba);
1950 if (rc) {
1951 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1952 "6309 Failed to restart board\n");
1953 return rc;
1954 }
1955 /* request and enable interrupt */
1956 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1957 if (intr_mode == LPFC_INTR_ERROR) {
1958 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1959 "3175 Failed to enable interrupt\n");
1960 return -EIO;
1961 }
1962 phba->intr_mode = intr_mode;
1963 rc = lpfc_online(phba);
1964 if (rc == 0)
1965 lpfc_unblock_mgmt_io(phba);
1966
1967 return rc;
1968 }
1969
1970 /**
1971 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1972 * @phba: pointer to lpfc hba data structure.
1973 *
1974 * This routine is invoked to handle the SLI4 HBA hardware error attention
1975 * conditions.
1976 **/
1977 static void
lpfc_handle_eratt_s4(struct lpfc_hba * phba)1978 lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1979 {
1980 struct lpfc_vport *vport = phba->pport;
1981 uint32_t event_data;
1982 struct Scsi_Host *shost;
1983 uint32_t if_type;
1984 struct lpfc_register portstat_reg = {0};
1985 uint32_t reg_err1, reg_err2;
1986 uint32_t uerrlo_reg, uemasklo_reg;
1987 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1988 bool en_rn_msg = true;
1989 struct temp_event temp_event_data;
1990 struct lpfc_register portsmphr_reg;
1991 int rc, i;
1992
1993 /* If the pci channel is offline, ignore possible errors, since
1994 * we cannot communicate with the pci card anyway.
1995 */
1996 if (pci_channel_offline(phba->pcidev)) {
1997 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1998 "3166 pci channel is offline\n");
1999 lpfc_sli_flush_io_rings(phba);
2000 return;
2001 }
2002
2003 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2004 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2005 switch (if_type) {
2006 case LPFC_SLI_INTF_IF_TYPE_0:
2007 pci_rd_rc1 = lpfc_readl(
2008 phba->sli4_hba.u.if_type0.UERRLOregaddr,
2009 &uerrlo_reg);
2010 pci_rd_rc2 = lpfc_readl(
2011 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2012 &uemasklo_reg);
2013 /* consider PCI bus read error as pci_channel_offline */
2014 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
2015 return;
2016 if (!test_bit(HBA_RECOVERABLE_UE, &phba->hba_flag)) {
2017 lpfc_sli4_offline_eratt(phba);
2018 return;
2019 }
2020 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2021 "7623 Checking UE recoverable");
2022
2023 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2024 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2025 &portsmphr_reg.word0))
2026 continue;
2027
2028 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
2029 &portsmphr_reg);
2030 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2031 LPFC_PORT_SEM_UE_RECOVERABLE)
2032 break;
2033 /*Sleep for 1Sec, before checking SEMAPHORE */
2034 msleep(1000);
2035 }
2036
2037 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2038 "4827 smphr_port_status x%x : Waited %dSec",
2039 smphr_port_status, i);
2040
2041 /* Recoverable UE, reset the HBA device */
2042 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2043 LPFC_PORT_SEM_UE_RECOVERABLE) {
2044 for (i = 0; i < 20; i++) {
2045 msleep(1000);
2046 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2047 &portsmphr_reg.word0) &&
2048 (LPFC_POST_STAGE_PORT_READY ==
2049 bf_get(lpfc_port_smphr_port_status,
2050 &portsmphr_reg))) {
2051 rc = lpfc_sli4_port_sta_fn_reset(phba,
2052 LPFC_MBX_NO_WAIT, en_rn_msg);
2053 if (rc == 0)
2054 return;
2055 lpfc_printf_log(phba, KERN_ERR,
2056 LOG_TRACE_EVENT,
2057 "4215 Failed to recover UE");
2058 break;
2059 }
2060 }
2061 }
2062 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2063 "7624 Firmware not ready: Failing UE recovery,"
2064 " waited %dSec", i);
2065 phba->link_state = LPFC_HBA_ERROR;
2066 break;
2067
2068 case LPFC_SLI_INTF_IF_TYPE_2:
2069 case LPFC_SLI_INTF_IF_TYPE_6:
2070 pci_rd_rc1 = lpfc_readl(
2071 phba->sli4_hba.u.if_type2.STATUSregaddr,
2072 &portstat_reg.word0);
2073 /* consider PCI bus read error as pci_channel_offline */
2074 if (pci_rd_rc1 == -EIO) {
2075 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2076 "3151 PCI bus read access failure: x%x\n",
2077 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2078 lpfc_sli4_offline_eratt(phba);
2079 return;
2080 }
2081 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2082 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2083 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2084 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2085 "2889 Port Overtemperature event, "
2086 "taking port offline Data: x%x x%x\n",
2087 reg_err1, reg_err2);
2088
2089 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
2090 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2091 temp_event_data.event_code = LPFC_CRIT_TEMP;
2092 temp_event_data.data = 0xFFFFFFFF;
2093
2094 shost = lpfc_shost_from_vport(phba->pport);
2095 fc_host_post_vendor_event(shost, fc_get_event_number(),
2096 sizeof(temp_event_data),
2097 (char *)&temp_event_data,
2098 SCSI_NL_VID_TYPE_PCI
2099 | PCI_VENDOR_ID_EMULEX);
2100
2101 spin_lock_irq(&phba->hbalock);
2102 phba->over_temp_state = HBA_OVER_TEMP;
2103 spin_unlock_irq(&phba->hbalock);
2104 lpfc_sli4_offline_eratt(phba);
2105 return;
2106 }
2107 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2108 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2109 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2110 "3143 Port Down: Firmware Update "
2111 "Detected\n");
2112 en_rn_msg = false;
2113 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2114 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2115 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2116 "3144 Port Down: Debug Dump\n");
2117 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2118 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
2119 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2120 "3145 Port Down: Provisioning\n");
2121
2122 /* If resets are disabled then leave the HBA alone and return */
2123 if (!phba->cfg_enable_hba_reset)
2124 return;
2125
2126 /* Check port status register for function reset */
2127 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
2128 en_rn_msg);
2129 if (rc == 0) {
2130 /* don't report event on forced debug dump */
2131 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2132 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2133 return;
2134 else
2135 break;
2136 }
2137 /* fall through for not able to recover */
2138 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2139 "3152 Unrecoverable error\n");
2140 lpfc_sli4_offline_eratt(phba);
2141 break;
2142 case LPFC_SLI_INTF_IF_TYPE_1:
2143 default:
2144 break;
2145 }
2146 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2147 "3123 Report dump event to upper layer\n");
2148 /* Send an internal error event to mgmt application */
2149 lpfc_board_errevt_to_mgmt(phba);
2150
2151 event_data = FC_REG_DUMP_EVENT;
2152 shost = lpfc_shost_from_vport(vport);
2153 fc_host_post_vendor_event(shost, fc_get_event_number(),
2154 sizeof(event_data), (char *) &event_data,
2155 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2156 }
2157
2158 /**
2159 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2160 * @phba: pointer to lpfc HBA data structure.
2161 *
2162 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2163 * routine from the API jump table function pointer from the lpfc_hba struct.
2164 *
2165 * Return codes
2166 * 0 - success.
2167 * Any other value - error.
2168 **/
2169 void
lpfc_handle_eratt(struct lpfc_hba * phba)2170 lpfc_handle_eratt(struct lpfc_hba *phba)
2171 {
2172 (*phba->lpfc_handle_eratt)(phba);
2173 }
2174
2175 /**
2176 * lpfc_handle_latt - The HBA link event handler
2177 * @phba: pointer to lpfc hba data structure.
2178 *
2179 * This routine is invoked from the worker thread to handle a HBA host
2180 * attention link event. SLI3 only.
2181 **/
2182 void
lpfc_handle_latt(struct lpfc_hba * phba)2183 lpfc_handle_latt(struct lpfc_hba *phba)
2184 {
2185 struct lpfc_vport *vport = phba->pport;
2186 struct lpfc_sli *psli = &phba->sli;
2187 LPFC_MBOXQ_t *pmb;
2188 volatile uint32_t control;
2189 int rc = 0;
2190
2191 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2192 if (!pmb) {
2193 rc = 1;
2194 goto lpfc_handle_latt_err_exit;
2195 }
2196
2197 rc = lpfc_mbox_rsrc_prep(phba, pmb);
2198 if (rc) {
2199 rc = 2;
2200 mempool_free(pmb, phba->mbox_mem_pool);
2201 goto lpfc_handle_latt_err_exit;
2202 }
2203
2204 /* Cleanup any outstanding ELS commands */
2205 lpfc_els_flush_all_cmd(phba);
2206 psli->slistat.link_event++;
2207 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
2208 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2209 pmb->vport = vport;
2210 /* Block ELS IOCBs until we have processed this mbox command */
2211 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2212 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2213 if (rc == MBX_NOT_FINISHED) {
2214 rc = 4;
2215 goto lpfc_handle_latt_free_mbuf;
2216 }
2217
2218 /* Clear Link Attention in HA REG */
2219 spin_lock_irq(&phba->hbalock);
2220 writel(HA_LATT, phba->HAregaddr);
2221 readl(phba->HAregaddr); /* flush */
2222 spin_unlock_irq(&phba->hbalock);
2223
2224 return;
2225
2226 lpfc_handle_latt_free_mbuf:
2227 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2228 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
2229 lpfc_handle_latt_err_exit:
2230 /* Enable Link attention interrupts */
2231 spin_lock_irq(&phba->hbalock);
2232 psli->sli_flag |= LPFC_PROCESS_LA;
2233 control = readl(phba->HCregaddr);
2234 control |= HC_LAINT_ENA;
2235 writel(control, phba->HCregaddr);
2236 readl(phba->HCregaddr); /* flush */
2237
2238 /* Clear Link Attention in HA REG */
2239 writel(HA_LATT, phba->HAregaddr);
2240 readl(phba->HAregaddr); /* flush */
2241 spin_unlock_irq(&phba->hbalock);
2242 lpfc_linkdown(phba);
2243 phba->link_state = LPFC_HBA_ERROR;
2244
2245 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2246 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2247
2248 return;
2249 }
2250
2251 static void
lpfc_fill_vpd(struct lpfc_hba * phba,uint8_t * vpd,int length,int * pindex)2252 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex)
2253 {
2254 int i, j;
2255
2256 while (length > 0) {
2257 /* Look for Serial Number */
2258 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) {
2259 *pindex += 2;
2260 i = vpd[*pindex];
2261 *pindex += 1;
2262 j = 0;
2263 length -= (3+i);
2264 while (i--) {
2265 phba->SerialNumber[j++] = vpd[(*pindex)++];
2266 if (j == 31)
2267 break;
2268 }
2269 phba->SerialNumber[j] = 0;
2270 continue;
2271 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) {
2272 phba->vpd_flag |= VPD_MODEL_DESC;
2273 *pindex += 2;
2274 i = vpd[*pindex];
2275 *pindex += 1;
2276 j = 0;
2277 length -= (3+i);
2278 while (i--) {
2279 phba->ModelDesc[j++] = vpd[(*pindex)++];
2280 if (j == 255)
2281 break;
2282 }
2283 phba->ModelDesc[j] = 0;
2284 continue;
2285 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) {
2286 phba->vpd_flag |= VPD_MODEL_NAME;
2287 *pindex += 2;
2288 i = vpd[*pindex];
2289 *pindex += 1;
2290 j = 0;
2291 length -= (3+i);
2292 while (i--) {
2293 phba->ModelName[j++] = vpd[(*pindex)++];
2294 if (j == 79)
2295 break;
2296 }
2297 phba->ModelName[j] = 0;
2298 continue;
2299 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) {
2300 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2301 *pindex += 2;
2302 i = vpd[*pindex];
2303 *pindex += 1;
2304 j = 0;
2305 length -= (3+i);
2306 while (i--) {
2307 phba->ProgramType[j++] = vpd[(*pindex)++];
2308 if (j == 255)
2309 break;
2310 }
2311 phba->ProgramType[j] = 0;
2312 continue;
2313 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) {
2314 phba->vpd_flag |= VPD_PORT;
2315 *pindex += 2;
2316 i = vpd[*pindex];
2317 *pindex += 1;
2318 j = 0;
2319 length -= (3 + i);
2320 while (i--) {
2321 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2322 (phba->sli4_hba.pport_name_sta ==
2323 LPFC_SLI4_PPNAME_GET)) {
2324 j++;
2325 (*pindex)++;
2326 } else
2327 phba->Port[j++] = vpd[(*pindex)++];
2328 if (j == 19)
2329 break;
2330 }
2331 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2332 (phba->sli4_hba.pport_name_sta ==
2333 LPFC_SLI4_PPNAME_NON))
2334 phba->Port[j] = 0;
2335 continue;
2336 } else {
2337 *pindex += 2;
2338 i = vpd[*pindex];
2339 *pindex += 1;
2340 *pindex += i;
2341 length -= (3 + i);
2342 }
2343 }
2344 }
2345
2346 /**
2347 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2348 * @phba: pointer to lpfc hba data structure.
2349 * @vpd: pointer to the vital product data.
2350 * @len: length of the vital product data in bytes.
2351 *
2352 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2353 * an array of characters. In this routine, the ModelName, ProgramType, and
2354 * ModelDesc, etc. fields of the phba data structure will be populated.
2355 *
2356 * Return codes
2357 * 0 - pointer to the VPD passed in is NULL
2358 * 1 - success
2359 **/
2360 int
lpfc_parse_vpd(struct lpfc_hba * phba,uint8_t * vpd,int len)2361 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2362 {
2363 uint8_t lenlo, lenhi;
2364 int Length;
2365 int i;
2366 int finished = 0;
2367 int index = 0;
2368
2369 if (!vpd)
2370 return 0;
2371
2372 /* Vital Product */
2373 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2374 "0455 Vital Product Data: x%x x%x x%x x%x\n",
2375 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2376 (uint32_t) vpd[3]);
2377 while (!finished && (index < (len - 4))) {
2378 switch (vpd[index]) {
2379 case 0x82:
2380 case 0x91:
2381 index += 1;
2382 lenlo = vpd[index];
2383 index += 1;
2384 lenhi = vpd[index];
2385 index += 1;
2386 i = ((((unsigned short)lenhi) << 8) + lenlo);
2387 index += i;
2388 break;
2389 case 0x90:
2390 index += 1;
2391 lenlo = vpd[index];
2392 index += 1;
2393 lenhi = vpd[index];
2394 index += 1;
2395 Length = ((((unsigned short)lenhi) << 8) + lenlo);
2396 if (Length > len - index)
2397 Length = len - index;
2398
2399 lpfc_fill_vpd(phba, vpd, Length, &index);
2400 finished = 0;
2401 break;
2402 case 0x78:
2403 finished = 1;
2404 break;
2405 default:
2406 index ++;
2407 break;
2408 }
2409 }
2410
2411 return(1);
2412 }
2413
2414 /**
2415 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description
2416 * @phba: pointer to lpfc hba data structure.
2417 * @mdp: pointer to the data structure to hold the derived model name.
2418 * @descp: pointer to the data structure to hold the derived description.
2419 *
2420 * This routine retrieves HBA's description based on its registered PCI device
2421 * ID. The @descp passed into this function points to an array of 256 chars. It
2422 * shall be returned with the model name, maximum speed, and the host bus type.
2423 * The @mdp passed into this function points to an array of 80 chars. When the
2424 * function returns, the @mdp will be filled with the model name.
2425 **/
2426 static void
lpfc_get_atto_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2427 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2428 {
2429 uint16_t sub_dev_id = phba->pcidev->subsystem_device;
2430 char *model = "<Unknown>";
2431 int tbolt = 0;
2432
2433 switch (sub_dev_id) {
2434 case PCI_DEVICE_ID_CLRY_161E:
2435 model = "161E";
2436 break;
2437 case PCI_DEVICE_ID_CLRY_162E:
2438 model = "162E";
2439 break;
2440 case PCI_DEVICE_ID_CLRY_164E:
2441 model = "164E";
2442 break;
2443 case PCI_DEVICE_ID_CLRY_161P:
2444 model = "161P";
2445 break;
2446 case PCI_DEVICE_ID_CLRY_162P:
2447 model = "162P";
2448 break;
2449 case PCI_DEVICE_ID_CLRY_164P:
2450 model = "164P";
2451 break;
2452 case PCI_DEVICE_ID_CLRY_321E:
2453 model = "321E";
2454 break;
2455 case PCI_DEVICE_ID_CLRY_322E:
2456 model = "322E";
2457 break;
2458 case PCI_DEVICE_ID_CLRY_324E:
2459 model = "324E";
2460 break;
2461 case PCI_DEVICE_ID_CLRY_321P:
2462 model = "321P";
2463 break;
2464 case PCI_DEVICE_ID_CLRY_322P:
2465 model = "322P";
2466 break;
2467 case PCI_DEVICE_ID_CLRY_324P:
2468 model = "324P";
2469 break;
2470 case PCI_DEVICE_ID_TLFC_2XX2:
2471 model = "2XX2";
2472 tbolt = 1;
2473 break;
2474 case PCI_DEVICE_ID_TLFC_3162:
2475 model = "3162";
2476 tbolt = 1;
2477 break;
2478 case PCI_DEVICE_ID_TLFC_3322:
2479 model = "3322";
2480 tbolt = 1;
2481 break;
2482 default:
2483 model = "Unknown";
2484 break;
2485 }
2486
2487 if (mdp && mdp[0] == '\0')
2488 snprintf(mdp, 79, "%s", model);
2489
2490 if (descp && descp[0] == '\0')
2491 snprintf(descp, 255,
2492 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s",
2493 (tbolt) ? "ThunderLink FC " : "Celerity FC-",
2494 model,
2495 phba->Port);
2496 }
2497
2498 /**
2499 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2500 * @phba: pointer to lpfc hba data structure.
2501 * @mdp: pointer to the data structure to hold the derived model name.
2502 * @descp: pointer to the data structure to hold the derived description.
2503 *
2504 * This routine retrieves HBA's description based on its registered PCI device
2505 * ID. The @descp passed into this function points to an array of 256 chars. It
2506 * shall be returned with the model name, maximum speed, and the host bus type.
2507 * The @mdp passed into this function points to an array of 80 chars. When the
2508 * function returns, the @mdp will be filled with the model name.
2509 **/
2510 static void
lpfc_get_hba_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2511 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2512 {
2513 lpfc_vpd_t *vp;
2514 uint16_t dev_id = phba->pcidev->device;
2515 int max_speed;
2516 int GE = 0;
2517 int oneConnect = 0; /* default is not a oneConnect */
2518 struct {
2519 char *name;
2520 char *bus;
2521 char *function;
2522 } m = {"<Unknown>", "", ""};
2523
2524 if (mdp && mdp[0] != '\0'
2525 && descp && descp[0] != '\0')
2526 return;
2527
2528 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
2529 lpfc_get_atto_model_desc(phba, mdp, descp);
2530 return;
2531 }
2532
2533 if (phba->lmt & LMT_64Gb)
2534 max_speed = 64;
2535 else if (phba->lmt & LMT_32Gb)
2536 max_speed = 32;
2537 else if (phba->lmt & LMT_16Gb)
2538 max_speed = 16;
2539 else if (phba->lmt & LMT_10Gb)
2540 max_speed = 10;
2541 else if (phba->lmt & LMT_8Gb)
2542 max_speed = 8;
2543 else if (phba->lmt & LMT_4Gb)
2544 max_speed = 4;
2545 else if (phba->lmt & LMT_2Gb)
2546 max_speed = 2;
2547 else if (phba->lmt & LMT_1Gb)
2548 max_speed = 1;
2549 else
2550 max_speed = 0;
2551
2552 vp = &phba->vpd;
2553
2554 switch (dev_id) {
2555 case PCI_DEVICE_ID_FIREFLY:
2556 m = (typeof(m)){"LP6000", "PCI",
2557 "Obsolete, Unsupported Fibre Channel Adapter"};
2558 break;
2559 case PCI_DEVICE_ID_SUPERFLY:
2560 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2561 m = (typeof(m)){"LP7000", "PCI", ""};
2562 else
2563 m = (typeof(m)){"LP7000E", "PCI", ""};
2564 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2565 break;
2566 case PCI_DEVICE_ID_DRAGONFLY:
2567 m = (typeof(m)){"LP8000", "PCI",
2568 "Obsolete, Unsupported Fibre Channel Adapter"};
2569 break;
2570 case PCI_DEVICE_ID_CENTAUR:
2571 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2572 m = (typeof(m)){"LP9002", "PCI", ""};
2573 else
2574 m = (typeof(m)){"LP9000", "PCI", ""};
2575 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2576 break;
2577 case PCI_DEVICE_ID_RFLY:
2578 m = (typeof(m)){"LP952", "PCI",
2579 "Obsolete, Unsupported Fibre Channel Adapter"};
2580 break;
2581 case PCI_DEVICE_ID_PEGASUS:
2582 m = (typeof(m)){"LP9802", "PCI-X",
2583 "Obsolete, Unsupported Fibre Channel Adapter"};
2584 break;
2585 case PCI_DEVICE_ID_THOR:
2586 m = (typeof(m)){"LP10000", "PCI-X",
2587 "Obsolete, Unsupported Fibre Channel Adapter"};
2588 break;
2589 case PCI_DEVICE_ID_VIPER:
2590 m = (typeof(m)){"LPX1000", "PCI-X",
2591 "Obsolete, Unsupported Fibre Channel Adapter"};
2592 break;
2593 case PCI_DEVICE_ID_PFLY:
2594 m = (typeof(m)){"LP982", "PCI-X",
2595 "Obsolete, Unsupported Fibre Channel Adapter"};
2596 break;
2597 case PCI_DEVICE_ID_TFLY:
2598 m = (typeof(m)){"LP1050", "PCI-X",
2599 "Obsolete, Unsupported Fibre Channel Adapter"};
2600 break;
2601 case PCI_DEVICE_ID_HELIOS:
2602 m = (typeof(m)){"LP11000", "PCI-X2",
2603 "Obsolete, Unsupported Fibre Channel Adapter"};
2604 break;
2605 case PCI_DEVICE_ID_HELIOS_SCSP:
2606 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2607 "Obsolete, Unsupported Fibre Channel Adapter"};
2608 break;
2609 case PCI_DEVICE_ID_HELIOS_DCSP:
2610 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2611 "Obsolete, Unsupported Fibre Channel Adapter"};
2612 break;
2613 case PCI_DEVICE_ID_NEPTUNE:
2614 m = (typeof(m)){"LPe1000", "PCIe",
2615 "Obsolete, Unsupported Fibre Channel Adapter"};
2616 break;
2617 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2618 m = (typeof(m)){"LPe1000-SP", "PCIe",
2619 "Obsolete, Unsupported Fibre Channel Adapter"};
2620 break;
2621 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2622 m = (typeof(m)){"LPe1002-SP", "PCIe",
2623 "Obsolete, Unsupported Fibre Channel Adapter"};
2624 break;
2625 case PCI_DEVICE_ID_BMID:
2626 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
2627 break;
2628 case PCI_DEVICE_ID_BSMB:
2629 m = (typeof(m)){"LP111", "PCI-X2",
2630 "Obsolete, Unsupported Fibre Channel Adapter"};
2631 break;
2632 case PCI_DEVICE_ID_ZEPHYR:
2633 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2634 break;
2635 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2636 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2637 break;
2638 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2639 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
2640 GE = 1;
2641 break;
2642 case PCI_DEVICE_ID_ZMID:
2643 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
2644 break;
2645 case PCI_DEVICE_ID_ZSMB:
2646 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
2647 break;
2648 case PCI_DEVICE_ID_LP101:
2649 m = (typeof(m)){"LP101", "PCI-X",
2650 "Obsolete, Unsupported Fibre Channel Adapter"};
2651 break;
2652 case PCI_DEVICE_ID_LP10000S:
2653 m = (typeof(m)){"LP10000-S", "PCI",
2654 "Obsolete, Unsupported Fibre Channel Adapter"};
2655 break;
2656 case PCI_DEVICE_ID_LP11000S:
2657 m = (typeof(m)){"LP11000-S", "PCI-X2",
2658 "Obsolete, Unsupported Fibre Channel Adapter"};
2659 break;
2660 case PCI_DEVICE_ID_LPE11000S:
2661 m = (typeof(m)){"LPe11000-S", "PCIe",
2662 "Obsolete, Unsupported Fibre Channel Adapter"};
2663 break;
2664 case PCI_DEVICE_ID_SAT:
2665 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
2666 break;
2667 case PCI_DEVICE_ID_SAT_MID:
2668 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
2669 break;
2670 case PCI_DEVICE_ID_SAT_SMB:
2671 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
2672 break;
2673 case PCI_DEVICE_ID_SAT_DCSP:
2674 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
2675 break;
2676 case PCI_DEVICE_ID_SAT_SCSP:
2677 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
2678 break;
2679 case PCI_DEVICE_ID_SAT_S:
2680 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
2681 break;
2682 case PCI_DEVICE_ID_PROTEUS_VF:
2683 m = (typeof(m)){"LPev12000", "PCIe IOV",
2684 "Obsolete, Unsupported Fibre Channel Adapter"};
2685 break;
2686 case PCI_DEVICE_ID_PROTEUS_PF:
2687 m = (typeof(m)){"LPev12000", "PCIe IOV",
2688 "Obsolete, Unsupported Fibre Channel Adapter"};
2689 break;
2690 case PCI_DEVICE_ID_PROTEUS_S:
2691 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2692 "Obsolete, Unsupported Fibre Channel Adapter"};
2693 break;
2694 case PCI_DEVICE_ID_TIGERSHARK:
2695 oneConnect = 1;
2696 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
2697 break;
2698 case PCI_DEVICE_ID_TOMCAT:
2699 oneConnect = 1;
2700 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2701 break;
2702 case PCI_DEVICE_ID_FALCON:
2703 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2704 "EmulexSecure Fibre"};
2705 break;
2706 case PCI_DEVICE_ID_BALIUS:
2707 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2708 "Obsolete, Unsupported Fibre Channel Adapter"};
2709 break;
2710 case PCI_DEVICE_ID_LANCER_FC:
2711 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
2712 break;
2713 case PCI_DEVICE_ID_LANCER_FC_VF:
2714 m = (typeof(m)){"LPe16000", "PCIe",
2715 "Obsolete, Unsupported Fibre Channel Adapter"};
2716 break;
2717 case PCI_DEVICE_ID_LANCER_FCOE:
2718 oneConnect = 1;
2719 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
2720 break;
2721 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2722 oneConnect = 1;
2723 m = (typeof(m)){"OCe15100", "PCIe",
2724 "Obsolete, Unsupported FCoE"};
2725 break;
2726 case PCI_DEVICE_ID_LANCER_G6_FC:
2727 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2728 break;
2729 case PCI_DEVICE_ID_LANCER_G7_FC:
2730 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2731 break;
2732 case PCI_DEVICE_ID_LANCER_G7P_FC:
2733 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"};
2734 break;
2735 case PCI_DEVICE_ID_SKYHAWK:
2736 case PCI_DEVICE_ID_SKYHAWK_VF:
2737 oneConnect = 1;
2738 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2739 break;
2740 default:
2741 m = (typeof(m)){"Unknown", "", ""};
2742 break;
2743 }
2744
2745 if (mdp && mdp[0] == '\0')
2746 snprintf(mdp, 79,"%s", m.name);
2747 /*
2748 * oneConnect hba requires special processing, they are all initiators
2749 * and we put the port number on the end
2750 */
2751 if (descp && descp[0] == '\0') {
2752 if (oneConnect)
2753 snprintf(descp, 255,
2754 "Emulex OneConnect %s, %s Initiator %s",
2755 m.name, m.function,
2756 phba->Port);
2757 else if (max_speed == 0)
2758 snprintf(descp, 255,
2759 "Emulex %s %s %s",
2760 m.name, m.bus, m.function);
2761 else
2762 snprintf(descp, 255,
2763 "Emulex %s %d%s %s %s",
2764 m.name, max_speed, (GE) ? "GE" : "Gb",
2765 m.bus, m.function);
2766 }
2767 }
2768
2769 /**
2770 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2771 * @phba: pointer to lpfc hba data structure.
2772 * @pring: pointer to a IOCB ring.
2773 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2774 *
2775 * This routine posts a given number of IOCBs with the associated DMA buffer
2776 * descriptors specified by the cnt argument to the given IOCB ring.
2777 *
2778 * Return codes
2779 * The number of IOCBs NOT able to be posted to the IOCB ring.
2780 **/
2781 int
lpfc_sli3_post_buffer(struct lpfc_hba * phba,struct lpfc_sli_ring * pring,int cnt)2782 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2783 {
2784 IOCB_t *icmd;
2785 struct lpfc_iocbq *iocb;
2786 struct lpfc_dmabuf *mp1, *mp2;
2787
2788 cnt += pring->missbufcnt;
2789
2790 /* While there are buffers to post */
2791 while (cnt > 0) {
2792 /* Allocate buffer for command iocb */
2793 iocb = lpfc_sli_get_iocbq(phba);
2794 if (iocb == NULL) {
2795 pring->missbufcnt = cnt;
2796 return cnt;
2797 }
2798 icmd = &iocb->iocb;
2799
2800 /* 2 buffers can be posted per command */
2801 /* Allocate buffer to post */
2802 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2803 if (mp1)
2804 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2805 if (!mp1 || !mp1->virt) {
2806 kfree(mp1);
2807 lpfc_sli_release_iocbq(phba, iocb);
2808 pring->missbufcnt = cnt;
2809 return cnt;
2810 }
2811
2812 INIT_LIST_HEAD(&mp1->list);
2813 /* Allocate buffer to post */
2814 if (cnt > 1) {
2815 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2816 if (mp2)
2817 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2818 &mp2->phys);
2819 if (!mp2 || !mp2->virt) {
2820 kfree(mp2);
2821 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2822 kfree(mp1);
2823 lpfc_sli_release_iocbq(phba, iocb);
2824 pring->missbufcnt = cnt;
2825 return cnt;
2826 }
2827
2828 INIT_LIST_HEAD(&mp2->list);
2829 } else {
2830 mp2 = NULL;
2831 }
2832
2833 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2834 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2835 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2836 icmd->ulpBdeCount = 1;
2837 cnt--;
2838 if (mp2) {
2839 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2840 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2841 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2842 cnt--;
2843 icmd->ulpBdeCount = 2;
2844 }
2845
2846 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2847 icmd->ulpLe = 1;
2848
2849 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2850 IOCB_ERROR) {
2851 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2852 kfree(mp1);
2853 cnt++;
2854 if (mp2) {
2855 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2856 kfree(mp2);
2857 cnt++;
2858 }
2859 lpfc_sli_release_iocbq(phba, iocb);
2860 pring->missbufcnt = cnt;
2861 return cnt;
2862 }
2863 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2864 if (mp2)
2865 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2866 }
2867 pring->missbufcnt = 0;
2868 return 0;
2869 }
2870
2871 /**
2872 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2873 * @phba: pointer to lpfc hba data structure.
2874 *
2875 * This routine posts initial receive IOCB buffers to the ELS ring. The
2876 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2877 * set to 64 IOCBs. SLI3 only.
2878 *
2879 * Return codes
2880 * 0 - success (currently always success)
2881 **/
2882 static int
lpfc_post_rcv_buf(struct lpfc_hba * phba)2883 lpfc_post_rcv_buf(struct lpfc_hba *phba)
2884 {
2885 struct lpfc_sli *psli = &phba->sli;
2886
2887 /* Ring 0, ELS / CT buffers */
2888 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2889 /* Ring 2 - FCP no buffers needed */
2890
2891 return 0;
2892 }
2893
2894 #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2895
2896 /**
2897 * lpfc_sha_init - Set up initial array of hash table entries
2898 * @HashResultPointer: pointer to an array as hash table.
2899 *
2900 * This routine sets up the initial values to the array of hash table entries
2901 * for the LC HBAs.
2902 **/
2903 static void
lpfc_sha_init(uint32_t * HashResultPointer)2904 lpfc_sha_init(uint32_t * HashResultPointer)
2905 {
2906 HashResultPointer[0] = 0x67452301;
2907 HashResultPointer[1] = 0xEFCDAB89;
2908 HashResultPointer[2] = 0x98BADCFE;
2909 HashResultPointer[3] = 0x10325476;
2910 HashResultPointer[4] = 0xC3D2E1F0;
2911 }
2912
2913 /**
2914 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2915 * @HashResultPointer: pointer to an initial/result hash table.
2916 * @HashWorkingPointer: pointer to an working hash table.
2917 *
2918 * This routine iterates an initial hash table pointed by @HashResultPointer
2919 * with the values from the working hash table pointeed by @HashWorkingPointer.
2920 * The results are putting back to the initial hash table, returned through
2921 * the @HashResultPointer as the result hash table.
2922 **/
2923 static void
lpfc_sha_iterate(uint32_t * HashResultPointer,uint32_t * HashWorkingPointer)2924 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2925 {
2926 int t;
2927 uint32_t TEMP;
2928 uint32_t A, B, C, D, E;
2929 t = 16;
2930 do {
2931 HashWorkingPointer[t] =
2932 S(1,
2933 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2934 8] ^
2935 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2936 } while (++t <= 79);
2937 t = 0;
2938 A = HashResultPointer[0];
2939 B = HashResultPointer[1];
2940 C = HashResultPointer[2];
2941 D = HashResultPointer[3];
2942 E = HashResultPointer[4];
2943
2944 do {
2945 if (t < 20) {
2946 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2947 } else if (t < 40) {
2948 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2949 } else if (t < 60) {
2950 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2951 } else {
2952 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2953 }
2954 TEMP += S(5, A) + E + HashWorkingPointer[t];
2955 E = D;
2956 D = C;
2957 C = S(30, B);
2958 B = A;
2959 A = TEMP;
2960 } while (++t <= 79);
2961
2962 HashResultPointer[0] += A;
2963 HashResultPointer[1] += B;
2964 HashResultPointer[2] += C;
2965 HashResultPointer[3] += D;
2966 HashResultPointer[4] += E;
2967
2968 }
2969
2970 /**
2971 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2972 * @RandomChallenge: pointer to the entry of host challenge random number array.
2973 * @HashWorking: pointer to the entry of the working hash array.
2974 *
2975 * This routine calculates the working hash array referred by @HashWorking
2976 * from the challenge random numbers associated with the host, referred by
2977 * @RandomChallenge. The result is put into the entry of the working hash
2978 * array and returned by reference through @HashWorking.
2979 **/
2980 static void
lpfc_challenge_key(uint32_t * RandomChallenge,uint32_t * HashWorking)2981 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2982 {
2983 *HashWorking = (*RandomChallenge ^ *HashWorking);
2984 }
2985
2986 /**
2987 * lpfc_hba_init - Perform special handling for LC HBA initialization
2988 * @phba: pointer to lpfc hba data structure.
2989 * @hbainit: pointer to an array of unsigned 32-bit integers.
2990 *
2991 * This routine performs the special handling for LC HBA initialization.
2992 **/
2993 void
lpfc_hba_init(struct lpfc_hba * phba,uint32_t * hbainit)2994 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2995 {
2996 int t;
2997 uint32_t *HashWorking;
2998 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
2999
3000 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
3001 if (!HashWorking)
3002 return;
3003
3004 HashWorking[0] = HashWorking[78] = *pwwnn++;
3005 HashWorking[1] = HashWorking[79] = *pwwnn;
3006
3007 for (t = 0; t < 7; t++)
3008 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
3009
3010 lpfc_sha_init(hbainit);
3011 lpfc_sha_iterate(hbainit, HashWorking);
3012 kfree(HashWorking);
3013 }
3014
3015 /**
3016 * lpfc_cleanup - Performs vport cleanups before deleting a vport
3017 * @vport: pointer to a virtual N_Port data structure.
3018 *
3019 * This routine performs the necessary cleanups before deleting the @vport.
3020 * It invokes the discovery state machine to perform necessary state
3021 * transitions and to release the ndlps associated with the @vport. Note,
3022 * the physical port is treated as @vport 0.
3023 **/
3024 void
lpfc_cleanup(struct lpfc_vport * vport)3025 lpfc_cleanup(struct lpfc_vport *vport)
3026 {
3027 struct lpfc_hba *phba = vport->phba;
3028 struct lpfc_nodelist *ndlp, *next_ndlp;
3029 int i = 0;
3030
3031 if (phba->link_state > LPFC_LINK_DOWN)
3032 lpfc_port_link_failure(vport);
3033
3034 /* Clean up VMID resources */
3035 if (lpfc_is_vmid_enabled(phba))
3036 lpfc_vmid_vport_cleanup(vport);
3037
3038 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
3039 if (vport->port_type != LPFC_PHYSICAL_PORT &&
3040 ndlp->nlp_DID == Fabric_DID) {
3041 /* Just free up ndlp with Fabric_DID for vports */
3042 lpfc_nlp_put(ndlp);
3043 continue;
3044 }
3045
3046 if (ndlp->nlp_DID == Fabric_Cntl_DID &&
3047 ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
3048 lpfc_nlp_put(ndlp);
3049 continue;
3050 }
3051
3052 /* Fabric Ports not in UNMAPPED state are cleaned up in the
3053 * DEVICE_RM event.
3054 */
3055 if (ndlp->nlp_type & NLP_FABRIC &&
3056 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE)
3057 lpfc_disc_state_machine(vport, ndlp, NULL,
3058 NLP_EVT_DEVICE_RECOVERY);
3059
3060 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD)))
3061 lpfc_disc_state_machine(vport, ndlp, NULL,
3062 NLP_EVT_DEVICE_RM);
3063 }
3064
3065 /* This is a special case flush to return all
3066 * IOs before entering this loop. There are
3067 * two points in the code where a flush is
3068 * avoided if the FC_UNLOADING flag is set.
3069 * one is in the multipool destroy,
3070 * (this prevents a crash) and the other is
3071 * in the nvme abort handler, ( also prevents
3072 * a crash). Both of these exceptions are
3073 * cases where the slot is still accessible.
3074 * The flush here is only when the pci slot
3075 * is offline.
3076 */
3077 if (test_bit(FC_UNLOADING, &vport->load_flag) &&
3078 pci_channel_offline(phba->pcidev))
3079 lpfc_sli_flush_io_rings(vport->phba);
3080
3081 /* At this point, ALL ndlp's should be gone
3082 * because of the previous NLP_EVT_DEVICE_RM.
3083 * Lets wait for this to happen, if needed.
3084 */
3085 while (!list_empty(&vport->fc_nodes)) {
3086 if (i++ > 3000) {
3087 lpfc_printf_vlog(vport, KERN_ERR,
3088 LOG_TRACE_EVENT,
3089 "0233 Nodelist not empty\n");
3090 list_for_each_entry_safe(ndlp, next_ndlp,
3091 &vport->fc_nodes, nlp_listp) {
3092 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
3093 LOG_DISCOVERY,
3094 "0282 did:x%x ndlp:x%px "
3095 "refcnt:%d xflags x%x nflag x%x\n",
3096 ndlp->nlp_DID, (void *)ndlp,
3097 kref_read(&ndlp->kref),
3098 ndlp->fc4_xpt_flags,
3099 ndlp->nlp_flag);
3100 }
3101 break;
3102 }
3103
3104 /* Wait for any activity on ndlps to settle */
3105 msleep(10);
3106 }
3107 lpfc_cleanup_vports_rrqs(vport, NULL);
3108 }
3109
3110 /**
3111 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
3112 * @vport: pointer to a virtual N_Port data structure.
3113 *
3114 * This routine stops all the timers associated with a @vport. This function
3115 * is invoked before disabling or deleting a @vport. Note that the physical
3116 * port is treated as @vport 0.
3117 **/
3118 void
lpfc_stop_vport_timers(struct lpfc_vport * vport)3119 lpfc_stop_vport_timers(struct lpfc_vport *vport)
3120 {
3121 del_timer_sync(&vport->els_tmofunc);
3122 del_timer_sync(&vport->delayed_disc_tmo);
3123 lpfc_can_disctmo(vport);
3124 return;
3125 }
3126
3127 /**
3128 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3129 * @phba: pointer to lpfc hba data structure.
3130 *
3131 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
3132 * caller of this routine should already hold the host lock.
3133 **/
3134 void
__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3135 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3136 {
3137 /* Clear pending FCF rediscovery wait flag */
3138 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3139
3140 /* Now, try to stop the timer */
3141 del_timer(&phba->fcf.redisc_wait);
3142 }
3143
3144 /**
3145 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3146 * @phba: pointer to lpfc hba data structure.
3147 *
3148 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
3149 * checks whether the FCF rediscovery wait timer is pending with the host
3150 * lock held before proceeding with disabling the timer and clearing the
3151 * wait timer pendig flag.
3152 **/
3153 void
lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3154 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3155 {
3156 spin_lock_irq(&phba->hbalock);
3157 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3158 /* FCF rediscovery timer already fired or stopped */
3159 spin_unlock_irq(&phba->hbalock);
3160 return;
3161 }
3162 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3163 /* Clear failover in progress flags */
3164 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
3165 spin_unlock_irq(&phba->hbalock);
3166 }
3167
3168 /**
3169 * lpfc_cmf_stop - Stop CMF processing
3170 * @phba: pointer to lpfc hba data structure.
3171 *
3172 * This is called when the link goes down or if CMF mode is turned OFF.
3173 * It is also called when going offline or unloaded just before the
3174 * congestion info buffer is unregistered.
3175 **/
3176 void
lpfc_cmf_stop(struct lpfc_hba * phba)3177 lpfc_cmf_stop(struct lpfc_hba *phba)
3178 {
3179 int cpu;
3180 struct lpfc_cgn_stat *cgs;
3181
3182 /* We only do something if CMF is enabled */
3183 if (!phba->sli4_hba.pc_sli4_params.cmf)
3184 return;
3185
3186 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3187 "6221 Stop CMF / Cancel Timer\n");
3188
3189 /* Cancel the CMF timer */
3190 hrtimer_cancel(&phba->cmf_stats_timer);
3191 hrtimer_cancel(&phba->cmf_timer);
3192
3193 /* Zero CMF counters */
3194 atomic_set(&phba->cmf_busy, 0);
3195 for_each_present_cpu(cpu) {
3196 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3197 atomic64_set(&cgs->total_bytes, 0);
3198 atomic64_set(&cgs->rcv_bytes, 0);
3199 atomic_set(&cgs->rx_io_cnt, 0);
3200 atomic64_set(&cgs->rx_latency, 0);
3201 }
3202 atomic_set(&phba->cmf_bw_wait, 0);
3203
3204 /* Resume any blocked IO - Queue unblock on workqueue */
3205 queue_work(phba->wq, &phba->unblock_request_work);
3206 }
3207
3208 static inline uint64_t
lpfc_get_max_line_rate(struct lpfc_hba * phba)3209 lpfc_get_max_line_rate(struct lpfc_hba *phba)
3210 {
3211 uint64_t rate = lpfc_sli_port_speed_get(phba);
3212
3213 return ((((unsigned long)rate) * 1024 * 1024) / 10);
3214 }
3215
3216 void
lpfc_cmf_signal_init(struct lpfc_hba * phba)3217 lpfc_cmf_signal_init(struct lpfc_hba *phba)
3218 {
3219 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3220 "6223 Signal CMF init\n");
3221
3222 /* Use the new fc_linkspeed to recalculate */
3223 phba->cmf_interval_rate = LPFC_CMF_INTERVAL;
3224 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba);
3225 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
3226 phba->cmf_interval_rate, 1000);
3227 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count;
3228
3229 /* This is a signal to firmware to sync up CMF BW with link speed */
3230 lpfc_issue_cmf_sync_wqe(phba, 0, 0);
3231 }
3232
3233 /**
3234 * lpfc_cmf_start - Start CMF processing
3235 * @phba: pointer to lpfc hba data structure.
3236 *
3237 * This is called when the link comes up or if CMF mode is turned OFF
3238 * to Monitor or Managed.
3239 **/
3240 void
lpfc_cmf_start(struct lpfc_hba * phba)3241 lpfc_cmf_start(struct lpfc_hba *phba)
3242 {
3243 struct lpfc_cgn_stat *cgs;
3244 int cpu;
3245
3246 /* We only do something if CMF is enabled */
3247 if (!phba->sli4_hba.pc_sli4_params.cmf ||
3248 phba->cmf_active_mode == LPFC_CFG_OFF)
3249 return;
3250
3251 /* Reinitialize congestion buffer info */
3252 lpfc_init_congestion_buf(phba);
3253
3254 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
3255 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
3256 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
3257 atomic_set(&phba->cgn_sync_warn_cnt, 0);
3258
3259 atomic_set(&phba->cmf_busy, 0);
3260 for_each_present_cpu(cpu) {
3261 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3262 atomic64_set(&cgs->total_bytes, 0);
3263 atomic64_set(&cgs->rcv_bytes, 0);
3264 atomic_set(&cgs->rx_io_cnt, 0);
3265 atomic64_set(&cgs->rx_latency, 0);
3266 }
3267 phba->cmf_latency.tv_sec = 0;
3268 phba->cmf_latency.tv_nsec = 0;
3269
3270 lpfc_cmf_signal_init(phba);
3271
3272 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3273 "6222 Start CMF / Timer\n");
3274
3275 phba->cmf_timer_cnt = 0;
3276 hrtimer_start(&phba->cmf_timer,
3277 ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC),
3278 HRTIMER_MODE_REL);
3279 hrtimer_start(&phba->cmf_stats_timer,
3280 ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC),
3281 HRTIMER_MODE_REL);
3282 /* Setup for latency check in IO cmpl routines */
3283 ktime_get_real_ts64(&phba->cmf_latency);
3284
3285 atomic_set(&phba->cmf_bw_wait, 0);
3286 atomic_set(&phba->cmf_stop_io, 0);
3287 }
3288
3289 /**
3290 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
3291 * @phba: pointer to lpfc hba data structure.
3292 *
3293 * This routine stops all the timers associated with a HBA. This function is
3294 * invoked before either putting a HBA offline or unloading the driver.
3295 **/
3296 void
lpfc_stop_hba_timers(struct lpfc_hba * phba)3297 lpfc_stop_hba_timers(struct lpfc_hba *phba)
3298 {
3299 if (phba->pport)
3300 lpfc_stop_vport_timers(phba->pport);
3301 cancel_delayed_work_sync(&phba->eq_delay_work);
3302 cancel_delayed_work_sync(&phba->idle_stat_delay_work);
3303 del_timer_sync(&phba->sli.mbox_tmo);
3304 del_timer_sync(&phba->fabric_block_timer);
3305 del_timer_sync(&phba->eratt_poll);
3306 del_timer_sync(&phba->hb_tmofunc);
3307 if (phba->sli_rev == LPFC_SLI_REV4) {
3308 del_timer_sync(&phba->rrq_tmr);
3309 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
3310 }
3311 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
3312 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
3313
3314 switch (phba->pci_dev_grp) {
3315 case LPFC_PCI_DEV_LP:
3316 /* Stop any LightPulse device specific driver timers */
3317 del_timer_sync(&phba->fcp_poll_timer);
3318 break;
3319 case LPFC_PCI_DEV_OC:
3320 /* Stop any OneConnect device specific driver timers */
3321 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3322 break;
3323 default:
3324 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3325 "0297 Invalid device group (x%x)\n",
3326 phba->pci_dev_grp);
3327 break;
3328 }
3329 return;
3330 }
3331
3332 /**
3333 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
3334 * @phba: pointer to lpfc hba data structure.
3335 * @mbx_action: flag for mailbox no wait action.
3336 *
3337 * This routine marks a HBA's management interface as blocked. Once the HBA's
3338 * management interface is marked as blocked, all the user space access to
3339 * the HBA, whether they are from sysfs interface or libdfc interface will
3340 * all be blocked. The HBA is set to block the management interface when the
3341 * driver prepares the HBA interface for online or offline.
3342 **/
3343 static void
lpfc_block_mgmt_io(struct lpfc_hba * phba,int mbx_action)3344 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
3345 {
3346 unsigned long iflag;
3347 uint8_t actcmd = MBX_HEARTBEAT;
3348 unsigned long timeout;
3349
3350 spin_lock_irqsave(&phba->hbalock, iflag);
3351 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
3352 spin_unlock_irqrestore(&phba->hbalock, iflag);
3353 if (mbx_action == LPFC_MBX_NO_WAIT)
3354 return;
3355 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
3356 spin_lock_irqsave(&phba->hbalock, iflag);
3357 if (phba->sli.mbox_active) {
3358 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
3359 /* Determine how long we might wait for the active mailbox
3360 * command to be gracefully completed by firmware.
3361 */
3362 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
3363 phba->sli.mbox_active) * 1000) + jiffies;
3364 }
3365 spin_unlock_irqrestore(&phba->hbalock, iflag);
3366
3367 /* Wait for the outstnading mailbox command to complete */
3368 while (phba->sli.mbox_active) {
3369 /* Check active mailbox complete status every 2ms */
3370 msleep(2);
3371 if (time_after(jiffies, timeout)) {
3372 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3373 "2813 Mgmt IO is Blocked %x "
3374 "- mbox cmd %x still active\n",
3375 phba->sli.sli_flag, actcmd);
3376 break;
3377 }
3378 }
3379 }
3380
3381 /**
3382 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
3383 * @phba: pointer to lpfc hba data structure.
3384 *
3385 * Allocate RPIs for all active remote nodes. This is needed whenever
3386 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3387 * is to fixup the temporary rpi assignments.
3388 **/
3389 void
lpfc_sli4_node_prep(struct lpfc_hba * phba)3390 lpfc_sli4_node_prep(struct lpfc_hba *phba)
3391 {
3392 struct lpfc_nodelist *ndlp, *next_ndlp;
3393 struct lpfc_vport **vports;
3394 int i, rpi;
3395
3396 if (phba->sli_rev != LPFC_SLI_REV4)
3397 return;
3398
3399 vports = lpfc_create_vport_work_array(phba);
3400 if (vports == NULL)
3401 return;
3402
3403 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3404 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3405 continue;
3406
3407 list_for_each_entry_safe(ndlp, next_ndlp,
3408 &vports[i]->fc_nodes,
3409 nlp_listp) {
3410 rpi = lpfc_sli4_alloc_rpi(phba);
3411 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3412 /* TODO print log? */
3413 continue;
3414 }
3415 ndlp->nlp_rpi = rpi;
3416 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3417 LOG_NODE | LOG_DISCOVERY,
3418 "0009 Assign RPI x%x to ndlp x%px "
3419 "DID:x%06x flg:x%x\n",
3420 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
3421 ndlp->nlp_flag);
3422 }
3423 }
3424 lpfc_destroy_vport_work_array(phba, vports);
3425 }
3426
3427 /**
3428 * lpfc_create_expedite_pool - create expedite pool
3429 * @phba: pointer to lpfc hba data structure.
3430 *
3431 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3432 * to expedite pool. Mark them as expedite.
3433 **/
lpfc_create_expedite_pool(struct lpfc_hba * phba)3434 static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3435 {
3436 struct lpfc_sli4_hdw_queue *qp;
3437 struct lpfc_io_buf *lpfc_ncmd;
3438 struct lpfc_io_buf *lpfc_ncmd_next;
3439 struct lpfc_epd_pool *epd_pool;
3440 unsigned long iflag;
3441
3442 epd_pool = &phba->epd_pool;
3443 qp = &phba->sli4_hba.hdwq[0];
3444
3445 spin_lock_init(&epd_pool->lock);
3446 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3447 spin_lock(&epd_pool->lock);
3448 INIT_LIST_HEAD(&epd_pool->list);
3449 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3450 &qp->lpfc_io_buf_list_put, list) {
3451 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3452 lpfc_ncmd->expedite = true;
3453 qp->put_io_bufs--;
3454 epd_pool->count++;
3455 if (epd_pool->count >= XRI_BATCH)
3456 break;
3457 }
3458 spin_unlock(&epd_pool->lock);
3459 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3460 }
3461
3462 /**
3463 * lpfc_destroy_expedite_pool - destroy expedite pool
3464 * @phba: pointer to lpfc hba data structure.
3465 *
3466 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3467 * of HWQ 0. Clear the mark.
3468 **/
lpfc_destroy_expedite_pool(struct lpfc_hba * phba)3469 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3470 {
3471 struct lpfc_sli4_hdw_queue *qp;
3472 struct lpfc_io_buf *lpfc_ncmd;
3473 struct lpfc_io_buf *lpfc_ncmd_next;
3474 struct lpfc_epd_pool *epd_pool;
3475 unsigned long iflag;
3476
3477 epd_pool = &phba->epd_pool;
3478 qp = &phba->sli4_hba.hdwq[0];
3479
3480 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3481 spin_lock(&epd_pool->lock);
3482 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3483 &epd_pool->list, list) {
3484 list_move_tail(&lpfc_ncmd->list,
3485 &qp->lpfc_io_buf_list_put);
3486 lpfc_ncmd->flags = false;
3487 qp->put_io_bufs++;
3488 epd_pool->count--;
3489 }
3490 spin_unlock(&epd_pool->lock);
3491 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3492 }
3493
3494 /**
3495 * lpfc_create_multixri_pools - create multi-XRI pools
3496 * @phba: pointer to lpfc hba data structure.
3497 *
3498 * This routine initialize public, private per HWQ. Then, move XRIs from
3499 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3500 * Initialized.
3501 **/
lpfc_create_multixri_pools(struct lpfc_hba * phba)3502 void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3503 {
3504 u32 i, j;
3505 u32 hwq_count;
3506 u32 count_per_hwq;
3507 struct lpfc_io_buf *lpfc_ncmd;
3508 struct lpfc_io_buf *lpfc_ncmd_next;
3509 unsigned long iflag;
3510 struct lpfc_sli4_hdw_queue *qp;
3511 struct lpfc_multixri_pool *multixri_pool;
3512 struct lpfc_pbl_pool *pbl_pool;
3513 struct lpfc_pvt_pool *pvt_pool;
3514
3515 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3516 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3517 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3518 phba->sli4_hba.io_xri_cnt);
3519
3520 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3521 lpfc_create_expedite_pool(phba);
3522
3523 hwq_count = phba->cfg_hdw_queue;
3524 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3525
3526 for (i = 0; i < hwq_count; i++) {
3527 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
3528
3529 if (!multixri_pool) {
3530 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3531 "1238 Failed to allocate memory for "
3532 "multixri_pool\n");
3533
3534 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3535 lpfc_destroy_expedite_pool(phba);
3536
3537 j = 0;
3538 while (j < i) {
3539 qp = &phba->sli4_hba.hdwq[j];
3540 kfree(qp->p_multixri_pool);
3541 j++;
3542 }
3543 phba->cfg_xri_rebalancing = 0;
3544 return;
3545 }
3546
3547 qp = &phba->sli4_hba.hdwq[i];
3548 qp->p_multixri_pool = multixri_pool;
3549
3550 multixri_pool->xri_limit = count_per_hwq;
3551 multixri_pool->rrb_next_hwqid = i;
3552
3553 /* Deal with public free xri pool */
3554 pbl_pool = &multixri_pool->pbl_pool;
3555 spin_lock_init(&pbl_pool->lock);
3556 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3557 spin_lock(&pbl_pool->lock);
3558 INIT_LIST_HEAD(&pbl_pool->list);
3559 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3560 &qp->lpfc_io_buf_list_put, list) {
3561 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3562 qp->put_io_bufs--;
3563 pbl_pool->count++;
3564 }
3565 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3566 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3567 pbl_pool->count, i);
3568 spin_unlock(&pbl_pool->lock);
3569 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3570
3571 /* Deal with private free xri pool */
3572 pvt_pool = &multixri_pool->pvt_pool;
3573 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3574 pvt_pool->low_watermark = XRI_BATCH;
3575 spin_lock_init(&pvt_pool->lock);
3576 spin_lock_irqsave(&pvt_pool->lock, iflag);
3577 INIT_LIST_HEAD(&pvt_pool->list);
3578 pvt_pool->count = 0;
3579 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3580 }
3581 }
3582
3583 /**
3584 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3585 * @phba: pointer to lpfc hba data structure.
3586 *
3587 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3588 **/
lpfc_destroy_multixri_pools(struct lpfc_hba * phba)3589 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3590 {
3591 u32 i;
3592 u32 hwq_count;
3593 struct lpfc_io_buf *lpfc_ncmd;
3594 struct lpfc_io_buf *lpfc_ncmd_next;
3595 unsigned long iflag;
3596 struct lpfc_sli4_hdw_queue *qp;
3597 struct lpfc_multixri_pool *multixri_pool;
3598 struct lpfc_pbl_pool *pbl_pool;
3599 struct lpfc_pvt_pool *pvt_pool;
3600
3601 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3602 lpfc_destroy_expedite_pool(phba);
3603
3604 if (!test_bit(FC_UNLOADING, &phba->pport->load_flag))
3605 lpfc_sli_flush_io_rings(phba);
3606
3607 hwq_count = phba->cfg_hdw_queue;
3608
3609 for (i = 0; i < hwq_count; i++) {
3610 qp = &phba->sli4_hba.hdwq[i];
3611 multixri_pool = qp->p_multixri_pool;
3612 if (!multixri_pool)
3613 continue;
3614
3615 qp->p_multixri_pool = NULL;
3616
3617 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3618
3619 /* Deal with public free xri pool */
3620 pbl_pool = &multixri_pool->pbl_pool;
3621 spin_lock(&pbl_pool->lock);
3622
3623 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3624 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3625 pbl_pool->count, i);
3626
3627 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3628 &pbl_pool->list, list) {
3629 list_move_tail(&lpfc_ncmd->list,
3630 &qp->lpfc_io_buf_list_put);
3631 qp->put_io_bufs++;
3632 pbl_pool->count--;
3633 }
3634
3635 INIT_LIST_HEAD(&pbl_pool->list);
3636 pbl_pool->count = 0;
3637
3638 spin_unlock(&pbl_pool->lock);
3639
3640 /* Deal with private free xri pool */
3641 pvt_pool = &multixri_pool->pvt_pool;
3642 spin_lock(&pvt_pool->lock);
3643
3644 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3645 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3646 pvt_pool->count, i);
3647
3648 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3649 &pvt_pool->list, list) {
3650 list_move_tail(&lpfc_ncmd->list,
3651 &qp->lpfc_io_buf_list_put);
3652 qp->put_io_bufs++;
3653 pvt_pool->count--;
3654 }
3655
3656 INIT_LIST_HEAD(&pvt_pool->list);
3657 pvt_pool->count = 0;
3658
3659 spin_unlock(&pvt_pool->lock);
3660 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3661
3662 kfree(multixri_pool);
3663 }
3664 }
3665
3666 /**
3667 * lpfc_online - Initialize and bring a HBA online
3668 * @phba: pointer to lpfc hba data structure.
3669 *
3670 * This routine initializes the HBA and brings a HBA online. During this
3671 * process, the management interface is blocked to prevent user space access
3672 * to the HBA interfering with the driver initialization.
3673 *
3674 * Return codes
3675 * 0 - successful
3676 * 1 - failed
3677 **/
3678 int
lpfc_online(struct lpfc_hba * phba)3679 lpfc_online(struct lpfc_hba *phba)
3680 {
3681 struct lpfc_vport *vport;
3682 struct lpfc_vport **vports;
3683 int i, error = 0;
3684 bool vpis_cleared = false;
3685
3686 if (!phba)
3687 return 0;
3688 vport = phba->pport;
3689
3690 if (!test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3691 return 0;
3692
3693 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3694 "0458 Bring Adapter online\n");
3695
3696 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3697
3698 if (phba->sli_rev == LPFC_SLI_REV4) {
3699 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3700 lpfc_unblock_mgmt_io(phba);
3701 return 1;
3702 }
3703 spin_lock_irq(&phba->hbalock);
3704 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3705 vpis_cleared = true;
3706 spin_unlock_irq(&phba->hbalock);
3707
3708 /* Reestablish the local initiator port.
3709 * The offline process destroyed the previous lport.
3710 */
3711 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3712 !phba->nvmet_support) {
3713 error = lpfc_nvme_create_localport(phba->pport);
3714 if (error)
3715 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3716 "6132 NVME restore reg failed "
3717 "on nvmei error x%x\n", error);
3718 }
3719 } else {
3720 lpfc_sli_queue_init(phba);
3721 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3722 lpfc_unblock_mgmt_io(phba);
3723 return 1;
3724 }
3725 }
3726
3727 vports = lpfc_create_vport_work_array(phba);
3728 if (vports != NULL) {
3729 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3730 clear_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3731 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3732 set_bit(FC_VPORT_NEEDS_REG_VPI,
3733 &vports[i]->fc_flag);
3734 if (phba->sli_rev == LPFC_SLI_REV4) {
3735 set_bit(FC_VPORT_NEEDS_INIT_VPI,
3736 &vports[i]->fc_flag);
3737 if ((vpis_cleared) &&
3738 (vports[i]->port_type !=
3739 LPFC_PHYSICAL_PORT))
3740 vports[i]->vpi = 0;
3741 }
3742 }
3743 }
3744 lpfc_destroy_vport_work_array(phba, vports);
3745
3746 if (phba->cfg_xri_rebalancing)
3747 lpfc_create_multixri_pools(phba);
3748
3749 lpfc_cpuhp_add(phba);
3750
3751 lpfc_unblock_mgmt_io(phba);
3752 return 0;
3753 }
3754
3755 /**
3756 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3757 * @phba: pointer to lpfc hba data structure.
3758 *
3759 * This routine marks a HBA's management interface as not blocked. Once the
3760 * HBA's management interface is marked as not blocked, all the user space
3761 * access to the HBA, whether they are from sysfs interface or libdfc
3762 * interface will be allowed. The HBA is set to block the management interface
3763 * when the driver prepares the HBA interface for online or offline and then
3764 * set to unblock the management interface afterwards.
3765 **/
3766 void
lpfc_unblock_mgmt_io(struct lpfc_hba * phba)3767 lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3768 {
3769 unsigned long iflag;
3770
3771 spin_lock_irqsave(&phba->hbalock, iflag);
3772 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3773 spin_unlock_irqrestore(&phba->hbalock, iflag);
3774 }
3775
3776 /**
3777 * lpfc_offline_prep - Prepare a HBA to be brought offline
3778 * @phba: pointer to lpfc hba data structure.
3779 * @mbx_action: flag for mailbox shutdown action.
3780 *
3781 * This routine is invoked to prepare a HBA to be brought offline. It performs
3782 * unregistration login to all the nodes on all vports and flushes the mailbox
3783 * queue to make it ready to be brought offline.
3784 **/
3785 void
lpfc_offline_prep(struct lpfc_hba * phba,int mbx_action)3786 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3787 {
3788 struct lpfc_vport *vport = phba->pport;
3789 struct lpfc_nodelist *ndlp, *next_ndlp;
3790 struct lpfc_vport **vports;
3791 struct Scsi_Host *shost;
3792 int i;
3793 int offline;
3794 bool hba_pci_err;
3795
3796 if (test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3797 return;
3798
3799 lpfc_block_mgmt_io(phba, mbx_action);
3800
3801 lpfc_linkdown(phba);
3802
3803 offline = pci_channel_offline(phba->pcidev);
3804 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags);
3805
3806 /* Issue an unreg_login to all nodes on all vports */
3807 vports = lpfc_create_vport_work_array(phba);
3808 if (vports != NULL) {
3809 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3810 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3811 continue;
3812 shost = lpfc_shost_from_vport(vports[i]);
3813 spin_lock_irq(shost->host_lock);
3814 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3815 spin_unlock_irq(shost->host_lock);
3816 set_bit(FC_VPORT_NEEDS_REG_VPI, &vports[i]->fc_flag);
3817 clear_bit(FC_VFI_REGISTERED, &vports[i]->fc_flag);
3818
3819 list_for_each_entry_safe(ndlp, next_ndlp,
3820 &vports[i]->fc_nodes,
3821 nlp_listp) {
3822
3823 spin_lock_irq(&ndlp->lock);
3824 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
3825 spin_unlock_irq(&ndlp->lock);
3826
3827 if (offline || hba_pci_err) {
3828 spin_lock_irq(&ndlp->lock);
3829 ndlp->nlp_flag &= ~(NLP_UNREG_INP |
3830 NLP_RPI_REGISTERED);
3831 spin_unlock_irq(&ndlp->lock);
3832 if (phba->sli_rev == LPFC_SLI_REV4)
3833 lpfc_sli_rpi_release(vports[i],
3834 ndlp);
3835 } else {
3836 lpfc_unreg_rpi(vports[i], ndlp);
3837 }
3838 /*
3839 * Whenever an SLI4 port goes offline, free the
3840 * RPI. Get a new RPI when the adapter port
3841 * comes back online.
3842 */
3843 if (phba->sli_rev == LPFC_SLI_REV4) {
3844 lpfc_printf_vlog(vports[i], KERN_INFO,
3845 LOG_NODE | LOG_DISCOVERY,
3846 "0011 Free RPI x%x on "
3847 "ndlp: x%px did x%x\n",
3848 ndlp->nlp_rpi, ndlp,
3849 ndlp->nlp_DID);
3850 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
3851 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
3852 }
3853
3854 if (ndlp->nlp_type & NLP_FABRIC) {
3855 lpfc_disc_state_machine(vports[i], ndlp,
3856 NULL, NLP_EVT_DEVICE_RECOVERY);
3857
3858 /* Don't remove the node unless the node
3859 * has been unregistered with the
3860 * transport, and we're not in recovery
3861 * before dev_loss_tmo triggered.
3862 * Otherwise, let dev_loss take care of
3863 * the node.
3864 */
3865 if (!(ndlp->save_flags &
3866 NLP_IN_RECOV_POST_DEV_LOSS) &&
3867 !(ndlp->fc4_xpt_flags &
3868 (NVME_XPT_REGD | SCSI_XPT_REGD)))
3869 lpfc_disc_state_machine
3870 (vports[i], ndlp,
3871 NULL,
3872 NLP_EVT_DEVICE_RM);
3873 }
3874 }
3875 }
3876 }
3877 lpfc_destroy_vport_work_array(phba, vports);
3878
3879 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3880
3881 if (phba->wq)
3882 flush_workqueue(phba->wq);
3883 }
3884
3885 /**
3886 * lpfc_offline - Bring a HBA offline
3887 * @phba: pointer to lpfc hba data structure.
3888 *
3889 * This routine actually brings a HBA offline. It stops all the timers
3890 * associated with the HBA, brings down the SLI layer, and eventually
3891 * marks the HBA as in offline state for the upper layer protocol.
3892 **/
3893 void
lpfc_offline(struct lpfc_hba * phba)3894 lpfc_offline(struct lpfc_hba *phba)
3895 {
3896 struct Scsi_Host *shost;
3897 struct lpfc_vport **vports;
3898 int i;
3899
3900 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3901 return;
3902
3903 /* stop port and all timers associated with this hba */
3904 lpfc_stop_port(phba);
3905
3906 /* Tear down the local and target port registrations. The
3907 * nvme transports need to cleanup.
3908 */
3909 lpfc_nvmet_destroy_targetport(phba);
3910 lpfc_nvme_destroy_localport(phba->pport);
3911
3912 vports = lpfc_create_vport_work_array(phba);
3913 if (vports != NULL)
3914 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3915 lpfc_stop_vport_timers(vports[i]);
3916 lpfc_destroy_vport_work_array(phba, vports);
3917 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3918 "0460 Bring Adapter offline\n");
3919 /* Bring down the SLI Layer and cleanup. The HBA is offline
3920 now. */
3921 lpfc_sli_hba_down(phba);
3922 spin_lock_irq(&phba->hbalock);
3923 phba->work_ha = 0;
3924 spin_unlock_irq(&phba->hbalock);
3925 vports = lpfc_create_vport_work_array(phba);
3926 if (vports != NULL)
3927 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3928 shost = lpfc_shost_from_vport(vports[i]);
3929 spin_lock_irq(shost->host_lock);
3930 vports[i]->work_port_events = 0;
3931 spin_unlock_irq(shost->host_lock);
3932 set_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3933 }
3934 lpfc_destroy_vport_work_array(phba, vports);
3935 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled
3936 * in hba_unset
3937 */
3938 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3939 __lpfc_cpuhp_remove(phba);
3940
3941 if (phba->cfg_xri_rebalancing)
3942 lpfc_destroy_multixri_pools(phba);
3943 }
3944
3945 /**
3946 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3947 * @phba: pointer to lpfc hba data structure.
3948 *
3949 * This routine is to free all the SCSI buffers and IOCBs from the driver
3950 * list back to kernel. It is called from lpfc_pci_remove_one to free
3951 * the internal resources before the device is removed from the system.
3952 **/
3953 static void
lpfc_scsi_free(struct lpfc_hba * phba)3954 lpfc_scsi_free(struct lpfc_hba *phba)
3955 {
3956 struct lpfc_io_buf *sb, *sb_next;
3957
3958 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3959 return;
3960
3961 spin_lock_irq(&phba->hbalock);
3962
3963 /* Release all the lpfc_scsi_bufs maintained by this host. */
3964
3965 spin_lock(&phba->scsi_buf_list_put_lock);
3966 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3967 list) {
3968 list_del(&sb->list);
3969 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3970 sb->dma_handle);
3971 kfree(sb);
3972 phba->total_scsi_bufs--;
3973 }
3974 spin_unlock(&phba->scsi_buf_list_put_lock);
3975
3976 spin_lock(&phba->scsi_buf_list_get_lock);
3977 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3978 list) {
3979 list_del(&sb->list);
3980 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3981 sb->dma_handle);
3982 kfree(sb);
3983 phba->total_scsi_bufs--;
3984 }
3985 spin_unlock(&phba->scsi_buf_list_get_lock);
3986 spin_unlock_irq(&phba->hbalock);
3987 }
3988
3989 /**
3990 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
3991 * @phba: pointer to lpfc hba data structure.
3992 *
3993 * This routine is to free all the IO buffers and IOCBs from the driver
3994 * list back to kernel. It is called from lpfc_pci_remove_one to free
3995 * the internal resources before the device is removed from the system.
3996 **/
3997 void
lpfc_io_free(struct lpfc_hba * phba)3998 lpfc_io_free(struct lpfc_hba *phba)
3999 {
4000 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
4001 struct lpfc_sli4_hdw_queue *qp;
4002 int idx;
4003
4004 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4005 qp = &phba->sli4_hba.hdwq[idx];
4006 /* Release all the lpfc_nvme_bufs maintained by this host. */
4007 spin_lock(&qp->io_buf_list_put_lock);
4008 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4009 &qp->lpfc_io_buf_list_put,
4010 list) {
4011 list_del(&lpfc_ncmd->list);
4012 qp->put_io_bufs--;
4013 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4014 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4015 if (phba->cfg_xpsgl && !phba->nvmet_support)
4016 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4017 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4018 kfree(lpfc_ncmd);
4019 qp->total_io_bufs--;
4020 }
4021 spin_unlock(&qp->io_buf_list_put_lock);
4022
4023 spin_lock(&qp->io_buf_list_get_lock);
4024 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4025 &qp->lpfc_io_buf_list_get,
4026 list) {
4027 list_del(&lpfc_ncmd->list);
4028 qp->get_io_bufs--;
4029 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4030 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4031 if (phba->cfg_xpsgl && !phba->nvmet_support)
4032 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4033 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4034 kfree(lpfc_ncmd);
4035 qp->total_io_bufs--;
4036 }
4037 spin_unlock(&qp->io_buf_list_get_lock);
4038 }
4039 }
4040
4041 /**
4042 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
4043 * @phba: pointer to lpfc hba data structure.
4044 *
4045 * This routine first calculates the sizes of the current els and allocated
4046 * scsi sgl lists, and then goes through all sgls to updates the physical
4047 * XRIs assigned due to port function reset. During port initialization, the
4048 * current els and allocated scsi sgl lists are 0s.
4049 *
4050 * Return codes
4051 * 0 - successful (for now, it always returns 0)
4052 **/
4053 int
lpfc_sli4_els_sgl_update(struct lpfc_hba * phba)4054 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
4055 {
4056 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4057 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4058 LIST_HEAD(els_sgl_list);
4059 int rc;
4060
4061 /*
4062 * update on pci function's els xri-sgl list
4063 */
4064 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4065
4066 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4067 /* els xri-sgl expanded */
4068 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4069 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4070 "3157 ELS xri-sgl count increased from "
4071 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4072 els_xri_cnt);
4073 /* allocate the additional els sgls */
4074 for (i = 0; i < xri_cnt; i++) {
4075 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4076 GFP_KERNEL);
4077 if (sglq_entry == NULL) {
4078 lpfc_printf_log(phba, KERN_ERR,
4079 LOG_TRACE_EVENT,
4080 "2562 Failure to allocate an "
4081 "ELS sgl entry:%d\n", i);
4082 rc = -ENOMEM;
4083 goto out_free_mem;
4084 }
4085 sglq_entry->buff_type = GEN_BUFF_TYPE;
4086 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
4087 &sglq_entry->phys);
4088 if (sglq_entry->virt == NULL) {
4089 kfree(sglq_entry);
4090 lpfc_printf_log(phba, KERN_ERR,
4091 LOG_TRACE_EVENT,
4092 "2563 Failure to allocate an "
4093 "ELS mbuf:%d\n", i);
4094 rc = -ENOMEM;
4095 goto out_free_mem;
4096 }
4097 sglq_entry->sgl = sglq_entry->virt;
4098 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
4099 sglq_entry->state = SGL_FREED;
4100 list_add_tail(&sglq_entry->list, &els_sgl_list);
4101 }
4102 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4103 list_splice_init(&els_sgl_list,
4104 &phba->sli4_hba.lpfc_els_sgl_list);
4105 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4106 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4107 /* els xri-sgl shrinked */
4108 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4109 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4110 "3158 ELS xri-sgl count decreased from "
4111 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4112 els_xri_cnt);
4113 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4114 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4115 &els_sgl_list);
4116 /* release extra els sgls from list */
4117 for (i = 0; i < xri_cnt; i++) {
4118 list_remove_head(&els_sgl_list,
4119 sglq_entry, struct lpfc_sglq, list);
4120 if (sglq_entry) {
4121 __lpfc_mbuf_free(phba, sglq_entry->virt,
4122 sglq_entry->phys);
4123 kfree(sglq_entry);
4124 }
4125 }
4126 list_splice_init(&els_sgl_list,
4127 &phba->sli4_hba.lpfc_els_sgl_list);
4128 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4129 } else
4130 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4131 "3163 ELS xri-sgl count unchanged: %d\n",
4132 els_xri_cnt);
4133 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4134
4135 /* update xris to els sgls on the list */
4136 sglq_entry = NULL;
4137 sglq_entry_next = NULL;
4138 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4139 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4140 lxri = lpfc_sli4_next_xritag(phba);
4141 if (lxri == NO_XRI) {
4142 lpfc_printf_log(phba, KERN_ERR,
4143 LOG_TRACE_EVENT,
4144 "2400 Failed to allocate xri for "
4145 "ELS sgl\n");
4146 rc = -ENOMEM;
4147 goto out_free_mem;
4148 }
4149 sglq_entry->sli4_lxritag = lxri;
4150 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4151 }
4152 return 0;
4153
4154 out_free_mem:
4155 lpfc_free_els_sgl_list(phba);
4156 return rc;
4157 }
4158
4159 /**
4160 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
4161 * @phba: pointer to lpfc hba data structure.
4162 *
4163 * This routine first calculates the sizes of the current els and allocated
4164 * scsi sgl lists, and then goes through all sgls to updates the physical
4165 * XRIs assigned due to port function reset. During port initialization, the
4166 * current els and allocated scsi sgl lists are 0s.
4167 *
4168 * Return codes
4169 * 0 - successful (for now, it always returns 0)
4170 **/
4171 int
lpfc_sli4_nvmet_sgl_update(struct lpfc_hba * phba)4172 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
4173 {
4174 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4175 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4176 uint16_t nvmet_xri_cnt;
4177 LIST_HEAD(nvmet_sgl_list);
4178 int rc;
4179
4180 /*
4181 * update on pci function's nvmet xri-sgl list
4182 */
4183 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4184
4185 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
4186 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4187 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4188 /* els xri-sgl expanded */
4189 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4190 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4191 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
4192 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4193 /* allocate the additional nvmet sgls */
4194 for (i = 0; i < xri_cnt; i++) {
4195 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4196 GFP_KERNEL);
4197 if (sglq_entry == NULL) {
4198 lpfc_printf_log(phba, KERN_ERR,
4199 LOG_TRACE_EVENT,
4200 "6303 Failure to allocate an "
4201 "NVMET sgl entry:%d\n", i);
4202 rc = -ENOMEM;
4203 goto out_free_mem;
4204 }
4205 sglq_entry->buff_type = NVMET_BUFF_TYPE;
4206 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
4207 &sglq_entry->phys);
4208 if (sglq_entry->virt == NULL) {
4209 kfree(sglq_entry);
4210 lpfc_printf_log(phba, KERN_ERR,
4211 LOG_TRACE_EVENT,
4212 "6304 Failure to allocate an "
4213 "NVMET buf:%d\n", i);
4214 rc = -ENOMEM;
4215 goto out_free_mem;
4216 }
4217 sglq_entry->sgl = sglq_entry->virt;
4218 memset(sglq_entry->sgl, 0,
4219 phba->cfg_sg_dma_buf_size);
4220 sglq_entry->state = SGL_FREED;
4221 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
4222 }
4223 spin_lock_irq(&phba->hbalock);
4224 spin_lock(&phba->sli4_hba.sgl_list_lock);
4225 list_splice_init(&nvmet_sgl_list,
4226 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4227 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4228 spin_unlock_irq(&phba->hbalock);
4229 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4230 /* nvmet xri-sgl shrunk */
4231 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4232 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4233 "6305 NVMET xri-sgl count decreased from "
4234 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4235 nvmet_xri_cnt);
4236 spin_lock_irq(&phba->hbalock);
4237 spin_lock(&phba->sli4_hba.sgl_list_lock);
4238 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4239 &nvmet_sgl_list);
4240 /* release extra nvmet sgls from list */
4241 for (i = 0; i < xri_cnt; i++) {
4242 list_remove_head(&nvmet_sgl_list,
4243 sglq_entry, struct lpfc_sglq, list);
4244 if (sglq_entry) {
4245 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
4246 sglq_entry->phys);
4247 kfree(sglq_entry);
4248 }
4249 }
4250 list_splice_init(&nvmet_sgl_list,
4251 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4252 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4253 spin_unlock_irq(&phba->hbalock);
4254 } else
4255 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4256 "6306 NVMET xri-sgl count unchanged: %d\n",
4257 nvmet_xri_cnt);
4258 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4259
4260 /* update xris to nvmet sgls on the list */
4261 sglq_entry = NULL;
4262 sglq_entry_next = NULL;
4263 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4264 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4265 lxri = lpfc_sli4_next_xritag(phba);
4266 if (lxri == NO_XRI) {
4267 lpfc_printf_log(phba, KERN_ERR,
4268 LOG_TRACE_EVENT,
4269 "6307 Failed to allocate xri for "
4270 "NVMET sgl\n");
4271 rc = -ENOMEM;
4272 goto out_free_mem;
4273 }
4274 sglq_entry->sli4_lxritag = lxri;
4275 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4276 }
4277 return 0;
4278
4279 out_free_mem:
4280 lpfc_free_nvmet_sgl_list(phba);
4281 return rc;
4282 }
4283
4284 int
lpfc_io_buf_flush(struct lpfc_hba * phba,struct list_head * cbuf)4285 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
4286 {
4287 LIST_HEAD(blist);
4288 struct lpfc_sli4_hdw_queue *qp;
4289 struct lpfc_io_buf *lpfc_cmd;
4290 struct lpfc_io_buf *iobufp, *prev_iobufp;
4291 int idx, cnt, xri, inserted;
4292
4293 cnt = 0;
4294 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4295 qp = &phba->sli4_hba.hdwq[idx];
4296 spin_lock_irq(&qp->io_buf_list_get_lock);
4297 spin_lock(&qp->io_buf_list_put_lock);
4298
4299 /* Take everything off the get and put lists */
4300 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
4301 list_splice(&qp->lpfc_io_buf_list_put, &blist);
4302 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
4303 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
4304 cnt += qp->get_io_bufs + qp->put_io_bufs;
4305 qp->get_io_bufs = 0;
4306 qp->put_io_bufs = 0;
4307 qp->total_io_bufs = 0;
4308 spin_unlock(&qp->io_buf_list_put_lock);
4309 spin_unlock_irq(&qp->io_buf_list_get_lock);
4310 }
4311
4312 /*
4313 * Take IO buffers off blist and put on cbuf sorted by XRI.
4314 * This is because POST_SGL takes a sequential range of XRIs
4315 * to post to the firmware.
4316 */
4317 for (idx = 0; idx < cnt; idx++) {
4318 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
4319 if (!lpfc_cmd)
4320 return cnt;
4321 if (idx == 0) {
4322 list_add_tail(&lpfc_cmd->list, cbuf);
4323 continue;
4324 }
4325 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
4326 inserted = 0;
4327 prev_iobufp = NULL;
4328 list_for_each_entry(iobufp, cbuf, list) {
4329 if (xri < iobufp->cur_iocbq.sli4_xritag) {
4330 if (prev_iobufp)
4331 list_add(&lpfc_cmd->list,
4332 &prev_iobufp->list);
4333 else
4334 list_add(&lpfc_cmd->list, cbuf);
4335 inserted = 1;
4336 break;
4337 }
4338 prev_iobufp = iobufp;
4339 }
4340 if (!inserted)
4341 list_add_tail(&lpfc_cmd->list, cbuf);
4342 }
4343 return cnt;
4344 }
4345
4346 int
lpfc_io_buf_replenish(struct lpfc_hba * phba,struct list_head * cbuf)4347 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
4348 {
4349 struct lpfc_sli4_hdw_queue *qp;
4350 struct lpfc_io_buf *lpfc_cmd;
4351 int idx, cnt;
4352 unsigned long iflags;
4353
4354 qp = phba->sli4_hba.hdwq;
4355 cnt = 0;
4356 while (!list_empty(cbuf)) {
4357 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4358 list_remove_head(cbuf, lpfc_cmd,
4359 struct lpfc_io_buf, list);
4360 if (!lpfc_cmd)
4361 return cnt;
4362 cnt++;
4363 qp = &phba->sli4_hba.hdwq[idx];
4364 lpfc_cmd->hdwq_no = idx;
4365 lpfc_cmd->hdwq = qp;
4366 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL;
4367 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags);
4368 list_add_tail(&lpfc_cmd->list,
4369 &qp->lpfc_io_buf_list_put);
4370 qp->put_io_bufs++;
4371 qp->total_io_bufs++;
4372 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
4373 iflags);
4374 }
4375 }
4376 return cnt;
4377 }
4378
4379 /**
4380 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
4381 * @phba: pointer to lpfc hba data structure.
4382 *
4383 * This routine first calculates the sizes of the current els and allocated
4384 * scsi sgl lists, and then goes through all sgls to updates the physical
4385 * XRIs assigned due to port function reset. During port initialization, the
4386 * current els and allocated scsi sgl lists are 0s.
4387 *
4388 * Return codes
4389 * 0 - successful (for now, it always returns 0)
4390 **/
4391 int
lpfc_sli4_io_sgl_update(struct lpfc_hba * phba)4392 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
4393 {
4394 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4395 uint16_t i, lxri, els_xri_cnt;
4396 uint16_t io_xri_cnt, io_xri_max;
4397 LIST_HEAD(io_sgl_list);
4398 int rc, cnt;
4399
4400 /*
4401 * update on pci function's allocated nvme xri-sgl list
4402 */
4403
4404 /* maximum number of xris available for nvme buffers */
4405 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4406 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4407 phba->sli4_hba.io_xri_max = io_xri_max;
4408
4409 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4410 "6074 Current allocated XRI sgl count:%d, "
4411 "maximum XRI count:%d els_xri_cnt:%d\n\n",
4412 phba->sli4_hba.io_xri_cnt,
4413 phba->sli4_hba.io_xri_max,
4414 els_xri_cnt);
4415
4416 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4417
4418 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4419 /* max nvme xri shrunk below the allocated nvme buffers */
4420 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4421 phba->sli4_hba.io_xri_max;
4422 /* release the extra allocated nvme buffers */
4423 for (i = 0; i < io_xri_cnt; i++) {
4424 list_remove_head(&io_sgl_list, lpfc_ncmd,
4425 struct lpfc_io_buf, list);
4426 if (lpfc_ncmd) {
4427 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4428 lpfc_ncmd->data,
4429 lpfc_ncmd->dma_handle);
4430 kfree(lpfc_ncmd);
4431 }
4432 }
4433 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4434 }
4435
4436 /* update xris associated to remaining allocated nvme buffers */
4437 lpfc_ncmd = NULL;
4438 lpfc_ncmd_next = NULL;
4439 phba->sli4_hba.io_xri_cnt = cnt;
4440 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4441 &io_sgl_list, list) {
4442 lxri = lpfc_sli4_next_xritag(phba);
4443 if (lxri == NO_XRI) {
4444 lpfc_printf_log(phba, KERN_ERR,
4445 LOG_TRACE_EVENT,
4446 "6075 Failed to allocate xri for "
4447 "nvme buffer\n");
4448 rc = -ENOMEM;
4449 goto out_free_mem;
4450 }
4451 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4452 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4453 }
4454 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
4455 return 0;
4456
4457 out_free_mem:
4458 lpfc_io_free(phba);
4459 return rc;
4460 }
4461
4462 /**
4463 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4464 * @phba: Pointer to lpfc hba data structure.
4465 * @num_to_alloc: The requested number of buffers to allocate.
4466 *
4467 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4468 * the nvme buffer contains all the necessary information needed to initiate
4469 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4470 * them on a list, it post them to the port by using SGL block post.
4471 *
4472 * Return codes:
4473 * int - number of IO buffers that were allocated and posted.
4474 * 0 = failure, less than num_to_alloc is a partial failure.
4475 **/
4476 int
lpfc_new_io_buf(struct lpfc_hba * phba,int num_to_alloc)4477 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4478 {
4479 struct lpfc_io_buf *lpfc_ncmd;
4480 struct lpfc_iocbq *pwqeq;
4481 uint16_t iotag, lxri = 0;
4482 int bcnt, num_posted;
4483 LIST_HEAD(prep_nblist);
4484 LIST_HEAD(post_nblist);
4485 LIST_HEAD(nvme_nblist);
4486
4487 phba->sli4_hba.io_xri_cnt = 0;
4488 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4489 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL);
4490 if (!lpfc_ncmd)
4491 break;
4492 /*
4493 * Get memory from the pci pool to map the virt space to
4494 * pci bus space for an I/O. The DMA buffer includes the
4495 * number of SGE's necessary to support the sg_tablesize.
4496 */
4497 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4498 GFP_KERNEL,
4499 &lpfc_ncmd->dma_handle);
4500 if (!lpfc_ncmd->data) {
4501 kfree(lpfc_ncmd);
4502 break;
4503 }
4504
4505 if (phba->cfg_xpsgl && !phba->nvmet_support) {
4506 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4507 } else {
4508 /*
4509 * 4K Page alignment is CRITICAL to BlockGuard, double
4510 * check to be sure.
4511 */
4512 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4513 (((unsigned long)(lpfc_ncmd->data) &
4514 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4515 lpfc_printf_log(phba, KERN_ERR,
4516 LOG_TRACE_EVENT,
4517 "3369 Memory alignment err: "
4518 "addr=%lx\n",
4519 (unsigned long)lpfc_ncmd->data);
4520 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4521 lpfc_ncmd->data,
4522 lpfc_ncmd->dma_handle);
4523 kfree(lpfc_ncmd);
4524 break;
4525 }
4526 }
4527
4528 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4529
4530 lxri = lpfc_sli4_next_xritag(phba);
4531 if (lxri == NO_XRI) {
4532 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4533 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4534 kfree(lpfc_ncmd);
4535 break;
4536 }
4537 pwqeq = &lpfc_ncmd->cur_iocbq;
4538
4539 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4540 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4541 if (iotag == 0) {
4542 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4543 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4544 kfree(lpfc_ncmd);
4545 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4546 "6121 Failed to allocate IOTAG for"
4547 " XRI:0x%x\n", lxri);
4548 lpfc_sli4_free_xri(phba, lxri);
4549 break;
4550 }
4551 pwqeq->sli4_lxritag = lxri;
4552 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4553
4554 /* Initialize local short-hand pointers. */
4555 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4556 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4557 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd;
4558 spin_lock_init(&lpfc_ncmd->buf_lock);
4559
4560 /* add the nvme buffer to a post list */
4561 list_add_tail(&lpfc_ncmd->list, &post_nblist);
4562 phba->sli4_hba.io_xri_cnt++;
4563 }
4564 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4565 "6114 Allocate %d out of %d requested new NVME "
4566 "buffers of size x%zu bytes\n", bcnt, num_to_alloc,
4567 sizeof(*lpfc_ncmd));
4568
4569
4570 /* post the list of nvme buffer sgls to port if available */
4571 if (!list_empty(&post_nblist))
4572 num_posted = lpfc_sli4_post_io_sgl_list(
4573 phba, &post_nblist, bcnt);
4574 else
4575 num_posted = 0;
4576
4577 return num_posted;
4578 }
4579
4580 static uint64_t
lpfc_get_wwpn(struct lpfc_hba * phba)4581 lpfc_get_wwpn(struct lpfc_hba *phba)
4582 {
4583 uint64_t wwn;
4584 int rc;
4585 LPFC_MBOXQ_t *mboxq;
4586 MAILBOX_t *mb;
4587
4588 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4589 GFP_KERNEL);
4590 if (!mboxq)
4591 return (uint64_t)-1;
4592
4593 /* First get WWN of HBA instance */
4594 lpfc_read_nv(phba, mboxq);
4595 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4596 if (rc != MBX_SUCCESS) {
4597 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4598 "6019 Mailbox failed , mbxCmd x%x "
4599 "READ_NV, mbxStatus x%x\n",
4600 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4601 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4602 mempool_free(mboxq, phba->mbox_mem_pool);
4603 return (uint64_t) -1;
4604 }
4605 mb = &mboxq->u.mb;
4606 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4607 /* wwn is WWPN of HBA instance */
4608 mempool_free(mboxq, phba->mbox_mem_pool);
4609 if (phba->sli_rev == LPFC_SLI_REV4)
4610 return be64_to_cpu(wwn);
4611 else
4612 return rol64(wwn, 32);
4613 }
4614
lpfc_get_sg_tablesize(struct lpfc_hba * phba)4615 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba)
4616 {
4617 if (phba->sli_rev == LPFC_SLI_REV4)
4618 if (phba->cfg_xpsgl && !phba->nvmet_support)
4619 return LPFC_MAX_SG_TABLESIZE;
4620 else
4621 return phba->cfg_scsi_seg_cnt;
4622 else
4623 return phba->cfg_sg_seg_cnt;
4624 }
4625
4626 /**
4627 * lpfc_vmid_res_alloc - Allocates resources for VMID
4628 * @phba: pointer to lpfc hba data structure.
4629 * @vport: pointer to vport data structure
4630 *
4631 * This routine allocated the resources needed for the VMID.
4632 *
4633 * Return codes
4634 * 0 on Success
4635 * Non-0 on Failure
4636 */
4637 static int
lpfc_vmid_res_alloc(struct lpfc_hba * phba,struct lpfc_vport * vport)4638 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport)
4639 {
4640 /* VMID feature is supported only on SLI4 */
4641 if (phba->sli_rev == LPFC_SLI_REV3) {
4642 phba->cfg_vmid_app_header = 0;
4643 phba->cfg_vmid_priority_tagging = 0;
4644 }
4645
4646 if (lpfc_is_vmid_enabled(phba)) {
4647 vport->vmid =
4648 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid),
4649 GFP_KERNEL);
4650 if (!vport->vmid)
4651 return -ENOMEM;
4652
4653 rwlock_init(&vport->vmid_lock);
4654
4655 /* Set the VMID parameters for the vport */
4656 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging;
4657 vport->vmid_inactivity_timeout =
4658 phba->cfg_vmid_inactivity_timeout;
4659 vport->max_vmid = phba->cfg_max_vmid;
4660 vport->cur_vmid_cnt = 0;
4661
4662 vport->vmid_priority_range = bitmap_zalloc
4663 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL);
4664
4665 if (!vport->vmid_priority_range) {
4666 kfree(vport->vmid);
4667 return -ENOMEM;
4668 }
4669
4670 hash_init(vport->hash_table);
4671 }
4672 return 0;
4673 }
4674
4675 /**
4676 * lpfc_create_port - Create an FC port
4677 * @phba: pointer to lpfc hba data structure.
4678 * @instance: a unique integer ID to this FC port.
4679 * @dev: pointer to the device data structure.
4680 *
4681 * This routine creates a FC port for the upper layer protocol. The FC port
4682 * can be created on top of either a physical port or a virtual port provided
4683 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4684 * and associates the FC port created before adding the shost into the SCSI
4685 * layer.
4686 *
4687 * Return codes
4688 * @vport - pointer to the virtual N_Port data structure.
4689 * NULL - port create failed.
4690 **/
4691 struct lpfc_vport *
lpfc_create_port(struct lpfc_hba * phba,int instance,struct device * dev)4692 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4693 {
4694 struct lpfc_vport *vport;
4695 struct Scsi_Host *shost = NULL;
4696 struct scsi_host_template *template;
4697 int error = 0;
4698 int i;
4699 uint64_t wwn;
4700 bool use_no_reset_hba = false;
4701 int rc;
4702
4703 if (lpfc_no_hba_reset_cnt) {
4704 if (phba->sli_rev < LPFC_SLI_REV4 &&
4705 dev == &phba->pcidev->dev) {
4706 /* Reset the port first */
4707 lpfc_sli_brdrestart(phba);
4708 rc = lpfc_sli_chipset_init(phba);
4709 if (rc)
4710 return NULL;
4711 }
4712 wwn = lpfc_get_wwpn(phba);
4713 }
4714
4715 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4716 if (wwn == lpfc_no_hba_reset[i]) {
4717 lpfc_printf_log(phba, KERN_ERR,
4718 LOG_TRACE_EVENT,
4719 "6020 Setting use_no_reset port=%llx\n",
4720 wwn);
4721 use_no_reset_hba = true;
4722 break;
4723 }
4724 }
4725
4726 /* Seed template for SCSI host registration */
4727 if (dev == &phba->pcidev->dev) {
4728 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4729 /* Seed physical port template */
4730 template = &lpfc_template;
4731
4732 if (use_no_reset_hba)
4733 /* template is for a no reset SCSI Host */
4734 template->eh_host_reset_handler = NULL;
4735
4736 /* Seed updated value of sg_tablesize */
4737 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4738 } else {
4739 /* NVMET is for physical port only */
4740 template = &lpfc_template_nvme;
4741 }
4742 } else {
4743 /* Seed vport template */
4744 template = &lpfc_vport_template;
4745
4746 /* Seed updated value of sg_tablesize */
4747 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4748 }
4749
4750 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
4751 if (!shost)
4752 goto out;
4753
4754 vport = (struct lpfc_vport *) shost->hostdata;
4755 vport->phba = phba;
4756 set_bit(FC_LOADING, &vport->load_flag);
4757 set_bit(FC_VPORT_NEEDS_REG_VPI, &vport->fc_flag);
4758 vport->fc_rscn_flush = 0;
4759 atomic_set(&vport->fc_plogi_cnt, 0);
4760 atomic_set(&vport->fc_adisc_cnt, 0);
4761 atomic_set(&vport->fc_reglogin_cnt, 0);
4762 atomic_set(&vport->fc_prli_cnt, 0);
4763 atomic_set(&vport->fc_unmap_cnt, 0);
4764 atomic_set(&vport->fc_map_cnt, 0);
4765 atomic_set(&vport->fc_npr_cnt, 0);
4766 atomic_set(&vport->fc_unused_cnt, 0);
4767 lpfc_get_vport_cfgparam(vport);
4768
4769 /* Adjust value in vport */
4770 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4771
4772 shost->unique_id = instance;
4773 shost->max_id = LPFC_MAX_TARGET;
4774 shost->max_lun = vport->cfg_max_luns;
4775 shost->this_id = -1;
4776 if (phba->sli_rev == LPFC_SLI_REV4)
4777 shost->max_cmd_len = LPFC_FCP_CDB_LEN_32;
4778 else
4779 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4780
4781 if (phba->sli_rev == LPFC_SLI_REV4) {
4782 if (!phba->cfg_fcp_mq_threshold ||
4783 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4784 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4785
4786 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4787 phba->cfg_fcp_mq_threshold);
4788
4789 shost->dma_boundary =
4790 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4791 } else
4792 /* SLI-3 has a limited number of hardware queues (3),
4793 * thus there is only one for FCP processing.
4794 */
4795 shost->nr_hw_queues = 1;
4796
4797 /*
4798 * Set initial can_queue value since 0 is no longer supported and
4799 * scsi_add_host will fail. This will be adjusted later based on the
4800 * max xri value determined in hba setup.
4801 */
4802 shost->can_queue = phba->cfg_hba_queue_depth - 10;
4803 if (dev != &phba->pcidev->dev) {
4804 shost->transportt = lpfc_vport_transport_template;
4805 vport->port_type = LPFC_NPIV_PORT;
4806 } else {
4807 shost->transportt = lpfc_transport_template;
4808 vport->port_type = LPFC_PHYSICAL_PORT;
4809 }
4810
4811 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
4812 "9081 CreatePort TMPLATE type %x TBLsize %d "
4813 "SEGcnt %d/%d\n",
4814 vport->port_type, shost->sg_tablesize,
4815 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
4816
4817 /* Allocate the resources for VMID */
4818 rc = lpfc_vmid_res_alloc(phba, vport);
4819
4820 if (rc)
4821 goto out_put_shost;
4822
4823 /* Initialize all internally managed lists. */
4824 INIT_LIST_HEAD(&vport->fc_nodes);
4825 spin_lock_init(&vport->fc_nodes_list_lock);
4826 INIT_LIST_HEAD(&vport->rcv_buffer_list);
4827 spin_lock_init(&vport->work_port_lock);
4828
4829 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4830
4831 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4832
4833 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4834
4835 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4836 lpfc_setup_bg(phba, shost);
4837
4838 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4839 if (error)
4840 goto out_free_vmid;
4841
4842 spin_lock_irq(&phba->port_list_lock);
4843 list_add_tail(&vport->listentry, &phba->port_list);
4844 spin_unlock_irq(&phba->port_list_lock);
4845 return vport;
4846
4847 out_free_vmid:
4848 kfree(vport->vmid);
4849 bitmap_free(vport->vmid_priority_range);
4850 out_put_shost:
4851 scsi_host_put(shost);
4852 out:
4853 return NULL;
4854 }
4855
4856 /**
4857 * destroy_port - destroy an FC port
4858 * @vport: pointer to an lpfc virtual N_Port data structure.
4859 *
4860 * This routine destroys a FC port from the upper layer protocol. All the
4861 * resources associated with the port are released.
4862 **/
4863 void
destroy_port(struct lpfc_vport * vport)4864 destroy_port(struct lpfc_vport *vport)
4865 {
4866 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4867 struct lpfc_hba *phba = vport->phba;
4868
4869 lpfc_debugfs_terminate(vport);
4870 fc_remove_host(shost);
4871 scsi_remove_host(shost);
4872
4873 spin_lock_irq(&phba->port_list_lock);
4874 list_del_init(&vport->listentry);
4875 spin_unlock_irq(&phba->port_list_lock);
4876
4877 lpfc_cleanup(vport);
4878 return;
4879 }
4880
4881 /**
4882 * lpfc_get_instance - Get a unique integer ID
4883 *
4884 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4885 * uses the kernel idr facility to perform the task.
4886 *
4887 * Return codes:
4888 * instance - a unique integer ID allocated as the new instance.
4889 * -1 - lpfc get instance failed.
4890 **/
4891 int
lpfc_get_instance(void)4892 lpfc_get_instance(void)
4893 {
4894 int ret;
4895
4896 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4897 return ret < 0 ? -1 : ret;
4898 }
4899
4900 /**
4901 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4902 * @shost: pointer to SCSI host data structure.
4903 * @time: elapsed time of the scan in jiffies.
4904 *
4905 * This routine is called by the SCSI layer with a SCSI host to determine
4906 * whether the scan host is finished.
4907 *
4908 * Note: there is no scan_start function as adapter initialization will have
4909 * asynchronously kicked off the link initialization.
4910 *
4911 * Return codes
4912 * 0 - SCSI host scan is not over yet.
4913 * 1 - SCSI host scan is over.
4914 **/
lpfc_scan_finished(struct Scsi_Host * shost,unsigned long time)4915 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4916 {
4917 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4918 struct lpfc_hba *phba = vport->phba;
4919 int stat = 0;
4920
4921 spin_lock_irq(shost->host_lock);
4922
4923 if (test_bit(FC_UNLOADING, &vport->load_flag)) {
4924 stat = 1;
4925 goto finished;
4926 }
4927 if (time >= msecs_to_jiffies(30 * 1000)) {
4928 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4929 "0461 Scanning longer than 30 "
4930 "seconds. Continuing initialization\n");
4931 stat = 1;
4932 goto finished;
4933 }
4934 if (time >= msecs_to_jiffies(15 * 1000) &&
4935 phba->link_state <= LPFC_LINK_DOWN) {
4936 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4937 "0465 Link down longer than 15 "
4938 "seconds. Continuing initialization\n");
4939 stat = 1;
4940 goto finished;
4941 }
4942
4943 if (vport->port_state != LPFC_VPORT_READY)
4944 goto finished;
4945 if (vport->num_disc_nodes || vport->fc_prli_sent)
4946 goto finished;
4947 if (!atomic_read(&vport->fc_map_cnt) &&
4948 time < msecs_to_jiffies(2 * 1000))
4949 goto finished;
4950 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4951 goto finished;
4952
4953 stat = 1;
4954
4955 finished:
4956 spin_unlock_irq(shost->host_lock);
4957 return stat;
4958 }
4959
lpfc_host_supported_speeds_set(struct Scsi_Host * shost)4960 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4961 {
4962 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4963 struct lpfc_hba *phba = vport->phba;
4964
4965 fc_host_supported_speeds(shost) = 0;
4966 /*
4967 * Avoid reporting supported link speed for FCoE as it can't be
4968 * controlled via FCoE.
4969 */
4970 if (test_bit(HBA_FCOE_MODE, &phba->hba_flag))
4971 return;
4972
4973 if (phba->lmt & LMT_256Gb)
4974 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT;
4975 if (phba->lmt & LMT_128Gb)
4976 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4977 if (phba->lmt & LMT_64Gb)
4978 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4979 if (phba->lmt & LMT_32Gb)
4980 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4981 if (phba->lmt & LMT_16Gb)
4982 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4983 if (phba->lmt & LMT_10Gb)
4984 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4985 if (phba->lmt & LMT_8Gb)
4986 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4987 if (phba->lmt & LMT_4Gb)
4988 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4989 if (phba->lmt & LMT_2Gb)
4990 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4991 if (phba->lmt & LMT_1Gb)
4992 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4993 }
4994
4995 /**
4996 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
4997 * @shost: pointer to SCSI host data structure.
4998 *
4999 * This routine initializes a given SCSI host attributes on a FC port. The
5000 * SCSI host can be either on top of a physical port or a virtual port.
5001 **/
lpfc_host_attrib_init(struct Scsi_Host * shost)5002 void lpfc_host_attrib_init(struct Scsi_Host *shost)
5003 {
5004 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
5005 struct lpfc_hba *phba = vport->phba;
5006 /*
5007 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
5008 */
5009
5010 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
5011 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
5012 fc_host_supported_classes(shost) = FC_COS_CLASS3;
5013
5014 memset(fc_host_supported_fc4s(shost), 0,
5015 sizeof(fc_host_supported_fc4s(shost)));
5016 fc_host_supported_fc4s(shost)[2] = 1;
5017 fc_host_supported_fc4s(shost)[7] = 1;
5018
5019 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
5020 sizeof fc_host_symbolic_name(shost));
5021
5022 lpfc_host_supported_speeds_set(shost);
5023
5024 fc_host_maxframe_size(shost) =
5025 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
5026 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
5027
5028 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
5029
5030 /* This value is also unchanging */
5031 memset(fc_host_active_fc4s(shost), 0,
5032 sizeof(fc_host_active_fc4s(shost)));
5033 fc_host_active_fc4s(shost)[2] = 1;
5034 fc_host_active_fc4s(shost)[7] = 1;
5035
5036 fc_host_max_npiv_vports(shost) = phba->max_vpi;
5037 clear_bit(FC_LOADING, &vport->load_flag);
5038 }
5039
5040 /**
5041 * lpfc_stop_port_s3 - Stop SLI3 device port
5042 * @phba: pointer to lpfc hba data structure.
5043 *
5044 * This routine is invoked to stop an SLI3 device port, it stops the device
5045 * from generating interrupts and stops the device driver's timers for the
5046 * device.
5047 **/
5048 static void
lpfc_stop_port_s3(struct lpfc_hba * phba)5049 lpfc_stop_port_s3(struct lpfc_hba *phba)
5050 {
5051 /* Clear all interrupt enable conditions */
5052 writel(0, phba->HCregaddr);
5053 readl(phba->HCregaddr); /* flush */
5054 /* Clear all pending interrupts */
5055 writel(0xffffffff, phba->HAregaddr);
5056 readl(phba->HAregaddr); /* flush */
5057
5058 /* Reset some HBA SLI setup states */
5059 lpfc_stop_hba_timers(phba);
5060 phba->pport->work_port_events = 0;
5061 }
5062
5063 /**
5064 * lpfc_stop_port_s4 - Stop SLI4 device port
5065 * @phba: pointer to lpfc hba data structure.
5066 *
5067 * This routine is invoked to stop an SLI4 device port, it stops the device
5068 * from generating interrupts and stops the device driver's timers for the
5069 * device.
5070 **/
5071 static void
lpfc_stop_port_s4(struct lpfc_hba * phba)5072 lpfc_stop_port_s4(struct lpfc_hba *phba)
5073 {
5074 /* Reset some HBA SLI4 setup states */
5075 lpfc_stop_hba_timers(phba);
5076 if (phba->pport)
5077 phba->pport->work_port_events = 0;
5078 phba->sli4_hba.intr_enable = 0;
5079 }
5080
5081 /**
5082 * lpfc_stop_port - Wrapper function for stopping hba port
5083 * @phba: Pointer to HBA context object.
5084 *
5085 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
5086 * the API jump table function pointer from the lpfc_hba struct.
5087 **/
5088 void
lpfc_stop_port(struct lpfc_hba * phba)5089 lpfc_stop_port(struct lpfc_hba *phba)
5090 {
5091 phba->lpfc_stop_port(phba);
5092
5093 if (phba->wq)
5094 flush_workqueue(phba->wq);
5095 }
5096
5097 /**
5098 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
5099 * @phba: Pointer to hba for which this call is being executed.
5100 *
5101 * This routine starts the timer waiting for the FCF rediscovery to complete.
5102 **/
5103 void
lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba * phba)5104 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
5105 {
5106 unsigned long fcf_redisc_wait_tmo =
5107 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
5108 /* Start fcf rediscovery wait period timer */
5109 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
5110 spin_lock_irq(&phba->hbalock);
5111 /* Allow action to new fcf asynchronous event */
5112 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
5113 /* Mark the FCF rediscovery pending state */
5114 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
5115 spin_unlock_irq(&phba->hbalock);
5116 }
5117
5118 /**
5119 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
5120 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5121 *
5122 * This routine is invoked when waiting for FCF table rediscover has been
5123 * timed out. If new FCF record(s) has (have) been discovered during the
5124 * wait period, a new FCF event shall be added to the FCOE async event
5125 * list, and then worker thread shall be waked up for processing from the
5126 * worker thread context.
5127 **/
5128 static void
lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list * t)5129 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
5130 {
5131 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
5132
5133 /* Don't send FCF rediscovery event if timer cancelled */
5134 spin_lock_irq(&phba->hbalock);
5135 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
5136 spin_unlock_irq(&phba->hbalock);
5137 return;
5138 }
5139 /* Clear FCF rediscovery timer pending flag */
5140 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
5141 /* FCF rediscovery event to worker thread */
5142 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
5143 spin_unlock_irq(&phba->hbalock);
5144 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
5145 "2776 FCF rediscover quiescent timer expired\n");
5146 /* wake up worker thread */
5147 lpfc_worker_wake_up(phba);
5148 }
5149
5150 /**
5151 * lpfc_vmid_poll - VMID timeout detection
5152 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5153 *
5154 * This routine is invoked when there is no I/O on by a VM for the specified
5155 * amount of time. When this situation is detected, the VMID has to be
5156 * deregistered from the switch and all the local resources freed. The VMID
5157 * will be reassigned to the VM once the I/O begins.
5158 **/
5159 static void
lpfc_vmid_poll(struct timer_list * t)5160 lpfc_vmid_poll(struct timer_list *t)
5161 {
5162 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll);
5163 u32 wake_up = 0;
5164
5165 /* check if there is a need to issue QFPA */
5166 if (phba->pport->vmid_priority_tagging) {
5167 wake_up = 1;
5168 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA;
5169 }
5170
5171 /* Is the vmid inactivity timer enabled */
5172 if (phba->pport->vmid_inactivity_timeout ||
5173 test_bit(FC_DEREGISTER_ALL_APP_ID, &phba->pport->load_flag)) {
5174 wake_up = 1;
5175 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID;
5176 }
5177
5178 if (wake_up)
5179 lpfc_worker_wake_up(phba);
5180
5181 /* restart the timer for the next iteration */
5182 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 *
5183 LPFC_VMID_TIMER));
5184 }
5185
5186 /**
5187 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
5188 * @phba: pointer to lpfc hba data structure.
5189 * @acqe_link: pointer to the async link completion queue entry.
5190 *
5191 * This routine is to parse the SLI4 link-attention link fault code.
5192 **/
5193 static void
lpfc_sli4_parse_latt_fault(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5194 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
5195 struct lpfc_acqe_link *acqe_link)
5196 {
5197 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) {
5198 case LPFC_FC_LA_TYPE_LINK_DOWN:
5199 case LPFC_FC_LA_TYPE_TRUNKING_EVENT:
5200 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
5201 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
5202 break;
5203 default:
5204 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
5205 case LPFC_ASYNC_LINK_FAULT_NONE:
5206 case LPFC_ASYNC_LINK_FAULT_LOCAL:
5207 case LPFC_ASYNC_LINK_FAULT_REMOTE:
5208 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
5209 break;
5210 default:
5211 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5212 "0398 Unknown link fault code: x%x\n",
5213 bf_get(lpfc_acqe_link_fault, acqe_link));
5214 break;
5215 }
5216 break;
5217 }
5218 }
5219
5220 /**
5221 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5222 * @phba: pointer to lpfc hba data structure.
5223 * @acqe_link: pointer to the async link completion queue entry.
5224 *
5225 * This routine is to parse the SLI4 link attention type and translate it
5226 * into the base driver's link attention type coding.
5227 *
5228 * Return: Link attention type in terms of base driver's coding.
5229 **/
5230 static uint8_t
lpfc_sli4_parse_latt_type(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5231 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
5232 struct lpfc_acqe_link *acqe_link)
5233 {
5234 uint8_t att_type;
5235
5236 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
5237 case LPFC_ASYNC_LINK_STATUS_DOWN:
5238 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
5239 att_type = LPFC_ATT_LINK_DOWN;
5240 break;
5241 case LPFC_ASYNC_LINK_STATUS_UP:
5242 /* Ignore physical link up events - wait for logical link up */
5243 att_type = LPFC_ATT_RESERVED;
5244 break;
5245 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
5246 att_type = LPFC_ATT_LINK_UP;
5247 break;
5248 default:
5249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5250 "0399 Invalid link attention type: x%x\n",
5251 bf_get(lpfc_acqe_link_status, acqe_link));
5252 att_type = LPFC_ATT_RESERVED;
5253 break;
5254 }
5255 return att_type;
5256 }
5257
5258 /**
5259 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
5260 * @phba: pointer to lpfc hba data structure.
5261 *
5262 * This routine is to get an SLI3 FC port's link speed in Mbps.
5263 *
5264 * Return: link speed in terms of Mbps.
5265 **/
5266 uint32_t
lpfc_sli_port_speed_get(struct lpfc_hba * phba)5267 lpfc_sli_port_speed_get(struct lpfc_hba *phba)
5268 {
5269 uint32_t link_speed;
5270
5271 if (!lpfc_is_link_up(phba))
5272 return 0;
5273
5274 if (phba->sli_rev <= LPFC_SLI_REV3) {
5275 switch (phba->fc_linkspeed) {
5276 case LPFC_LINK_SPEED_1GHZ:
5277 link_speed = 1000;
5278 break;
5279 case LPFC_LINK_SPEED_2GHZ:
5280 link_speed = 2000;
5281 break;
5282 case LPFC_LINK_SPEED_4GHZ:
5283 link_speed = 4000;
5284 break;
5285 case LPFC_LINK_SPEED_8GHZ:
5286 link_speed = 8000;
5287 break;
5288 case LPFC_LINK_SPEED_10GHZ:
5289 link_speed = 10000;
5290 break;
5291 case LPFC_LINK_SPEED_16GHZ:
5292 link_speed = 16000;
5293 break;
5294 default:
5295 link_speed = 0;
5296 }
5297 } else {
5298 if (phba->sli4_hba.link_state.logical_speed)
5299 link_speed =
5300 phba->sli4_hba.link_state.logical_speed;
5301 else
5302 link_speed = phba->sli4_hba.link_state.speed;
5303 }
5304 return link_speed;
5305 }
5306
5307 /**
5308 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
5309 * @phba: pointer to lpfc hba data structure.
5310 * @evt_code: asynchronous event code.
5311 * @speed_code: asynchronous event link speed code.
5312 *
5313 * This routine is to parse the giving SLI4 async event link speed code into
5314 * value of Mbps for the link speed.
5315 *
5316 * Return: link speed in terms of Mbps.
5317 **/
5318 static uint32_t
lpfc_sli4_port_speed_parse(struct lpfc_hba * phba,uint32_t evt_code,uint8_t speed_code)5319 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
5320 uint8_t speed_code)
5321 {
5322 uint32_t port_speed;
5323
5324 switch (evt_code) {
5325 case LPFC_TRAILER_CODE_LINK:
5326 switch (speed_code) {
5327 case LPFC_ASYNC_LINK_SPEED_ZERO:
5328 port_speed = 0;
5329 break;
5330 case LPFC_ASYNC_LINK_SPEED_10MBPS:
5331 port_speed = 10;
5332 break;
5333 case LPFC_ASYNC_LINK_SPEED_100MBPS:
5334 port_speed = 100;
5335 break;
5336 case LPFC_ASYNC_LINK_SPEED_1GBPS:
5337 port_speed = 1000;
5338 break;
5339 case LPFC_ASYNC_LINK_SPEED_10GBPS:
5340 port_speed = 10000;
5341 break;
5342 case LPFC_ASYNC_LINK_SPEED_20GBPS:
5343 port_speed = 20000;
5344 break;
5345 case LPFC_ASYNC_LINK_SPEED_25GBPS:
5346 port_speed = 25000;
5347 break;
5348 case LPFC_ASYNC_LINK_SPEED_40GBPS:
5349 port_speed = 40000;
5350 break;
5351 case LPFC_ASYNC_LINK_SPEED_100GBPS:
5352 port_speed = 100000;
5353 break;
5354 default:
5355 port_speed = 0;
5356 }
5357 break;
5358 case LPFC_TRAILER_CODE_FC:
5359 switch (speed_code) {
5360 case LPFC_FC_LA_SPEED_UNKNOWN:
5361 port_speed = 0;
5362 break;
5363 case LPFC_FC_LA_SPEED_1G:
5364 port_speed = 1000;
5365 break;
5366 case LPFC_FC_LA_SPEED_2G:
5367 port_speed = 2000;
5368 break;
5369 case LPFC_FC_LA_SPEED_4G:
5370 port_speed = 4000;
5371 break;
5372 case LPFC_FC_LA_SPEED_8G:
5373 port_speed = 8000;
5374 break;
5375 case LPFC_FC_LA_SPEED_10G:
5376 port_speed = 10000;
5377 break;
5378 case LPFC_FC_LA_SPEED_16G:
5379 port_speed = 16000;
5380 break;
5381 case LPFC_FC_LA_SPEED_32G:
5382 port_speed = 32000;
5383 break;
5384 case LPFC_FC_LA_SPEED_64G:
5385 port_speed = 64000;
5386 break;
5387 case LPFC_FC_LA_SPEED_128G:
5388 port_speed = 128000;
5389 break;
5390 case LPFC_FC_LA_SPEED_256G:
5391 port_speed = 256000;
5392 break;
5393 default:
5394 port_speed = 0;
5395 }
5396 break;
5397 default:
5398 port_speed = 0;
5399 }
5400 return port_speed;
5401 }
5402
5403 /**
5404 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
5405 * @phba: pointer to lpfc hba data structure.
5406 * @acqe_link: pointer to the async link completion queue entry.
5407 *
5408 * This routine is to handle the SLI4 asynchronous FCoE link event.
5409 **/
5410 static void
lpfc_sli4_async_link_evt(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5411 lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
5412 struct lpfc_acqe_link *acqe_link)
5413 {
5414 LPFC_MBOXQ_t *pmb;
5415 MAILBOX_t *mb;
5416 struct lpfc_mbx_read_top *la;
5417 uint8_t att_type;
5418 int rc;
5419
5420 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
5421 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
5422 return;
5423 phba->fcoe_eventtag = acqe_link->event_tag;
5424 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5425 if (!pmb) {
5426 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5427 "0395 The mboxq allocation failed\n");
5428 return;
5429 }
5430
5431 rc = lpfc_mbox_rsrc_prep(phba, pmb);
5432 if (rc) {
5433 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5434 "0396 mailbox allocation failed\n");
5435 goto out_free_pmb;
5436 }
5437
5438 /* Cleanup any outstanding ELS commands */
5439 lpfc_els_flush_all_cmd(phba);
5440
5441 /* Block ELS IOCBs until we have done process link event */
5442 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5443
5444 /* Update link event statistics */
5445 phba->sli.slistat.link_event++;
5446
5447 /* Create lpfc_handle_latt mailbox command from link ACQE */
5448 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
5449 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5450 pmb->vport = phba->pport;
5451
5452 /* Keep the link status for extra SLI4 state machine reference */
5453 phba->sli4_hba.link_state.speed =
5454 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
5455 bf_get(lpfc_acqe_link_speed, acqe_link));
5456 phba->sli4_hba.link_state.duplex =
5457 bf_get(lpfc_acqe_link_duplex, acqe_link);
5458 phba->sli4_hba.link_state.status =
5459 bf_get(lpfc_acqe_link_status, acqe_link);
5460 phba->sli4_hba.link_state.type =
5461 bf_get(lpfc_acqe_link_type, acqe_link);
5462 phba->sli4_hba.link_state.number =
5463 bf_get(lpfc_acqe_link_number, acqe_link);
5464 phba->sli4_hba.link_state.fault =
5465 bf_get(lpfc_acqe_link_fault, acqe_link);
5466 phba->sli4_hba.link_state.logical_speed =
5467 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
5468
5469 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5470 "2900 Async FC/FCoE Link event - Speed:%dGBit "
5471 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
5472 "Logical speed:%dMbps Fault:%d\n",
5473 phba->sli4_hba.link_state.speed,
5474 phba->sli4_hba.link_state.topology,
5475 phba->sli4_hba.link_state.status,
5476 phba->sli4_hba.link_state.type,
5477 phba->sli4_hba.link_state.number,
5478 phba->sli4_hba.link_state.logical_speed,
5479 phba->sli4_hba.link_state.fault);
5480 /*
5481 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
5482 * topology info. Note: Optional for non FC-AL ports.
5483 */
5484 if (!test_bit(HBA_FCOE_MODE, &phba->hba_flag)) {
5485 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5486 if (rc == MBX_NOT_FINISHED)
5487 goto out_free_pmb;
5488 return;
5489 }
5490 /*
5491 * For FCoE Mode: fill in all the topology information we need and call
5492 * the READ_TOPOLOGY completion routine to continue without actually
5493 * sending the READ_TOPOLOGY mailbox command to the port.
5494 */
5495 /* Initialize completion status */
5496 mb = &pmb->u.mb;
5497 mb->mbxStatus = MBX_SUCCESS;
5498
5499 /* Parse port fault information field */
5500 lpfc_sli4_parse_latt_fault(phba, acqe_link);
5501
5502 /* Parse and translate link attention fields */
5503 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
5504 la->eventTag = acqe_link->event_tag;
5505 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
5506 bf_set(lpfc_mbx_read_top_link_spd, la,
5507 (bf_get(lpfc_acqe_link_speed, acqe_link)));
5508
5509 /* Fake the following irrelevant fields */
5510 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
5511 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
5512 bf_set(lpfc_mbx_read_top_il, la, 0);
5513 bf_set(lpfc_mbx_read_top_pb, la, 0);
5514 bf_set(lpfc_mbx_read_top_fa, la, 0);
5515 bf_set(lpfc_mbx_read_top_mm, la, 0);
5516
5517 /* Invoke the lpfc_handle_latt mailbox command callback function */
5518 lpfc_mbx_cmpl_read_topology(phba, pmb);
5519
5520 return;
5521
5522 out_free_pmb:
5523 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
5524 }
5525
5526 /**
5527 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
5528 * topology.
5529 * @phba: pointer to lpfc hba data structure.
5530 * @speed_code: asynchronous event link speed code.
5531 *
5532 * This routine is to parse the giving SLI4 async event link speed code into
5533 * value of Read topology link speed.
5534 *
5535 * Return: link speed in terms of Read topology.
5536 **/
5537 static uint8_t
lpfc_async_link_speed_to_read_top(struct lpfc_hba * phba,uint8_t speed_code)5538 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5539 {
5540 uint8_t port_speed;
5541
5542 switch (speed_code) {
5543 case LPFC_FC_LA_SPEED_1G:
5544 port_speed = LPFC_LINK_SPEED_1GHZ;
5545 break;
5546 case LPFC_FC_LA_SPEED_2G:
5547 port_speed = LPFC_LINK_SPEED_2GHZ;
5548 break;
5549 case LPFC_FC_LA_SPEED_4G:
5550 port_speed = LPFC_LINK_SPEED_4GHZ;
5551 break;
5552 case LPFC_FC_LA_SPEED_8G:
5553 port_speed = LPFC_LINK_SPEED_8GHZ;
5554 break;
5555 case LPFC_FC_LA_SPEED_16G:
5556 port_speed = LPFC_LINK_SPEED_16GHZ;
5557 break;
5558 case LPFC_FC_LA_SPEED_32G:
5559 port_speed = LPFC_LINK_SPEED_32GHZ;
5560 break;
5561 case LPFC_FC_LA_SPEED_64G:
5562 port_speed = LPFC_LINK_SPEED_64GHZ;
5563 break;
5564 case LPFC_FC_LA_SPEED_128G:
5565 port_speed = LPFC_LINK_SPEED_128GHZ;
5566 break;
5567 case LPFC_FC_LA_SPEED_256G:
5568 port_speed = LPFC_LINK_SPEED_256GHZ;
5569 break;
5570 default:
5571 port_speed = 0;
5572 break;
5573 }
5574
5575 return port_speed;
5576 }
5577
5578 void
lpfc_cgn_dump_rxmonitor(struct lpfc_hba * phba)5579 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba)
5580 {
5581 if (!phba->rx_monitor) {
5582 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5583 "4411 Rx Monitor Info is empty.\n");
5584 } else {
5585 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0,
5586 LPFC_MAX_RXMONITOR_DUMP);
5587 }
5588 }
5589
5590 /**
5591 * lpfc_cgn_update_stat - Save data into congestion stats buffer
5592 * @phba: pointer to lpfc hba data structure.
5593 * @dtag: FPIN descriptor received
5594 *
5595 * Increment the FPIN received counter/time when it happens.
5596 */
5597 void
lpfc_cgn_update_stat(struct lpfc_hba * phba,uint32_t dtag)5598 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag)
5599 {
5600 struct lpfc_cgn_info *cp;
5601 u32 value;
5602
5603 /* Make sure we have a congestion info buffer */
5604 if (!phba->cgn_i)
5605 return;
5606 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5607
5608 /* Update congestion statistics */
5609 switch (dtag) {
5610 case ELS_DTAG_LNK_INTEGRITY:
5611 le32_add_cpu(&cp->link_integ_notification, 1);
5612 lpfc_cgn_update_tstamp(phba, &cp->stat_lnk);
5613 break;
5614 case ELS_DTAG_DELIVERY:
5615 le32_add_cpu(&cp->delivery_notification, 1);
5616 lpfc_cgn_update_tstamp(phba, &cp->stat_delivery);
5617 break;
5618 case ELS_DTAG_PEER_CONGEST:
5619 le32_add_cpu(&cp->cgn_peer_notification, 1);
5620 lpfc_cgn_update_tstamp(phba, &cp->stat_peer);
5621 break;
5622 case ELS_DTAG_CONGESTION:
5623 le32_add_cpu(&cp->cgn_notification, 1);
5624 lpfc_cgn_update_tstamp(phba, &cp->stat_fpin);
5625 }
5626 if (phba->cgn_fpin_frequency &&
5627 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5628 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5629 cp->cgn_stat_npm = value;
5630 }
5631
5632 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5633 LPFC_CGN_CRC32_SEED);
5634 cp->cgn_info_crc = cpu_to_le32(value);
5635 }
5636
5637 /**
5638 * lpfc_cgn_update_tstamp - Update cmf timestamp
5639 * @phba: pointer to lpfc hba data structure.
5640 * @ts: structure to write the timestamp to.
5641 */
5642 void
lpfc_cgn_update_tstamp(struct lpfc_hba * phba,struct lpfc_cgn_ts * ts)5643 lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts)
5644 {
5645 struct timespec64 cur_time;
5646 struct tm tm_val;
5647
5648 ktime_get_real_ts64(&cur_time);
5649 time64_to_tm(cur_time.tv_sec, 0, &tm_val);
5650
5651 ts->month = tm_val.tm_mon + 1;
5652 ts->day = tm_val.tm_mday;
5653 ts->year = tm_val.tm_year - 100;
5654 ts->hour = tm_val.tm_hour;
5655 ts->minute = tm_val.tm_min;
5656 ts->second = tm_val.tm_sec;
5657
5658 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5659 "2646 Updated CMF timestamp : "
5660 "%u/%u/%u %u:%u:%u\n",
5661 ts->day, ts->month,
5662 ts->year, ts->hour,
5663 ts->minute, ts->second);
5664 }
5665
5666 /**
5667 * lpfc_cmf_stats_timer - Save data into registered congestion buffer
5668 * @timer: Timer cookie to access lpfc private data
5669 *
5670 * Save the congestion event data every minute.
5671 * On the hour collapse all the minute data into hour data. Every day
5672 * collapse all the hour data into daily data. Separate driver
5673 * and fabrc congestion event counters that will be saved out
5674 * to the registered congestion buffer every minute.
5675 */
5676 static enum hrtimer_restart
lpfc_cmf_stats_timer(struct hrtimer * timer)5677 lpfc_cmf_stats_timer(struct hrtimer *timer)
5678 {
5679 struct lpfc_hba *phba;
5680 struct lpfc_cgn_info *cp;
5681 uint32_t i, index;
5682 uint16_t value, mvalue;
5683 uint64_t bps;
5684 uint32_t mbps;
5685 uint32_t dvalue, wvalue, lvalue, avalue;
5686 uint64_t latsum;
5687 __le16 *ptr;
5688 __le32 *lptr;
5689 __le16 *mptr;
5690
5691 phba = container_of(timer, struct lpfc_hba, cmf_stats_timer);
5692 /* Make sure we have a congestion info buffer */
5693 if (!phba->cgn_i)
5694 return HRTIMER_NORESTART;
5695 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5696
5697 phba->cgn_evt_timestamp = jiffies +
5698 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
5699 phba->cgn_evt_minute++;
5700
5701 /* We should get to this point in the routine on 1 minute intervals */
5702 lpfc_cgn_update_tstamp(phba, &cp->base_time);
5703
5704 if (phba->cgn_fpin_frequency &&
5705 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5706 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5707 cp->cgn_stat_npm = value;
5708 }
5709
5710 /* Read and clear the latency counters for this minute */
5711 lvalue = atomic_read(&phba->cgn_latency_evt_cnt);
5712 latsum = atomic64_read(&phba->cgn_latency_evt);
5713 atomic_set(&phba->cgn_latency_evt_cnt, 0);
5714 atomic64_set(&phba->cgn_latency_evt, 0);
5715
5716 /* We need to store MB/sec bandwidth in the congestion information.
5717 * block_cnt is count of 512 byte blocks for the entire minute,
5718 * bps will get bytes per sec before finally converting to MB/sec.
5719 */
5720 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512;
5721 phba->rx_block_cnt = 0;
5722 mvalue = bps / (1024 * 1024); /* convert to MB/sec */
5723
5724 /* Every minute */
5725 /* cgn parameters */
5726 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
5727 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
5728 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
5729 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
5730
5731 /* Fill in default LUN qdepth */
5732 value = (uint16_t)(phba->pport->cfg_lun_queue_depth);
5733 cp->cgn_lunq = cpu_to_le16(value);
5734
5735 /* Record congestion buffer info - every minute
5736 * cgn_driver_evt_cnt (Driver events)
5737 * cgn_fabric_warn_cnt (Congestion Warnings)
5738 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency)
5739 * cgn_fabric_alarm_cnt (Congestion Alarms)
5740 */
5741 index = ++cp->cgn_index_minute;
5742 if (cp->cgn_index_minute == LPFC_MIN_HOUR) {
5743 cp->cgn_index_minute = 0;
5744 index = 0;
5745 }
5746
5747 /* Get the number of driver events in this sample and reset counter */
5748 dvalue = atomic_read(&phba->cgn_driver_evt_cnt);
5749 atomic_set(&phba->cgn_driver_evt_cnt, 0);
5750
5751 /* Get the number of warning events - FPIN and Signal for this minute */
5752 wvalue = 0;
5753 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) ||
5754 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
5755 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5756 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt);
5757 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
5758
5759 /* Get the number of alarm events - FPIN and Signal for this minute */
5760 avalue = 0;
5761 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) ||
5762 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5763 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt);
5764 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
5765
5766 /* Collect the driver, warning, alarm and latency counts for this
5767 * minute into the driver congestion buffer.
5768 */
5769 ptr = &cp->cgn_drvr_min[index];
5770 value = (uint16_t)dvalue;
5771 *ptr = cpu_to_le16(value);
5772
5773 ptr = &cp->cgn_warn_min[index];
5774 value = (uint16_t)wvalue;
5775 *ptr = cpu_to_le16(value);
5776
5777 ptr = &cp->cgn_alarm_min[index];
5778 value = (uint16_t)avalue;
5779 *ptr = cpu_to_le16(value);
5780
5781 lptr = &cp->cgn_latency_min[index];
5782 if (lvalue) {
5783 lvalue = (uint32_t)div_u64(latsum, lvalue);
5784 *lptr = cpu_to_le32(lvalue);
5785 } else {
5786 *lptr = 0;
5787 }
5788
5789 /* Collect the bandwidth value into the driver's congesion buffer. */
5790 mptr = &cp->cgn_bw_min[index];
5791 *mptr = cpu_to_le16(mvalue);
5792
5793 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5794 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n",
5795 index, dvalue, wvalue, *lptr, mvalue, avalue);
5796
5797 /* Every hour */
5798 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) {
5799 /* Record congestion buffer info - every hour
5800 * Collapse all minutes into an hour
5801 */
5802 index = ++cp->cgn_index_hour;
5803 if (cp->cgn_index_hour == LPFC_HOUR_DAY) {
5804 cp->cgn_index_hour = 0;
5805 index = 0;
5806 }
5807
5808 dvalue = 0;
5809 wvalue = 0;
5810 lvalue = 0;
5811 avalue = 0;
5812 mvalue = 0;
5813 mbps = 0;
5814 for (i = 0; i < LPFC_MIN_HOUR; i++) {
5815 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]);
5816 wvalue += le16_to_cpu(cp->cgn_warn_min[i]);
5817 lvalue += le32_to_cpu(cp->cgn_latency_min[i]);
5818 mbps += le16_to_cpu(cp->cgn_bw_min[i]);
5819 avalue += le16_to_cpu(cp->cgn_alarm_min[i]);
5820 }
5821 if (lvalue) /* Avg of latency averages */
5822 lvalue /= LPFC_MIN_HOUR;
5823 if (mbps) /* Avg of Bandwidth averages */
5824 mvalue = mbps / LPFC_MIN_HOUR;
5825
5826 lptr = &cp->cgn_drvr_hr[index];
5827 *lptr = cpu_to_le32(dvalue);
5828 lptr = &cp->cgn_warn_hr[index];
5829 *lptr = cpu_to_le32(wvalue);
5830 lptr = &cp->cgn_latency_hr[index];
5831 *lptr = cpu_to_le32(lvalue);
5832 mptr = &cp->cgn_bw_hr[index];
5833 *mptr = cpu_to_le16(mvalue);
5834 lptr = &cp->cgn_alarm_hr[index];
5835 *lptr = cpu_to_le32(avalue);
5836
5837 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5838 "2419 Congestion Info - hour "
5839 "(%d): %d %d %d %d %d\n",
5840 index, dvalue, wvalue, lvalue, mvalue, avalue);
5841 }
5842
5843 /* Every day */
5844 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) {
5845 /* Record congestion buffer info - every hour
5846 * Collapse all hours into a day. Rotate days
5847 * after LPFC_MAX_CGN_DAYS.
5848 */
5849 index = ++cp->cgn_index_day;
5850 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) {
5851 cp->cgn_index_day = 0;
5852 index = 0;
5853 }
5854
5855 dvalue = 0;
5856 wvalue = 0;
5857 lvalue = 0;
5858 mvalue = 0;
5859 mbps = 0;
5860 avalue = 0;
5861 for (i = 0; i < LPFC_HOUR_DAY; i++) {
5862 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]);
5863 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]);
5864 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]);
5865 mbps += le16_to_cpu(cp->cgn_bw_hr[i]);
5866 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]);
5867 }
5868 if (lvalue) /* Avg of latency averages */
5869 lvalue /= LPFC_HOUR_DAY;
5870 if (mbps) /* Avg of Bandwidth averages */
5871 mvalue = mbps / LPFC_HOUR_DAY;
5872
5873 lptr = &cp->cgn_drvr_day[index];
5874 *lptr = cpu_to_le32(dvalue);
5875 lptr = &cp->cgn_warn_day[index];
5876 *lptr = cpu_to_le32(wvalue);
5877 lptr = &cp->cgn_latency_day[index];
5878 *lptr = cpu_to_le32(lvalue);
5879 mptr = &cp->cgn_bw_day[index];
5880 *mptr = cpu_to_le16(mvalue);
5881 lptr = &cp->cgn_alarm_day[index];
5882 *lptr = cpu_to_le32(avalue);
5883
5884 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5885 "2420 Congestion Info - daily (%d): "
5886 "%d %d %d %d %d\n",
5887 index, dvalue, wvalue, lvalue, mvalue, avalue);
5888 }
5889
5890 /* Use the frequency found in the last rcv'ed FPIN */
5891 value = phba->cgn_fpin_frequency;
5892 cp->cgn_warn_freq = cpu_to_le16(value);
5893 cp->cgn_alarm_freq = cpu_to_le16(value);
5894
5895 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5896 LPFC_CGN_CRC32_SEED);
5897 cp->cgn_info_crc = cpu_to_le32(lvalue);
5898
5899 hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC));
5900
5901 return HRTIMER_RESTART;
5902 }
5903
5904 /**
5905 * lpfc_calc_cmf_latency - latency from start of rxate timer interval
5906 * @phba: The Hba for which this call is being executed.
5907 *
5908 * The routine calculates the latency from the beginning of the CMF timer
5909 * interval to the current point in time. It is called from IO completion
5910 * when we exceed our Bandwidth limitation for the time interval.
5911 */
5912 uint32_t
lpfc_calc_cmf_latency(struct lpfc_hba * phba)5913 lpfc_calc_cmf_latency(struct lpfc_hba *phba)
5914 {
5915 struct timespec64 cmpl_time;
5916 uint32_t msec = 0;
5917
5918 ktime_get_real_ts64(&cmpl_time);
5919
5920 /* This routine works on a ms granularity so sec and usec are
5921 * converted accordingly.
5922 */
5923 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) {
5924 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) /
5925 NSEC_PER_MSEC;
5926 } else {
5927 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) {
5928 msec = (cmpl_time.tv_sec -
5929 phba->cmf_latency.tv_sec) * MSEC_PER_SEC;
5930 msec += ((cmpl_time.tv_nsec -
5931 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC);
5932 } else {
5933 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec -
5934 1) * MSEC_PER_SEC;
5935 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) +
5936 cmpl_time.tv_nsec) / NSEC_PER_MSEC);
5937 }
5938 }
5939 return msec;
5940 }
5941
5942 /**
5943 * lpfc_cmf_timer - This is the timer function for one congestion
5944 * rate interval.
5945 * @timer: Pointer to the high resolution timer that expired
5946 */
5947 static enum hrtimer_restart
lpfc_cmf_timer(struct hrtimer * timer)5948 lpfc_cmf_timer(struct hrtimer *timer)
5949 {
5950 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba,
5951 cmf_timer);
5952 struct rx_info_entry entry;
5953 uint32_t io_cnt;
5954 uint32_t busy, max_read;
5955 uint64_t total, rcv, lat, mbpi, extra, cnt;
5956 int timer_interval = LPFC_CMF_INTERVAL;
5957 uint32_t ms;
5958 struct lpfc_cgn_stat *cgs;
5959 int cpu;
5960
5961 /* Only restart the timer if congestion mgmt is on */
5962 if (phba->cmf_active_mode == LPFC_CFG_OFF ||
5963 !phba->cmf_latency.tv_sec) {
5964 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5965 "6224 CMF timer exit: %d %lld\n",
5966 phba->cmf_active_mode,
5967 (uint64_t)phba->cmf_latency.tv_sec);
5968 return HRTIMER_NORESTART;
5969 }
5970
5971 /* If pport is not ready yet, just exit and wait for
5972 * the next timer cycle to hit.
5973 */
5974 if (!phba->pport)
5975 goto skip;
5976
5977 /* Do not block SCSI IO while in the timer routine since
5978 * total_bytes will be cleared
5979 */
5980 atomic_set(&phba->cmf_stop_io, 1);
5981
5982 /* First we need to calculate the actual ms between
5983 * the last timer interrupt and this one. We ask for
5984 * LPFC_CMF_INTERVAL, however the actual time may
5985 * vary depending on system overhead.
5986 */
5987 ms = lpfc_calc_cmf_latency(phba);
5988
5989
5990 /* Immediately after we calculate the time since the last
5991 * timer interrupt, set the start time for the next
5992 * interrupt
5993 */
5994 ktime_get_real_ts64(&phba->cmf_latency);
5995
5996 phba->cmf_link_byte_count =
5997 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000);
5998
5999 /* Collect all the stats from the prior timer interval */
6000 total = 0;
6001 io_cnt = 0;
6002 lat = 0;
6003 rcv = 0;
6004 for_each_present_cpu(cpu) {
6005 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
6006 total += atomic64_xchg(&cgs->total_bytes, 0);
6007 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0);
6008 lat += atomic64_xchg(&cgs->rx_latency, 0);
6009 rcv += atomic64_xchg(&cgs->rcv_bytes, 0);
6010 }
6011
6012 /* Before we issue another CMF_SYNC_WQE, retrieve the BW
6013 * returned from the last CMF_SYNC_WQE issued, from
6014 * cmf_last_sync_bw. This will be the target BW for
6015 * this next timer interval.
6016 */
6017 if (phba->cmf_active_mode == LPFC_CFG_MANAGED &&
6018 phba->link_state != LPFC_LINK_DOWN &&
6019 test_bit(HBA_SETUP, &phba->hba_flag)) {
6020 mbpi = phba->cmf_last_sync_bw;
6021 phba->cmf_last_sync_bw = 0;
6022 extra = 0;
6023
6024 /* Calculate any extra bytes needed to account for the
6025 * timer accuracy. If we are less than LPFC_CMF_INTERVAL
6026 * calculate the adjustment needed for total to reflect
6027 * a full LPFC_CMF_INTERVAL.
6028 */
6029 if (ms && ms < LPFC_CMF_INTERVAL) {
6030 cnt = div_u64(total, ms); /* bytes per ms */
6031 cnt *= LPFC_CMF_INTERVAL; /* what total should be */
6032 extra = cnt - total;
6033 }
6034 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra);
6035 } else {
6036 /* For Monitor mode or link down we want mbpi
6037 * to be the full link speed
6038 */
6039 mbpi = phba->cmf_link_byte_count;
6040 extra = 0;
6041 }
6042 phba->cmf_timer_cnt++;
6043
6044 if (io_cnt) {
6045 /* Update congestion info buffer latency in us */
6046 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt);
6047 atomic64_add(lat, &phba->cgn_latency_evt);
6048 }
6049 busy = atomic_xchg(&phba->cmf_busy, 0);
6050 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0);
6051
6052 /* Calculate MBPI for the next timer interval */
6053 if (mbpi) {
6054 if (mbpi > phba->cmf_link_byte_count ||
6055 phba->cmf_active_mode == LPFC_CFG_MONITOR)
6056 mbpi = phba->cmf_link_byte_count;
6057
6058 /* Change max_bytes_per_interval to what the prior
6059 * CMF_SYNC_WQE cmpl indicated.
6060 */
6061 if (mbpi != phba->cmf_max_bytes_per_interval)
6062 phba->cmf_max_bytes_per_interval = mbpi;
6063 }
6064
6065 /* Save rxmonitor information for debug */
6066 if (phba->rx_monitor) {
6067 entry.total_bytes = total;
6068 entry.cmf_bytes = total + extra;
6069 entry.rcv_bytes = rcv;
6070 entry.cmf_busy = busy;
6071 entry.cmf_info = phba->cmf_active_info;
6072 if (io_cnt) {
6073 entry.avg_io_latency = div_u64(lat, io_cnt);
6074 entry.avg_io_size = div_u64(rcv, io_cnt);
6075 } else {
6076 entry.avg_io_latency = 0;
6077 entry.avg_io_size = 0;
6078 }
6079 entry.max_read_cnt = max_read;
6080 entry.io_cnt = io_cnt;
6081 entry.max_bytes_per_interval = mbpi;
6082 if (phba->cmf_active_mode == LPFC_CFG_MANAGED)
6083 entry.timer_utilization = phba->cmf_last_ts;
6084 else
6085 entry.timer_utilization = ms;
6086 entry.timer_interval = ms;
6087 phba->cmf_last_ts = 0;
6088
6089 lpfc_rx_monitor_record(phba->rx_monitor, &entry);
6090 }
6091
6092 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) {
6093 /* If Monitor mode, check if we are oversubscribed
6094 * against the full line rate.
6095 */
6096 if (mbpi && total > mbpi)
6097 atomic_inc(&phba->cgn_driver_evt_cnt);
6098 }
6099 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */
6100
6101 /* Since total_bytes has already been zero'ed, its okay to unblock
6102 * after max_bytes_per_interval is setup.
6103 */
6104 if (atomic_xchg(&phba->cmf_bw_wait, 0))
6105 queue_work(phba->wq, &phba->unblock_request_work);
6106
6107 /* SCSI IO is now unblocked */
6108 atomic_set(&phba->cmf_stop_io, 0);
6109
6110 skip:
6111 hrtimer_forward_now(timer,
6112 ktime_set(0, timer_interval * NSEC_PER_MSEC));
6113 return HRTIMER_RESTART;
6114 }
6115
6116 #define trunk_link_status(__idx)\
6117 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6118 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
6119 "Link up" : "Link down") : "NA"
6120 /* Did port __idx reported an error */
6121 #define trunk_port_fault(__idx)\
6122 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6123 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
6124
6125 static void
lpfc_update_trunk_link_status(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6126 lpfc_update_trunk_link_status(struct lpfc_hba *phba,
6127 struct lpfc_acqe_fc_la *acqe_fc)
6128 {
6129 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
6130 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
6131 u8 cnt = 0;
6132
6133 phba->sli4_hba.link_state.speed =
6134 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6135 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6136
6137 phba->sli4_hba.link_state.logical_speed =
6138 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6139 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
6140 phba->fc_linkspeed =
6141 lpfc_async_link_speed_to_read_top(
6142 phba,
6143 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6144
6145 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
6146 phba->trunk_link.link0.state =
6147 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
6148 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6149 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
6150 cnt++;
6151 }
6152 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
6153 phba->trunk_link.link1.state =
6154 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
6155 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6156 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
6157 cnt++;
6158 }
6159 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
6160 phba->trunk_link.link2.state =
6161 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
6162 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6163 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
6164 cnt++;
6165 }
6166 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
6167 phba->trunk_link.link3.state =
6168 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
6169 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6170 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
6171 cnt++;
6172 }
6173
6174 if (cnt)
6175 phba->trunk_link.phy_lnk_speed =
6176 phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6177 else
6178 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN;
6179
6180 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6181 "2910 Async FC Trunking Event - Speed:%d\n"
6182 "\tLogical speed:%d "
6183 "port0: %s port1: %s port2: %s port3: %s\n",
6184 phba->sli4_hba.link_state.speed,
6185 phba->sli4_hba.link_state.logical_speed,
6186 trunk_link_status(0), trunk_link_status(1),
6187 trunk_link_status(2), trunk_link_status(3));
6188
6189 if (phba->cmf_active_mode != LPFC_CFG_OFF)
6190 lpfc_cmf_signal_init(phba);
6191
6192 if (port_fault)
6193 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6194 "3202 trunk error:0x%x (%s) seen on port0:%s "
6195 /*
6196 * SLI-4: We have only 0xA error codes
6197 * defined as of now. print an appropriate
6198 * message in case driver needs to be updated.
6199 */
6200 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
6201 "UNDEFINED. update driver." : trunk_errmsg[err],
6202 trunk_port_fault(0), trunk_port_fault(1),
6203 trunk_port_fault(2), trunk_port_fault(3));
6204 }
6205
6206
6207 /**
6208 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
6209 * @phba: pointer to lpfc hba data structure.
6210 * @acqe_fc: pointer to the async fc completion queue entry.
6211 *
6212 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
6213 * that the event was received and then issue a read_topology mailbox command so
6214 * that the rest of the driver will treat it the same as SLI3.
6215 **/
6216 static void
lpfc_sli4_async_fc_evt(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6217 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
6218 {
6219 LPFC_MBOXQ_t *pmb;
6220 MAILBOX_t *mb;
6221 struct lpfc_mbx_read_top *la;
6222 char *log_level;
6223 int rc;
6224
6225 if (bf_get(lpfc_trailer_type, acqe_fc) !=
6226 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
6227 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6228 "2895 Non FC link Event detected.(%d)\n",
6229 bf_get(lpfc_trailer_type, acqe_fc));
6230 return;
6231 }
6232
6233 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6234 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
6235 lpfc_update_trunk_link_status(phba, acqe_fc);
6236 return;
6237 }
6238
6239 /* Keep the link status for extra SLI4 state machine reference */
6240 phba->sli4_hba.link_state.speed =
6241 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6242 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6243 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6244 phba->sli4_hba.link_state.topology =
6245 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
6246 phba->sli4_hba.link_state.status =
6247 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
6248 phba->sli4_hba.link_state.type =
6249 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
6250 phba->sli4_hba.link_state.number =
6251 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
6252 phba->sli4_hba.link_state.fault =
6253 bf_get(lpfc_acqe_link_fault, acqe_fc);
6254 phba->sli4_hba.link_state.link_status =
6255 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc);
6256
6257 /*
6258 * Only select attention types need logical speed modification to what
6259 * was previously set.
6260 */
6261 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP &&
6262 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6263 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6264 LPFC_FC_LA_TYPE_LINK_DOWN)
6265 phba->sli4_hba.link_state.logical_speed = 0;
6266 else if (!phba->sli4_hba.conf_trunk)
6267 phba->sli4_hba.link_state.logical_speed =
6268 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6269 }
6270
6271 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6272 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
6273 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
6274 "%dMbps Fault:x%x Link Status:x%x\n",
6275 phba->sli4_hba.link_state.speed,
6276 phba->sli4_hba.link_state.topology,
6277 phba->sli4_hba.link_state.status,
6278 phba->sli4_hba.link_state.type,
6279 phba->sli4_hba.link_state.number,
6280 phba->sli4_hba.link_state.logical_speed,
6281 phba->sli4_hba.link_state.fault,
6282 phba->sli4_hba.link_state.link_status);
6283
6284 /*
6285 * The following attention types are informational only, providing
6286 * further details about link status. Overwrite the value of
6287 * link_state.status appropriately. No further action is required.
6288 */
6289 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6290 switch (phba->sli4_hba.link_state.status) {
6291 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
6292 log_level = KERN_WARNING;
6293 phba->sli4_hba.link_state.status =
6294 LPFC_FC_LA_TYPE_LINK_DOWN;
6295 break;
6296 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
6297 /*
6298 * During bb credit recovery establishment, receiving
6299 * this attention type is normal. Link Up attention
6300 * type is expected to occur before this informational
6301 * attention type so keep the Link Up status.
6302 */
6303 log_level = KERN_INFO;
6304 phba->sli4_hba.link_state.status =
6305 LPFC_FC_LA_TYPE_LINK_UP;
6306 break;
6307 default:
6308 log_level = KERN_INFO;
6309 break;
6310 }
6311 lpfc_log_msg(phba, log_level, LOG_SLI,
6312 "2992 Async FC event - Informational Link "
6313 "Attention Type x%x\n",
6314 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc));
6315 return;
6316 }
6317
6318 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6319 if (!pmb) {
6320 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6321 "2897 The mboxq allocation failed\n");
6322 return;
6323 }
6324 rc = lpfc_mbox_rsrc_prep(phba, pmb);
6325 if (rc) {
6326 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6327 "2898 The mboxq prep failed\n");
6328 goto out_free_pmb;
6329 }
6330
6331 /* Cleanup any outstanding ELS commands */
6332 lpfc_els_flush_all_cmd(phba);
6333
6334 /* Block ELS IOCBs until we have done process link event */
6335 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6336
6337 /* Update link event statistics */
6338 phba->sli.slistat.link_event++;
6339
6340 /* Create lpfc_handle_latt mailbox command from link ACQE */
6341 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
6342 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
6343 pmb->vport = phba->pport;
6344
6345 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6346 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
6347
6348 switch (phba->sli4_hba.link_state.status) {
6349 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
6350 phba->link_flag |= LS_MDS_LINK_DOWN;
6351 break;
6352 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
6353 phba->link_flag |= LS_MDS_LOOPBACK;
6354 break;
6355 default:
6356 break;
6357 }
6358
6359 /* Initialize completion status */
6360 mb = &pmb->u.mb;
6361 mb->mbxStatus = MBX_SUCCESS;
6362
6363 /* Parse port fault information field */
6364 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
6365
6366 /* Parse and translate link attention fields */
6367 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
6368 la->eventTag = acqe_fc->event_tag;
6369
6370 if (phba->sli4_hba.link_state.status ==
6371 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
6372 bf_set(lpfc_mbx_read_top_att_type, la,
6373 LPFC_FC_LA_TYPE_UNEXP_WWPN);
6374 } else {
6375 bf_set(lpfc_mbx_read_top_att_type, la,
6376 LPFC_FC_LA_TYPE_LINK_DOWN);
6377 }
6378 /* Invoke the mailbox command callback function */
6379 lpfc_mbx_cmpl_read_topology(phba, pmb);
6380
6381 return;
6382 }
6383
6384 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
6385 if (rc == MBX_NOT_FINISHED)
6386 goto out_free_pmb;
6387 return;
6388
6389 out_free_pmb:
6390 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
6391 }
6392
6393 /**
6394 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
6395 * @phba: pointer to lpfc hba data structure.
6396 * @acqe_sli: pointer to the async SLI completion queue entry.
6397 *
6398 * This routine is to handle the SLI4 asynchronous SLI events.
6399 **/
6400 static void
lpfc_sli4_async_sli_evt(struct lpfc_hba * phba,struct lpfc_acqe_sli * acqe_sli)6401 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
6402 {
6403 char port_name;
6404 char message[128];
6405 uint8_t status;
6406 uint8_t evt_type;
6407 uint8_t operational = 0;
6408 struct temp_event temp_event_data;
6409 struct lpfc_acqe_misconfigured_event *misconfigured;
6410 struct lpfc_acqe_cgn_signal *cgn_signal;
6411 struct Scsi_Host *shost;
6412 struct lpfc_vport **vports;
6413 int rc, i, cnt;
6414
6415 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
6416
6417 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6418 "2901 Async SLI event - Type:%d, Event Data: x%08x "
6419 "x%08x x%08x x%08x\n", evt_type,
6420 acqe_sli->event_data1, acqe_sli->event_data2,
6421 acqe_sli->event_data3, acqe_sli->trailer);
6422
6423 port_name = phba->Port[0];
6424 if (port_name == 0x00)
6425 port_name = '?'; /* get port name is empty */
6426
6427 switch (evt_type) {
6428 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
6429 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6430 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
6431 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6432
6433 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6434 "3190 Over Temperature:%d Celsius- Port Name %c\n",
6435 acqe_sli->event_data1, port_name);
6436
6437 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
6438 shost = lpfc_shost_from_vport(phba->pport);
6439 fc_host_post_vendor_event(shost, fc_get_event_number(),
6440 sizeof(temp_event_data),
6441 (char *)&temp_event_data,
6442 SCSI_NL_VID_TYPE_PCI
6443 | PCI_VENDOR_ID_EMULEX);
6444 break;
6445 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
6446 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6447 temp_event_data.event_code = LPFC_NORMAL_TEMP;
6448 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6449
6450 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT,
6451 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
6452 acqe_sli->event_data1, port_name);
6453
6454 shost = lpfc_shost_from_vport(phba->pport);
6455 fc_host_post_vendor_event(shost, fc_get_event_number(),
6456 sizeof(temp_event_data),
6457 (char *)&temp_event_data,
6458 SCSI_NL_VID_TYPE_PCI
6459 | PCI_VENDOR_ID_EMULEX);
6460 break;
6461 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
6462 misconfigured = (struct lpfc_acqe_misconfigured_event *)
6463 &acqe_sli->event_data1;
6464
6465 /* fetch the status for this port */
6466 switch (phba->sli4_hba.lnk_info.lnk_no) {
6467 case LPFC_LINK_NUMBER_0:
6468 status = bf_get(lpfc_sli_misconfigured_port0_state,
6469 &misconfigured->theEvent);
6470 operational = bf_get(lpfc_sli_misconfigured_port0_op,
6471 &misconfigured->theEvent);
6472 break;
6473 case LPFC_LINK_NUMBER_1:
6474 status = bf_get(lpfc_sli_misconfigured_port1_state,
6475 &misconfigured->theEvent);
6476 operational = bf_get(lpfc_sli_misconfigured_port1_op,
6477 &misconfigured->theEvent);
6478 break;
6479 case LPFC_LINK_NUMBER_2:
6480 status = bf_get(lpfc_sli_misconfigured_port2_state,
6481 &misconfigured->theEvent);
6482 operational = bf_get(lpfc_sli_misconfigured_port2_op,
6483 &misconfigured->theEvent);
6484 break;
6485 case LPFC_LINK_NUMBER_3:
6486 status = bf_get(lpfc_sli_misconfigured_port3_state,
6487 &misconfigured->theEvent);
6488 operational = bf_get(lpfc_sli_misconfigured_port3_op,
6489 &misconfigured->theEvent);
6490 break;
6491 default:
6492 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6493 "3296 "
6494 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
6495 "event: Invalid link %d",
6496 phba->sli4_hba.lnk_info.lnk_no);
6497 return;
6498 }
6499
6500 /* Skip if optic state unchanged */
6501 if (phba->sli4_hba.lnk_info.optic_state == status)
6502 return;
6503
6504 switch (status) {
6505 case LPFC_SLI_EVENT_STATUS_VALID:
6506 sprintf(message, "Physical Link is functional");
6507 break;
6508 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
6509 sprintf(message, "Optics faulted/incorrectly "
6510 "installed/not installed - Reseat optics, "
6511 "if issue not resolved, replace.");
6512 break;
6513 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
6514 sprintf(message,
6515 "Optics of two types installed - Remove one "
6516 "optic or install matching pair of optics.");
6517 break;
6518 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
6519 sprintf(message, "Incompatible optics - Replace with "
6520 "compatible optics for card to function.");
6521 break;
6522 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
6523 sprintf(message, "Unqualified optics - Replace with "
6524 "Avago optics for Warranty and Technical "
6525 "Support - Link is%s operational",
6526 (operational) ? " not" : "");
6527 break;
6528 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
6529 sprintf(message, "Uncertified optics - Replace with "
6530 "Avago-certified optics to enable link "
6531 "operation - Link is%s operational",
6532 (operational) ? " not" : "");
6533 break;
6534 default:
6535 /* firmware is reporting a status we don't know about */
6536 sprintf(message, "Unknown event status x%02x", status);
6537 break;
6538 }
6539
6540 /* Issue READ_CONFIG mbox command to refresh supported speeds */
6541 rc = lpfc_sli4_read_config(phba);
6542 if (rc) {
6543 phba->lmt = 0;
6544 lpfc_printf_log(phba, KERN_ERR,
6545 LOG_TRACE_EVENT,
6546 "3194 Unable to retrieve supported "
6547 "speeds, rc = 0x%x\n", rc);
6548 }
6549 rc = lpfc_sli4_refresh_params(phba);
6550 if (rc) {
6551 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6552 "3174 Unable to update pls support, "
6553 "rc x%x\n", rc);
6554 }
6555 vports = lpfc_create_vport_work_array(phba);
6556 if (vports != NULL) {
6557 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6558 i++) {
6559 shost = lpfc_shost_from_vport(vports[i]);
6560 lpfc_host_supported_speeds_set(shost);
6561 }
6562 }
6563 lpfc_destroy_vport_work_array(phba, vports);
6564
6565 phba->sli4_hba.lnk_info.optic_state = status;
6566 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6567 "3176 Port Name %c %s\n", port_name, message);
6568 break;
6569 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
6570 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6571 "3192 Remote DPort Test Initiated - "
6572 "Event Data1:x%08x Event Data2: x%08x\n",
6573 acqe_sli->event_data1, acqe_sli->event_data2);
6574 break;
6575 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG:
6576 /* Call FW to obtain active parms */
6577 lpfc_sli4_cgn_parm_chg_evt(phba);
6578 break;
6579 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
6580 /* Misconfigured WWN. Reports that the SLI Port is configured
6581 * to use FA-WWN, but the attached device doesn’t support it.
6582 * Event Data1 - N.A, Event Data2 - N.A
6583 * This event only happens on the physical port.
6584 */
6585 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY,
6586 "2699 Misconfigured FA-PWWN - Attached device "
6587 "does not support FA-PWWN\n");
6588 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
6589 memset(phba->pport->fc_portname.u.wwn, 0,
6590 sizeof(struct lpfc_name));
6591 break;
6592 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
6593 /* EEPROM failure. No driver action is required */
6594 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6595 "2518 EEPROM failure - "
6596 "Event Data1: x%08x Event Data2: x%08x\n",
6597 acqe_sli->event_data1, acqe_sli->event_data2);
6598 break;
6599 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL:
6600 if (phba->cmf_active_mode == LPFC_CFG_OFF)
6601 break;
6602 cgn_signal = (struct lpfc_acqe_cgn_signal *)
6603 &acqe_sli->event_data1;
6604 phba->cgn_acqe_cnt++;
6605
6606 cnt = bf_get(lpfc_warn_acqe, cgn_signal);
6607 atomic64_add(cnt, &phba->cgn_acqe_stat.warn);
6608 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm);
6609
6610 /* no threshold for CMF, even 1 signal will trigger an event */
6611
6612 /* Alarm overrides warning, so check that first */
6613 if (cgn_signal->alarm_cnt) {
6614 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6615 /* Keep track of alarm cnt for CMF_SYNC_WQE */
6616 atomic_add(cgn_signal->alarm_cnt,
6617 &phba->cgn_sync_alarm_cnt);
6618 }
6619 } else if (cnt) {
6620 /* signal action needs to be taken */
6621 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
6622 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6623 /* Keep track of warning cnt for CMF_SYNC_WQE */
6624 atomic_add(cnt, &phba->cgn_sync_warn_cnt);
6625 }
6626 }
6627 break;
6628 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL:
6629 /* May be accompanied by a temperature event */
6630 lpfc_printf_log(phba, KERN_INFO,
6631 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT,
6632 "2902 Remote Degrade Signaling: x%08x x%08x "
6633 "x%08x\n",
6634 acqe_sli->event_data1, acqe_sli->event_data2,
6635 acqe_sli->event_data3);
6636 break;
6637 case LPFC_SLI_EVENT_TYPE_RESET_CM_STATS:
6638 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
6639 "2905 Reset CM statistics\n");
6640 lpfc_sli4_async_cmstat_evt(phba);
6641 break;
6642 default:
6643 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6644 "3193 Unrecognized SLI event, type: 0x%x",
6645 evt_type);
6646 break;
6647 }
6648 }
6649
6650 /**
6651 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
6652 * @vport: pointer to vport data structure.
6653 *
6654 * This routine is to perform Clear Virtual Link (CVL) on a vport in
6655 * response to a CVL event.
6656 *
6657 * Return the pointer to the ndlp with the vport if successful, otherwise
6658 * return NULL.
6659 **/
6660 static struct lpfc_nodelist *
lpfc_sli4_perform_vport_cvl(struct lpfc_vport * vport)6661 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
6662 {
6663 struct lpfc_nodelist *ndlp;
6664 struct Scsi_Host *shost;
6665 struct lpfc_hba *phba;
6666
6667 if (!vport)
6668 return NULL;
6669 phba = vport->phba;
6670 if (!phba)
6671 return NULL;
6672 ndlp = lpfc_findnode_did(vport, Fabric_DID);
6673 if (!ndlp) {
6674 /* Cannot find existing Fabric ndlp, so allocate a new one */
6675 ndlp = lpfc_nlp_init(vport, Fabric_DID);
6676 if (!ndlp)
6677 return NULL;
6678 /* Set the node type */
6679 ndlp->nlp_type |= NLP_FABRIC;
6680 /* Put ndlp onto node list */
6681 lpfc_enqueue_node(vport, ndlp);
6682 }
6683 if ((phba->pport->port_state < LPFC_FLOGI) &&
6684 (phba->pport->port_state != LPFC_VPORT_FAILED))
6685 return NULL;
6686 /* If virtual link is not yet instantiated ignore CVL */
6687 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
6688 && (vport->port_state != LPFC_VPORT_FAILED))
6689 return NULL;
6690 shost = lpfc_shost_from_vport(vport);
6691 if (!shost)
6692 return NULL;
6693 lpfc_linkdown_port(vport);
6694 lpfc_cleanup_pending_mbox(vport);
6695 set_bit(FC_VPORT_CVL_RCVD, &vport->fc_flag);
6696
6697 return ndlp;
6698 }
6699
6700 /**
6701 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
6702 * @phba: pointer to lpfc hba data structure.
6703 *
6704 * This routine is to perform Clear Virtual Link (CVL) on all vports in
6705 * response to a FCF dead event.
6706 **/
6707 static void
lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba * phba)6708 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
6709 {
6710 struct lpfc_vport **vports;
6711 int i;
6712
6713 vports = lpfc_create_vport_work_array(phba);
6714 if (vports)
6715 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
6716 lpfc_sli4_perform_vport_cvl(vports[i]);
6717 lpfc_destroy_vport_work_array(phba, vports);
6718 }
6719
6720 /**
6721 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
6722 * @phba: pointer to lpfc hba data structure.
6723 * @acqe_fip: pointer to the async fcoe completion queue entry.
6724 *
6725 * This routine is to handle the SLI4 asynchronous fcoe event.
6726 **/
6727 static void
lpfc_sli4_async_fip_evt(struct lpfc_hba * phba,struct lpfc_acqe_fip * acqe_fip)6728 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
6729 struct lpfc_acqe_fip *acqe_fip)
6730 {
6731 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
6732 int rc;
6733 struct lpfc_vport *vport;
6734 struct lpfc_nodelist *ndlp;
6735 int active_vlink_present;
6736 struct lpfc_vport **vports;
6737 int i;
6738
6739 phba->fc_eventTag = acqe_fip->event_tag;
6740 phba->fcoe_eventtag = acqe_fip->event_tag;
6741 switch (event_type) {
6742 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
6743 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
6744 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
6745 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6746 "2546 New FCF event, evt_tag:x%x, "
6747 "index:x%x\n",
6748 acqe_fip->event_tag,
6749 acqe_fip->index);
6750 else
6751 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
6752 LOG_DISCOVERY,
6753 "2788 FCF param modified event, "
6754 "evt_tag:x%x, index:x%x\n",
6755 acqe_fip->event_tag,
6756 acqe_fip->index);
6757 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6758 /*
6759 * During period of FCF discovery, read the FCF
6760 * table record indexed by the event to update
6761 * FCF roundrobin failover eligible FCF bmask.
6762 */
6763 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6764 LOG_DISCOVERY,
6765 "2779 Read FCF (x%x) for updating "
6766 "roundrobin FCF failover bmask\n",
6767 acqe_fip->index);
6768 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
6769 }
6770
6771 /* If the FCF discovery is in progress, do nothing. */
6772 if (test_bit(FCF_TS_INPROG, &phba->hba_flag))
6773 break;
6774 spin_lock_irq(&phba->hbalock);
6775 /* If fast FCF failover rescan event is pending, do nothing */
6776 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
6777 spin_unlock_irq(&phba->hbalock);
6778 break;
6779 }
6780
6781 /* If the FCF has been in discovered state, do nothing. */
6782 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
6783 spin_unlock_irq(&phba->hbalock);
6784 break;
6785 }
6786 spin_unlock_irq(&phba->hbalock);
6787
6788 /* Otherwise, scan the entire FCF table and re-discover SAN */
6789 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6790 "2770 Start FCF table scan per async FCF "
6791 "event, evt_tag:x%x, index:x%x\n",
6792 acqe_fip->event_tag, acqe_fip->index);
6793 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
6794 LPFC_FCOE_FCF_GET_FIRST);
6795 if (rc)
6796 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6797 "2547 Issue FCF scan read FCF mailbox "
6798 "command failed (x%x)\n", rc);
6799 break;
6800
6801 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
6802 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6803 "2548 FCF Table full count 0x%x tag 0x%x\n",
6804 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
6805 acqe_fip->event_tag);
6806 break;
6807
6808 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
6809 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6811 "2549 FCF (x%x) disconnected from network, "
6812 "tag:x%x\n", acqe_fip->index,
6813 acqe_fip->event_tag);
6814 /*
6815 * If we are in the middle of FCF failover process, clear
6816 * the corresponding FCF bit in the roundrobin bitmap.
6817 */
6818 spin_lock_irq(&phba->hbalock);
6819 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
6820 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
6821 spin_unlock_irq(&phba->hbalock);
6822 /* Update FLOGI FCF failover eligible FCF bmask */
6823 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
6824 break;
6825 }
6826 spin_unlock_irq(&phba->hbalock);
6827
6828 /* If the event is not for currently used fcf do nothing */
6829 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
6830 break;
6831
6832 /*
6833 * Otherwise, request the port to rediscover the entire FCF
6834 * table for a fast recovery from case that the current FCF
6835 * is no longer valid as we are not in the middle of FCF
6836 * failover process already.
6837 */
6838 spin_lock_irq(&phba->hbalock);
6839 /* Mark the fast failover process in progress */
6840 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
6841 spin_unlock_irq(&phba->hbalock);
6842
6843 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6844 "2771 Start FCF fast failover process due to "
6845 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
6846 "\n", acqe_fip->event_tag, acqe_fip->index);
6847 rc = lpfc_sli4_redisc_fcf_table(phba);
6848 if (rc) {
6849 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6850 LOG_TRACE_EVENT,
6851 "2772 Issue FCF rediscover mailbox "
6852 "command failed, fail through to FCF "
6853 "dead event\n");
6854 spin_lock_irq(&phba->hbalock);
6855 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
6856 spin_unlock_irq(&phba->hbalock);
6857 /*
6858 * Last resort will fail over by treating this
6859 * as a link down to FCF registration.
6860 */
6861 lpfc_sli4_fcf_dead_failthrough(phba);
6862 } else {
6863 /* Reset FCF roundrobin bmask for new discovery */
6864 lpfc_sli4_clear_fcf_rr_bmask(phba);
6865 /*
6866 * Handling fast FCF failover to a DEAD FCF event is
6867 * considered equalivant to receiving CVL to all vports.
6868 */
6869 lpfc_sli4_perform_all_vport_cvl(phba);
6870 }
6871 break;
6872 case LPFC_FIP_EVENT_TYPE_CVL:
6873 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6874 lpfc_printf_log(phba, KERN_ERR,
6875 LOG_TRACE_EVENT,
6876 "2718 Clear Virtual Link Received for VPI 0x%x"
6877 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6878
6879 vport = lpfc_find_vport_by_vpid(phba,
6880 acqe_fip->index);
6881 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6882 if (!ndlp)
6883 break;
6884 active_vlink_present = 0;
6885
6886 vports = lpfc_create_vport_work_array(phba);
6887 if (vports) {
6888 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6889 i++) {
6890 if (!test_bit(FC_VPORT_CVL_RCVD,
6891 &vports[i]->fc_flag) &&
6892 vports[i]->port_state > LPFC_FDISC) {
6893 active_vlink_present = 1;
6894 break;
6895 }
6896 }
6897 lpfc_destroy_vport_work_array(phba, vports);
6898 }
6899
6900 /*
6901 * Don't re-instantiate if vport is marked for deletion.
6902 * If we are here first then vport_delete is going to wait
6903 * for discovery to complete.
6904 */
6905 if (!test_bit(FC_UNLOADING, &vport->load_flag) &&
6906 active_vlink_present) {
6907 /*
6908 * If there are other active VLinks present,
6909 * re-instantiate the Vlink using FDISC.
6910 */
6911 mod_timer(&ndlp->nlp_delayfunc,
6912 jiffies + msecs_to_jiffies(1000));
6913 spin_lock_irq(&ndlp->lock);
6914 ndlp->nlp_flag |= NLP_DELAY_TMO;
6915 spin_unlock_irq(&ndlp->lock);
6916 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
6917 vport->port_state = LPFC_FDISC;
6918 } else {
6919 /*
6920 * Otherwise, we request port to rediscover
6921 * the entire FCF table for a fast recovery
6922 * from possible case that the current FCF
6923 * is no longer valid if we are not already
6924 * in the FCF failover process.
6925 */
6926 spin_lock_irq(&phba->hbalock);
6927 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6928 spin_unlock_irq(&phba->hbalock);
6929 break;
6930 }
6931 /* Mark the fast failover process in progress */
6932 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
6933 spin_unlock_irq(&phba->hbalock);
6934 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6935 LOG_DISCOVERY,
6936 "2773 Start FCF failover per CVL, "
6937 "evt_tag:x%x\n", acqe_fip->event_tag);
6938 rc = lpfc_sli4_redisc_fcf_table(phba);
6939 if (rc) {
6940 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6941 LOG_TRACE_EVENT,
6942 "2774 Issue FCF rediscover "
6943 "mailbox command failed, "
6944 "through to CVL event\n");
6945 spin_lock_irq(&phba->hbalock);
6946 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
6947 spin_unlock_irq(&phba->hbalock);
6948 /*
6949 * Last resort will be re-try on the
6950 * the current registered FCF entry.
6951 */
6952 lpfc_retry_pport_discovery(phba);
6953 } else
6954 /*
6955 * Reset FCF roundrobin bmask for new
6956 * discovery.
6957 */
6958 lpfc_sli4_clear_fcf_rr_bmask(phba);
6959 }
6960 break;
6961 default:
6962 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6963 "0288 Unknown FCoE event type 0x%x event tag "
6964 "0x%x\n", event_type, acqe_fip->event_tag);
6965 break;
6966 }
6967 }
6968
6969 /**
6970 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
6971 * @phba: pointer to lpfc hba data structure.
6972 * @acqe_dcbx: pointer to the async dcbx completion queue entry.
6973 *
6974 * This routine is to handle the SLI4 asynchronous dcbx event.
6975 **/
6976 static void
lpfc_sli4_async_dcbx_evt(struct lpfc_hba * phba,struct lpfc_acqe_dcbx * acqe_dcbx)6977 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
6978 struct lpfc_acqe_dcbx *acqe_dcbx)
6979 {
6980 phba->fc_eventTag = acqe_dcbx->event_tag;
6981 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6982 "0290 The SLI4 DCBX asynchronous event is not "
6983 "handled yet\n");
6984 }
6985
6986 /**
6987 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
6988 * @phba: pointer to lpfc hba data structure.
6989 * @acqe_grp5: pointer to the async grp5 completion queue entry.
6990 *
6991 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
6992 * is an asynchronous notified of a logical link speed change. The Port
6993 * reports the logical link speed in units of 10Mbps.
6994 **/
6995 static void
lpfc_sli4_async_grp5_evt(struct lpfc_hba * phba,struct lpfc_acqe_grp5 * acqe_grp5)6996 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
6997 struct lpfc_acqe_grp5 *acqe_grp5)
6998 {
6999 uint16_t prev_ll_spd;
7000
7001 phba->fc_eventTag = acqe_grp5->event_tag;
7002 phba->fcoe_eventtag = acqe_grp5->event_tag;
7003 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7004 phba->sli4_hba.link_state.logical_speed =
7005 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
7006 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7007 "2789 GRP5 Async Event: Updating logical link speed "
7008 "from %dMbps to %dMbps\n", prev_ll_spd,
7009 phba->sli4_hba.link_state.logical_speed);
7010 }
7011
7012 /**
7013 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event
7014 * @phba: pointer to lpfc hba data structure.
7015 *
7016 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event
7017 * is an asynchronous notification of a request to reset CM stats.
7018 **/
7019 static void
lpfc_sli4_async_cmstat_evt(struct lpfc_hba * phba)7020 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba)
7021 {
7022 if (!phba->cgn_i)
7023 return;
7024 lpfc_init_congestion_stat(phba);
7025 }
7026
7027 /**
7028 * lpfc_cgn_params_val - Validate FW congestion parameters.
7029 * @phba: pointer to lpfc hba data structure.
7030 * @p_cfg_param: pointer to FW provided congestion parameters.
7031 *
7032 * This routine validates the congestion parameters passed
7033 * by the FW to the driver via an ACQE event.
7034 **/
7035 static void
lpfc_cgn_params_val(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cfg_param)7036 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param)
7037 {
7038 spin_lock_irq(&phba->hbalock);
7039
7040 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF,
7041 LPFC_CFG_MONITOR)) {
7042 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT,
7043 "6225 CMF mode param out of range: %d\n",
7044 p_cfg_param->cgn_param_mode);
7045 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF;
7046 }
7047
7048 spin_unlock_irq(&phba->hbalock);
7049 }
7050
7051 static const char * const lpfc_cmf_mode_to_str[] = {
7052 "OFF",
7053 "MANAGED",
7054 "MONITOR",
7055 };
7056
7057 /**
7058 * lpfc_cgn_params_parse - Process a FW cong parm change event
7059 * @phba: pointer to lpfc hba data structure.
7060 * @p_cgn_param: pointer to a data buffer with the FW cong params.
7061 * @len: the size of pdata in bytes.
7062 *
7063 * This routine validates the congestion management buffer signature
7064 * from the FW, validates the contents and makes corrections for
7065 * valid, in-range values. If the signature magic is correct and
7066 * after parameter validation, the contents are copied to the driver's
7067 * @phba structure. If the magic is incorrect, an error message is
7068 * logged.
7069 **/
7070 static void
lpfc_cgn_params_parse(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cgn_param,uint32_t len)7071 lpfc_cgn_params_parse(struct lpfc_hba *phba,
7072 struct lpfc_cgn_param *p_cgn_param, uint32_t len)
7073 {
7074 struct lpfc_cgn_info *cp;
7075 uint32_t crc, oldmode;
7076 char acr_string[4] = {0};
7077
7078 /* Make sure the FW has encoded the correct magic number to
7079 * validate the congestion parameter in FW memory.
7080 */
7081 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) {
7082 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7083 "4668 FW cgn parm buffer data: "
7084 "magic 0x%x version %d mode %d "
7085 "level0 %d level1 %d "
7086 "level2 %d byte13 %d "
7087 "byte14 %d byte15 %d "
7088 "byte11 %d byte12 %d activeMode %d\n",
7089 p_cgn_param->cgn_param_magic,
7090 p_cgn_param->cgn_param_version,
7091 p_cgn_param->cgn_param_mode,
7092 p_cgn_param->cgn_param_level0,
7093 p_cgn_param->cgn_param_level1,
7094 p_cgn_param->cgn_param_level2,
7095 p_cgn_param->byte13,
7096 p_cgn_param->byte14,
7097 p_cgn_param->byte15,
7098 p_cgn_param->byte11,
7099 p_cgn_param->byte12,
7100 phba->cmf_active_mode);
7101
7102 oldmode = phba->cmf_active_mode;
7103
7104 /* Any parameters out of range are corrected to defaults
7105 * by this routine. No need to fail.
7106 */
7107 lpfc_cgn_params_val(phba, p_cgn_param);
7108
7109 /* Parameters are verified, move them into driver storage */
7110 spin_lock_irq(&phba->hbalock);
7111 memcpy(&phba->cgn_p, p_cgn_param,
7112 sizeof(struct lpfc_cgn_param));
7113
7114 /* Update parameters in congestion info buffer now */
7115 if (phba->cgn_i) {
7116 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
7117 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
7118 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
7119 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
7120 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
7121 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
7122 LPFC_CGN_CRC32_SEED);
7123 cp->cgn_info_crc = cpu_to_le32(crc);
7124 }
7125 spin_unlock_irq(&phba->hbalock);
7126
7127 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode;
7128
7129 switch (oldmode) {
7130 case LPFC_CFG_OFF:
7131 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) {
7132 /* Turning CMF on */
7133 lpfc_cmf_start(phba);
7134
7135 if (phba->link_state >= LPFC_LINK_UP) {
7136 phba->cgn_reg_fpin =
7137 phba->cgn_init_reg_fpin;
7138 phba->cgn_reg_signal =
7139 phba->cgn_init_reg_signal;
7140 lpfc_issue_els_edc(phba->pport, 0);
7141 }
7142 }
7143 break;
7144 case LPFC_CFG_MANAGED:
7145 switch (phba->cgn_p.cgn_param_mode) {
7146 case LPFC_CFG_OFF:
7147 /* Turning CMF off */
7148 lpfc_cmf_stop(phba);
7149 if (phba->link_state >= LPFC_LINK_UP)
7150 lpfc_issue_els_edc(phba->pport, 0);
7151 break;
7152 case LPFC_CFG_MONITOR:
7153 phba->cmf_max_bytes_per_interval =
7154 phba->cmf_link_byte_count;
7155
7156 /* Resume blocked IO - unblock on workqueue */
7157 queue_work(phba->wq,
7158 &phba->unblock_request_work);
7159 break;
7160 }
7161 break;
7162 case LPFC_CFG_MONITOR:
7163 switch (phba->cgn_p.cgn_param_mode) {
7164 case LPFC_CFG_OFF:
7165 /* Turning CMF off */
7166 lpfc_cmf_stop(phba);
7167 if (phba->link_state >= LPFC_LINK_UP)
7168 lpfc_issue_els_edc(phba->pport, 0);
7169 break;
7170 case LPFC_CFG_MANAGED:
7171 lpfc_cmf_signal_init(phba);
7172 break;
7173 }
7174 break;
7175 }
7176 if (oldmode != LPFC_CFG_OFF ||
7177 oldmode != phba->cgn_p.cgn_param_mode) {
7178 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED)
7179 scnprintf(acr_string, sizeof(acr_string), "%u",
7180 phba->cgn_p.cgn_param_level0);
7181 else
7182 scnprintf(acr_string, sizeof(acr_string), "NA");
7183
7184 dev_info(&phba->pcidev->dev, "%d: "
7185 "4663 CMF: Mode %s acr %s\n",
7186 phba->brd_no,
7187 lpfc_cmf_mode_to_str
7188 [phba->cgn_p.cgn_param_mode],
7189 acr_string);
7190 }
7191 } else {
7192 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7193 "4669 FW cgn parm buf wrong magic 0x%x "
7194 "version %d\n", p_cgn_param->cgn_param_magic,
7195 p_cgn_param->cgn_param_version);
7196 }
7197 }
7198
7199 /**
7200 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters.
7201 * @phba: pointer to lpfc hba data structure.
7202 *
7203 * This routine issues a read_object mailbox command to
7204 * get the congestion management parameters from the FW
7205 * parses it and updates the driver maintained values.
7206 *
7207 * Returns
7208 * 0 if the object was empty
7209 * -Eval if an error was encountered
7210 * Count if bytes were read from object
7211 **/
7212 int
lpfc_sli4_cgn_params_read(struct lpfc_hba * phba)7213 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba)
7214 {
7215 int ret = 0;
7216 struct lpfc_cgn_param *p_cgn_param = NULL;
7217 u32 *pdata = NULL;
7218 u32 len = 0;
7219
7220 /* Find out if the FW has a new set of congestion parameters. */
7221 len = sizeof(struct lpfc_cgn_param);
7222 pdata = kzalloc(len, GFP_KERNEL);
7223 if (!pdata)
7224 return -ENOMEM;
7225 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME,
7226 pdata, len);
7227
7228 /* 0 means no data. A negative means error. A positive means
7229 * bytes were copied.
7230 */
7231 if (!ret) {
7232 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7233 "4670 CGN RD OBJ returns no data\n");
7234 goto rd_obj_err;
7235 } else if (ret < 0) {
7236 /* Some error. Just exit and return it to the caller.*/
7237 goto rd_obj_err;
7238 }
7239
7240 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7241 "6234 READ CGN PARAMS Successful %d\n", len);
7242
7243 /* Parse data pointer over len and update the phba congestion
7244 * parameters with values passed back. The receive rate values
7245 * may have been altered in FW, but take no action here.
7246 */
7247 p_cgn_param = (struct lpfc_cgn_param *)pdata;
7248 lpfc_cgn_params_parse(phba, p_cgn_param, len);
7249
7250 rd_obj_err:
7251 kfree(pdata);
7252 return ret;
7253 }
7254
7255 /**
7256 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event
7257 * @phba: pointer to lpfc hba data structure.
7258 *
7259 * The FW generated Async ACQE SLI event calls this routine when
7260 * the event type is an SLI Internal Port Event and the Event Code
7261 * indicates a change to the FW maintained congestion parameters.
7262 *
7263 * This routine executes a Read_Object mailbox call to obtain the
7264 * current congestion parameters maintained in FW and corrects
7265 * the driver's active congestion parameters.
7266 *
7267 * The acqe event is not passed because there is no further data
7268 * required.
7269 *
7270 * Returns nonzero error if event processing encountered an error.
7271 * Zero otherwise for success.
7272 **/
7273 static int
lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba * phba)7274 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba)
7275 {
7276 int ret = 0;
7277
7278 if (!phba->sli4_hba.pc_sli4_params.cmf) {
7279 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7280 "4664 Cgn Evt when E2E off. Drop event\n");
7281 return -EACCES;
7282 }
7283
7284 /* If the event is claiming an empty object, it's ok. A write
7285 * could have cleared it. Only error is a negative return
7286 * status.
7287 */
7288 ret = lpfc_sli4_cgn_params_read(phba);
7289 if (ret < 0) {
7290 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7291 "4667 Error reading Cgn Params (%d)\n",
7292 ret);
7293 } else if (!ret) {
7294 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7295 "4673 CGN Event empty object.\n");
7296 }
7297 return ret;
7298 }
7299
7300 /**
7301 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
7302 * @phba: pointer to lpfc hba data structure.
7303 *
7304 * This routine is invoked by the worker thread to process all the pending
7305 * SLI4 asynchronous events.
7306 **/
lpfc_sli4_async_event_proc(struct lpfc_hba * phba)7307 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
7308 {
7309 struct lpfc_cq_event *cq_event;
7310 unsigned long iflags;
7311
7312 /* First, declare the async event has been handled */
7313 clear_bit(ASYNC_EVENT, &phba->hba_flag);
7314
7315 /* Now, handle all the async events */
7316 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7317 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7318 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7319 cq_event, struct lpfc_cq_event, list);
7320 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7321 iflags);
7322
7323 /* Process the asynchronous event */
7324 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
7325 case LPFC_TRAILER_CODE_LINK:
7326 lpfc_sli4_async_link_evt(phba,
7327 &cq_event->cqe.acqe_link);
7328 break;
7329 case LPFC_TRAILER_CODE_FCOE:
7330 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
7331 break;
7332 case LPFC_TRAILER_CODE_DCBX:
7333 lpfc_sli4_async_dcbx_evt(phba,
7334 &cq_event->cqe.acqe_dcbx);
7335 break;
7336 case LPFC_TRAILER_CODE_GRP5:
7337 lpfc_sli4_async_grp5_evt(phba,
7338 &cq_event->cqe.acqe_grp5);
7339 break;
7340 case LPFC_TRAILER_CODE_FC:
7341 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
7342 break;
7343 case LPFC_TRAILER_CODE_SLI:
7344 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
7345 break;
7346 default:
7347 lpfc_printf_log(phba, KERN_ERR,
7348 LOG_TRACE_EVENT,
7349 "1804 Invalid asynchronous event code: "
7350 "x%x\n", bf_get(lpfc_trailer_code,
7351 &cq_event->cqe.mcqe_cmpl));
7352 break;
7353 }
7354
7355 /* Free the completion event processed to the free pool */
7356 lpfc_sli4_cq_event_release(phba, cq_event);
7357 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7358 }
7359 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7360 }
7361
7362 /**
7363 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
7364 * @phba: pointer to lpfc hba data structure.
7365 *
7366 * This routine is invoked by the worker thread to process FCF table
7367 * rediscovery pending completion event.
7368 **/
lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba * phba)7369 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
7370 {
7371 int rc;
7372
7373 spin_lock_irq(&phba->hbalock);
7374 /* Clear FCF rediscovery timeout event */
7375 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
7376 /* Clear driver fast failover FCF record flag */
7377 phba->fcf.failover_rec.flag = 0;
7378 /* Set state for FCF fast failover */
7379 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
7380 spin_unlock_irq(&phba->hbalock);
7381
7382 /* Scan FCF table from the first entry to re-discover SAN */
7383 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
7384 "2777 Start post-quiescent FCF table scan\n");
7385 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
7386 if (rc)
7387 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7388 "2747 Issue FCF scan read FCF mailbox "
7389 "command failed 0x%x\n", rc);
7390 }
7391
7392 /**
7393 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
7394 * @phba: pointer to lpfc hba data structure.
7395 * @dev_grp: The HBA PCI-Device group number.
7396 *
7397 * This routine is invoked to set up the per HBA PCI-Device group function
7398 * API jump table entries.
7399 *
7400 * Return: 0 if success, otherwise -ENODEV
7401 **/
7402 int
lpfc_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)7403 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
7404 {
7405 int rc;
7406
7407 /* Set up lpfc PCI-device group */
7408 phba->pci_dev_grp = dev_grp;
7409
7410 /* The LPFC_PCI_DEV_OC uses SLI4 */
7411 if (dev_grp == LPFC_PCI_DEV_OC)
7412 phba->sli_rev = LPFC_SLI_REV4;
7413
7414 /* Set up device INIT API function jump table */
7415 rc = lpfc_init_api_table_setup(phba, dev_grp);
7416 if (rc)
7417 return -ENODEV;
7418 /* Set up SCSI API function jump table */
7419 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
7420 if (rc)
7421 return -ENODEV;
7422 /* Set up SLI API function jump table */
7423 rc = lpfc_sli_api_table_setup(phba, dev_grp);
7424 if (rc)
7425 return -ENODEV;
7426 /* Set up MBOX API function jump table */
7427 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
7428 if (rc)
7429 return -ENODEV;
7430
7431 return 0;
7432 }
7433
7434 /**
7435 * lpfc_log_intr_mode - Log the active interrupt mode
7436 * @phba: pointer to lpfc hba data structure.
7437 * @intr_mode: active interrupt mode adopted.
7438 *
7439 * This routine it invoked to log the currently used active interrupt mode
7440 * to the device.
7441 **/
lpfc_log_intr_mode(struct lpfc_hba * phba,uint32_t intr_mode)7442 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
7443 {
7444 switch (intr_mode) {
7445 case 0:
7446 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7447 "0470 Enable INTx interrupt mode.\n");
7448 break;
7449 case 1:
7450 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7451 "0481 Enabled MSI interrupt mode.\n");
7452 break;
7453 case 2:
7454 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7455 "0480 Enabled MSI-X interrupt mode.\n");
7456 break;
7457 default:
7458 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7459 "0482 Illegal interrupt mode.\n");
7460 break;
7461 }
7462 return;
7463 }
7464
7465 /**
7466 * lpfc_enable_pci_dev - Enable a generic PCI device.
7467 * @phba: pointer to lpfc hba data structure.
7468 *
7469 * This routine is invoked to enable the PCI device that is common to all
7470 * PCI devices.
7471 *
7472 * Return codes
7473 * 0 - successful
7474 * other values - error
7475 **/
7476 static int
lpfc_enable_pci_dev(struct lpfc_hba * phba)7477 lpfc_enable_pci_dev(struct lpfc_hba *phba)
7478 {
7479 struct pci_dev *pdev;
7480
7481 /* Obtain PCI device reference */
7482 if (!phba->pcidev)
7483 goto out_error;
7484 else
7485 pdev = phba->pcidev;
7486 /* Enable PCI device */
7487 if (pci_enable_device_mem(pdev))
7488 goto out_error;
7489 /* Request PCI resource for the device */
7490 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
7491 goto out_disable_device;
7492 /* Set up device as PCI master and save state for EEH */
7493 pci_set_master(pdev);
7494 pci_try_set_mwi(pdev);
7495 pci_save_state(pdev);
7496
7497 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
7498 if (pci_is_pcie(pdev))
7499 pdev->needs_freset = 1;
7500
7501 return 0;
7502
7503 out_disable_device:
7504 pci_disable_device(pdev);
7505 out_error:
7506 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7507 "1401 Failed to enable pci device\n");
7508 return -ENODEV;
7509 }
7510
7511 /**
7512 * lpfc_disable_pci_dev - Disable a generic PCI device.
7513 * @phba: pointer to lpfc hba data structure.
7514 *
7515 * This routine is invoked to disable the PCI device that is common to all
7516 * PCI devices.
7517 **/
7518 static void
lpfc_disable_pci_dev(struct lpfc_hba * phba)7519 lpfc_disable_pci_dev(struct lpfc_hba *phba)
7520 {
7521 struct pci_dev *pdev;
7522
7523 /* Obtain PCI device reference */
7524 if (!phba->pcidev)
7525 return;
7526 else
7527 pdev = phba->pcidev;
7528 /* Release PCI resource and disable PCI device */
7529 pci_release_mem_regions(pdev);
7530 pci_disable_device(pdev);
7531
7532 return;
7533 }
7534
7535 /**
7536 * lpfc_reset_hba - Reset a hba
7537 * @phba: pointer to lpfc hba data structure.
7538 *
7539 * This routine is invoked to reset a hba device. It brings the HBA
7540 * offline, performs a board restart, and then brings the board back
7541 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
7542 * on outstanding mailbox commands.
7543 **/
7544 void
lpfc_reset_hba(struct lpfc_hba * phba)7545 lpfc_reset_hba(struct lpfc_hba *phba)
7546 {
7547 int rc = 0;
7548
7549 /* If resets are disabled then set error state and return. */
7550 if (!phba->cfg_enable_hba_reset) {
7551 phba->link_state = LPFC_HBA_ERROR;
7552 return;
7553 }
7554
7555 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */
7556 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) {
7557 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
7558 } else {
7559 if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) {
7560 /* Perform a PCI function reset to start from clean */
7561 rc = lpfc_pci_function_reset(phba);
7562 lpfc_els_flush_all_cmd(phba);
7563 }
7564 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
7565 lpfc_sli_flush_io_rings(phba);
7566 }
7567 lpfc_offline(phba);
7568 clear_bit(MBX_TMO_ERR, &phba->bit_flags);
7569 if (unlikely(rc)) {
7570 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7571 "8888 PCI function reset failed rc %x\n",
7572 rc);
7573 } else {
7574 lpfc_sli_brdrestart(phba);
7575 lpfc_online(phba);
7576 lpfc_unblock_mgmt_io(phba);
7577 }
7578 }
7579
7580 /**
7581 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
7582 * @phba: pointer to lpfc hba data structure.
7583 *
7584 * This function enables the PCI SR-IOV virtual functions to a physical
7585 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7586 * enable the number of virtual functions to the physical function. As
7587 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7588 * API call does not considered as an error condition for most of the device.
7589 **/
7590 uint16_t
lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba * phba)7591 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
7592 {
7593 struct pci_dev *pdev = phba->pcidev;
7594 uint16_t nr_virtfn;
7595 int pos;
7596
7597 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
7598 if (pos == 0)
7599 return 0;
7600
7601 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
7602 return nr_virtfn;
7603 }
7604
7605 /**
7606 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
7607 * @phba: pointer to lpfc hba data structure.
7608 * @nr_vfn: number of virtual functions to be enabled.
7609 *
7610 * This function enables the PCI SR-IOV virtual functions to a physical
7611 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7612 * enable the number of virtual functions to the physical function. As
7613 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7614 * API call does not considered as an error condition for most of the device.
7615 **/
7616 int
lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba * phba,int nr_vfn)7617 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
7618 {
7619 struct pci_dev *pdev = phba->pcidev;
7620 uint16_t max_nr_vfn;
7621 int rc;
7622
7623 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
7624 if (nr_vfn > max_nr_vfn) {
7625 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7626 "3057 Requested vfs (%d) greater than "
7627 "supported vfs (%d)", nr_vfn, max_nr_vfn);
7628 return -EINVAL;
7629 }
7630
7631 rc = pci_enable_sriov(pdev, nr_vfn);
7632 if (rc) {
7633 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7634 "2806 Failed to enable sriov on this device "
7635 "with vfn number nr_vf:%d, rc:%d\n",
7636 nr_vfn, rc);
7637 } else
7638 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7639 "2807 Successful enable sriov on this device "
7640 "with vfn number nr_vf:%d\n", nr_vfn);
7641 return rc;
7642 }
7643
7644 static void
lpfc_unblock_requests_work(struct work_struct * work)7645 lpfc_unblock_requests_work(struct work_struct *work)
7646 {
7647 struct lpfc_hba *phba = container_of(work, struct lpfc_hba,
7648 unblock_request_work);
7649
7650 lpfc_unblock_requests(phba);
7651 }
7652
7653 /**
7654 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
7655 * @phba: pointer to lpfc hba data structure.
7656 *
7657 * This routine is invoked to set up the driver internal resources before the
7658 * device specific resource setup to support the HBA device it attached to.
7659 *
7660 * Return codes
7661 * 0 - successful
7662 * other values - error
7663 **/
7664 static int
lpfc_setup_driver_resource_phase1(struct lpfc_hba * phba)7665 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
7666 {
7667 struct lpfc_sli *psli = &phba->sli;
7668
7669 /*
7670 * Driver resources common to all SLI revisions
7671 */
7672 atomic_set(&phba->fast_event_count, 0);
7673 atomic_set(&phba->dbg_log_idx, 0);
7674 atomic_set(&phba->dbg_log_cnt, 0);
7675 atomic_set(&phba->dbg_log_dmping, 0);
7676 spin_lock_init(&phba->hbalock);
7677
7678 /* Initialize port_list spinlock */
7679 spin_lock_init(&phba->port_list_lock);
7680 INIT_LIST_HEAD(&phba->port_list);
7681
7682 INIT_LIST_HEAD(&phba->work_list);
7683
7684 /* Initialize the wait queue head for the kernel thread */
7685 init_waitqueue_head(&phba->work_waitq);
7686
7687 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7688 "1403 Protocols supported %s %s %s\n",
7689 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
7690 "SCSI" : " "),
7691 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
7692 "NVME" : " "),
7693 (phba->nvmet_support ? "NVMET" : " "));
7694
7695 /* ras_fwlog state */
7696 spin_lock_init(&phba->ras_fwlog_lock);
7697
7698 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
7699 spin_lock_init(&phba->scsi_buf_list_get_lock);
7700 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
7701 spin_lock_init(&phba->scsi_buf_list_put_lock);
7702 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
7703
7704 /* Initialize the fabric iocb list */
7705 INIT_LIST_HEAD(&phba->fabric_iocb_list);
7706
7707 /* Initialize list to save ELS buffers */
7708 INIT_LIST_HEAD(&phba->elsbuf);
7709
7710 /* Initialize FCF connection rec list */
7711 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
7712
7713 /* Initialize OAS configuration list */
7714 spin_lock_init(&phba->devicelock);
7715 INIT_LIST_HEAD(&phba->luns);
7716
7717 /* MBOX heartbeat timer */
7718 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
7719 /* Fabric block timer */
7720 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
7721 /* EA polling mode timer */
7722 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
7723 /* Heartbeat timer */
7724 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
7725
7726 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
7727
7728 INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
7729 lpfc_idle_stat_delay_work);
7730 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work);
7731 return 0;
7732 }
7733
7734 /**
7735 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
7736 * @phba: pointer to lpfc hba data structure.
7737 *
7738 * This routine is invoked to set up the driver internal resources specific to
7739 * support the SLI-3 HBA device it attached to.
7740 *
7741 * Return codes
7742 * 0 - successful
7743 * other values - error
7744 **/
7745 static int
lpfc_sli_driver_resource_setup(struct lpfc_hba * phba)7746 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
7747 {
7748 int rc, entry_sz;
7749
7750 /*
7751 * Initialize timers used by driver
7752 */
7753
7754 /* FCP polling mode timer */
7755 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
7756
7757 /* Host attention work mask setup */
7758 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
7759 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
7760
7761 /* Get all the module params for configuring this host */
7762 lpfc_get_cfgparam(phba);
7763 /* Set up phase-1 common device driver resources */
7764
7765 rc = lpfc_setup_driver_resource_phase1(phba);
7766 if (rc)
7767 return -ENODEV;
7768
7769 if (!phba->sli.sli3_ring)
7770 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
7771 sizeof(struct lpfc_sli_ring),
7772 GFP_KERNEL);
7773 if (!phba->sli.sli3_ring)
7774 return -ENOMEM;
7775
7776 /*
7777 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
7778 * used to create the sg_dma_buf_pool must be dynamically calculated.
7779 */
7780
7781 if (phba->sli_rev == LPFC_SLI_REV4)
7782 entry_sz = sizeof(struct sli4_sge);
7783 else
7784 entry_sz = sizeof(struct ulp_bde64);
7785
7786 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
7787 if (phba->cfg_enable_bg) {
7788 /*
7789 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
7790 * the FCP rsp, and a BDE for each. Sice we have no control
7791 * over how many protection data segments the SCSI Layer
7792 * will hand us (ie: there could be one for every block
7793 * in the IO), we just allocate enough BDEs to accomidate
7794 * our max amount and we need to limit lpfc_sg_seg_cnt to
7795 * minimize the risk of running out.
7796 */
7797 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7798 sizeof(struct fcp_rsp) +
7799 (LPFC_MAX_SG_SEG_CNT * entry_sz);
7800
7801 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
7802 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
7803
7804 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
7805 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
7806 } else {
7807 /*
7808 * The scsi_buf for a regular I/O will hold the FCP cmnd,
7809 * the FCP rsp, a BDE for each, and a BDE for up to
7810 * cfg_sg_seg_cnt data segments.
7811 */
7812 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7813 sizeof(struct fcp_rsp) +
7814 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
7815
7816 /* Total BDEs in BPL for scsi_sg_list */
7817 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
7818 }
7819
7820 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
7821 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
7822 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
7823 phba->cfg_total_seg_cnt);
7824
7825 phba->max_vpi = LPFC_MAX_VPI;
7826 /* This will be set to correct value after config_port mbox */
7827 phba->max_vports = 0;
7828
7829 /*
7830 * Initialize the SLI Layer to run with lpfc HBAs.
7831 */
7832 lpfc_sli_setup(phba);
7833 lpfc_sli_queue_init(phba);
7834
7835 /* Allocate device driver memory */
7836 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
7837 return -ENOMEM;
7838
7839 phba->lpfc_sg_dma_buf_pool =
7840 dma_pool_create("lpfc_sg_dma_buf_pool",
7841 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
7842 BPL_ALIGN_SZ, 0);
7843
7844 if (!phba->lpfc_sg_dma_buf_pool)
7845 goto fail_free_mem;
7846
7847 phba->lpfc_cmd_rsp_buf_pool =
7848 dma_pool_create("lpfc_cmd_rsp_buf_pool",
7849 &phba->pcidev->dev,
7850 sizeof(struct fcp_cmnd) +
7851 sizeof(struct fcp_rsp),
7852 BPL_ALIGN_SZ, 0);
7853
7854 if (!phba->lpfc_cmd_rsp_buf_pool)
7855 goto fail_free_dma_buf_pool;
7856
7857 /*
7858 * Enable sr-iov virtual functions if supported and configured
7859 * through the module parameter.
7860 */
7861 if (phba->cfg_sriov_nr_virtfn > 0) {
7862 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
7863 phba->cfg_sriov_nr_virtfn);
7864 if (rc) {
7865 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7866 "2808 Requested number of SR-IOV "
7867 "virtual functions (%d) is not "
7868 "supported\n",
7869 phba->cfg_sriov_nr_virtfn);
7870 phba->cfg_sriov_nr_virtfn = 0;
7871 }
7872 }
7873
7874 return 0;
7875
7876 fail_free_dma_buf_pool:
7877 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
7878 phba->lpfc_sg_dma_buf_pool = NULL;
7879 fail_free_mem:
7880 lpfc_mem_free(phba);
7881 return -ENOMEM;
7882 }
7883
7884 /**
7885 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
7886 * @phba: pointer to lpfc hba data structure.
7887 *
7888 * This routine is invoked to unset the driver internal resources set up
7889 * specific for supporting the SLI-3 HBA device it attached to.
7890 **/
7891 static void
lpfc_sli_driver_resource_unset(struct lpfc_hba * phba)7892 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
7893 {
7894 /* Free device driver memory allocated */
7895 lpfc_mem_free_all(phba);
7896
7897 return;
7898 }
7899
7900 /**
7901 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
7902 * @phba: pointer to lpfc hba data structure.
7903 *
7904 * This routine is invoked to set up the driver internal resources specific to
7905 * support the SLI-4 HBA device it attached to.
7906 *
7907 * Return codes
7908 * 0 - successful
7909 * other values - error
7910 **/
7911 static int
lpfc_sli4_driver_resource_setup(struct lpfc_hba * phba)7912 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
7913 {
7914 LPFC_MBOXQ_t *mboxq;
7915 MAILBOX_t *mb;
7916 int rc, i, max_buf_size;
7917 int longs;
7918 int extra;
7919 uint64_t wwn;
7920 u32 if_type;
7921 u32 if_fam;
7922
7923 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7924 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7925 phba->sli4_hba.curr_disp_cpu = 0;
7926
7927 /* Get all the module params for configuring this host */
7928 lpfc_get_cfgparam(phba);
7929
7930 /* Set up phase-1 common device driver resources */
7931 rc = lpfc_setup_driver_resource_phase1(phba);
7932 if (rc)
7933 return -ENODEV;
7934
7935 /* Before proceed, wait for POST done and device ready */
7936 rc = lpfc_sli4_post_status_check(phba);
7937 if (rc)
7938 return -ENODEV;
7939
7940 /* Allocate all driver workqueues here */
7941
7942 /* The lpfc_wq workqueue for deferred irq use */
7943 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
7944 if (!phba->wq)
7945 return -ENOMEM;
7946
7947 /*
7948 * Initialize timers used by driver
7949 */
7950
7951 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
7952
7953 /* FCF rediscover timer */
7954 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
7955
7956 /* CMF congestion timer */
7957 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7958 phba->cmf_timer.function = lpfc_cmf_timer;
7959 /* CMF 1 minute stats collection timer */
7960 hrtimer_init(&phba->cmf_stats_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7961 phba->cmf_stats_timer.function = lpfc_cmf_stats_timer;
7962
7963 /*
7964 * Control structure for handling external multi-buffer mailbox
7965 * command pass-through.
7966 */
7967 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
7968 sizeof(struct lpfc_mbox_ext_buf_ctx));
7969 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
7970
7971 phba->max_vpi = LPFC_MAX_VPI;
7972
7973 /* This will be set to correct value after the read_config mbox */
7974 phba->max_vports = 0;
7975
7976 /* Program the default value of vlan_id and fc_map */
7977 phba->valid_vlan = 0;
7978 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
7979 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
7980 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
7981
7982 /*
7983 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
7984 * we will associate a new ring, for each EQ/CQ/WQ tuple.
7985 * The WQ create will allocate the ring.
7986 */
7987
7988 /* Initialize buffer queue management fields */
7989 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
7990 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
7991 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
7992
7993 /* for VMID idle timeout if VMID is enabled */
7994 if (lpfc_is_vmid_enabled(phba))
7995 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0);
7996
7997 /*
7998 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
7999 */
8000 /* Initialize the Abort buffer list used by driver */
8001 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
8002 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8003
8004 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8005 /* Initialize the Abort nvme buffer list used by driver */
8006 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8007 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8008 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8009 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8010 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8011 }
8012
8013 /* This abort list used by worker thread */
8014 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8015 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8016 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8017 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8018
8019 /*
8020 * Initialize driver internal slow-path work queues
8021 */
8022
8023 /* Driver internel slow-path CQ Event pool */
8024 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8025 /* Response IOCB work queue list */
8026 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8027 /* Asynchronous event CQ Event work queue list */
8028 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8029 /* Slow-path XRI aborted CQ Event work queue list */
8030 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8031 /* Receive queue CQ Event work queue list */
8032 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8033
8034 /* Initialize extent block lists. */
8035 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8036 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8037 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8038 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
8039
8040 /* Initialize mboxq lists. If the early init routines fail
8041 * these lists need to be correctly initialized.
8042 */
8043 INIT_LIST_HEAD(&phba->sli.mboxq);
8044 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
8045
8046 /* initialize optic_state to 0xFF */
8047 phba->sli4_hba.lnk_info.optic_state = 0xff;
8048
8049 /* Allocate device driver memory */
8050 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
8051 if (rc)
8052 goto out_destroy_workqueue;
8053
8054 /* IF Type 2 ports get initialized now. */
8055 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8056 LPFC_SLI_INTF_IF_TYPE_2) {
8057 rc = lpfc_pci_function_reset(phba);
8058 if (unlikely(rc)) {
8059 rc = -ENODEV;
8060 goto out_free_mem;
8061 }
8062 phba->temp_sensor_support = 1;
8063 }
8064
8065 /* Create the bootstrap mailbox command */
8066 rc = lpfc_create_bootstrap_mbox(phba);
8067 if (unlikely(rc))
8068 goto out_free_mem;
8069
8070 /* Set up the host's endian order with the device. */
8071 rc = lpfc_setup_endian_order(phba);
8072 if (unlikely(rc))
8073 goto out_free_bsmbx;
8074
8075 /* Set up the hba's configuration parameters. */
8076 rc = lpfc_sli4_read_config(phba);
8077 if (unlikely(rc))
8078 goto out_free_bsmbx;
8079
8080 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8081 /* Right now the link is down, if FA-PWWN is configured the
8082 * firmware will try FLOGI before the driver gets a link up.
8083 * If it fails, the driver should get a MISCONFIGURED async
8084 * event which will clear this flag. The only notification
8085 * the driver gets is if it fails, if it succeeds there is no
8086 * notification given. Assume success.
8087 */
8088 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8089 }
8090
8091 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
8092 if (unlikely(rc))
8093 goto out_free_bsmbx;
8094
8095 /* IF Type 0 ports get initialized now. */
8096 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8097 LPFC_SLI_INTF_IF_TYPE_0) {
8098 rc = lpfc_pci_function_reset(phba);
8099 if (unlikely(rc))
8100 goto out_free_bsmbx;
8101 }
8102
8103 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8104 GFP_KERNEL);
8105 if (!mboxq) {
8106 rc = -ENOMEM;
8107 goto out_free_bsmbx;
8108 }
8109
8110 /* Check for NVMET being configured */
8111 phba->nvmet_support = 0;
8112 if (lpfc_enable_nvmet_cnt) {
8113
8114 /* First get WWN of HBA instance */
8115 lpfc_read_nv(phba, mboxq);
8116 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8117 if (rc != MBX_SUCCESS) {
8118 lpfc_printf_log(phba, KERN_ERR,
8119 LOG_TRACE_EVENT,
8120 "6016 Mailbox failed , mbxCmd x%x "
8121 "READ_NV, mbxStatus x%x\n",
8122 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
8123 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
8124 mempool_free(mboxq, phba->mbox_mem_pool);
8125 rc = -EIO;
8126 goto out_free_bsmbx;
8127 }
8128 mb = &mboxq->u.mb;
8129 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
8130 sizeof(uint64_t));
8131 wwn = cpu_to_be64(wwn);
8132 phba->sli4_hba.wwnn.u.name = wwn;
8133 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
8134 sizeof(uint64_t));
8135 /* wwn is WWPN of HBA instance */
8136 wwn = cpu_to_be64(wwn);
8137 phba->sli4_hba.wwpn.u.name = wwn;
8138
8139 /* Check to see if it matches any module parameter */
8140 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
8141 if (wwn == lpfc_enable_nvmet[i]) {
8142 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
8143 if (lpfc_nvmet_mem_alloc(phba))
8144 break;
8145
8146 phba->nvmet_support = 1; /* a match */
8147
8148 lpfc_printf_log(phba, KERN_ERR,
8149 LOG_TRACE_EVENT,
8150 "6017 NVME Target %016llx\n",
8151 wwn);
8152 #else
8153 lpfc_printf_log(phba, KERN_ERR,
8154 LOG_TRACE_EVENT,
8155 "6021 Can't enable NVME Target."
8156 " NVME_TARGET_FC infrastructure"
8157 " is not in kernel\n");
8158 #endif
8159 /* Not supported for NVMET */
8160 phba->cfg_xri_rebalancing = 0;
8161 if (phba->irq_chann_mode == NHT_MODE) {
8162 phba->cfg_irq_chann =
8163 phba->sli4_hba.num_present_cpu;
8164 phba->cfg_hdw_queue =
8165 phba->sli4_hba.num_present_cpu;
8166 phba->irq_chann_mode = NORMAL_MODE;
8167 }
8168 break;
8169 }
8170 }
8171 }
8172
8173 lpfc_nvme_mod_param_dep(phba);
8174
8175 /*
8176 * Get sli4 parameters that override parameters from Port capabilities.
8177 * If this call fails, it isn't critical unless the SLI4 parameters come
8178 * back in conflict.
8179 */
8180 rc = lpfc_get_sli4_parameters(phba, mboxq);
8181 if (rc) {
8182 if_type = bf_get(lpfc_sli_intf_if_type,
8183 &phba->sli4_hba.sli_intf);
8184 if_fam = bf_get(lpfc_sli_intf_sli_family,
8185 &phba->sli4_hba.sli_intf);
8186 if (phba->sli4_hba.extents_in_use &&
8187 phba->sli4_hba.rpi_hdrs_in_use) {
8188 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8189 "2999 Unsupported SLI4 Parameters "
8190 "Extents and RPI headers enabled.\n");
8191 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
8192 if_fam == LPFC_SLI_INTF_FAMILY_BE2) {
8193 mempool_free(mboxq, phba->mbox_mem_pool);
8194 rc = -EIO;
8195 goto out_free_bsmbx;
8196 }
8197 }
8198 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
8199 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) {
8200 mempool_free(mboxq, phba->mbox_mem_pool);
8201 rc = -EIO;
8202 goto out_free_bsmbx;
8203 }
8204 }
8205
8206 /*
8207 * 1 for cmd, 1 for rsp, NVME adds an extra one
8208 * for boundary conditions in its max_sgl_segment template.
8209 */
8210 extra = 2;
8211 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
8212 extra++;
8213
8214 /*
8215 * It doesn't matter what family our adapter is in, we are
8216 * limited to 2 Pages, 512 SGEs, for our SGL.
8217 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
8218 */
8219 max_buf_size = (2 * SLI4_PAGE_SIZE);
8220
8221 /*
8222 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
8223 * used to create the sg_dma_buf_pool must be calculated.
8224 */
8225 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
8226 /* Both cfg_enable_bg and cfg_external_dif code paths */
8227
8228 /*
8229 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
8230 * the FCP rsp, and a SGE. Sice we have no control
8231 * over how many protection segments the SCSI Layer
8232 * will hand us (ie: there could be one for every block
8233 * in the IO), just allocate enough SGEs to accomidate
8234 * our max amount and we need to limit lpfc_sg_seg_cnt
8235 * to minimize the risk of running out.
8236 */
8237 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8238 sizeof(struct fcp_rsp) + max_buf_size;
8239
8240 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
8241 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
8242
8243 /*
8244 * If supporting DIF, reduce the seg count for scsi to
8245 * allow room for the DIF sges.
8246 */
8247 if (phba->cfg_enable_bg &&
8248 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
8249 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
8250 else
8251 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8252
8253 } else {
8254 /*
8255 * The scsi_buf for a regular I/O holds the FCP cmnd,
8256 * the FCP rsp, a SGE for each, and a SGE for up to
8257 * cfg_sg_seg_cnt data segments.
8258 */
8259 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8260 sizeof(struct fcp_rsp) +
8261 ((phba->cfg_sg_seg_cnt + extra) *
8262 sizeof(struct sli4_sge));
8263
8264 /* Total SGEs for scsi_sg_list */
8265 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
8266 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8267
8268 /*
8269 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
8270 * need to post 1 page for the SGL.
8271 */
8272 }
8273
8274 if (phba->cfg_xpsgl && !phba->nvmet_support)
8275 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
8276 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
8277 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
8278 else
8279 phba->cfg_sg_dma_buf_size =
8280 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
8281
8282 phba->border_sge_num = phba->cfg_sg_dma_buf_size /
8283 sizeof(struct sli4_sge);
8284
8285 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
8286 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8287 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
8288 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
8289 "6300 Reducing NVME sg segment "
8290 "cnt to %d\n",
8291 LPFC_MAX_NVME_SEG_CNT);
8292 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
8293 } else
8294 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
8295 }
8296
8297 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
8298 "9087 sg_seg_cnt:%d dmabuf_size:%d "
8299 "total:%d scsi:%d nvme:%d\n",
8300 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
8301 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
8302 phba->cfg_nvme_seg_cnt);
8303
8304 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE)
8305 i = phba->cfg_sg_dma_buf_size;
8306 else
8307 i = SLI4_PAGE_SIZE;
8308
8309 phba->lpfc_sg_dma_buf_pool =
8310 dma_pool_create("lpfc_sg_dma_buf_pool",
8311 &phba->pcidev->dev,
8312 phba->cfg_sg_dma_buf_size,
8313 i, 0);
8314 if (!phba->lpfc_sg_dma_buf_pool) {
8315 rc = -ENOMEM;
8316 goto out_free_bsmbx;
8317 }
8318
8319 phba->lpfc_cmd_rsp_buf_pool =
8320 dma_pool_create("lpfc_cmd_rsp_buf_pool",
8321 &phba->pcidev->dev,
8322 sizeof(struct fcp_cmnd32) +
8323 sizeof(struct fcp_rsp),
8324 i, 0);
8325 if (!phba->lpfc_cmd_rsp_buf_pool) {
8326 rc = -ENOMEM;
8327 goto out_free_sg_dma_buf;
8328 }
8329
8330 mempool_free(mboxq, phba->mbox_mem_pool);
8331
8332 /* Verify OAS is supported */
8333 lpfc_sli4_oas_verify(phba);
8334
8335 /* Verify RAS support on adapter */
8336 lpfc_sli4_ras_init(phba);
8337
8338 /* Verify all the SLI4 queues */
8339 rc = lpfc_sli4_queue_verify(phba);
8340 if (rc)
8341 goto out_free_cmd_rsp_buf;
8342
8343 /* Create driver internal CQE event pool */
8344 rc = lpfc_sli4_cq_event_pool_create(phba);
8345 if (rc)
8346 goto out_free_cmd_rsp_buf;
8347
8348 /* Initialize sgl lists per host */
8349 lpfc_init_sgl_list(phba);
8350
8351 /* Allocate and initialize active sgl array */
8352 rc = lpfc_init_active_sgl_array(phba);
8353 if (rc) {
8354 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8355 "1430 Failed to initialize sgl list.\n");
8356 goto out_destroy_cq_event_pool;
8357 }
8358 rc = lpfc_sli4_init_rpi_hdrs(phba);
8359 if (rc) {
8360 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8361 "1432 Failed to initialize rpi headers.\n");
8362 goto out_free_active_sgl;
8363 }
8364
8365 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
8366 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
8367 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
8368 GFP_KERNEL);
8369 if (!phba->fcf.fcf_rr_bmask) {
8370 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8371 "2759 Failed allocate memory for FCF round "
8372 "robin failover bmask\n");
8373 rc = -ENOMEM;
8374 goto out_remove_rpi_hdrs;
8375 }
8376
8377 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
8378 sizeof(struct lpfc_hba_eq_hdl),
8379 GFP_KERNEL);
8380 if (!phba->sli4_hba.hba_eq_hdl) {
8381 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8382 "2572 Failed allocate memory for "
8383 "fast-path per-EQ handle array\n");
8384 rc = -ENOMEM;
8385 goto out_free_fcf_rr_bmask;
8386 }
8387
8388 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
8389 sizeof(struct lpfc_vector_map_info),
8390 GFP_KERNEL);
8391 if (!phba->sli4_hba.cpu_map) {
8392 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8393 "3327 Failed allocate memory for msi-x "
8394 "interrupt vector mapping\n");
8395 rc = -ENOMEM;
8396 goto out_free_hba_eq_hdl;
8397 }
8398
8399 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8400 if (!phba->sli4_hba.eq_info) {
8401 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8402 "3321 Failed allocation for per_cpu stats\n");
8403 rc = -ENOMEM;
8404 goto out_free_hba_cpu_map;
8405 }
8406
8407 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
8408 sizeof(*phba->sli4_hba.idle_stat),
8409 GFP_KERNEL);
8410 if (!phba->sli4_hba.idle_stat) {
8411 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8412 "3390 Failed allocation for idle_stat\n");
8413 rc = -ENOMEM;
8414 goto out_free_hba_eq_info;
8415 }
8416
8417 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8418 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8419 if (!phba->sli4_hba.c_stat) {
8420 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8421 "3332 Failed allocating per cpu hdwq stats\n");
8422 rc = -ENOMEM;
8423 goto out_free_hba_idle_stat;
8424 }
8425 #endif
8426
8427 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat);
8428 if (!phba->cmf_stat) {
8429 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8430 "3331 Failed allocating per cpu cgn stats\n");
8431 rc = -ENOMEM;
8432 goto out_free_hba_hdwq_info;
8433 }
8434
8435 /*
8436 * Enable sr-iov virtual functions if supported and configured
8437 * through the module parameter.
8438 */
8439 if (phba->cfg_sriov_nr_virtfn > 0) {
8440 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
8441 phba->cfg_sriov_nr_virtfn);
8442 if (rc) {
8443 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8444 "3020 Requested number of SR-IOV "
8445 "virtual functions (%d) is not "
8446 "supported\n",
8447 phba->cfg_sriov_nr_virtfn);
8448 phba->cfg_sriov_nr_virtfn = 0;
8449 }
8450 }
8451
8452 return 0;
8453
8454 out_free_hba_hdwq_info:
8455 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8456 free_percpu(phba->sli4_hba.c_stat);
8457 out_free_hba_idle_stat:
8458 #endif
8459 kfree(phba->sli4_hba.idle_stat);
8460 out_free_hba_eq_info:
8461 free_percpu(phba->sli4_hba.eq_info);
8462 out_free_hba_cpu_map:
8463 kfree(phba->sli4_hba.cpu_map);
8464 out_free_hba_eq_hdl:
8465 kfree(phba->sli4_hba.hba_eq_hdl);
8466 out_free_fcf_rr_bmask:
8467 kfree(phba->fcf.fcf_rr_bmask);
8468 out_remove_rpi_hdrs:
8469 lpfc_sli4_remove_rpi_hdrs(phba);
8470 out_free_active_sgl:
8471 lpfc_free_active_sgl(phba);
8472 out_destroy_cq_event_pool:
8473 lpfc_sli4_cq_event_pool_destroy(phba);
8474 out_free_cmd_rsp_buf:
8475 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
8476 phba->lpfc_cmd_rsp_buf_pool = NULL;
8477 out_free_sg_dma_buf:
8478 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
8479 phba->lpfc_sg_dma_buf_pool = NULL;
8480 out_free_bsmbx:
8481 lpfc_destroy_bootstrap_mbox(phba);
8482 out_free_mem:
8483 lpfc_mem_free(phba);
8484 out_destroy_workqueue:
8485 destroy_workqueue(phba->wq);
8486 phba->wq = NULL;
8487 return rc;
8488 }
8489
8490 /**
8491 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
8492 * @phba: pointer to lpfc hba data structure.
8493 *
8494 * This routine is invoked to unset the driver internal resources set up
8495 * specific for supporting the SLI-4 HBA device it attached to.
8496 **/
8497 static void
lpfc_sli4_driver_resource_unset(struct lpfc_hba * phba)8498 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
8499 {
8500 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
8501
8502 free_percpu(phba->sli4_hba.eq_info);
8503 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8504 free_percpu(phba->sli4_hba.c_stat);
8505 #endif
8506 free_percpu(phba->cmf_stat);
8507 kfree(phba->sli4_hba.idle_stat);
8508
8509 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
8510 kfree(phba->sli4_hba.cpu_map);
8511 phba->sli4_hba.num_possible_cpu = 0;
8512 phba->sli4_hba.num_present_cpu = 0;
8513 phba->sli4_hba.curr_disp_cpu = 0;
8514 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8515
8516 /* Free memory allocated for fast-path work queue handles */
8517 kfree(phba->sli4_hba.hba_eq_hdl);
8518
8519 /* Free the allocated rpi headers. */
8520 lpfc_sli4_remove_rpi_hdrs(phba);
8521 lpfc_sli4_remove_rpis(phba);
8522
8523 /* Free eligible FCF index bmask */
8524 kfree(phba->fcf.fcf_rr_bmask);
8525
8526 /* Free the ELS sgl list */
8527 lpfc_free_active_sgl(phba);
8528 lpfc_free_els_sgl_list(phba);
8529 lpfc_free_nvmet_sgl_list(phba);
8530
8531 /* Free the completion queue EQ event pool */
8532 lpfc_sli4_cq_event_release_all(phba);
8533 lpfc_sli4_cq_event_pool_destroy(phba);
8534
8535 /* Release resource identifiers. */
8536 lpfc_sli4_dealloc_resource_identifiers(phba);
8537
8538 /* Free the bsmbx region. */
8539 lpfc_destroy_bootstrap_mbox(phba);
8540
8541 /* Free the SLI Layer memory with SLI4 HBAs */
8542 lpfc_mem_free_all(phba);
8543
8544 /* Free the current connect table */
8545 list_for_each_entry_safe(conn_entry, next_conn_entry,
8546 &phba->fcf_conn_rec_list, list) {
8547 list_del_init(&conn_entry->list);
8548 kfree(conn_entry);
8549 }
8550
8551 return;
8552 }
8553
8554 /**
8555 * lpfc_init_api_table_setup - Set up init api function jump table
8556 * @phba: The hba struct for which this call is being executed.
8557 * @dev_grp: The HBA PCI-Device group number.
8558 *
8559 * This routine sets up the device INIT interface API function jump table
8560 * in @phba struct.
8561 *
8562 * Returns: 0 - success, -ENODEV - failure.
8563 **/
8564 int
lpfc_init_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)8565 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8566 {
8567 phba->lpfc_hba_init_link = lpfc_hba_init_link;
8568 phba->lpfc_hba_down_link = lpfc_hba_down_link;
8569 phba->lpfc_selective_reset = lpfc_selective_reset;
8570 switch (dev_grp) {
8571 case LPFC_PCI_DEV_LP:
8572 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
8573 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
8574 phba->lpfc_stop_port = lpfc_stop_port_s3;
8575 break;
8576 case LPFC_PCI_DEV_OC:
8577 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
8578 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
8579 phba->lpfc_stop_port = lpfc_stop_port_s4;
8580 break;
8581 default:
8582 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8583 "1431 Invalid HBA PCI-device group: 0x%x\n",
8584 dev_grp);
8585 return -ENODEV;
8586 }
8587 return 0;
8588 }
8589
8590 /**
8591 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
8592 * @phba: pointer to lpfc hba data structure.
8593 *
8594 * This routine is invoked to set up the driver internal resources after the
8595 * device specific resource setup to support the HBA device it attached to.
8596 *
8597 * Return codes
8598 * 0 - successful
8599 * other values - error
8600 **/
8601 static int
lpfc_setup_driver_resource_phase2(struct lpfc_hba * phba)8602 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
8603 {
8604 int error;
8605
8606 /* Startup the kernel thread for this host adapter. */
8607 phba->worker_thread = kthread_run(lpfc_do_work, phba,
8608 "lpfc_worker_%d", phba->brd_no);
8609 if (IS_ERR(phba->worker_thread)) {
8610 error = PTR_ERR(phba->worker_thread);
8611 return error;
8612 }
8613
8614 return 0;
8615 }
8616
8617 /**
8618 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
8619 * @phba: pointer to lpfc hba data structure.
8620 *
8621 * This routine is invoked to unset the driver internal resources set up after
8622 * the device specific resource setup for supporting the HBA device it
8623 * attached to.
8624 **/
8625 static void
lpfc_unset_driver_resource_phase2(struct lpfc_hba * phba)8626 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
8627 {
8628 if (phba->wq) {
8629 destroy_workqueue(phba->wq);
8630 phba->wq = NULL;
8631 }
8632
8633 /* Stop kernel worker thread */
8634 if (phba->worker_thread)
8635 kthread_stop(phba->worker_thread);
8636 }
8637
8638 /**
8639 * lpfc_free_iocb_list - Free iocb list.
8640 * @phba: pointer to lpfc hba data structure.
8641 *
8642 * This routine is invoked to free the driver's IOCB list and memory.
8643 **/
8644 void
lpfc_free_iocb_list(struct lpfc_hba * phba)8645 lpfc_free_iocb_list(struct lpfc_hba *phba)
8646 {
8647 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
8648
8649 spin_lock_irq(&phba->hbalock);
8650 list_for_each_entry_safe(iocbq_entry, iocbq_next,
8651 &phba->lpfc_iocb_list, list) {
8652 list_del(&iocbq_entry->list);
8653 kfree(iocbq_entry);
8654 phba->total_iocbq_bufs--;
8655 }
8656 spin_unlock_irq(&phba->hbalock);
8657
8658 return;
8659 }
8660
8661 /**
8662 * lpfc_init_iocb_list - Allocate and initialize iocb list.
8663 * @phba: pointer to lpfc hba data structure.
8664 * @iocb_count: number of requested iocbs
8665 *
8666 * This routine is invoked to allocate and initizlize the driver's IOCB
8667 * list and set up the IOCB tag array accordingly.
8668 *
8669 * Return codes
8670 * 0 - successful
8671 * other values - error
8672 **/
8673 int
lpfc_init_iocb_list(struct lpfc_hba * phba,int iocb_count)8674 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
8675 {
8676 struct lpfc_iocbq *iocbq_entry = NULL;
8677 uint16_t iotag;
8678 int i;
8679
8680 /* Initialize and populate the iocb list per host. */
8681 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
8682 for (i = 0; i < iocb_count; i++) {
8683 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
8684 if (iocbq_entry == NULL) {
8685 printk(KERN_ERR "%s: only allocated %d iocbs of "
8686 "expected %d count. Unloading driver.\n",
8687 __func__, i, iocb_count);
8688 goto out_free_iocbq;
8689 }
8690
8691 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
8692 if (iotag == 0) {
8693 kfree(iocbq_entry);
8694 printk(KERN_ERR "%s: failed to allocate IOTAG. "
8695 "Unloading driver.\n", __func__);
8696 goto out_free_iocbq;
8697 }
8698 iocbq_entry->sli4_lxritag = NO_XRI;
8699 iocbq_entry->sli4_xritag = NO_XRI;
8700
8701 spin_lock_irq(&phba->hbalock);
8702 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
8703 phba->total_iocbq_bufs++;
8704 spin_unlock_irq(&phba->hbalock);
8705 }
8706
8707 return 0;
8708
8709 out_free_iocbq:
8710 lpfc_free_iocb_list(phba);
8711
8712 return -ENOMEM;
8713 }
8714
8715 /**
8716 * lpfc_free_sgl_list - Free a given sgl list.
8717 * @phba: pointer to lpfc hba data structure.
8718 * @sglq_list: pointer to the head of sgl list.
8719 *
8720 * This routine is invoked to free a give sgl list and memory.
8721 **/
8722 void
lpfc_free_sgl_list(struct lpfc_hba * phba,struct list_head * sglq_list)8723 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
8724 {
8725 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8726
8727 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
8728 list_del(&sglq_entry->list);
8729 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
8730 kfree(sglq_entry);
8731 }
8732 }
8733
8734 /**
8735 * lpfc_free_els_sgl_list - Free els sgl list.
8736 * @phba: pointer to lpfc hba data structure.
8737 *
8738 * This routine is invoked to free the driver's els sgl list and memory.
8739 **/
8740 static void
lpfc_free_els_sgl_list(struct lpfc_hba * phba)8741 lpfc_free_els_sgl_list(struct lpfc_hba *phba)
8742 {
8743 LIST_HEAD(sglq_list);
8744
8745 /* Retrieve all els sgls from driver list */
8746 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8747 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8748 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8749
8750 /* Now free the sgl list */
8751 lpfc_free_sgl_list(phba, &sglq_list);
8752 }
8753
8754 /**
8755 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
8756 * @phba: pointer to lpfc hba data structure.
8757 *
8758 * This routine is invoked to free the driver's nvmet sgl list and memory.
8759 **/
8760 static void
lpfc_free_nvmet_sgl_list(struct lpfc_hba * phba)8761 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
8762 {
8763 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8764 LIST_HEAD(sglq_list);
8765
8766 /* Retrieve all nvmet sgls from driver list */
8767 spin_lock_irq(&phba->hbalock);
8768 spin_lock(&phba->sli4_hba.sgl_list_lock);
8769 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8770 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8771 spin_unlock_irq(&phba->hbalock);
8772
8773 /* Now free the sgl list */
8774 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
8775 list_del(&sglq_entry->list);
8776 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
8777 kfree(sglq_entry);
8778 }
8779
8780 /* Update the nvmet_xri_cnt to reflect no current sgls.
8781 * The next initialization cycle sets the count and allocates
8782 * the sgls over again.
8783 */
8784 phba->sli4_hba.nvmet_xri_cnt = 0;
8785 }
8786
8787 /**
8788 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
8789 * @phba: pointer to lpfc hba data structure.
8790 *
8791 * This routine is invoked to allocate the driver's active sgl memory.
8792 * This array will hold the sglq_entry's for active IOs.
8793 **/
8794 static int
lpfc_init_active_sgl_array(struct lpfc_hba * phba)8795 lpfc_init_active_sgl_array(struct lpfc_hba *phba)
8796 {
8797 int size;
8798 size = sizeof(struct lpfc_sglq *);
8799 size *= phba->sli4_hba.max_cfg_param.max_xri;
8800
8801 phba->sli4_hba.lpfc_sglq_active_list =
8802 kzalloc(size, GFP_KERNEL);
8803 if (!phba->sli4_hba.lpfc_sglq_active_list)
8804 return -ENOMEM;
8805 return 0;
8806 }
8807
8808 /**
8809 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
8810 * @phba: pointer to lpfc hba data structure.
8811 *
8812 * This routine is invoked to walk through the array of active sglq entries
8813 * and free all of the resources.
8814 * This is just a place holder for now.
8815 **/
8816 static void
lpfc_free_active_sgl(struct lpfc_hba * phba)8817 lpfc_free_active_sgl(struct lpfc_hba *phba)
8818 {
8819 kfree(phba->sli4_hba.lpfc_sglq_active_list);
8820 }
8821
8822 /**
8823 * lpfc_init_sgl_list - Allocate and initialize sgl list.
8824 * @phba: pointer to lpfc hba data structure.
8825 *
8826 * This routine is invoked to allocate and initizlize the driver's sgl
8827 * list and set up the sgl xritag tag array accordingly.
8828 *
8829 **/
8830 static void
lpfc_init_sgl_list(struct lpfc_hba * phba)8831 lpfc_init_sgl_list(struct lpfc_hba *phba)
8832 {
8833 /* Initialize and populate the sglq list per host/VF. */
8834 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8835 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8836 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8837 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8838
8839 /* els xri-sgl book keeping */
8840 phba->sli4_hba.els_xri_cnt = 0;
8841
8842 /* nvme xri-buffer book keeping */
8843 phba->sli4_hba.io_xri_cnt = 0;
8844 }
8845
8846 /**
8847 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
8848 * @phba: pointer to lpfc hba data structure.
8849 *
8850 * This routine is invoked to post rpi header templates to the
8851 * port for those SLI4 ports that do not support extents. This routine
8852 * posts a PAGE_SIZE memory region to the port to hold up to
8853 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
8854 * and should be called only when interrupts are disabled.
8855 *
8856 * Return codes
8857 * 0 - successful
8858 * -ERROR - otherwise.
8859 **/
8860 int
lpfc_sli4_init_rpi_hdrs(struct lpfc_hba * phba)8861 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
8862 {
8863 int rc = 0;
8864 struct lpfc_rpi_hdr *rpi_hdr;
8865
8866 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8867 if (!phba->sli4_hba.rpi_hdrs_in_use)
8868 return rc;
8869 if (phba->sli4_hba.extents_in_use)
8870 return -EIO;
8871
8872 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
8873 if (!rpi_hdr) {
8874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8875 "0391 Error during rpi post operation\n");
8876 lpfc_sli4_remove_rpis(phba);
8877 rc = -ENODEV;
8878 }
8879
8880 return rc;
8881 }
8882
8883 /**
8884 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
8885 * @phba: pointer to lpfc hba data structure.
8886 *
8887 * This routine is invoked to allocate a single 4KB memory region to
8888 * support rpis and stores them in the phba. This single region
8889 * provides support for up to 64 rpis. The region is used globally
8890 * by the device.
8891 *
8892 * Returns:
8893 * A valid rpi hdr on success.
8894 * A NULL pointer on any failure.
8895 **/
8896 struct lpfc_rpi_hdr *
lpfc_sli4_create_rpi_hdr(struct lpfc_hba * phba)8897 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
8898 {
8899 uint16_t rpi_limit, curr_rpi_range;
8900 struct lpfc_dmabuf *dmabuf;
8901 struct lpfc_rpi_hdr *rpi_hdr;
8902
8903 /*
8904 * If the SLI4 port supports extents, posting the rpi header isn't
8905 * required. Set the expected maximum count and let the actual value
8906 * get set when extents are fully allocated.
8907 */
8908 if (!phba->sli4_hba.rpi_hdrs_in_use)
8909 return NULL;
8910 if (phba->sli4_hba.extents_in_use)
8911 return NULL;
8912
8913 /* The limit on the logical index is just the max_rpi count. */
8914 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8915
8916 spin_lock_irq(&phba->hbalock);
8917 /*
8918 * Establish the starting RPI in this header block. The starting
8919 * rpi is normalized to a zero base because the physical rpi is
8920 * port based.
8921 */
8922 curr_rpi_range = phba->sli4_hba.next_rpi;
8923 spin_unlock_irq(&phba->hbalock);
8924
8925 /* Reached full RPI range */
8926 if (curr_rpi_range == rpi_limit)
8927 return NULL;
8928
8929 /*
8930 * First allocate the protocol header region for the port. The
8931 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
8932 */
8933 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
8934 if (!dmabuf)
8935 return NULL;
8936
8937 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
8938 LPFC_HDR_TEMPLATE_SIZE,
8939 &dmabuf->phys, GFP_KERNEL);
8940 if (!dmabuf->virt) {
8941 rpi_hdr = NULL;
8942 goto err_free_dmabuf;
8943 }
8944
8945 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
8946 rpi_hdr = NULL;
8947 goto err_free_coherent;
8948 }
8949
8950 /* Save the rpi header data for cleanup later. */
8951 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
8952 if (!rpi_hdr)
8953 goto err_free_coherent;
8954
8955 rpi_hdr->dmabuf = dmabuf;
8956 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
8957 rpi_hdr->page_count = 1;
8958 spin_lock_irq(&phba->hbalock);
8959
8960 /* The rpi_hdr stores the logical index only. */
8961 rpi_hdr->start_rpi = curr_rpi_range;
8962 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8963 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8964
8965 spin_unlock_irq(&phba->hbalock);
8966 return rpi_hdr;
8967
8968 err_free_coherent:
8969 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
8970 dmabuf->virt, dmabuf->phys);
8971 err_free_dmabuf:
8972 kfree(dmabuf);
8973 return NULL;
8974 }
8975
8976 /**
8977 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
8978 * @phba: pointer to lpfc hba data structure.
8979 *
8980 * This routine is invoked to remove all memory resources allocated
8981 * to support rpis for SLI4 ports not supporting extents. This routine
8982 * presumes the caller has released all rpis consumed by fabric or port
8983 * logins and is prepared to have the header pages removed.
8984 **/
8985 void
lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba * phba)8986 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
8987 {
8988 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
8989
8990 if (!phba->sli4_hba.rpi_hdrs_in_use)
8991 goto exit;
8992
8993 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
8994 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
8995 list_del(&rpi_hdr->list);
8996 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
8997 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
8998 kfree(rpi_hdr->dmabuf);
8999 kfree(rpi_hdr);
9000 }
9001 exit:
9002 /* There are no rpis available to the port now. */
9003 phba->sli4_hba.next_rpi = 0;
9004 }
9005
9006 /**
9007 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
9008 * @pdev: pointer to pci device data structure.
9009 *
9010 * This routine is invoked to allocate the driver hba data structure for an
9011 * HBA device. If the allocation is successful, the phba reference to the
9012 * PCI device data structure is set.
9013 *
9014 * Return codes
9015 * pointer to @phba - successful
9016 * NULL - error
9017 **/
9018 static struct lpfc_hba *
lpfc_hba_alloc(struct pci_dev * pdev)9019 lpfc_hba_alloc(struct pci_dev *pdev)
9020 {
9021 struct lpfc_hba *phba;
9022
9023 /* Allocate memory for HBA structure */
9024 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
9025 if (!phba) {
9026 dev_err(&pdev->dev, "failed to allocate hba struct\n");
9027 return NULL;
9028 }
9029
9030 /* Set reference to PCI device in HBA structure */
9031 phba->pcidev = pdev;
9032
9033 /* Assign an unused board number */
9034 phba->brd_no = lpfc_get_instance();
9035 if (phba->brd_no < 0) {
9036 kfree(phba);
9037 return NULL;
9038 }
9039 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
9040
9041 spin_lock_init(&phba->ct_ev_lock);
9042 INIT_LIST_HEAD(&phba->ct_ev_waiters);
9043
9044 return phba;
9045 }
9046
9047 /**
9048 * lpfc_hba_free - Free driver hba data structure with a device.
9049 * @phba: pointer to lpfc hba data structure.
9050 *
9051 * This routine is invoked to free the driver hba data structure with an
9052 * HBA device.
9053 **/
9054 static void
lpfc_hba_free(struct lpfc_hba * phba)9055 lpfc_hba_free(struct lpfc_hba *phba)
9056 {
9057 if (phba->sli_rev == LPFC_SLI_REV4)
9058 kfree(phba->sli4_hba.hdwq);
9059
9060 /* Release the driver assigned board number */
9061 idr_remove(&lpfc_hba_index, phba->brd_no);
9062
9063 /* Free memory allocated with sli3 rings */
9064 kfree(phba->sli.sli3_ring);
9065 phba->sli.sli3_ring = NULL;
9066
9067 kfree(phba);
9068 return;
9069 }
9070
9071 /**
9072 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes
9073 * @vport: pointer to lpfc vport data structure.
9074 *
9075 * This routine is will setup initial FDMI attribute masks for
9076 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt
9077 * to get these attributes first before falling back, the attribute
9078 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1
9079 **/
9080 void
lpfc_setup_fdmi_mask(struct lpfc_vport * vport)9081 lpfc_setup_fdmi_mask(struct lpfc_vport *vport)
9082 {
9083 struct lpfc_hba *phba = vport->phba;
9084
9085 set_bit(FC_ALLOW_FDMI, &vport->load_flag);
9086 if (phba->cfg_enable_SmartSAN ||
9087 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) {
9088 /* Setup appropriate attribute masks */
9089 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
9090 if (phba->cfg_enable_SmartSAN)
9091 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
9092 else
9093 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
9094 }
9095
9096 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
9097 "6077 Setup FDMI mask: hba x%x port x%x\n",
9098 vport->fdmi_hba_mask, vport->fdmi_port_mask);
9099 }
9100
9101 /**
9102 * lpfc_create_shost - Create hba physical port with associated scsi host.
9103 * @phba: pointer to lpfc hba data structure.
9104 *
9105 * This routine is invoked to create HBA physical port and associate a SCSI
9106 * host with it.
9107 *
9108 * Return codes
9109 * 0 - successful
9110 * other values - error
9111 **/
9112 static int
lpfc_create_shost(struct lpfc_hba * phba)9113 lpfc_create_shost(struct lpfc_hba *phba)
9114 {
9115 struct lpfc_vport *vport;
9116 struct Scsi_Host *shost;
9117
9118 /* Initialize HBA FC structure */
9119 phba->fc_edtov = FF_DEF_EDTOV;
9120 phba->fc_ratov = FF_DEF_RATOV;
9121 phba->fc_altov = FF_DEF_ALTOV;
9122 phba->fc_arbtov = FF_DEF_ARBTOV;
9123
9124 atomic_set(&phba->sdev_cnt, 0);
9125 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
9126 if (!vport)
9127 return -ENODEV;
9128
9129 shost = lpfc_shost_from_vport(vport);
9130 phba->pport = vport;
9131
9132 if (phba->nvmet_support) {
9133 /* Only 1 vport (pport) will support NVME target */
9134 phba->targetport = NULL;
9135 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
9136 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
9137 "6076 NVME Target Found\n");
9138 }
9139
9140 lpfc_debugfs_initialize(vport);
9141 /* Put reference to SCSI host to driver's device private data */
9142 pci_set_drvdata(phba->pcidev, shost);
9143
9144 lpfc_setup_fdmi_mask(vport);
9145
9146 /*
9147 * At this point we are fully registered with PSA. In addition,
9148 * any initial discovery should be completed.
9149 */
9150 return 0;
9151 }
9152
9153 /**
9154 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
9155 * @phba: pointer to lpfc hba data structure.
9156 *
9157 * This routine is invoked to destroy HBA physical port and the associated
9158 * SCSI host.
9159 **/
9160 static void
lpfc_destroy_shost(struct lpfc_hba * phba)9161 lpfc_destroy_shost(struct lpfc_hba *phba)
9162 {
9163 struct lpfc_vport *vport = phba->pport;
9164
9165 /* Destroy physical port that associated with the SCSI host */
9166 destroy_port(vport);
9167
9168 return;
9169 }
9170
9171 /**
9172 * lpfc_setup_bg - Setup Block guard structures and debug areas.
9173 * @phba: pointer to lpfc hba data structure.
9174 * @shost: the shost to be used to detect Block guard settings.
9175 *
9176 * This routine sets up the local Block guard protocol settings for @shost.
9177 * This routine also allocates memory for debugging bg buffers.
9178 **/
9179 static void
lpfc_setup_bg(struct lpfc_hba * phba,struct Scsi_Host * shost)9180 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
9181 {
9182 uint32_t old_mask;
9183 uint32_t old_guard;
9184
9185 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9186 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9187 "1478 Registering BlockGuard with the "
9188 "SCSI layer\n");
9189
9190 old_mask = phba->cfg_prot_mask;
9191 old_guard = phba->cfg_prot_guard;
9192
9193 /* Only allow supported values */
9194 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
9195 SHOST_DIX_TYPE0_PROTECTION |
9196 SHOST_DIX_TYPE1_PROTECTION);
9197 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
9198 SHOST_DIX_GUARD_CRC);
9199
9200 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
9201 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
9202 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
9203
9204 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9205 if ((old_mask != phba->cfg_prot_mask) ||
9206 (old_guard != phba->cfg_prot_guard))
9207 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9208 "1475 Registering BlockGuard with the "
9209 "SCSI layer: mask %d guard %d\n",
9210 phba->cfg_prot_mask,
9211 phba->cfg_prot_guard);
9212
9213 scsi_host_set_prot(shost, phba->cfg_prot_mask);
9214 scsi_host_set_guard(shost, phba->cfg_prot_guard);
9215 } else
9216 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9217 "1479 Not Registering BlockGuard with the SCSI "
9218 "layer, Bad protection parameters: %d %d\n",
9219 old_mask, old_guard);
9220 }
9221 }
9222
9223 /**
9224 * lpfc_post_init_setup - Perform necessary device post initialization setup.
9225 * @phba: pointer to lpfc hba data structure.
9226 *
9227 * This routine is invoked to perform all the necessary post initialization
9228 * setup for the device.
9229 **/
9230 static void
lpfc_post_init_setup(struct lpfc_hba * phba)9231 lpfc_post_init_setup(struct lpfc_hba *phba)
9232 {
9233 struct Scsi_Host *shost;
9234 struct lpfc_adapter_event_header adapter_event;
9235
9236 /* Get the default values for Model Name and Description */
9237 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9238
9239 /*
9240 * hba setup may have changed the hba_queue_depth so we need to
9241 * adjust the value of can_queue.
9242 */
9243 shost = pci_get_drvdata(phba->pcidev);
9244 shost->can_queue = phba->cfg_hba_queue_depth - 10;
9245
9246 lpfc_host_attrib_init(shost);
9247
9248 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9249 spin_lock_irq(shost->host_lock);
9250 lpfc_poll_start_timer(phba);
9251 spin_unlock_irq(shost->host_lock);
9252 }
9253
9254 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9255 "0428 Perform SCSI scan\n");
9256 /* Send board arrival event to upper layer */
9257 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
9258 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
9259 fc_host_post_vendor_event(shost, fc_get_event_number(),
9260 sizeof(adapter_event),
9261 (char *) &adapter_event,
9262 LPFC_NL_VENDOR_ID);
9263 return;
9264 }
9265
9266 /**
9267 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
9268 * @phba: pointer to lpfc hba data structure.
9269 *
9270 * This routine is invoked to set up the PCI device memory space for device
9271 * with SLI-3 interface spec.
9272 *
9273 * Return codes
9274 * 0 - successful
9275 * other values - error
9276 **/
9277 static int
lpfc_sli_pci_mem_setup(struct lpfc_hba * phba)9278 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
9279 {
9280 struct pci_dev *pdev = phba->pcidev;
9281 unsigned long bar0map_len, bar2map_len;
9282 int i, hbq_count;
9283 void *ptr;
9284 int error;
9285
9286 if (!pdev)
9287 return -ENODEV;
9288
9289 /* Set the device DMA mask size */
9290 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9291 if (error)
9292 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9293 if (error)
9294 return error;
9295 error = -ENODEV;
9296
9297 /* Get the bus address of Bar0 and Bar2 and the number of bytes
9298 * required by each mapping.
9299 */
9300 phba->pci_bar0_map = pci_resource_start(pdev, 0);
9301 bar0map_len = pci_resource_len(pdev, 0);
9302
9303 phba->pci_bar2_map = pci_resource_start(pdev, 2);
9304 bar2map_len = pci_resource_len(pdev, 2);
9305
9306 /* Map HBA SLIM to a kernel virtual address. */
9307 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
9308 if (!phba->slim_memmap_p) {
9309 dev_printk(KERN_ERR, &pdev->dev,
9310 "ioremap failed for SLIM memory.\n");
9311 goto out;
9312 }
9313
9314 /* Map HBA Control Registers to a kernel virtual address. */
9315 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
9316 if (!phba->ctrl_regs_memmap_p) {
9317 dev_printk(KERN_ERR, &pdev->dev,
9318 "ioremap failed for HBA control registers.\n");
9319 goto out_iounmap_slim;
9320 }
9321
9322 /* Allocate memory for SLI-2 structures */
9323 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9324 &phba->slim2p.phys, GFP_KERNEL);
9325 if (!phba->slim2p.virt)
9326 goto out_iounmap;
9327
9328 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
9329 phba->mbox_ext = (phba->slim2p.virt +
9330 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
9331 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
9332 phba->IOCBs = (phba->slim2p.virt +
9333 offsetof(struct lpfc_sli2_slim, IOCBs));
9334
9335 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
9336 lpfc_sli_hbq_size(),
9337 &phba->hbqslimp.phys,
9338 GFP_KERNEL);
9339 if (!phba->hbqslimp.virt)
9340 goto out_free_slim;
9341
9342 hbq_count = lpfc_sli_hbq_count();
9343 ptr = phba->hbqslimp.virt;
9344 for (i = 0; i < hbq_count; ++i) {
9345 phba->hbqs[i].hbq_virt = ptr;
9346 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
9347 ptr += (lpfc_hbq_defs[i]->entry_count *
9348 sizeof(struct lpfc_hbq_entry));
9349 }
9350 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
9351 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
9352
9353 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
9354
9355 phba->MBslimaddr = phba->slim_memmap_p;
9356 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
9357 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
9358 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
9359 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
9360
9361 return 0;
9362
9363 out_free_slim:
9364 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9365 phba->slim2p.virt, phba->slim2p.phys);
9366 out_iounmap:
9367 iounmap(phba->ctrl_regs_memmap_p);
9368 out_iounmap_slim:
9369 iounmap(phba->slim_memmap_p);
9370 out:
9371 return error;
9372 }
9373
9374 /**
9375 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
9376 * @phba: pointer to lpfc hba data structure.
9377 *
9378 * This routine is invoked to unset the PCI device memory space for device
9379 * with SLI-3 interface spec.
9380 **/
9381 static void
lpfc_sli_pci_mem_unset(struct lpfc_hba * phba)9382 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
9383 {
9384 struct pci_dev *pdev;
9385
9386 /* Obtain PCI device reference */
9387 if (!phba->pcidev)
9388 return;
9389 else
9390 pdev = phba->pcidev;
9391
9392 /* Free coherent DMA memory allocated */
9393 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9394 phba->hbqslimp.virt, phba->hbqslimp.phys);
9395 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9396 phba->slim2p.virt, phba->slim2p.phys);
9397
9398 /* I/O memory unmap */
9399 iounmap(phba->ctrl_regs_memmap_p);
9400 iounmap(phba->slim_memmap_p);
9401
9402 return;
9403 }
9404
9405 /**
9406 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
9407 * @phba: pointer to lpfc hba data structure.
9408 *
9409 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
9410 * done and check status.
9411 *
9412 * Return 0 if successful, otherwise -ENODEV.
9413 **/
9414 int
lpfc_sli4_post_status_check(struct lpfc_hba * phba)9415 lpfc_sli4_post_status_check(struct lpfc_hba *phba)
9416 {
9417 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
9418 struct lpfc_register reg_data;
9419 int i, port_error = 0;
9420 uint32_t if_type;
9421
9422 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
9423 memset(®_data, 0, sizeof(reg_data));
9424 if (!phba->sli4_hba.PSMPHRregaddr)
9425 return -ENODEV;
9426
9427 /* Wait up to 30 seconds for the SLI Port POST done and ready */
9428 for (i = 0; i < 3000; i++) {
9429 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9430 &portsmphr_reg.word0) ||
9431 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
9432 /* Port has a fatal POST error, break out */
9433 port_error = -ENODEV;
9434 break;
9435 }
9436 if (LPFC_POST_STAGE_PORT_READY ==
9437 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
9438 break;
9439 msleep(10);
9440 }
9441
9442 /*
9443 * If there was a port error during POST, then don't proceed with
9444 * other register reads as the data may not be valid. Just exit.
9445 */
9446 if (port_error) {
9447 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9448 "1408 Port Failed POST - portsmphr=0x%x, "
9449 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
9450 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
9451 portsmphr_reg.word0,
9452 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
9453 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
9454 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
9455 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
9456 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
9457 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
9458 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
9459 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
9460 } else {
9461 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9462 "2534 Device Info: SLIFamily=0x%x, "
9463 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
9464 "SLIHint_2=0x%x, FT=0x%x\n",
9465 bf_get(lpfc_sli_intf_sli_family,
9466 &phba->sli4_hba.sli_intf),
9467 bf_get(lpfc_sli_intf_slirev,
9468 &phba->sli4_hba.sli_intf),
9469 bf_get(lpfc_sli_intf_if_type,
9470 &phba->sli4_hba.sli_intf),
9471 bf_get(lpfc_sli_intf_sli_hint1,
9472 &phba->sli4_hba.sli_intf),
9473 bf_get(lpfc_sli_intf_sli_hint2,
9474 &phba->sli4_hba.sli_intf),
9475 bf_get(lpfc_sli_intf_func_type,
9476 &phba->sli4_hba.sli_intf));
9477 /*
9478 * Check for other Port errors during the initialization
9479 * process. Fail the load if the port did not come up
9480 * correctly.
9481 */
9482 if_type = bf_get(lpfc_sli_intf_if_type,
9483 &phba->sli4_hba.sli_intf);
9484 switch (if_type) {
9485 case LPFC_SLI_INTF_IF_TYPE_0:
9486 phba->sli4_hba.ue_mask_lo =
9487 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9488 phba->sli4_hba.ue_mask_hi =
9489 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9490 uerrlo_reg.word0 =
9491 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9492 uerrhi_reg.word0 =
9493 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9494 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9495 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9496 lpfc_printf_log(phba, KERN_ERR,
9497 LOG_TRACE_EVENT,
9498 "1422 Unrecoverable Error "
9499 "Detected during POST "
9500 "uerr_lo_reg=0x%x, "
9501 "uerr_hi_reg=0x%x, "
9502 "ue_mask_lo_reg=0x%x, "
9503 "ue_mask_hi_reg=0x%x\n",
9504 uerrlo_reg.word0,
9505 uerrhi_reg.word0,
9506 phba->sli4_hba.ue_mask_lo,
9507 phba->sli4_hba.ue_mask_hi);
9508 port_error = -ENODEV;
9509 }
9510 break;
9511 case LPFC_SLI_INTF_IF_TYPE_2:
9512 case LPFC_SLI_INTF_IF_TYPE_6:
9513 /* Final checks. The port status should be clean. */
9514 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9515 ®_data.word0) ||
9516 lpfc_sli4_unrecoverable_port(®_data)) {
9517 phba->work_status[0] =
9518 readl(phba->sli4_hba.u.if_type2.
9519 ERR1regaddr);
9520 phba->work_status[1] =
9521 readl(phba->sli4_hba.u.if_type2.
9522 ERR2regaddr);
9523 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9524 "2888 Unrecoverable port error "
9525 "following POST: port status reg "
9526 "0x%x, port_smphr reg 0x%x, "
9527 "error 1=0x%x, error 2=0x%x\n",
9528 reg_data.word0,
9529 portsmphr_reg.word0,
9530 phba->work_status[0],
9531 phba->work_status[1]);
9532 port_error = -ENODEV;
9533 break;
9534 }
9535
9536 if (lpfc_pldv_detect &&
9537 bf_get(lpfc_sli_intf_sli_family,
9538 &phba->sli4_hba.sli_intf) ==
9539 LPFC_SLI_INTF_FAMILY_G6)
9540 pci_write_config_byte(phba->pcidev,
9541 LPFC_SLI_INTF, CFG_PLD);
9542 break;
9543 case LPFC_SLI_INTF_IF_TYPE_1:
9544 default:
9545 break;
9546 }
9547 }
9548 return port_error;
9549 }
9550
9551 /**
9552 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
9553 * @phba: pointer to lpfc hba data structure.
9554 * @if_type: The SLI4 interface type getting configured.
9555 *
9556 * This routine is invoked to set up SLI4 BAR0 PCI config space register
9557 * memory map.
9558 **/
9559 static void
lpfc_sli4_bar0_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9560 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9561 {
9562 switch (if_type) {
9563 case LPFC_SLI_INTF_IF_TYPE_0:
9564 phba->sli4_hba.u.if_type0.UERRLOregaddr =
9565 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9566 phba->sli4_hba.u.if_type0.UERRHIregaddr =
9567 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9568 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9569 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9570 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9571 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9572 phba->sli4_hba.SLIINTFregaddr =
9573 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9574 break;
9575 case LPFC_SLI_INTF_IF_TYPE_2:
9576 phba->sli4_hba.u.if_type2.EQDregaddr =
9577 phba->sli4_hba.conf_regs_memmap_p +
9578 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9579 phba->sli4_hba.u.if_type2.ERR1regaddr =
9580 phba->sli4_hba.conf_regs_memmap_p +
9581 LPFC_CTL_PORT_ER1_OFFSET;
9582 phba->sli4_hba.u.if_type2.ERR2regaddr =
9583 phba->sli4_hba.conf_regs_memmap_p +
9584 LPFC_CTL_PORT_ER2_OFFSET;
9585 phba->sli4_hba.u.if_type2.CTRLregaddr =
9586 phba->sli4_hba.conf_regs_memmap_p +
9587 LPFC_CTL_PORT_CTL_OFFSET;
9588 phba->sli4_hba.u.if_type2.STATUSregaddr =
9589 phba->sli4_hba.conf_regs_memmap_p +
9590 LPFC_CTL_PORT_STA_OFFSET;
9591 phba->sli4_hba.SLIINTFregaddr =
9592 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9593 phba->sli4_hba.PSMPHRregaddr =
9594 phba->sli4_hba.conf_regs_memmap_p +
9595 LPFC_CTL_PORT_SEM_OFFSET;
9596 phba->sli4_hba.RQDBregaddr =
9597 phba->sli4_hba.conf_regs_memmap_p +
9598 LPFC_ULP0_RQ_DOORBELL;
9599 phba->sli4_hba.WQDBregaddr =
9600 phba->sli4_hba.conf_regs_memmap_p +
9601 LPFC_ULP0_WQ_DOORBELL;
9602 phba->sli4_hba.CQDBregaddr =
9603 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9604 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9605 phba->sli4_hba.MQDBregaddr =
9606 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9607 phba->sli4_hba.BMBXregaddr =
9608 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9609 break;
9610 case LPFC_SLI_INTF_IF_TYPE_6:
9611 phba->sli4_hba.u.if_type2.EQDregaddr =
9612 phba->sli4_hba.conf_regs_memmap_p +
9613 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9614 phba->sli4_hba.u.if_type2.ERR1regaddr =
9615 phba->sli4_hba.conf_regs_memmap_p +
9616 LPFC_CTL_PORT_ER1_OFFSET;
9617 phba->sli4_hba.u.if_type2.ERR2regaddr =
9618 phba->sli4_hba.conf_regs_memmap_p +
9619 LPFC_CTL_PORT_ER2_OFFSET;
9620 phba->sli4_hba.u.if_type2.CTRLregaddr =
9621 phba->sli4_hba.conf_regs_memmap_p +
9622 LPFC_CTL_PORT_CTL_OFFSET;
9623 phba->sli4_hba.u.if_type2.STATUSregaddr =
9624 phba->sli4_hba.conf_regs_memmap_p +
9625 LPFC_CTL_PORT_STA_OFFSET;
9626 phba->sli4_hba.PSMPHRregaddr =
9627 phba->sli4_hba.conf_regs_memmap_p +
9628 LPFC_CTL_PORT_SEM_OFFSET;
9629 phba->sli4_hba.BMBXregaddr =
9630 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9631 break;
9632 case LPFC_SLI_INTF_IF_TYPE_1:
9633 default:
9634 dev_printk(KERN_ERR, &phba->pcidev->dev,
9635 "FATAL - unsupported SLI4 interface type - %d\n",
9636 if_type);
9637 break;
9638 }
9639 }
9640
9641 /**
9642 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
9643 * @phba: pointer to lpfc hba data structure.
9644 * @if_type: sli if type to operate on.
9645 *
9646 * This routine is invoked to set up SLI4 BAR1 register memory map.
9647 **/
9648 static void
lpfc_sli4_bar1_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9649 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9650 {
9651 switch (if_type) {
9652 case LPFC_SLI_INTF_IF_TYPE_0:
9653 phba->sli4_hba.PSMPHRregaddr =
9654 phba->sli4_hba.ctrl_regs_memmap_p +
9655 LPFC_SLIPORT_IF0_SMPHR;
9656 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9657 LPFC_HST_ISR0;
9658 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9659 LPFC_HST_IMR0;
9660 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9661 LPFC_HST_ISCR0;
9662 break;
9663 case LPFC_SLI_INTF_IF_TYPE_6:
9664 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9665 LPFC_IF6_RQ_DOORBELL;
9666 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9667 LPFC_IF6_WQ_DOORBELL;
9668 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9669 LPFC_IF6_CQ_DOORBELL;
9670 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9671 LPFC_IF6_EQ_DOORBELL;
9672 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9673 LPFC_IF6_MQ_DOORBELL;
9674 break;
9675 case LPFC_SLI_INTF_IF_TYPE_2:
9676 case LPFC_SLI_INTF_IF_TYPE_1:
9677 default:
9678 dev_err(&phba->pcidev->dev,
9679 "FATAL - unsupported SLI4 interface type - %d\n",
9680 if_type);
9681 break;
9682 }
9683 }
9684
9685 /**
9686 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
9687 * @phba: pointer to lpfc hba data structure.
9688 * @vf: virtual function number
9689 *
9690 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
9691 * based on the given viftual function number, @vf.
9692 *
9693 * Return 0 if successful, otherwise -ENODEV.
9694 **/
9695 static int
lpfc_sli4_bar2_register_memmap(struct lpfc_hba * phba,uint32_t vf)9696 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
9697 {
9698 if (vf > LPFC_VIR_FUNC_MAX)
9699 return -ENODEV;
9700
9701 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9702 vf * LPFC_VFR_PAGE_SIZE +
9703 LPFC_ULP0_RQ_DOORBELL);
9704 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9705 vf * LPFC_VFR_PAGE_SIZE +
9706 LPFC_ULP0_WQ_DOORBELL);
9707 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9708 vf * LPFC_VFR_PAGE_SIZE +
9709 LPFC_EQCQ_DOORBELL);
9710 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9711 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9712 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
9713 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9714 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
9715 return 0;
9716 }
9717
9718 /**
9719 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
9720 * @phba: pointer to lpfc hba data structure.
9721 *
9722 * This routine is invoked to create the bootstrap mailbox
9723 * region consistent with the SLI-4 interface spec. This
9724 * routine allocates all memory necessary to communicate
9725 * mailbox commands to the port and sets up all alignment
9726 * needs. No locks are expected to be held when calling
9727 * this routine.
9728 *
9729 * Return codes
9730 * 0 - successful
9731 * -ENOMEM - could not allocated memory.
9732 **/
9733 static int
lpfc_create_bootstrap_mbox(struct lpfc_hba * phba)9734 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
9735 {
9736 uint32_t bmbx_size;
9737 struct lpfc_dmabuf *dmabuf;
9738 struct dma_address *dma_address;
9739 uint32_t pa_addr;
9740 uint64_t phys_addr;
9741
9742 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
9743 if (!dmabuf)
9744 return -ENOMEM;
9745
9746 /*
9747 * The bootstrap mailbox region is comprised of 2 parts
9748 * plus an alignment restriction of 16 bytes.
9749 */
9750 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
9751 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
9752 &dmabuf->phys, GFP_KERNEL);
9753 if (!dmabuf->virt) {
9754 kfree(dmabuf);
9755 return -ENOMEM;
9756 }
9757
9758 /*
9759 * Initialize the bootstrap mailbox pointers now so that the register
9760 * operations are simple later. The mailbox dma address is required
9761 * to be 16-byte aligned. Also align the virtual memory as each
9762 * maibox is copied into the bmbx mailbox region before issuing the
9763 * command to the port.
9764 */
9765 phba->sli4_hba.bmbx.dmabuf = dmabuf;
9766 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9767
9768 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9769 LPFC_ALIGN_16_BYTE);
9770 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9771 LPFC_ALIGN_16_BYTE);
9772
9773 /*
9774 * Set the high and low physical addresses now. The SLI4 alignment
9775 * requirement is 16 bytes and the mailbox is posted to the port
9776 * as two 30-bit addresses. The other data is a bit marking whether
9777 * the 30-bit address is the high or low address.
9778 * Upcast bmbx aphys to 64bits so shift instruction compiles
9779 * clean on 32 bit machines.
9780 */
9781 dma_address = &phba->sli4_hba.bmbx.dma_address;
9782 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9783 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
9784 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
9785 LPFC_BMBX_BIT1_ADDR_HI);
9786
9787 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9788 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
9789 LPFC_BMBX_BIT1_ADDR_LO);
9790 return 0;
9791 }
9792
9793 /**
9794 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
9795 * @phba: pointer to lpfc hba data structure.
9796 *
9797 * This routine is invoked to teardown the bootstrap mailbox
9798 * region and release all host resources. This routine requires
9799 * the caller to ensure all mailbox commands recovered, no
9800 * additional mailbox comands are sent, and interrupts are disabled
9801 * before calling this routine.
9802 *
9803 **/
9804 static void
lpfc_destroy_bootstrap_mbox(struct lpfc_hba * phba)9805 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
9806 {
9807 dma_free_coherent(&phba->pcidev->dev,
9808 phba->sli4_hba.bmbx.bmbx_size,
9809 phba->sli4_hba.bmbx.dmabuf->virt,
9810 phba->sli4_hba.bmbx.dmabuf->phys);
9811
9812 kfree(phba->sli4_hba.bmbx.dmabuf);
9813 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9814 }
9815
9816 static const char * const lpfc_topo_to_str[] = {
9817 "Loop then P2P",
9818 "Loopback",
9819 "P2P Only",
9820 "Unsupported",
9821 "Loop Only",
9822 "Unsupported",
9823 "P2P then Loop",
9824 };
9825
9826 #define LINK_FLAGS_DEF 0x0
9827 #define LINK_FLAGS_P2P 0x1
9828 #define LINK_FLAGS_LOOP 0x2
9829 /**
9830 * lpfc_map_topology - Map the topology read from READ_CONFIG
9831 * @phba: pointer to lpfc hba data structure.
9832 * @rd_config: pointer to read config data
9833 *
9834 * This routine is invoked to map the topology values as read
9835 * from the read config mailbox command. If the persistent
9836 * topology feature is supported, the firmware will provide the
9837 * saved topology information to be used in INIT_LINK
9838 **/
9839 static void
lpfc_map_topology(struct lpfc_hba * phba,struct lpfc_mbx_read_config * rd_config)9840 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
9841 {
9842 u8 ptv, tf, pt;
9843
9844 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
9845 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
9846 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
9847
9848 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9849 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
9850 ptv, tf, pt);
9851 if (!ptv) {
9852 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9853 "2019 FW does not support persistent topology "
9854 "Using driver parameter defined value [%s]",
9855 lpfc_topo_to_str[phba->cfg_topology]);
9856 return;
9857 }
9858 /* FW supports persistent topology - override module parameter value */
9859 set_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9860
9861 /* if ASIC_GEN_NUM >= 0xC) */
9862 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9863 LPFC_SLI_INTF_IF_TYPE_6) ||
9864 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9865 LPFC_SLI_INTF_FAMILY_G6)) {
9866 if (!tf)
9867 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
9868 ? FLAGS_TOPOLOGY_MODE_LOOP
9869 : FLAGS_TOPOLOGY_MODE_PT_PT);
9870 else
9871 clear_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9872 } else { /* G5 */
9873 if (tf)
9874 /* If topology failover set - pt is '0' or '1' */
9875 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
9876 FLAGS_TOPOLOGY_MODE_LOOP_PT);
9877 else
9878 phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
9879 ? FLAGS_TOPOLOGY_MODE_PT_PT
9880 : FLAGS_TOPOLOGY_MODE_LOOP);
9881 }
9882 if (test_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag))
9883 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9884 "2020 Using persistent topology value [%s]",
9885 lpfc_topo_to_str[phba->cfg_topology]);
9886 else
9887 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9888 "2021 Invalid topology values from FW "
9889 "Using driver parameter defined value [%s]",
9890 lpfc_topo_to_str[phba->cfg_topology]);
9891 }
9892
9893 /**
9894 * lpfc_sli4_read_config - Get the config parameters.
9895 * @phba: pointer to lpfc hba data structure.
9896 *
9897 * This routine is invoked to read the configuration parameters from the HBA.
9898 * The configuration parameters are used to set the base and maximum values
9899 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
9900 * allocation for the port.
9901 *
9902 * Return codes
9903 * 0 - successful
9904 * -ENOMEM - No available memory
9905 * -EIO - The mailbox failed to complete successfully.
9906 **/
9907 int
lpfc_sli4_read_config(struct lpfc_hba * phba)9908 lpfc_sli4_read_config(struct lpfc_hba *phba)
9909 {
9910 LPFC_MBOXQ_t *pmb;
9911 struct lpfc_mbx_read_config *rd_config;
9912 union lpfc_sli4_cfg_shdr *shdr;
9913 uint32_t shdr_status, shdr_add_status;
9914 struct lpfc_mbx_get_func_cfg *get_func_cfg;
9915 struct lpfc_rsrc_desc_fcfcoe *desc;
9916 char *pdesc_0;
9917 uint16_t forced_link_speed;
9918 uint32_t if_type, qmin, fawwpn;
9919 int length, i, rc = 0, rc2;
9920
9921 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9922 if (!pmb) {
9923 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9924 "2011 Unable to allocate memory for issuing "
9925 "SLI_CONFIG_SPECIAL mailbox command\n");
9926 return -ENOMEM;
9927 }
9928
9929 lpfc_read_config(phba, pmb);
9930
9931 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9932 if (rc != MBX_SUCCESS) {
9933 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9934 "2012 Mailbox failed , mbxCmd x%x "
9935 "READ_CONFIG, mbxStatus x%x\n",
9936 bf_get(lpfc_mqe_command, &pmb->u.mqe),
9937 bf_get(lpfc_mqe_status, &pmb->u.mqe));
9938 rc = -EIO;
9939 } else {
9940 rd_config = &pmb->u.mqe.un.rd_config;
9941 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
9942 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9943 phba->sli4_hba.lnk_info.lnk_tp =
9944 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
9945 phba->sli4_hba.lnk_info.lnk_no =
9946 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
9947 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9948 "3081 lnk_type:%d, lnk_numb:%d\n",
9949 phba->sli4_hba.lnk_info.lnk_tp,
9950 phba->sli4_hba.lnk_info.lnk_no);
9951 } else
9952 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9953 "3082 Mailbox (x%x) returned ldv:x0\n",
9954 bf_get(lpfc_mqe_command, &pmb->u.mqe));
9955 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
9956 phba->bbcredit_support = 1;
9957 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9958 }
9959
9960 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config);
9961
9962 if (fawwpn) {
9963 lpfc_printf_log(phba, KERN_INFO,
9964 LOG_INIT | LOG_DISCOVERY,
9965 "2702 READ_CONFIG: FA-PWWN is "
9966 "configured on\n");
9967 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9968 } else {
9969 /* Clear FW configured flag, preserve driver flag */
9970 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9971 }
9972
9973 phba->sli4_hba.conf_trunk =
9974 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
9975 phba->sli4_hba.extents_in_use =
9976 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
9977
9978 phba->sli4_hba.max_cfg_param.max_xri =
9979 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
9980 /* Reduce resource usage in kdump environment */
9981 if (is_kdump_kernel() &&
9982 phba->sli4_hba.max_cfg_param.max_xri > 512)
9983 phba->sli4_hba.max_cfg_param.max_xri = 512;
9984 phba->sli4_hba.max_cfg_param.xri_base =
9985 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
9986 phba->sli4_hba.max_cfg_param.max_vpi =
9987 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
9988 /* Limit the max we support */
9989 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9990 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9991 phba->sli4_hba.max_cfg_param.vpi_base =
9992 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
9993 phba->sli4_hba.max_cfg_param.max_rpi =
9994 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
9995 phba->sli4_hba.max_cfg_param.rpi_base =
9996 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
9997 phba->sli4_hba.max_cfg_param.max_vfi =
9998 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
9999 phba->sli4_hba.max_cfg_param.vfi_base =
10000 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
10001 phba->sli4_hba.max_cfg_param.max_fcfi =
10002 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
10003 phba->sli4_hba.max_cfg_param.max_eq =
10004 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
10005 phba->sli4_hba.max_cfg_param.max_rq =
10006 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
10007 phba->sli4_hba.max_cfg_param.max_wq =
10008 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
10009 phba->sli4_hba.max_cfg_param.max_cq =
10010 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
10011 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
10012 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
10013 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
10014 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
10015 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
10016 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
10017 phba->max_vports = phba->max_vpi;
10018
10019 /* Next decide on FPIN or Signal E2E CGN support
10020 * For congestion alarms and warnings valid combination are:
10021 * 1. FPIN alarms / FPIN warnings
10022 * 2. Signal alarms / Signal warnings
10023 * 3. FPIN alarms / Signal warnings
10024 * 4. Signal alarms / FPIN warnings
10025 *
10026 * Initialize the adapter frequency to 100 mSecs
10027 */
10028 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10029 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED;
10030 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency;
10031
10032 if (lpfc_use_cgn_signal) {
10033 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) {
10034 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY;
10035 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN;
10036 }
10037 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) {
10038 /* MUST support both alarm and warning
10039 * because EDC does not support alarm alone.
10040 */
10041 if (phba->cgn_reg_signal !=
10042 EDC_CG_SIG_WARN_ONLY) {
10043 /* Must support both or none */
10044 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10045 phba->cgn_reg_signal =
10046 EDC_CG_SIG_NOTSUPPORTED;
10047 } else {
10048 phba->cgn_reg_signal =
10049 EDC_CG_SIG_WARN_ALARM;
10050 phba->cgn_reg_fpin =
10051 LPFC_CGN_FPIN_NONE;
10052 }
10053 }
10054 }
10055
10056 /* Set the congestion initial signal and fpin values. */
10057 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin;
10058 phba->cgn_init_reg_signal = phba->cgn_reg_signal;
10059
10060 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
10061 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n",
10062 phba->cgn_reg_signal, phba->cgn_reg_fpin);
10063
10064 lpfc_map_topology(phba, rd_config);
10065 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10066 "2003 cfg params Extents? %d "
10067 "XRI(B:%d M:%d), "
10068 "VPI(B:%d M:%d) "
10069 "VFI(B:%d M:%d) "
10070 "RPI(B:%d M:%d) "
10071 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
10072 phba->sli4_hba.extents_in_use,
10073 phba->sli4_hba.max_cfg_param.xri_base,
10074 phba->sli4_hba.max_cfg_param.max_xri,
10075 phba->sli4_hba.max_cfg_param.vpi_base,
10076 phba->sli4_hba.max_cfg_param.max_vpi,
10077 phba->sli4_hba.max_cfg_param.vfi_base,
10078 phba->sli4_hba.max_cfg_param.max_vfi,
10079 phba->sli4_hba.max_cfg_param.rpi_base,
10080 phba->sli4_hba.max_cfg_param.max_rpi,
10081 phba->sli4_hba.max_cfg_param.max_fcfi,
10082 phba->sli4_hba.max_cfg_param.max_eq,
10083 phba->sli4_hba.max_cfg_param.max_cq,
10084 phba->sli4_hba.max_cfg_param.max_wq,
10085 phba->sli4_hba.max_cfg_param.max_rq,
10086 phba->lmt);
10087
10088 /*
10089 * Calculate queue resources based on how
10090 * many WQ/CQ/EQs are available.
10091 */
10092 qmin = phba->sli4_hba.max_cfg_param.max_wq;
10093 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10094 qmin = phba->sli4_hba.max_cfg_param.max_cq;
10095 /*
10096 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and
10097 * the remainder can be used for NVME / FCP.
10098 */
10099 qmin -= 4;
10100 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10101 qmin = phba->sli4_hba.max_cfg_param.max_eq;
10102
10103 /* Check to see if there is enough for default cfg */
10104 if ((phba->cfg_irq_chann > qmin) ||
10105 (phba->cfg_hdw_queue > qmin)) {
10106 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10107 "2005 Reducing Queues - "
10108 "FW resource limitation: "
10109 "WQ %d CQ %d EQ %d: min %d: "
10110 "IRQ %d HDWQ %d\n",
10111 phba->sli4_hba.max_cfg_param.max_wq,
10112 phba->sli4_hba.max_cfg_param.max_cq,
10113 phba->sli4_hba.max_cfg_param.max_eq,
10114 qmin, phba->cfg_irq_chann,
10115 phba->cfg_hdw_queue);
10116
10117 if (phba->cfg_irq_chann > qmin)
10118 phba->cfg_irq_chann = qmin;
10119 if (phba->cfg_hdw_queue > qmin)
10120 phba->cfg_hdw_queue = qmin;
10121 }
10122 }
10123
10124 if (rc)
10125 goto read_cfg_out;
10126
10127 /* Update link speed if forced link speed is supported */
10128 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10129 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10130 forced_link_speed =
10131 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
10132 if (forced_link_speed) {
10133 set_bit(HBA_FORCED_LINK_SPEED, &phba->hba_flag);
10134
10135 switch (forced_link_speed) {
10136 case LINK_SPEED_1G:
10137 phba->cfg_link_speed =
10138 LPFC_USER_LINK_SPEED_1G;
10139 break;
10140 case LINK_SPEED_2G:
10141 phba->cfg_link_speed =
10142 LPFC_USER_LINK_SPEED_2G;
10143 break;
10144 case LINK_SPEED_4G:
10145 phba->cfg_link_speed =
10146 LPFC_USER_LINK_SPEED_4G;
10147 break;
10148 case LINK_SPEED_8G:
10149 phba->cfg_link_speed =
10150 LPFC_USER_LINK_SPEED_8G;
10151 break;
10152 case LINK_SPEED_10G:
10153 phba->cfg_link_speed =
10154 LPFC_USER_LINK_SPEED_10G;
10155 break;
10156 case LINK_SPEED_16G:
10157 phba->cfg_link_speed =
10158 LPFC_USER_LINK_SPEED_16G;
10159 break;
10160 case LINK_SPEED_32G:
10161 phba->cfg_link_speed =
10162 LPFC_USER_LINK_SPEED_32G;
10163 break;
10164 case LINK_SPEED_64G:
10165 phba->cfg_link_speed =
10166 LPFC_USER_LINK_SPEED_64G;
10167 break;
10168 case 0xffff:
10169 phba->cfg_link_speed =
10170 LPFC_USER_LINK_SPEED_AUTO;
10171 break;
10172 default:
10173 lpfc_printf_log(phba, KERN_ERR,
10174 LOG_TRACE_EVENT,
10175 "0047 Unrecognized link "
10176 "speed : %d\n",
10177 forced_link_speed);
10178 phba->cfg_link_speed =
10179 LPFC_USER_LINK_SPEED_AUTO;
10180 }
10181 }
10182 }
10183
10184 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
10185 length = phba->sli4_hba.max_cfg_param.max_xri -
10186 lpfc_sli4_get_els_iocb_cnt(phba);
10187 if (phba->cfg_hba_queue_depth > length) {
10188 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10189 "3361 HBA queue depth changed from %d to %d\n",
10190 phba->cfg_hba_queue_depth, length);
10191 phba->cfg_hba_queue_depth = length;
10192 }
10193
10194 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10195 LPFC_SLI_INTF_IF_TYPE_2)
10196 goto read_cfg_out;
10197
10198 /* get the pf# and vf# for SLI4 if_type 2 port */
10199 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
10200 sizeof(struct lpfc_sli4_cfg_mhdr));
10201 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
10202 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
10203 length, LPFC_SLI4_MBX_EMBED);
10204
10205 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10206 shdr = (union lpfc_sli4_cfg_shdr *)
10207 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
10208 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
10209 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
10210 if (rc2 || shdr_status || shdr_add_status) {
10211 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10212 "3026 Mailbox failed , mbxCmd x%x "
10213 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
10214 bf_get(lpfc_mqe_command, &pmb->u.mqe),
10215 bf_get(lpfc_mqe_status, &pmb->u.mqe));
10216 goto read_cfg_out;
10217 }
10218
10219 /* search for fc_fcoe resrouce descriptor */
10220 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
10221
10222 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
10223 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
10224 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
10225 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
10226 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
10227 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
10228 goto read_cfg_out;
10229
10230 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
10231 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
10232 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
10233 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
10234 phba->sli4_hba.iov.pf_number =
10235 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
10236 phba->sli4_hba.iov.vf_number =
10237 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
10238 break;
10239 }
10240 }
10241
10242 if (i < LPFC_RSRC_DESC_MAX_NUM)
10243 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10244 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
10245 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10246 phba->sli4_hba.iov.vf_number);
10247 else
10248 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10249 "3028 GET_FUNCTION_CONFIG: failed to find "
10250 "Resource Descriptor:x%x\n",
10251 LPFC_RSRC_DESC_TYPE_FCFCOE);
10252
10253 read_cfg_out:
10254 mempool_free(pmb, phba->mbox_mem_pool);
10255 return rc;
10256 }
10257
10258 /**
10259 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
10260 * @phba: pointer to lpfc hba data structure.
10261 *
10262 * This routine is invoked to setup the port-side endian order when
10263 * the port if_type is 0. This routine has no function for other
10264 * if_types.
10265 *
10266 * Return codes
10267 * 0 - successful
10268 * -ENOMEM - No available memory
10269 * -EIO - The mailbox failed to complete successfully.
10270 **/
10271 static int
lpfc_setup_endian_order(struct lpfc_hba * phba)10272 lpfc_setup_endian_order(struct lpfc_hba *phba)
10273 {
10274 LPFC_MBOXQ_t *mboxq;
10275 uint32_t if_type, rc = 0;
10276 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
10277 HOST_ENDIAN_HIGH_WORD1};
10278
10279 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10280 switch (if_type) {
10281 case LPFC_SLI_INTF_IF_TYPE_0:
10282 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
10283 GFP_KERNEL);
10284 if (!mboxq) {
10285 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10286 "0492 Unable to allocate memory for "
10287 "issuing SLI_CONFIG_SPECIAL mailbox "
10288 "command\n");
10289 return -ENOMEM;
10290 }
10291
10292 /*
10293 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
10294 * two words to contain special data values and no other data.
10295 */
10296 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
10297 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
10298 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10299 if (rc != MBX_SUCCESS) {
10300 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10301 "0493 SLI_CONFIG_SPECIAL mailbox "
10302 "failed with status x%x\n",
10303 rc);
10304 rc = -EIO;
10305 }
10306 mempool_free(mboxq, phba->mbox_mem_pool);
10307 break;
10308 case LPFC_SLI_INTF_IF_TYPE_6:
10309 case LPFC_SLI_INTF_IF_TYPE_2:
10310 case LPFC_SLI_INTF_IF_TYPE_1:
10311 default:
10312 break;
10313 }
10314 return rc;
10315 }
10316
10317 /**
10318 * lpfc_sli4_queue_verify - Verify and update EQ counts
10319 * @phba: pointer to lpfc hba data structure.
10320 *
10321 * This routine is invoked to check the user settable queue counts for EQs.
10322 * After this routine is called the counts will be set to valid values that
10323 * adhere to the constraints of the system's interrupt vectors and the port's
10324 * queue resources.
10325 *
10326 * Return codes
10327 * 0 - successful
10328 * -ENOMEM - No available memory
10329 **/
10330 static int
lpfc_sli4_queue_verify(struct lpfc_hba * phba)10331 lpfc_sli4_queue_verify(struct lpfc_hba *phba)
10332 {
10333 /*
10334 * Sanity check for configured queue parameters against the run-time
10335 * device parameters
10336 */
10337
10338 if (phba->nvmet_support) {
10339 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
10340 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
10341 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
10342 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
10343 }
10344
10345 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10346 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
10347 phba->cfg_hdw_queue, phba->cfg_irq_chann,
10348 phba->cfg_nvmet_mrq);
10349
10350 /* Get EQ depth from module parameter, fake the default for now */
10351 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10352 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10353
10354 /* Get CQ depth from module parameter, fake the default for now */
10355 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10356 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10357 return 0;
10358 }
10359
10360 static int
lpfc_alloc_io_wq_cq(struct lpfc_hba * phba,int idx)10361 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
10362 {
10363 struct lpfc_queue *qdesc;
10364 u32 wqesize;
10365 int cpu;
10366
10367 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
10368 /* Create Fast Path IO CQs */
10369 if (phba->enab_exp_wqcq_pages)
10370 /* Increase the CQ size when WQEs contain an embedded cdb */
10371 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10372 phba->sli4_hba.cq_esize,
10373 LPFC_CQE_EXP_COUNT, cpu);
10374
10375 else
10376 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10377 phba->sli4_hba.cq_esize,
10378 phba->sli4_hba.cq_ecount, cpu);
10379 if (!qdesc) {
10380 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10381 "0499 Failed allocate fast-path IO CQ (%d)\n",
10382 idx);
10383 return 1;
10384 }
10385 qdesc->qe_valid = 1;
10386 qdesc->hdwq = idx;
10387 qdesc->chann = cpu;
10388 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10389
10390 /* Create Fast Path IO WQs */
10391 if (phba->enab_exp_wqcq_pages) {
10392 /* Increase the WQ size when WQEs contain an embedded cdb */
10393 wqesize = (phba->fcp_embed_io) ?
10394 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10395 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10396 wqesize,
10397 LPFC_WQE_EXP_COUNT, cpu);
10398 } else
10399 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10400 phba->sli4_hba.wq_esize,
10401 phba->sli4_hba.wq_ecount, cpu);
10402
10403 if (!qdesc) {
10404 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10405 "0503 Failed allocate fast-path IO WQ (%d)\n",
10406 idx);
10407 return 1;
10408 }
10409 qdesc->hdwq = idx;
10410 qdesc->chann = cpu;
10411 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10412 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10413 return 0;
10414 }
10415
10416 /**
10417 * lpfc_sli4_queue_create - Create all the SLI4 queues
10418 * @phba: pointer to lpfc hba data structure.
10419 *
10420 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
10421 * operation. For each SLI4 queue type, the parameters such as queue entry
10422 * count (queue depth) shall be taken from the module parameter. For now,
10423 * we just use some constant number as place holder.
10424 *
10425 * Return codes
10426 * 0 - successful
10427 * -ENOMEM - No availble memory
10428 * -EIO - The mailbox failed to complete successfully.
10429 **/
10430 int
lpfc_sli4_queue_create(struct lpfc_hba * phba)10431 lpfc_sli4_queue_create(struct lpfc_hba *phba)
10432 {
10433 struct lpfc_queue *qdesc;
10434 int idx, cpu, eqcpu;
10435 struct lpfc_sli4_hdw_queue *qp;
10436 struct lpfc_vector_map_info *cpup;
10437 struct lpfc_vector_map_info *eqcpup;
10438 struct lpfc_eq_intr_info *eqi;
10439
10440 /*
10441 * Create HBA Record arrays.
10442 * Both NVME and FCP will share that same vectors / EQs
10443 */
10444 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10445 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10446 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10447 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10448 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10449 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10450 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10451 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10452 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10453 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10454
10455 if (!phba->sli4_hba.hdwq) {
10456 phba->sli4_hba.hdwq = kcalloc(
10457 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
10458 GFP_KERNEL);
10459 if (!phba->sli4_hba.hdwq) {
10460 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10461 "6427 Failed allocate memory for "
10462 "fast-path Hardware Queue array\n");
10463 goto out_error;
10464 }
10465 /* Prepare hardware queues to take IO buffers */
10466 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10467 qp = &phba->sli4_hba.hdwq[idx];
10468 spin_lock_init(&qp->io_buf_list_get_lock);
10469 spin_lock_init(&qp->io_buf_list_put_lock);
10470 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
10471 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
10472 qp->get_io_bufs = 0;
10473 qp->put_io_bufs = 0;
10474 qp->total_io_bufs = 0;
10475 spin_lock_init(&qp->abts_io_buf_list_lock);
10476 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
10477 qp->abts_scsi_io_bufs = 0;
10478 qp->abts_nvme_io_bufs = 0;
10479 INIT_LIST_HEAD(&qp->sgl_list);
10480 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
10481 spin_lock_init(&qp->hdwq_lock);
10482 }
10483 }
10484
10485 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10486 if (phba->nvmet_support) {
10487 phba->sli4_hba.nvmet_cqset = kcalloc(
10488 phba->cfg_nvmet_mrq,
10489 sizeof(struct lpfc_queue *),
10490 GFP_KERNEL);
10491 if (!phba->sli4_hba.nvmet_cqset) {
10492 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10493 "3121 Fail allocate memory for "
10494 "fast-path CQ set array\n");
10495 goto out_error;
10496 }
10497 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
10498 phba->cfg_nvmet_mrq,
10499 sizeof(struct lpfc_queue *),
10500 GFP_KERNEL);
10501 if (!phba->sli4_hba.nvmet_mrq_hdr) {
10502 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10503 "3122 Fail allocate memory for "
10504 "fast-path RQ set hdr array\n");
10505 goto out_error;
10506 }
10507 phba->sli4_hba.nvmet_mrq_data = kcalloc(
10508 phba->cfg_nvmet_mrq,
10509 sizeof(struct lpfc_queue *),
10510 GFP_KERNEL);
10511 if (!phba->sli4_hba.nvmet_mrq_data) {
10512 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10513 "3124 Fail allocate memory for "
10514 "fast-path RQ set data array\n");
10515 goto out_error;
10516 }
10517 }
10518 }
10519
10520 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10521
10522 /* Create HBA Event Queues (EQs) */
10523 for_each_present_cpu(cpu) {
10524 /* We only want to create 1 EQ per vector, even though
10525 * multiple CPUs might be using that vector. so only
10526 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
10527 */
10528 cpup = &phba->sli4_hba.cpu_map[cpu];
10529 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10530 continue;
10531
10532 /* Get a ptr to the Hardware Queue associated with this CPU */
10533 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10534
10535 /* Allocate an EQ */
10536 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10537 phba->sli4_hba.eq_esize,
10538 phba->sli4_hba.eq_ecount, cpu);
10539 if (!qdesc) {
10540 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10541 "0497 Failed allocate EQ (%d)\n",
10542 cpup->hdwq);
10543 goto out_error;
10544 }
10545 qdesc->qe_valid = 1;
10546 qdesc->hdwq = cpup->hdwq;
10547 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
10548 qdesc->last_cpu = qdesc->chann;
10549
10550 /* Save the allocated EQ in the Hardware Queue */
10551 qp->hba_eq = qdesc;
10552
10553 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10554 list_add(&qdesc->cpu_list, &eqi->list);
10555 }
10556
10557 /* Now we need to populate the other Hardware Queues, that share
10558 * an IRQ vector, with the associated EQ ptr.
10559 */
10560 for_each_present_cpu(cpu) {
10561 cpup = &phba->sli4_hba.cpu_map[cpu];
10562
10563 /* Check for EQ already allocated in previous loop */
10564 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10565 continue;
10566
10567 /* Check for multiple CPUs per hdwq */
10568 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10569 if (qp->hba_eq)
10570 continue;
10571
10572 /* We need to share an EQ for this hdwq */
10573 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
10574 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10575 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10576 }
10577
10578 /* Allocate IO Path SLI4 CQ/WQs */
10579 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10580 if (lpfc_alloc_io_wq_cq(phba, idx))
10581 goto out_error;
10582 }
10583
10584 if (phba->nvmet_support) {
10585 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10586 cpu = lpfc_find_cpu_handle(phba, idx,
10587 LPFC_FIND_BY_HDWQ);
10588 qdesc = lpfc_sli4_queue_alloc(phba,
10589 LPFC_DEFAULT_PAGE_SIZE,
10590 phba->sli4_hba.cq_esize,
10591 phba->sli4_hba.cq_ecount,
10592 cpu);
10593 if (!qdesc) {
10594 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10595 "3142 Failed allocate NVME "
10596 "CQ Set (%d)\n", idx);
10597 goto out_error;
10598 }
10599 qdesc->qe_valid = 1;
10600 qdesc->hdwq = idx;
10601 qdesc->chann = cpu;
10602 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10603 }
10604 }
10605
10606 /*
10607 * Create Slow Path Completion Queues (CQs)
10608 */
10609
10610 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
10611 /* Create slow-path Mailbox Command Complete Queue */
10612 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10613 phba->sli4_hba.cq_esize,
10614 phba->sli4_hba.cq_ecount, cpu);
10615 if (!qdesc) {
10616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10617 "0500 Failed allocate slow-path mailbox CQ\n");
10618 goto out_error;
10619 }
10620 qdesc->qe_valid = 1;
10621 phba->sli4_hba.mbx_cq = qdesc;
10622
10623 /* Create slow-path ELS Complete Queue */
10624 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10625 phba->sli4_hba.cq_esize,
10626 phba->sli4_hba.cq_ecount, cpu);
10627 if (!qdesc) {
10628 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10629 "0501 Failed allocate slow-path ELS CQ\n");
10630 goto out_error;
10631 }
10632 qdesc->qe_valid = 1;
10633 qdesc->chann = cpu;
10634 phba->sli4_hba.els_cq = qdesc;
10635
10636
10637 /*
10638 * Create Slow Path Work Queues (WQs)
10639 */
10640
10641 /* Create Mailbox Command Queue */
10642
10643 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10644 phba->sli4_hba.mq_esize,
10645 phba->sli4_hba.mq_ecount, cpu);
10646 if (!qdesc) {
10647 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10648 "0505 Failed allocate slow-path MQ\n");
10649 goto out_error;
10650 }
10651 qdesc->chann = cpu;
10652 phba->sli4_hba.mbx_wq = qdesc;
10653
10654 /*
10655 * Create ELS Work Queues
10656 */
10657
10658 /* Create slow-path ELS Work Queue */
10659 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10660 phba->sli4_hba.wq_esize,
10661 phba->sli4_hba.wq_ecount, cpu);
10662 if (!qdesc) {
10663 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10664 "0504 Failed allocate slow-path ELS WQ\n");
10665 goto out_error;
10666 }
10667 qdesc->chann = cpu;
10668 phba->sli4_hba.els_wq = qdesc;
10669 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10670
10671 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10672 /* Create NVME LS Complete Queue */
10673 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10674 phba->sli4_hba.cq_esize,
10675 phba->sli4_hba.cq_ecount, cpu);
10676 if (!qdesc) {
10677 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10678 "6079 Failed allocate NVME LS CQ\n");
10679 goto out_error;
10680 }
10681 qdesc->chann = cpu;
10682 qdesc->qe_valid = 1;
10683 phba->sli4_hba.nvmels_cq = qdesc;
10684
10685 /* Create NVME LS Work Queue */
10686 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10687 phba->sli4_hba.wq_esize,
10688 phba->sli4_hba.wq_ecount, cpu);
10689 if (!qdesc) {
10690 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10691 "6080 Failed allocate NVME LS WQ\n");
10692 goto out_error;
10693 }
10694 qdesc->chann = cpu;
10695 phba->sli4_hba.nvmels_wq = qdesc;
10696 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10697 }
10698
10699 /*
10700 * Create Receive Queue (RQ)
10701 */
10702
10703 /* Create Receive Queue for header */
10704 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10705 phba->sli4_hba.rq_esize,
10706 phba->sli4_hba.rq_ecount, cpu);
10707 if (!qdesc) {
10708 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10709 "0506 Failed allocate receive HRQ\n");
10710 goto out_error;
10711 }
10712 phba->sli4_hba.hdr_rq = qdesc;
10713
10714 /* Create Receive Queue for data */
10715 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10716 phba->sli4_hba.rq_esize,
10717 phba->sli4_hba.rq_ecount, cpu);
10718 if (!qdesc) {
10719 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10720 "0507 Failed allocate receive DRQ\n");
10721 goto out_error;
10722 }
10723 phba->sli4_hba.dat_rq = qdesc;
10724
10725 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
10726 phba->nvmet_support) {
10727 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10728 cpu = lpfc_find_cpu_handle(phba, idx,
10729 LPFC_FIND_BY_HDWQ);
10730 /* Create NVMET Receive Queue for header */
10731 qdesc = lpfc_sli4_queue_alloc(phba,
10732 LPFC_DEFAULT_PAGE_SIZE,
10733 phba->sli4_hba.rq_esize,
10734 LPFC_NVMET_RQE_DEF_COUNT,
10735 cpu);
10736 if (!qdesc) {
10737 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10738 "3146 Failed allocate "
10739 "receive HRQ\n");
10740 goto out_error;
10741 }
10742 qdesc->hdwq = idx;
10743 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10744
10745 /* Only needed for header of RQ pair */
10746 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
10747 GFP_KERNEL,
10748 cpu_to_node(cpu));
10749 if (qdesc->rqbp == NULL) {
10750 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10751 "6131 Failed allocate "
10752 "Header RQBP\n");
10753 goto out_error;
10754 }
10755
10756 /* Put list in known state in case driver load fails. */
10757 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
10758
10759 /* Create NVMET Receive Queue for data */
10760 qdesc = lpfc_sli4_queue_alloc(phba,
10761 LPFC_DEFAULT_PAGE_SIZE,
10762 phba->sli4_hba.rq_esize,
10763 LPFC_NVMET_RQE_DEF_COUNT,
10764 cpu);
10765 if (!qdesc) {
10766 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10767 "3156 Failed allocate "
10768 "receive DRQ\n");
10769 goto out_error;
10770 }
10771 qdesc->hdwq = idx;
10772 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10773 }
10774 }
10775
10776 /* Clear NVME stats */
10777 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10778 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10779 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10780 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10781 }
10782 }
10783
10784 /* Clear SCSI stats */
10785 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
10786 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10787 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10788 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10789 }
10790 }
10791
10792 return 0;
10793
10794 out_error:
10795 lpfc_sli4_queue_destroy(phba);
10796 return -ENOMEM;
10797 }
10798
10799 static inline void
__lpfc_sli4_release_queue(struct lpfc_queue ** qp)10800 __lpfc_sli4_release_queue(struct lpfc_queue **qp)
10801 {
10802 if (*qp != NULL) {
10803 lpfc_sli4_queue_free(*qp);
10804 *qp = NULL;
10805 }
10806 }
10807
10808 static inline void
lpfc_sli4_release_queues(struct lpfc_queue *** qs,int max)10809 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
10810 {
10811 int idx;
10812
10813 if (*qs == NULL)
10814 return;
10815
10816 for (idx = 0; idx < max; idx++)
10817 __lpfc_sli4_release_queue(&(*qs)[idx]);
10818
10819 kfree(*qs);
10820 *qs = NULL;
10821 }
10822
10823 static inline void
lpfc_sli4_release_hdwq(struct lpfc_hba * phba)10824 lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
10825 {
10826 struct lpfc_sli4_hdw_queue *hdwq;
10827 struct lpfc_queue *eq;
10828 uint32_t idx;
10829
10830 hdwq = phba->sli4_hba.hdwq;
10831
10832 /* Loop thru all Hardware Queues */
10833 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10834 /* Free the CQ/WQ corresponding to the Hardware Queue */
10835 lpfc_sli4_queue_free(hdwq[idx].io_cq);
10836 lpfc_sli4_queue_free(hdwq[idx].io_wq);
10837 hdwq[idx].hba_eq = NULL;
10838 hdwq[idx].io_cq = NULL;
10839 hdwq[idx].io_wq = NULL;
10840 if (phba->cfg_xpsgl && !phba->nvmet_support)
10841 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
10842 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
10843 }
10844 /* Loop thru all IRQ vectors */
10845 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10846 /* Free the EQ corresponding to the IRQ vector */
10847 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10848 lpfc_sli4_queue_free(eq);
10849 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10850 }
10851 }
10852
10853 /**
10854 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
10855 * @phba: pointer to lpfc hba data structure.
10856 *
10857 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
10858 * operation.
10859 *
10860 * Return codes
10861 * 0 - successful
10862 * -ENOMEM - No available memory
10863 * -EIO - The mailbox failed to complete successfully.
10864 **/
10865 void
lpfc_sli4_queue_destroy(struct lpfc_hba * phba)10866 lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
10867 {
10868 /*
10869 * Set FREE_INIT before beginning to free the queues.
10870 * Wait until the users of queues to acknowledge to
10871 * release queues by clearing FREE_WAIT.
10872 */
10873 spin_lock_irq(&phba->hbalock);
10874 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
10875 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
10876 spin_unlock_irq(&phba->hbalock);
10877 msleep(20);
10878 spin_lock_irq(&phba->hbalock);
10879 }
10880 spin_unlock_irq(&phba->hbalock);
10881
10882 lpfc_sli4_cleanup_poll_list(phba);
10883
10884 /* Release HBA eqs */
10885 if (phba->sli4_hba.hdwq)
10886 lpfc_sli4_release_hdwq(phba);
10887
10888 if (phba->nvmet_support) {
10889 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10890 phba->cfg_nvmet_mrq);
10891
10892 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10893 phba->cfg_nvmet_mrq);
10894 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10895 phba->cfg_nvmet_mrq);
10896 }
10897
10898 /* Release mailbox command work queue */
10899 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10900
10901 /* Release ELS work queue */
10902 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10903
10904 /* Release ELS work queue */
10905 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10906
10907 /* Release unsolicited receive queue */
10908 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10909 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10910
10911 /* Release ELS complete queue */
10912 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10913
10914 /* Release NVME LS complete queue */
10915 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10916
10917 /* Release mailbox command complete queue */
10918 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10919
10920 /* Everything on this list has been freed */
10921 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10922
10923 /* Done with freeing the queues */
10924 spin_lock_irq(&phba->hbalock);
10925 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
10926 spin_unlock_irq(&phba->hbalock);
10927 }
10928
10929 int
lpfc_free_rq_buffer(struct lpfc_hba * phba,struct lpfc_queue * rq)10930 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
10931 {
10932 struct lpfc_rqb *rqbp;
10933 struct lpfc_dmabuf *h_buf;
10934 struct rqb_dmabuf *rqb_buffer;
10935
10936 rqbp = rq->rqbp;
10937 while (!list_empty(&rqbp->rqb_buffer_list)) {
10938 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
10939 struct lpfc_dmabuf, list);
10940
10941 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
10942 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
10943 rqbp->buffer_count--;
10944 }
10945 return 1;
10946 }
10947
10948 static int
lpfc_create_wq_cq(struct lpfc_hba * phba,struct lpfc_queue * eq,struct lpfc_queue * cq,struct lpfc_queue * wq,uint16_t * cq_map,int qidx,uint32_t qtype)10949 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
10950 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
10951 int qidx, uint32_t qtype)
10952 {
10953 struct lpfc_sli_ring *pring;
10954 int rc;
10955
10956 if (!eq || !cq || !wq) {
10957 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10958 "6085 Fast-path %s (%d) not allocated\n",
10959 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
10960 return -ENOMEM;
10961 }
10962
10963 /* create the Cq first */
10964 rc = lpfc_cq_create(phba, cq, eq,
10965 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
10966 if (rc) {
10967 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10968 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
10969 qidx, (uint32_t)rc);
10970 return rc;
10971 }
10972
10973 if (qtype != LPFC_MBOX) {
10974 /* Setup cq_map for fast lookup */
10975 if (cq_map)
10976 *cq_map = cq->queue_id;
10977
10978 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10979 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
10980 qidx, cq->queue_id, qidx, eq->queue_id);
10981
10982 /* create the wq */
10983 rc = lpfc_wq_create(phba, wq, cq, qtype);
10984 if (rc) {
10985 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10986 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
10987 qidx, (uint32_t)rc);
10988 /* no need to tear down cq - caller will do so */
10989 return rc;
10990 }
10991
10992 /* Bind this CQ/WQ to the NVME ring */
10993 pring = wq->pring;
10994 pring->sli.sli4.wqp = (void *)wq;
10995 cq->pring = pring;
10996
10997 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10998 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
10999 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
11000 } else {
11001 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
11002 if (rc) {
11003 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11004 "0539 Failed setup of slow-path MQ: "
11005 "rc = 0x%x\n", rc);
11006 /* no need to tear down cq - caller will do so */
11007 return rc;
11008 }
11009
11010 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11011 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
11012 phba->sli4_hba.mbx_wq->queue_id,
11013 phba->sli4_hba.mbx_cq->queue_id);
11014 }
11015
11016 return 0;
11017 }
11018
11019 /**
11020 * lpfc_setup_cq_lookup - Setup the CQ lookup table
11021 * @phba: pointer to lpfc hba data structure.
11022 *
11023 * This routine will populate the cq_lookup table by all
11024 * available CQ queue_id's.
11025 **/
11026 static void
lpfc_setup_cq_lookup(struct lpfc_hba * phba)11027 lpfc_setup_cq_lookup(struct lpfc_hba *phba)
11028 {
11029 struct lpfc_queue *eq, *childq;
11030 int qidx;
11031
11032 memset(phba->sli4_hba.cq_lookup, 0,
11033 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11034 /* Loop thru all IRQ vectors */
11035 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11036 /* Get the EQ corresponding to the IRQ vector */
11037 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11038 if (!eq)
11039 continue;
11040 /* Loop through all CQs associated with that EQ */
11041 list_for_each_entry(childq, &eq->child_list, list) {
11042 if (childq->queue_id > phba->sli4_hba.cq_max)
11043 continue;
11044 if (childq->subtype == LPFC_IO)
11045 phba->sli4_hba.cq_lookup[childq->queue_id] =
11046 childq;
11047 }
11048 }
11049 }
11050
11051 /**
11052 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
11053 * @phba: pointer to lpfc hba data structure.
11054 *
11055 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
11056 * operation.
11057 *
11058 * Return codes
11059 * 0 - successful
11060 * -ENOMEM - No available memory
11061 * -EIO - The mailbox failed to complete successfully.
11062 **/
11063 int
lpfc_sli4_queue_setup(struct lpfc_hba * phba)11064 lpfc_sli4_queue_setup(struct lpfc_hba *phba)
11065 {
11066 uint32_t shdr_status, shdr_add_status;
11067 union lpfc_sli4_cfg_shdr *shdr;
11068 struct lpfc_vector_map_info *cpup;
11069 struct lpfc_sli4_hdw_queue *qp;
11070 LPFC_MBOXQ_t *mboxq;
11071 int qidx, cpu;
11072 uint32_t length, usdelay;
11073 int rc = -ENOMEM;
11074
11075 /* Check for dual-ULP support */
11076 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
11077 if (!mboxq) {
11078 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11079 "3249 Unable to allocate memory for "
11080 "QUERY_FW_CFG mailbox command\n");
11081 return -ENOMEM;
11082 }
11083 length = (sizeof(struct lpfc_mbx_query_fw_config) -
11084 sizeof(struct lpfc_sli4_cfg_mhdr));
11085 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11086 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
11087 length, LPFC_SLI4_MBX_EMBED);
11088
11089 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11090
11091 shdr = (union lpfc_sli4_cfg_shdr *)
11092 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11093 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11094 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
11095 if (shdr_status || shdr_add_status || rc) {
11096 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11097 "3250 QUERY_FW_CFG mailbox failed with status "
11098 "x%x add_status x%x, mbx status x%x\n",
11099 shdr_status, shdr_add_status, rc);
11100 mempool_free(mboxq, phba->mbox_mem_pool);
11101 rc = -ENXIO;
11102 goto out_error;
11103 }
11104
11105 phba->sli4_hba.fw_func_mode =
11106 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
11107 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
11108 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
11109 phba->sli4_hba.physical_port =
11110 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
11111 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11112 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
11113 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
11114 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
11115
11116 mempool_free(mboxq, phba->mbox_mem_pool);
11117
11118 /*
11119 * Set up HBA Event Queues (EQs)
11120 */
11121 qp = phba->sli4_hba.hdwq;
11122
11123 /* Set up HBA event queue */
11124 if (!qp) {
11125 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11126 "3147 Fast-path EQs not allocated\n");
11127 rc = -ENOMEM;
11128 goto out_error;
11129 }
11130
11131 /* Loop thru all IRQ vectors */
11132 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11133 /* Create HBA Event Queues (EQs) in order */
11134 for_each_present_cpu(cpu) {
11135 cpup = &phba->sli4_hba.cpu_map[cpu];
11136
11137 /* Look for the CPU thats using that vector with
11138 * LPFC_CPU_FIRST_IRQ set.
11139 */
11140 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
11141 continue;
11142 if (qidx != cpup->eq)
11143 continue;
11144
11145 /* Create an EQ for that vector */
11146 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
11147 phba->cfg_fcp_imax);
11148 if (rc) {
11149 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11150 "0523 Failed setup of fast-path"
11151 " EQ (%d), rc = 0x%x\n",
11152 cpup->eq, (uint32_t)rc);
11153 goto out_destroy;
11154 }
11155
11156 /* Save the EQ for that vector in the hba_eq_hdl */
11157 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11158 qp[cpup->hdwq].hba_eq;
11159
11160 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11161 "2584 HBA EQ setup: queue[%d]-id=%d\n",
11162 cpup->eq,
11163 qp[cpup->hdwq].hba_eq->queue_id);
11164 }
11165 }
11166
11167 /* Loop thru all Hardware Queues */
11168 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11169 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
11170 cpup = &phba->sli4_hba.cpu_map[cpu];
11171
11172 /* Create the CQ/WQ corresponding to the Hardware Queue */
11173 rc = lpfc_create_wq_cq(phba,
11174 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11175 qp[qidx].io_cq,
11176 qp[qidx].io_wq,
11177 &phba->sli4_hba.hdwq[qidx].io_cq_map,
11178 qidx,
11179 LPFC_IO);
11180 if (rc) {
11181 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11182 "0535 Failed to setup fastpath "
11183 "IO WQ/CQ (%d), rc = 0x%x\n",
11184 qidx, (uint32_t)rc);
11185 goto out_destroy;
11186 }
11187 }
11188
11189 /*
11190 * Set up Slow Path Complete Queues (CQs)
11191 */
11192
11193 /* Set up slow-path MBOX CQ/MQ */
11194
11195 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11196 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11197 "0528 %s not allocated\n",
11198 phba->sli4_hba.mbx_cq ?
11199 "Mailbox WQ" : "Mailbox CQ");
11200 rc = -ENOMEM;
11201 goto out_destroy;
11202 }
11203
11204 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11205 phba->sli4_hba.mbx_cq,
11206 phba->sli4_hba.mbx_wq,
11207 NULL, 0, LPFC_MBOX);
11208 if (rc) {
11209 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11210 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
11211 (uint32_t)rc);
11212 goto out_destroy;
11213 }
11214 if (phba->nvmet_support) {
11215 if (!phba->sli4_hba.nvmet_cqset) {
11216 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11217 "3165 Fast-path NVME CQ Set "
11218 "array not allocated\n");
11219 rc = -ENOMEM;
11220 goto out_destroy;
11221 }
11222 if (phba->cfg_nvmet_mrq > 1) {
11223 rc = lpfc_cq_create_set(phba,
11224 phba->sli4_hba.nvmet_cqset,
11225 qp,
11226 LPFC_WCQ, LPFC_NVMET);
11227 if (rc) {
11228 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11229 "3164 Failed setup of NVME CQ "
11230 "Set, rc = 0x%x\n",
11231 (uint32_t)rc);
11232 goto out_destroy;
11233 }
11234 } else {
11235 /* Set up NVMET Receive Complete Queue */
11236 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11237 qp[0].hba_eq,
11238 LPFC_WCQ, LPFC_NVMET);
11239 if (rc) {
11240 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11241 "6089 Failed setup NVMET CQ: "
11242 "rc = 0x%x\n", (uint32_t)rc);
11243 goto out_destroy;
11244 }
11245 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11246
11247 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11248 "6090 NVMET CQ setup: cq-id=%d, "
11249 "parent eq-id=%d\n",
11250 phba->sli4_hba.nvmet_cqset[0]->queue_id,
11251 qp[0].hba_eq->queue_id);
11252 }
11253 }
11254
11255 /* Set up slow-path ELS WQ/CQ */
11256 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11257 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11258 "0530 ELS %s not allocated\n",
11259 phba->sli4_hba.els_cq ? "WQ" : "CQ");
11260 rc = -ENOMEM;
11261 goto out_destroy;
11262 }
11263 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11264 phba->sli4_hba.els_cq,
11265 phba->sli4_hba.els_wq,
11266 NULL, 0, LPFC_ELS);
11267 if (rc) {
11268 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11269 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
11270 (uint32_t)rc);
11271 goto out_destroy;
11272 }
11273 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11274 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
11275 phba->sli4_hba.els_wq->queue_id,
11276 phba->sli4_hba.els_cq->queue_id);
11277
11278 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11279 /* Set up NVME LS Complete Queue */
11280 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11281 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11282 "6091 LS %s not allocated\n",
11283 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11284 rc = -ENOMEM;
11285 goto out_destroy;
11286 }
11287 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11288 phba->sli4_hba.nvmels_cq,
11289 phba->sli4_hba.nvmels_wq,
11290 NULL, 0, LPFC_NVME_LS);
11291 if (rc) {
11292 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11293 "0526 Failed setup of NVVME LS WQ/CQ: "
11294 "rc = 0x%x\n", (uint32_t)rc);
11295 goto out_destroy;
11296 }
11297
11298 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11299 "6096 ELS WQ setup: wq-id=%d, "
11300 "parent cq-id=%d\n",
11301 phba->sli4_hba.nvmels_wq->queue_id,
11302 phba->sli4_hba.nvmels_cq->queue_id);
11303 }
11304
11305 /*
11306 * Create NVMET Receive Queue (RQ)
11307 */
11308 if (phba->nvmet_support) {
11309 if ((!phba->sli4_hba.nvmet_cqset) ||
11310 (!phba->sli4_hba.nvmet_mrq_hdr) ||
11311 (!phba->sli4_hba.nvmet_mrq_data)) {
11312 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11313 "6130 MRQ CQ Queues not "
11314 "allocated\n");
11315 rc = -ENOMEM;
11316 goto out_destroy;
11317 }
11318 if (phba->cfg_nvmet_mrq > 1) {
11319 rc = lpfc_mrq_create(phba,
11320 phba->sli4_hba.nvmet_mrq_hdr,
11321 phba->sli4_hba.nvmet_mrq_data,
11322 phba->sli4_hba.nvmet_cqset,
11323 LPFC_NVMET);
11324 if (rc) {
11325 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11326 "6098 Failed setup of NVMET "
11327 "MRQ: rc = 0x%x\n",
11328 (uint32_t)rc);
11329 goto out_destroy;
11330 }
11331
11332 } else {
11333 rc = lpfc_rq_create(phba,
11334 phba->sli4_hba.nvmet_mrq_hdr[0],
11335 phba->sli4_hba.nvmet_mrq_data[0],
11336 phba->sli4_hba.nvmet_cqset[0],
11337 LPFC_NVMET);
11338 if (rc) {
11339 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11340 "6057 Failed setup of NVMET "
11341 "Receive Queue: rc = 0x%x\n",
11342 (uint32_t)rc);
11343 goto out_destroy;
11344 }
11345
11346 lpfc_printf_log(
11347 phba, KERN_INFO, LOG_INIT,
11348 "6099 NVMET RQ setup: hdr-rq-id=%d, "
11349 "dat-rq-id=%d parent cq-id=%d\n",
11350 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11351 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11352 phba->sli4_hba.nvmet_cqset[0]->queue_id);
11353
11354 }
11355 }
11356
11357 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11358 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11359 "0540 Receive Queue not allocated\n");
11360 rc = -ENOMEM;
11361 goto out_destroy;
11362 }
11363
11364 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11365 phba->sli4_hba.els_cq, LPFC_USOL);
11366 if (rc) {
11367 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11368 "0541 Failed setup of Receive Queue: "
11369 "rc = 0x%x\n", (uint32_t)rc);
11370 goto out_destroy;
11371 }
11372
11373 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11374 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
11375 "parent cq-id=%d\n",
11376 phba->sli4_hba.hdr_rq->queue_id,
11377 phba->sli4_hba.dat_rq->queue_id,
11378 phba->sli4_hba.els_cq->queue_id);
11379
11380 if (phba->cfg_fcp_imax)
11381 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
11382 else
11383 usdelay = 0;
11384
11385 for (qidx = 0; qidx < phba->cfg_irq_chann;
11386 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
11387 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
11388 usdelay);
11389
11390 if (phba->sli4_hba.cq_max) {
11391 kfree(phba->sli4_hba.cq_lookup);
11392 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
11393 sizeof(struct lpfc_queue *), GFP_KERNEL);
11394 if (!phba->sli4_hba.cq_lookup) {
11395 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11396 "0549 Failed setup of CQ Lookup table: "
11397 "size 0x%x\n", phba->sli4_hba.cq_max);
11398 rc = -ENOMEM;
11399 goto out_destroy;
11400 }
11401 lpfc_setup_cq_lookup(phba);
11402 }
11403 return 0;
11404
11405 out_destroy:
11406 lpfc_sli4_queue_unset(phba);
11407 out_error:
11408 return rc;
11409 }
11410
11411 /**
11412 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
11413 * @phba: pointer to lpfc hba data structure.
11414 *
11415 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
11416 * operation.
11417 *
11418 * Return codes
11419 * 0 - successful
11420 * -ENOMEM - No available memory
11421 * -EIO - The mailbox failed to complete successfully.
11422 **/
11423 void
lpfc_sli4_queue_unset(struct lpfc_hba * phba)11424 lpfc_sli4_queue_unset(struct lpfc_hba *phba)
11425 {
11426 struct lpfc_sli4_hdw_queue *qp;
11427 struct lpfc_queue *eq;
11428 int qidx;
11429
11430 /* Unset mailbox command work queue */
11431 if (phba->sli4_hba.mbx_wq)
11432 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11433
11434 /* Unset NVME LS work queue */
11435 if (phba->sli4_hba.nvmels_wq)
11436 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11437
11438 /* Unset ELS work queue */
11439 if (phba->sli4_hba.els_wq)
11440 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11441
11442 /* Unset unsolicited receive queue */
11443 if (phba->sli4_hba.hdr_rq)
11444 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11445 phba->sli4_hba.dat_rq);
11446
11447 /* Unset mailbox command complete queue */
11448 if (phba->sli4_hba.mbx_cq)
11449 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11450
11451 /* Unset ELS complete queue */
11452 if (phba->sli4_hba.els_cq)
11453 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11454
11455 /* Unset NVME LS complete queue */
11456 if (phba->sli4_hba.nvmels_cq)
11457 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11458
11459 if (phba->nvmet_support) {
11460 /* Unset NVMET MRQ queue */
11461 if (phba->sli4_hba.nvmet_mrq_hdr) {
11462 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11463 lpfc_rq_destroy(
11464 phba,
11465 phba->sli4_hba.nvmet_mrq_hdr[qidx],
11466 phba->sli4_hba.nvmet_mrq_data[qidx]);
11467 }
11468
11469 /* Unset NVMET CQ Set complete queue */
11470 if (phba->sli4_hba.nvmet_cqset) {
11471 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11472 lpfc_cq_destroy(
11473 phba, phba->sli4_hba.nvmet_cqset[qidx]);
11474 }
11475 }
11476
11477 /* Unset fast-path SLI4 queues */
11478 if (phba->sli4_hba.hdwq) {
11479 /* Loop thru all Hardware Queues */
11480 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11481 /* Destroy the CQ/WQ corresponding to Hardware Queue */
11482 qp = &phba->sli4_hba.hdwq[qidx];
11483 lpfc_wq_destroy(phba, qp->io_wq);
11484 lpfc_cq_destroy(phba, qp->io_cq);
11485 }
11486 /* Loop thru all IRQ vectors */
11487 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11488 /* Destroy the EQ corresponding to the IRQ vector */
11489 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11490 lpfc_eq_destroy(phba, eq);
11491 }
11492 }
11493
11494 kfree(phba->sli4_hba.cq_lookup);
11495 phba->sli4_hba.cq_lookup = NULL;
11496 phba->sli4_hba.cq_max = 0;
11497 }
11498
11499 /**
11500 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
11501 * @phba: pointer to lpfc hba data structure.
11502 *
11503 * This routine is invoked to allocate and set up a pool of completion queue
11504 * events. The body of the completion queue event is a completion queue entry
11505 * CQE. For now, this pool is used for the interrupt service routine to queue
11506 * the following HBA completion queue events for the worker thread to process:
11507 * - Mailbox asynchronous events
11508 * - Receive queue completion unsolicited events
11509 * Later, this can be used for all the slow-path events.
11510 *
11511 * Return codes
11512 * 0 - successful
11513 * -ENOMEM - No available memory
11514 **/
11515 static int
lpfc_sli4_cq_event_pool_create(struct lpfc_hba * phba)11516 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
11517 {
11518 struct lpfc_cq_event *cq_event;
11519 int i;
11520
11521 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11522 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
11523 if (!cq_event)
11524 goto out_pool_create_fail;
11525 list_add_tail(&cq_event->list,
11526 &phba->sli4_hba.sp_cqe_event_pool);
11527 }
11528 return 0;
11529
11530 out_pool_create_fail:
11531 lpfc_sli4_cq_event_pool_destroy(phba);
11532 return -ENOMEM;
11533 }
11534
11535 /**
11536 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
11537 * @phba: pointer to lpfc hba data structure.
11538 *
11539 * This routine is invoked to free the pool of completion queue events at
11540 * driver unload time. Note that, it is the responsibility of the driver
11541 * cleanup routine to free all the outstanding completion-queue events
11542 * allocated from this pool back into the pool before invoking this routine
11543 * to destroy the pool.
11544 **/
11545 static void
lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba * phba)11546 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
11547 {
11548 struct lpfc_cq_event *cq_event, *next_cq_event;
11549
11550 list_for_each_entry_safe(cq_event, next_cq_event,
11551 &phba->sli4_hba.sp_cqe_event_pool, list) {
11552 list_del(&cq_event->list);
11553 kfree(cq_event);
11554 }
11555 }
11556
11557 /**
11558 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11559 * @phba: pointer to lpfc hba data structure.
11560 *
11561 * This routine is the lock free version of the API invoked to allocate a
11562 * completion-queue event from the free pool.
11563 *
11564 * Return: Pointer to the newly allocated completion-queue event if successful
11565 * NULL otherwise.
11566 **/
11567 struct lpfc_cq_event *
__lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11568 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11569 {
11570 struct lpfc_cq_event *cq_event = NULL;
11571
11572 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11573 struct lpfc_cq_event, list);
11574 return cq_event;
11575 }
11576
11577 /**
11578 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11579 * @phba: pointer to lpfc hba data structure.
11580 *
11581 * This routine is the lock version of the API invoked to allocate a
11582 * completion-queue event from the free pool.
11583 *
11584 * Return: Pointer to the newly allocated completion-queue event if successful
11585 * NULL otherwise.
11586 **/
11587 struct lpfc_cq_event *
lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11588 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11589 {
11590 struct lpfc_cq_event *cq_event;
11591 unsigned long iflags;
11592
11593 spin_lock_irqsave(&phba->hbalock, iflags);
11594 cq_event = __lpfc_sli4_cq_event_alloc(phba);
11595 spin_unlock_irqrestore(&phba->hbalock, iflags);
11596 return cq_event;
11597 }
11598
11599 /**
11600 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11601 * @phba: pointer to lpfc hba data structure.
11602 * @cq_event: pointer to the completion queue event to be freed.
11603 *
11604 * This routine is the lock free version of the API invoked to release a
11605 * completion-queue event back into the free pool.
11606 **/
11607 void
__lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11608 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11609 struct lpfc_cq_event *cq_event)
11610 {
11611 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11612 }
11613
11614 /**
11615 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11616 * @phba: pointer to lpfc hba data structure.
11617 * @cq_event: pointer to the completion queue event to be freed.
11618 *
11619 * This routine is the lock version of the API invoked to release a
11620 * completion-queue event back into the free pool.
11621 **/
11622 void
lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11623 lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11624 struct lpfc_cq_event *cq_event)
11625 {
11626 unsigned long iflags;
11627 spin_lock_irqsave(&phba->hbalock, iflags);
11628 __lpfc_sli4_cq_event_release(phba, cq_event);
11629 spin_unlock_irqrestore(&phba->hbalock, iflags);
11630 }
11631
11632 /**
11633 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
11634 * @phba: pointer to lpfc hba data structure.
11635 *
11636 * This routine is to free all the pending completion-queue events to the
11637 * back into the free pool for device reset.
11638 **/
11639 static void
lpfc_sli4_cq_event_release_all(struct lpfc_hba * phba)11640 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
11641 {
11642 LIST_HEAD(cq_event_list);
11643 struct lpfc_cq_event *cq_event;
11644 unsigned long iflags;
11645
11646 /* Retrieve all the pending WCQEs from pending WCQE lists */
11647
11648 /* Pending ELS XRI abort events */
11649 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11650 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11651 &cq_event_list);
11652 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11653
11654 /* Pending asynnc events */
11655 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11656 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11657 &cq_event_list);
11658 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11659
11660 while (!list_empty(&cq_event_list)) {
11661 list_remove_head(&cq_event_list, cq_event,
11662 struct lpfc_cq_event, list);
11663 lpfc_sli4_cq_event_release(phba, cq_event);
11664 }
11665 }
11666
11667 /**
11668 * lpfc_pci_function_reset - Reset pci function.
11669 * @phba: pointer to lpfc hba data structure.
11670 *
11671 * This routine is invoked to request a PCI function reset. It will destroys
11672 * all resources assigned to the PCI function which originates this request.
11673 *
11674 * Return codes
11675 * 0 - successful
11676 * -ENOMEM - No available memory
11677 * -EIO - The mailbox failed to complete successfully.
11678 **/
11679 int
lpfc_pci_function_reset(struct lpfc_hba * phba)11680 lpfc_pci_function_reset(struct lpfc_hba *phba)
11681 {
11682 LPFC_MBOXQ_t *mboxq;
11683 uint32_t rc = 0, if_type;
11684 uint32_t shdr_status, shdr_add_status;
11685 uint32_t rdy_chk;
11686 uint32_t port_reset = 0;
11687 union lpfc_sli4_cfg_shdr *shdr;
11688 struct lpfc_register reg_data;
11689 uint16_t devid;
11690
11691 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11692 switch (if_type) {
11693 case LPFC_SLI_INTF_IF_TYPE_0:
11694 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
11695 GFP_KERNEL);
11696 if (!mboxq) {
11697 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11698 "0494 Unable to allocate memory for "
11699 "issuing SLI_FUNCTION_RESET mailbox "
11700 "command\n");
11701 return -ENOMEM;
11702 }
11703
11704 /* Setup PCI function reset mailbox-ioctl command */
11705 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11706 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
11707 LPFC_SLI4_MBX_EMBED);
11708 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11709 shdr = (union lpfc_sli4_cfg_shdr *)
11710 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11711 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11712 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
11713 &shdr->response);
11714 mempool_free(mboxq, phba->mbox_mem_pool);
11715 if (shdr_status || shdr_add_status || rc) {
11716 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11717 "0495 SLI_FUNCTION_RESET mailbox "
11718 "failed with status x%x add_status x%x,"
11719 " mbx status x%x\n",
11720 shdr_status, shdr_add_status, rc);
11721 rc = -ENXIO;
11722 }
11723 break;
11724 case LPFC_SLI_INTF_IF_TYPE_2:
11725 case LPFC_SLI_INTF_IF_TYPE_6:
11726 wait:
11727 /*
11728 * Poll the Port Status Register and wait for RDY for
11729 * up to 30 seconds. If the port doesn't respond, treat
11730 * it as an error.
11731 */
11732 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
11733 if (lpfc_readl(phba->sli4_hba.u.if_type2.
11734 STATUSregaddr, ®_data.word0)) {
11735 rc = -ENODEV;
11736 goto out;
11737 }
11738 if (bf_get(lpfc_sliport_status_rdy, ®_data))
11739 break;
11740 msleep(20);
11741 }
11742
11743 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
11744 phba->work_status[0] = readl(
11745 phba->sli4_hba.u.if_type2.ERR1regaddr);
11746 phba->work_status[1] = readl(
11747 phba->sli4_hba.u.if_type2.ERR2regaddr);
11748 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11749 "2890 Port not ready, port status reg "
11750 "0x%x error 1=0x%x, error 2=0x%x\n",
11751 reg_data.word0,
11752 phba->work_status[0],
11753 phba->work_status[1]);
11754 rc = -ENODEV;
11755 goto out;
11756 }
11757
11758 if (bf_get(lpfc_sliport_status_pldv, ®_data))
11759 lpfc_pldv_detect = true;
11760
11761 if (!port_reset) {
11762 /*
11763 * Reset the port now
11764 */
11765 reg_data.word0 = 0;
11766 bf_set(lpfc_sliport_ctrl_end, ®_data,
11767 LPFC_SLIPORT_LITTLE_ENDIAN);
11768 bf_set(lpfc_sliport_ctrl_ip, ®_data,
11769 LPFC_SLIPORT_INIT_PORT);
11770 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11771 CTRLregaddr);
11772 /* flush */
11773 pci_read_config_word(phba->pcidev,
11774 PCI_DEVICE_ID, &devid);
11775
11776 port_reset = 1;
11777 msleep(20);
11778 goto wait;
11779 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
11780 rc = -ENODEV;
11781 goto out;
11782 }
11783 break;
11784
11785 case LPFC_SLI_INTF_IF_TYPE_1:
11786 default:
11787 break;
11788 }
11789
11790 out:
11791 /* Catch the not-ready port failure after a port reset. */
11792 if (rc) {
11793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11794 "3317 HBA not functional: IP Reset Failed "
11795 "try: echo fw_reset > board_mode\n");
11796 rc = -ENODEV;
11797 }
11798
11799 return rc;
11800 }
11801
11802 /**
11803 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
11804 * @phba: pointer to lpfc hba data structure.
11805 *
11806 * This routine is invoked to set up the PCI device memory space for device
11807 * with SLI-4 interface spec.
11808 *
11809 * Return codes
11810 * 0 - successful
11811 * other values - error
11812 **/
11813 static int
lpfc_sli4_pci_mem_setup(struct lpfc_hba * phba)11814 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
11815 {
11816 struct pci_dev *pdev = phba->pcidev;
11817 unsigned long bar0map_len, bar1map_len, bar2map_len;
11818 int error;
11819 uint32_t if_type;
11820
11821 if (!pdev)
11822 return -ENODEV;
11823
11824 /* Set the device DMA mask size */
11825 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11826 if (error)
11827 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11828 if (error)
11829 return error;
11830
11831 /*
11832 * The BARs and register set definitions and offset locations are
11833 * dependent on the if_type.
11834 */
11835 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
11836 &phba->sli4_hba.sli_intf.word0)) {
11837 return -ENODEV;
11838 }
11839
11840 /* There is no SLI3 failback for SLI4 devices. */
11841 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11842 LPFC_SLI_INTF_VALID) {
11843 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11844 "2894 SLI_INTF reg contents invalid "
11845 "sli_intf reg 0x%x\n",
11846 phba->sli4_hba.sli_intf.word0);
11847 return -ENODEV;
11848 }
11849
11850 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11851 /*
11852 * Get the bus address of SLI4 device Bar regions and the
11853 * number of bytes required by each mapping. The mapping of the
11854 * particular PCI BARs regions is dependent on the type of
11855 * SLI4 device.
11856 */
11857 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
11858 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
11859 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
11860
11861 /*
11862 * Map SLI4 PCI Config Space Register base to a kernel virtual
11863 * addr
11864 */
11865 phba->sli4_hba.conf_regs_memmap_p =
11866 ioremap(phba->pci_bar0_map, bar0map_len);
11867 if (!phba->sli4_hba.conf_regs_memmap_p) {
11868 dev_printk(KERN_ERR, &pdev->dev,
11869 "ioremap failed for SLI4 PCI config "
11870 "registers.\n");
11871 return -ENODEV;
11872 }
11873 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11874 /* Set up BAR0 PCI config space register memory map */
11875 lpfc_sli4_bar0_register_memmap(phba, if_type);
11876 } else {
11877 phba->pci_bar0_map = pci_resource_start(pdev, 1);
11878 bar0map_len = pci_resource_len(pdev, 1);
11879 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
11880 dev_printk(KERN_ERR, &pdev->dev,
11881 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
11882 return -ENODEV;
11883 }
11884 phba->sli4_hba.conf_regs_memmap_p =
11885 ioremap(phba->pci_bar0_map, bar0map_len);
11886 if (!phba->sli4_hba.conf_regs_memmap_p) {
11887 dev_printk(KERN_ERR, &pdev->dev,
11888 "ioremap failed for SLI4 PCI config "
11889 "registers.\n");
11890 return -ENODEV;
11891 }
11892 lpfc_sli4_bar0_register_memmap(phba, if_type);
11893 }
11894
11895 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11896 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
11897 /*
11898 * Map SLI4 if type 0 HBA Control Register base to a
11899 * kernel virtual address and setup the registers.
11900 */
11901 phba->pci_bar1_map = pci_resource_start(pdev,
11902 PCI_64BIT_BAR2);
11903 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11904 phba->sli4_hba.ctrl_regs_memmap_p =
11905 ioremap(phba->pci_bar1_map,
11906 bar1map_len);
11907 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11908 dev_err(&pdev->dev,
11909 "ioremap failed for SLI4 HBA "
11910 "control registers.\n");
11911 error = -ENOMEM;
11912 goto out_iounmap_conf;
11913 }
11914 phba->pci_bar2_memmap_p =
11915 phba->sli4_hba.ctrl_regs_memmap_p;
11916 lpfc_sli4_bar1_register_memmap(phba, if_type);
11917 } else {
11918 error = -ENOMEM;
11919 goto out_iounmap_conf;
11920 }
11921 }
11922
11923 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
11924 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
11925 /*
11926 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
11927 * virtual address and setup the registers.
11928 */
11929 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
11930 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11931 phba->sli4_hba.drbl_regs_memmap_p =
11932 ioremap(phba->pci_bar1_map, bar1map_len);
11933 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11934 dev_err(&pdev->dev,
11935 "ioremap failed for SLI4 HBA doorbell registers.\n");
11936 error = -ENOMEM;
11937 goto out_iounmap_conf;
11938 }
11939 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11940 lpfc_sli4_bar1_register_memmap(phba, if_type);
11941 }
11942
11943 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11944 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11945 /*
11946 * Map SLI4 if type 0 HBA Doorbell Register base to
11947 * a kernel virtual address and setup the registers.
11948 */
11949 phba->pci_bar2_map = pci_resource_start(pdev,
11950 PCI_64BIT_BAR4);
11951 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11952 phba->sli4_hba.drbl_regs_memmap_p =
11953 ioremap(phba->pci_bar2_map,
11954 bar2map_len);
11955 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11956 dev_err(&pdev->dev,
11957 "ioremap failed for SLI4 HBA"
11958 " doorbell registers.\n");
11959 error = -ENOMEM;
11960 goto out_iounmap_ctrl;
11961 }
11962 phba->pci_bar4_memmap_p =
11963 phba->sli4_hba.drbl_regs_memmap_p;
11964 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
11965 if (error)
11966 goto out_iounmap_all;
11967 } else {
11968 error = -ENOMEM;
11969 goto out_iounmap_ctrl;
11970 }
11971 }
11972
11973 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
11974 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11975 /*
11976 * Map SLI4 if type 6 HBA DPP Register base to a kernel
11977 * virtual address and setup the registers.
11978 */
11979 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
11980 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11981 phba->sli4_hba.dpp_regs_memmap_p =
11982 ioremap(phba->pci_bar2_map, bar2map_len);
11983 if (!phba->sli4_hba.dpp_regs_memmap_p) {
11984 dev_err(&pdev->dev,
11985 "ioremap failed for SLI4 HBA dpp registers.\n");
11986 error = -ENOMEM;
11987 goto out_iounmap_all;
11988 }
11989 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
11990 }
11991
11992 /* Set up the EQ/CQ register handeling functions now */
11993 switch (if_type) {
11994 case LPFC_SLI_INTF_IF_TYPE_0:
11995 case LPFC_SLI_INTF_IF_TYPE_2:
11996 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
11997 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
11998 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
11999 break;
12000 case LPFC_SLI_INTF_IF_TYPE_6:
12001 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
12002 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
12003 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
12004 break;
12005 default:
12006 break;
12007 }
12008
12009 return 0;
12010
12011 out_iounmap_all:
12012 if (phba->sli4_hba.drbl_regs_memmap_p)
12013 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12014 out_iounmap_ctrl:
12015 if (phba->sli4_hba.ctrl_regs_memmap_p)
12016 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12017 out_iounmap_conf:
12018 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12019
12020 return error;
12021 }
12022
12023 /**
12024 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
12025 * @phba: pointer to lpfc hba data structure.
12026 *
12027 * This routine is invoked to unset the PCI device memory space for device
12028 * with SLI-4 interface spec.
12029 **/
12030 static void
lpfc_sli4_pci_mem_unset(struct lpfc_hba * phba)12031 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
12032 {
12033 uint32_t if_type;
12034 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12035
12036 switch (if_type) {
12037 case LPFC_SLI_INTF_IF_TYPE_0:
12038 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12039 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12040 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12041 break;
12042 case LPFC_SLI_INTF_IF_TYPE_2:
12043 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12044 break;
12045 case LPFC_SLI_INTF_IF_TYPE_6:
12046 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12047 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12048 if (phba->sli4_hba.dpp_regs_memmap_p)
12049 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12050 break;
12051 case LPFC_SLI_INTF_IF_TYPE_1:
12052 break;
12053 default:
12054 dev_printk(KERN_ERR, &phba->pcidev->dev,
12055 "FATAL - unsupported SLI4 interface type - %d\n",
12056 if_type);
12057 break;
12058 }
12059 }
12060
12061 /**
12062 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
12063 * @phba: pointer to lpfc hba data structure.
12064 *
12065 * This routine is invoked to enable the MSI-X interrupt vectors to device
12066 * with SLI-3 interface specs.
12067 *
12068 * Return codes
12069 * 0 - successful
12070 * other values - error
12071 **/
12072 static int
lpfc_sli_enable_msix(struct lpfc_hba * phba)12073 lpfc_sli_enable_msix(struct lpfc_hba *phba)
12074 {
12075 int rc;
12076 LPFC_MBOXQ_t *pmb;
12077
12078 /* Set up MSI-X multi-message vectors */
12079 rc = pci_alloc_irq_vectors(phba->pcidev,
12080 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
12081 if (rc < 0) {
12082 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12083 "0420 PCI enable MSI-X failed (%d)\n", rc);
12084 goto vec_fail_out;
12085 }
12086
12087 /*
12088 * Assign MSI-X vectors to interrupt handlers
12089 */
12090
12091 /* vector-0 is associated to slow-path handler */
12092 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
12093 &lpfc_sli_sp_intr_handler, 0,
12094 LPFC_SP_DRIVER_HANDLER_NAME, phba);
12095 if (rc) {
12096 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12097 "0421 MSI-X slow-path request_irq failed "
12098 "(%d)\n", rc);
12099 goto msi_fail_out;
12100 }
12101
12102 /* vector-1 is associated to fast-path handler */
12103 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
12104 &lpfc_sli_fp_intr_handler, 0,
12105 LPFC_FP_DRIVER_HANDLER_NAME, phba);
12106
12107 if (rc) {
12108 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12109 "0429 MSI-X fast-path request_irq failed "
12110 "(%d)\n", rc);
12111 goto irq_fail_out;
12112 }
12113
12114 /*
12115 * Configure HBA MSI-X attention conditions to messages
12116 */
12117 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12118
12119 if (!pmb) {
12120 rc = -ENOMEM;
12121 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12122 "0474 Unable to allocate memory for issuing "
12123 "MBOX_CONFIG_MSI command\n");
12124 goto mem_fail_out;
12125 }
12126 rc = lpfc_config_msi(phba, pmb);
12127 if (rc)
12128 goto mbx_fail_out;
12129 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
12130 if (rc != MBX_SUCCESS) {
12131 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
12132 "0351 Config MSI mailbox command failed, "
12133 "mbxCmd x%x, mbxStatus x%x\n",
12134 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
12135 goto mbx_fail_out;
12136 }
12137
12138 /* Free memory allocated for mailbox command */
12139 mempool_free(pmb, phba->mbox_mem_pool);
12140 return rc;
12141
12142 mbx_fail_out:
12143 /* Free memory allocated for mailbox command */
12144 mempool_free(pmb, phba->mbox_mem_pool);
12145
12146 mem_fail_out:
12147 /* free the irq already requested */
12148 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
12149
12150 irq_fail_out:
12151 /* free the irq already requested */
12152 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
12153
12154 msi_fail_out:
12155 /* Unconfigure MSI-X capability structure */
12156 pci_free_irq_vectors(phba->pcidev);
12157
12158 vec_fail_out:
12159 return rc;
12160 }
12161
12162 /**
12163 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
12164 * @phba: pointer to lpfc hba data structure.
12165 *
12166 * This routine is invoked to enable the MSI interrupt mode to device with
12167 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
12168 * enable the MSI vector. The device driver is responsible for calling the
12169 * request_irq() to register MSI vector with a interrupt the handler, which
12170 * is done in this function.
12171 *
12172 * Return codes
12173 * 0 - successful
12174 * other values - error
12175 */
12176 static int
lpfc_sli_enable_msi(struct lpfc_hba * phba)12177 lpfc_sli_enable_msi(struct lpfc_hba *phba)
12178 {
12179 int rc;
12180
12181 rc = pci_enable_msi(phba->pcidev);
12182 if (!rc)
12183 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12184 "0012 PCI enable MSI mode success.\n");
12185 else {
12186 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12187 "0471 PCI enable MSI mode failed (%d)\n", rc);
12188 return rc;
12189 }
12190
12191 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12192 0, LPFC_DRIVER_NAME, phba);
12193 if (rc) {
12194 pci_disable_msi(phba->pcidev);
12195 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12196 "0478 MSI request_irq failed (%d)\n", rc);
12197 }
12198 return rc;
12199 }
12200
12201 /**
12202 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
12203 * @phba: pointer to lpfc hba data structure.
12204 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
12205 *
12206 * This routine is invoked to enable device interrupt and associate driver's
12207 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
12208 * spec. Depends on the interrupt mode configured to the driver, the driver
12209 * will try to fallback from the configured interrupt mode to an interrupt
12210 * mode which is supported by the platform, kernel, and device in the order
12211 * of:
12212 * MSI-X -> MSI -> IRQ.
12213 *
12214 * Return codes
12215 * 0 - successful
12216 * other values - error
12217 **/
12218 static uint32_t
lpfc_sli_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)12219 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
12220 {
12221 uint32_t intr_mode = LPFC_INTR_ERROR;
12222 int retval;
12223
12224 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
12225 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
12226 if (retval)
12227 return intr_mode;
12228 clear_bit(HBA_NEEDS_CFG_PORT, &phba->hba_flag);
12229
12230 if (cfg_mode == 2) {
12231 /* Now, try to enable MSI-X interrupt mode */
12232 retval = lpfc_sli_enable_msix(phba);
12233 if (!retval) {
12234 /* Indicate initialization to MSI-X mode */
12235 phba->intr_type = MSIX;
12236 intr_mode = 2;
12237 }
12238 }
12239
12240 /* Fallback to MSI if MSI-X initialization failed */
12241 if (cfg_mode >= 1 && phba->intr_type == NONE) {
12242 retval = lpfc_sli_enable_msi(phba);
12243 if (!retval) {
12244 /* Indicate initialization to MSI mode */
12245 phba->intr_type = MSI;
12246 intr_mode = 1;
12247 }
12248 }
12249
12250 /* Fallback to INTx if both MSI-X/MSI initalization failed */
12251 if (phba->intr_type == NONE) {
12252 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12253 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
12254 if (!retval) {
12255 /* Indicate initialization to INTx mode */
12256 phba->intr_type = INTx;
12257 intr_mode = 0;
12258 }
12259 }
12260 return intr_mode;
12261 }
12262
12263 /**
12264 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
12265 * @phba: pointer to lpfc hba data structure.
12266 *
12267 * This routine is invoked to disable device interrupt and disassociate the
12268 * driver's interrupt handler(s) from interrupt vector(s) to device with
12269 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
12270 * release the interrupt vector(s) for the message signaled interrupt.
12271 **/
12272 static void
lpfc_sli_disable_intr(struct lpfc_hba * phba)12273 lpfc_sli_disable_intr(struct lpfc_hba *phba)
12274 {
12275 int nr_irqs, i;
12276
12277 if (phba->intr_type == MSIX)
12278 nr_irqs = LPFC_MSIX_VECTORS;
12279 else
12280 nr_irqs = 1;
12281
12282 for (i = 0; i < nr_irqs; i++)
12283 free_irq(pci_irq_vector(phba->pcidev, i), phba);
12284 pci_free_irq_vectors(phba->pcidev);
12285
12286 /* Reset interrupt management states */
12287 phba->intr_type = NONE;
12288 phba->sli.slistat.sli_intr = 0;
12289 }
12290
12291 /**
12292 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
12293 * @phba: pointer to lpfc hba data structure.
12294 * @id: EQ vector index or Hardware Queue index
12295 * @match: LPFC_FIND_BY_EQ = match by EQ
12296 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
12297 * Return the CPU that matches the selection criteria
12298 */
12299 static uint16_t
lpfc_find_cpu_handle(struct lpfc_hba * phba,uint16_t id,int match)12300 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
12301 {
12302 struct lpfc_vector_map_info *cpup;
12303 int cpu;
12304
12305 /* Loop through all CPUs */
12306 for_each_present_cpu(cpu) {
12307 cpup = &phba->sli4_hba.cpu_map[cpu];
12308
12309 /* If we are matching by EQ, there may be multiple CPUs using
12310 * using the same vector, so select the one with
12311 * LPFC_CPU_FIRST_IRQ set.
12312 */
12313 if ((match == LPFC_FIND_BY_EQ) &&
12314 (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
12315 (cpup->eq == id))
12316 return cpu;
12317
12318 /* If matching by HDWQ, select the first CPU that matches */
12319 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
12320 return cpu;
12321 }
12322 return 0;
12323 }
12324
12325 #ifdef CONFIG_X86
12326 /**
12327 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
12328 * @phba: pointer to lpfc hba data structure.
12329 * @cpu: CPU map index
12330 * @phys_id: CPU package physical id
12331 * @core_id: CPU core id
12332 */
12333 static int
lpfc_find_hyper(struct lpfc_hba * phba,int cpu,uint16_t phys_id,uint16_t core_id)12334 lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
12335 uint16_t phys_id, uint16_t core_id)
12336 {
12337 struct lpfc_vector_map_info *cpup;
12338 int idx;
12339
12340 for_each_present_cpu(idx) {
12341 cpup = &phba->sli4_hba.cpu_map[idx];
12342 /* Does the cpup match the one we are looking for */
12343 if ((cpup->phys_id == phys_id) &&
12344 (cpup->core_id == core_id) &&
12345 (cpu != idx))
12346 return 1;
12347 }
12348 return 0;
12349 }
12350 #endif
12351
12352 /*
12353 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
12354 * @phba: pointer to lpfc hba data structure.
12355 * @eqidx: index for eq and irq vector
12356 * @flag: flags to set for vector_map structure
12357 * @cpu: cpu used to index vector_map structure
12358 *
12359 * The routine assigns eq info into vector_map structure
12360 */
12361 static inline void
lpfc_assign_eq_map_info(struct lpfc_hba * phba,uint16_t eqidx,uint16_t flag,unsigned int cpu)12362 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
12363 unsigned int cpu)
12364 {
12365 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12366 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
12367
12368 cpup->eq = eqidx;
12369 cpup->flag |= flag;
12370
12371 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12372 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
12373 cpu, eqhdl->irq, cpup->eq, cpup->flag);
12374 }
12375
12376 /**
12377 * lpfc_cpu_map_array_init - Initialize cpu_map structure
12378 * @phba: pointer to lpfc hba data structure.
12379 *
12380 * The routine initializes the cpu_map array structure
12381 */
12382 static void
lpfc_cpu_map_array_init(struct lpfc_hba * phba)12383 lpfc_cpu_map_array_init(struct lpfc_hba *phba)
12384 {
12385 struct lpfc_vector_map_info *cpup;
12386 struct lpfc_eq_intr_info *eqi;
12387 int cpu;
12388
12389 for_each_possible_cpu(cpu) {
12390 cpup = &phba->sli4_hba.cpu_map[cpu];
12391 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
12392 cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
12393 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
12394 cpup->eq = LPFC_VECTOR_MAP_EMPTY;
12395 cpup->flag = 0;
12396 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12397 INIT_LIST_HEAD(&eqi->list);
12398 eqi->icnt = 0;
12399 }
12400 }
12401
12402 /**
12403 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
12404 * @phba: pointer to lpfc hba data structure.
12405 *
12406 * The routine initializes the hba_eq_hdl array structure
12407 */
12408 static void
lpfc_hba_eq_hdl_array_init(struct lpfc_hba * phba)12409 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
12410 {
12411 struct lpfc_hba_eq_hdl *eqhdl;
12412 int i;
12413
12414 for (i = 0; i < phba->cfg_irq_chann; i++) {
12415 eqhdl = lpfc_get_eq_hdl(i);
12416 eqhdl->irq = LPFC_IRQ_EMPTY;
12417 eqhdl->phba = phba;
12418 }
12419 }
12420
12421 /**
12422 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
12423 * @phba: pointer to lpfc hba data structure.
12424 * @vectors: number of msix vectors allocated.
12425 *
12426 * The routine will figure out the CPU affinity assignment for every
12427 * MSI-X vector allocated for the HBA.
12428 * In addition, the CPU to IO channel mapping will be calculated
12429 * and the phba->sli4_hba.cpu_map array will reflect this.
12430 */
12431 static void
lpfc_cpu_affinity_check(struct lpfc_hba * phba,int vectors)12432 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
12433 {
12434 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
12435 int max_phys_id, min_phys_id;
12436 int max_core_id, min_core_id;
12437 struct lpfc_vector_map_info *cpup;
12438 struct lpfc_vector_map_info *new_cpup;
12439 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12440 struct lpfc_hdwq_stat *c_stat;
12441 #endif
12442
12443 max_phys_id = 0;
12444 min_phys_id = LPFC_VECTOR_MAP_EMPTY;
12445 max_core_id = 0;
12446 min_core_id = LPFC_VECTOR_MAP_EMPTY;
12447
12448 /* Update CPU map with physical id and core id of each CPU */
12449 for_each_present_cpu(cpu) {
12450 cpup = &phba->sli4_hba.cpu_map[cpu];
12451 #ifdef CONFIG_X86
12452 cpup->phys_id = topology_physical_package_id(cpu);
12453 cpup->core_id = topology_core_id(cpu);
12454 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
12455 cpup->flag |= LPFC_CPU_MAP_HYPER;
12456 #else
12457 /* No distinction between CPUs for other platforms */
12458 cpup->phys_id = 0;
12459 cpup->core_id = cpu;
12460 #endif
12461
12462 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12463 "3328 CPU %d physid %d coreid %d flag x%x\n",
12464 cpu, cpup->phys_id, cpup->core_id, cpup->flag);
12465
12466 if (cpup->phys_id > max_phys_id)
12467 max_phys_id = cpup->phys_id;
12468 if (cpup->phys_id < min_phys_id)
12469 min_phys_id = cpup->phys_id;
12470
12471 if (cpup->core_id > max_core_id)
12472 max_core_id = cpup->core_id;
12473 if (cpup->core_id < min_core_id)
12474 min_core_id = cpup->core_id;
12475 }
12476
12477 /* After looking at each irq vector assigned to this pcidev, its
12478 * possible to see that not ALL CPUs have been accounted for.
12479 * Next we will set any unassigned (unaffinitized) cpu map
12480 * entries to a IRQ on the same phys_id.
12481 */
12482 first_cpu = cpumask_first(cpu_present_mask);
12483 start_cpu = first_cpu;
12484
12485 for_each_present_cpu(cpu) {
12486 cpup = &phba->sli4_hba.cpu_map[cpu];
12487
12488 /* Is this CPU entry unassigned */
12489 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12490 /* Mark CPU as IRQ not assigned by the kernel */
12491 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12492
12493 /* If so, find a new_cpup that is on the SAME
12494 * phys_id as cpup. start_cpu will start where we
12495 * left off so all unassigned entries don't get assgined
12496 * the IRQ of the first entry.
12497 */
12498 new_cpu = start_cpu;
12499 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12500 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12501 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12502 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
12503 (new_cpup->phys_id == cpup->phys_id))
12504 goto found_same;
12505 new_cpu = lpfc_next_present_cpu(new_cpu);
12506 }
12507 /* At this point, we leave the CPU as unassigned */
12508 continue;
12509 found_same:
12510 /* We found a matching phys_id, so copy the IRQ info */
12511 cpup->eq = new_cpup->eq;
12512
12513 /* Bump start_cpu to the next slot to minmize the
12514 * chance of having multiple unassigned CPU entries
12515 * selecting the same IRQ.
12516 */
12517 start_cpu = lpfc_next_present_cpu(new_cpu);
12518
12519 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12520 "3337 Set Affinity: CPU %d "
12521 "eq %d from peer cpu %d same "
12522 "phys_id (%d)\n",
12523 cpu, cpup->eq, new_cpu,
12524 cpup->phys_id);
12525 }
12526 }
12527
12528 /* Set any unassigned cpu map entries to a IRQ on any phys_id */
12529 start_cpu = first_cpu;
12530
12531 for_each_present_cpu(cpu) {
12532 cpup = &phba->sli4_hba.cpu_map[cpu];
12533
12534 /* Is this entry unassigned */
12535 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12536 /* Mark it as IRQ not assigned by the kernel */
12537 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12538
12539 /* If so, find a new_cpup thats on ANY phys_id
12540 * as the cpup. start_cpu will start where we
12541 * left off so all unassigned entries don't get
12542 * assigned the IRQ of the first entry.
12543 */
12544 new_cpu = start_cpu;
12545 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12546 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12547 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12548 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
12549 goto found_any;
12550 new_cpu = lpfc_next_present_cpu(new_cpu);
12551 }
12552 /* We should never leave an entry unassigned */
12553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12554 "3339 Set Affinity: CPU %d "
12555 "eq %d UNASSIGNED\n",
12556 cpup->hdwq, cpup->eq);
12557 continue;
12558 found_any:
12559 /* We found an available entry, copy the IRQ info */
12560 cpup->eq = new_cpup->eq;
12561
12562 /* Bump start_cpu to the next slot to minmize the
12563 * chance of having multiple unassigned CPU entries
12564 * selecting the same IRQ.
12565 */
12566 start_cpu = lpfc_next_present_cpu(new_cpu);
12567
12568 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12569 "3338 Set Affinity: CPU %d "
12570 "eq %d from peer cpu %d (%d/%d)\n",
12571 cpu, cpup->eq, new_cpu,
12572 new_cpup->phys_id, new_cpup->core_id);
12573 }
12574 }
12575
12576 /* Assign hdwq indices that are unique across all cpus in the map
12577 * that are also FIRST_CPUs.
12578 */
12579 idx = 0;
12580 for_each_present_cpu(cpu) {
12581 cpup = &phba->sli4_hba.cpu_map[cpu];
12582
12583 /* Only FIRST IRQs get a hdwq index assignment. */
12584 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12585 continue;
12586
12587 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
12588 cpup->hdwq = idx;
12589 idx++;
12590 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12591 "3333 Set Affinity: CPU %d (phys %d core %d): "
12592 "hdwq %d eq %d flg x%x\n",
12593 cpu, cpup->phys_id, cpup->core_id,
12594 cpup->hdwq, cpup->eq, cpup->flag);
12595 }
12596 /* Associate a hdwq with each cpu_map entry
12597 * This will be 1 to 1 - hdwq to cpu, unless there are less
12598 * hardware queues then CPUs. For that case we will just round-robin
12599 * the available hardware queues as they get assigned to CPUs.
12600 * The next_idx is the idx from the FIRST_CPU loop above to account
12601 * for irq_chann < hdwq. The idx is used for round-robin assignments
12602 * and needs to start at 0.
12603 */
12604 next_idx = idx;
12605 start_cpu = 0;
12606 idx = 0;
12607 for_each_present_cpu(cpu) {
12608 cpup = &phba->sli4_hba.cpu_map[cpu];
12609
12610 /* FIRST cpus are already mapped. */
12611 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
12612 continue;
12613
12614 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
12615 * of the unassigned cpus to the next idx so that all
12616 * hdw queues are fully utilized.
12617 */
12618 if (next_idx < phba->cfg_hdw_queue) {
12619 cpup->hdwq = next_idx;
12620 next_idx++;
12621 continue;
12622 }
12623
12624 /* Not a First CPU and all hdw_queues are used. Reuse a
12625 * Hardware Queue for another CPU, so be smart about it
12626 * and pick one that has its IRQ/EQ mapped to the same phys_id
12627 * (CPU package) and core_id.
12628 */
12629 new_cpu = start_cpu;
12630 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12631 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12632 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12633 new_cpup->phys_id == cpup->phys_id &&
12634 new_cpup->core_id == cpup->core_id) {
12635 goto found_hdwq;
12636 }
12637 new_cpu = lpfc_next_present_cpu(new_cpu);
12638 }
12639
12640 /* If we can't match both phys_id and core_id,
12641 * settle for just a phys_id match.
12642 */
12643 new_cpu = start_cpu;
12644 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12645 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12646 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12647 new_cpup->phys_id == cpup->phys_id)
12648 goto found_hdwq;
12649 new_cpu = lpfc_next_present_cpu(new_cpu);
12650 }
12651
12652 /* Otherwise just round robin on cfg_hdw_queue */
12653 cpup->hdwq = idx % phba->cfg_hdw_queue;
12654 idx++;
12655 goto logit;
12656 found_hdwq:
12657 /* We found an available entry, copy the IRQ info */
12658 start_cpu = lpfc_next_present_cpu(new_cpu);
12659 cpup->hdwq = new_cpup->hdwq;
12660 logit:
12661 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12662 "3335 Set Affinity: CPU %d (phys %d core %d): "
12663 "hdwq %d eq %d flg x%x\n",
12664 cpu, cpup->phys_id, cpup->core_id,
12665 cpup->hdwq, cpup->eq, cpup->flag);
12666 }
12667
12668 /*
12669 * Initialize the cpu_map slots for not-present cpus in case
12670 * a cpu is hot-added. Perform a simple hdwq round robin assignment.
12671 */
12672 idx = 0;
12673 for_each_possible_cpu(cpu) {
12674 cpup = &phba->sli4_hba.cpu_map[cpu];
12675 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12676 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12677 c_stat->hdwq_no = cpup->hdwq;
12678 #endif
12679 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
12680 continue;
12681
12682 cpup->hdwq = idx++ % phba->cfg_hdw_queue;
12683 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12684 c_stat->hdwq_no = cpup->hdwq;
12685 #endif
12686 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12687 "3340 Set Affinity: not present "
12688 "CPU %d hdwq %d\n",
12689 cpu, cpup->hdwq);
12690 }
12691
12692 /* The cpu_map array will be used later during initialization
12693 * when EQ / CQ / WQs are allocated and configured.
12694 */
12695 return;
12696 }
12697
12698 /**
12699 * lpfc_cpuhp_get_eq
12700 *
12701 * @phba: pointer to lpfc hba data structure.
12702 * @cpu: cpu going offline
12703 * @eqlist: eq list to append to
12704 */
12705 static int
lpfc_cpuhp_get_eq(struct lpfc_hba * phba,unsigned int cpu,struct list_head * eqlist)12706 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
12707 struct list_head *eqlist)
12708 {
12709 const struct cpumask *maskp;
12710 struct lpfc_queue *eq;
12711 struct cpumask *tmp;
12712 u16 idx;
12713
12714 tmp = kzalloc(cpumask_size(), GFP_KERNEL);
12715 if (!tmp)
12716 return -ENOMEM;
12717
12718 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12719 maskp = pci_irq_get_affinity(phba->pcidev, idx);
12720 if (!maskp)
12721 continue;
12722 /*
12723 * if irq is not affinitized to the cpu going
12724 * then we don't need to poll the eq attached
12725 * to it.
12726 */
12727 if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
12728 continue;
12729 /* get the cpus that are online and are affini-
12730 * tized to this irq vector. If the count is
12731 * more than 1 then cpuhp is not going to shut-
12732 * down this vector. Since this cpu has not
12733 * gone offline yet, we need >1.
12734 */
12735 cpumask_and(tmp, maskp, cpu_online_mask);
12736 if (cpumask_weight(tmp) > 1)
12737 continue;
12738
12739 /* Now that we have an irq to shutdown, get the eq
12740 * mapped to this irq. Note: multiple hdwq's in
12741 * the software can share an eq, but eventually
12742 * only eq will be mapped to this vector
12743 */
12744 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12745 list_add(&eq->_poll_list, eqlist);
12746 }
12747 kfree(tmp);
12748 return 0;
12749 }
12750
__lpfc_cpuhp_remove(struct lpfc_hba * phba)12751 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
12752 {
12753 if (phba->sli_rev != LPFC_SLI_REV4)
12754 return;
12755
12756 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
12757 &phba->cpuhp);
12758 /*
12759 * unregistering the instance doesn't stop the polling
12760 * timer. Wait for the poll timer to retire.
12761 */
12762 synchronize_rcu();
12763 del_timer_sync(&phba->cpuhp_poll_timer);
12764 }
12765
lpfc_cpuhp_remove(struct lpfc_hba * phba)12766 static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
12767 {
12768 if (phba->pport &&
12769 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
12770 return;
12771
12772 __lpfc_cpuhp_remove(phba);
12773 }
12774
lpfc_cpuhp_add(struct lpfc_hba * phba)12775 static void lpfc_cpuhp_add(struct lpfc_hba *phba)
12776 {
12777 if (phba->sli_rev != LPFC_SLI_REV4)
12778 return;
12779
12780 rcu_read_lock();
12781
12782 if (!list_empty(&phba->poll_list))
12783 mod_timer(&phba->cpuhp_poll_timer,
12784 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
12785
12786 rcu_read_unlock();
12787
12788 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
12789 &phba->cpuhp);
12790 }
12791
__lpfc_cpuhp_checks(struct lpfc_hba * phba,int * retval)12792 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
12793 {
12794 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
12795 *retval = -EAGAIN;
12796 return true;
12797 }
12798
12799 if (phba->sli_rev != LPFC_SLI_REV4) {
12800 *retval = 0;
12801 return true;
12802 }
12803
12804 /* proceed with the hotplug */
12805 return false;
12806 }
12807
12808 /**
12809 * lpfc_irq_set_aff - set IRQ affinity
12810 * @eqhdl: EQ handle
12811 * @cpu: cpu to set affinity
12812 *
12813 **/
12814 static inline void
lpfc_irq_set_aff(struct lpfc_hba_eq_hdl * eqhdl,unsigned int cpu)12815 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
12816 {
12817 cpumask_clear(&eqhdl->aff_mask);
12818 cpumask_set_cpu(cpu, &eqhdl->aff_mask);
12819 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12820 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask);
12821 }
12822
12823 /**
12824 * lpfc_irq_clear_aff - clear IRQ affinity
12825 * @eqhdl: EQ handle
12826 *
12827 **/
12828 static inline void
lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl * eqhdl)12829 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
12830 {
12831 cpumask_clear(&eqhdl->aff_mask);
12832 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12833 }
12834
12835 /**
12836 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
12837 * @phba: pointer to HBA context object.
12838 * @cpu: cpu going offline/online
12839 * @offline: true, cpu is going offline. false, cpu is coming online.
12840 *
12841 * If cpu is going offline, we'll try our best effort to find the next
12842 * online cpu on the phba's original_mask and migrate all offlining IRQ
12843 * affinities.
12844 *
12845 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
12846 *
12847 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
12848 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
12849 *
12850 **/
12851 static void
lpfc_irq_rebalance(struct lpfc_hba * phba,unsigned int cpu,bool offline)12852 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
12853 {
12854 struct lpfc_vector_map_info *cpup;
12855 struct cpumask *aff_mask;
12856 unsigned int cpu_select, cpu_next, idx;
12857 const struct cpumask *orig_mask;
12858
12859 if (phba->irq_chann_mode == NORMAL_MODE)
12860 return;
12861
12862 orig_mask = &phba->sli4_hba.irq_aff_mask;
12863
12864 if (!cpumask_test_cpu(cpu, orig_mask))
12865 return;
12866
12867 cpup = &phba->sli4_hba.cpu_map[cpu];
12868
12869 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12870 return;
12871
12872 if (offline) {
12873 /* Find next online CPU on original mask */
12874 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true);
12875 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
12876
12877 /* Found a valid CPU */
12878 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
12879 /* Go through each eqhdl and ensure offlining
12880 * cpu aff_mask is migrated
12881 */
12882 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12883 aff_mask = lpfc_get_aff_mask(idx);
12884
12885 /* Migrate affinity */
12886 if (cpumask_test_cpu(cpu, aff_mask))
12887 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
12888 cpu_select);
12889 }
12890 } else {
12891 /* Rely on irqbalance if no online CPUs left on NUMA */
12892 for (idx = 0; idx < phba->cfg_irq_chann; idx++)
12893 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
12894 }
12895 } else {
12896 /* Migrate affinity back to this CPU */
12897 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
12898 }
12899 }
12900
lpfc_cpu_offline(unsigned int cpu,struct hlist_node * node)12901 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
12902 {
12903 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12904 struct lpfc_queue *eq, *next;
12905 LIST_HEAD(eqlist);
12906 int retval;
12907
12908 if (!phba) {
12909 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12910 return 0;
12911 }
12912
12913 if (__lpfc_cpuhp_checks(phba, &retval))
12914 return retval;
12915
12916 lpfc_irq_rebalance(phba, cpu, true);
12917
12918 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
12919 if (retval)
12920 return retval;
12921
12922 /* start polling on these eq's */
12923 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
12924 list_del_init(&eq->_poll_list);
12925 lpfc_sli4_start_polling(eq);
12926 }
12927
12928 return 0;
12929 }
12930
lpfc_cpu_online(unsigned int cpu,struct hlist_node * node)12931 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
12932 {
12933 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12934 struct lpfc_queue *eq, *next;
12935 unsigned int n;
12936 int retval;
12937
12938 if (!phba) {
12939 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12940 return 0;
12941 }
12942
12943 if (__lpfc_cpuhp_checks(phba, &retval))
12944 return retval;
12945
12946 lpfc_irq_rebalance(phba, cpu, false);
12947
12948 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
12949 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
12950 if (n == cpu)
12951 lpfc_sli4_stop_polling(eq);
12952 }
12953
12954 return 0;
12955 }
12956
12957 /**
12958 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
12959 * @phba: pointer to lpfc hba data structure.
12960 *
12961 * This routine is invoked to enable the MSI-X interrupt vectors to device
12962 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them
12963 * to cpus on the system.
12964 *
12965 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
12966 * the number of cpus on the same numa node as this adapter. The vectors are
12967 * allocated without requesting OS affinity mapping. A vector will be
12968 * allocated and assigned to each online and offline cpu. If the cpu is
12969 * online, then affinity will be set to that cpu. If the cpu is offline, then
12970 * affinity will be set to the nearest peer cpu within the numa node that is
12971 * online. If there are no online cpus within the numa node, affinity is not
12972 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
12973 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
12974 * configured.
12975 *
12976 * If numa mode is not enabled and there is more than 1 vector allocated, then
12977 * the driver relies on the managed irq interface where the OS assigns vector to
12978 * cpu affinity. The driver will then use that affinity mapping to setup its
12979 * cpu mapping table.
12980 *
12981 * Return codes
12982 * 0 - successful
12983 * other values - error
12984 **/
12985 static int
lpfc_sli4_enable_msix(struct lpfc_hba * phba)12986 lpfc_sli4_enable_msix(struct lpfc_hba *phba)
12987 {
12988 int vectors, rc, index;
12989 char *name;
12990 const struct cpumask *aff_mask = NULL;
12991 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
12992 struct lpfc_vector_map_info *cpup;
12993 struct lpfc_hba_eq_hdl *eqhdl;
12994 const struct cpumask *maskp;
12995 unsigned int flags = PCI_IRQ_MSIX;
12996
12997 /* Set up MSI-X multi-message vectors */
12998 vectors = phba->cfg_irq_chann;
12999
13000 if (phba->irq_chann_mode != NORMAL_MODE)
13001 aff_mask = &phba->sli4_hba.irq_aff_mask;
13002
13003 if (aff_mask) {
13004 cpu_cnt = cpumask_weight(aff_mask);
13005 vectors = min(phba->cfg_irq_chann, cpu_cnt);
13006
13007 /* cpu: iterates over aff_mask including offline or online
13008 * cpu_select: iterates over online aff_mask to set affinity
13009 */
13010 cpu = cpumask_first(aff_mask);
13011 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13012 } else {
13013 flags |= PCI_IRQ_AFFINITY;
13014 }
13015
13016 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
13017 if (rc < 0) {
13018 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13019 "0484 PCI enable MSI-X failed (%d)\n", rc);
13020 goto vec_fail_out;
13021 }
13022 vectors = rc;
13023
13024 /* Assign MSI-X vectors to interrupt handlers */
13025 for (index = 0; index < vectors; index++) {
13026 eqhdl = lpfc_get_eq_hdl(index);
13027 name = eqhdl->handler_name;
13028 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
13029 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
13030 LPFC_DRIVER_HANDLER_NAME"%d", index);
13031
13032 eqhdl->idx = index;
13033 rc = pci_irq_vector(phba->pcidev, index);
13034 if (rc < 0) {
13035 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13036 "0489 MSI-X fast-path (%d) "
13037 "pci_irq_vec failed (%d)\n", index, rc);
13038 goto cfg_fail_out;
13039 }
13040 eqhdl->irq = rc;
13041
13042 rc = request_threaded_irq(eqhdl->irq,
13043 &lpfc_sli4_hba_intr_handler,
13044 &lpfc_sli4_hba_intr_handler_th,
13045 0, name, eqhdl);
13046 if (rc) {
13047 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13048 "0486 MSI-X fast-path (%d) "
13049 "request_irq failed (%d)\n", index, rc);
13050 goto cfg_fail_out;
13051 }
13052
13053 if (aff_mask) {
13054 /* If found a neighboring online cpu, set affinity */
13055 if (cpu_select < nr_cpu_ids)
13056 lpfc_irq_set_aff(eqhdl, cpu_select);
13057
13058 /* Assign EQ to cpu_map */
13059 lpfc_assign_eq_map_info(phba, index,
13060 LPFC_CPU_FIRST_IRQ,
13061 cpu);
13062
13063 /* Iterate to next offline or online cpu in aff_mask */
13064 cpu = cpumask_next(cpu, aff_mask);
13065
13066 /* Find next online cpu in aff_mask to set affinity */
13067 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13068 } else if (vectors == 1) {
13069 cpu = cpumask_first(cpu_present_mask);
13070 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
13071 cpu);
13072 } else {
13073 maskp = pci_irq_get_affinity(phba->pcidev, index);
13074
13075 /* Loop through all CPUs associated with vector index */
13076 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
13077 cpup = &phba->sli4_hba.cpu_map[cpu];
13078
13079 /* If this is the first CPU thats assigned to
13080 * this vector, set LPFC_CPU_FIRST_IRQ.
13081 *
13082 * With certain platforms its possible that irq
13083 * vectors are affinitized to all the cpu's.
13084 * This can result in each cpu_map.eq to be set
13085 * to the last vector, resulting in overwrite
13086 * of all the previous cpu_map.eq. Ensure that
13087 * each vector receives a place in cpu_map.
13088 * Later call to lpfc_cpu_affinity_check will
13089 * ensure we are nicely balanced out.
13090 */
13091 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
13092 continue;
13093 lpfc_assign_eq_map_info(phba, index,
13094 LPFC_CPU_FIRST_IRQ,
13095 cpu);
13096 break;
13097 }
13098 }
13099 }
13100
13101 if (vectors != phba->cfg_irq_chann) {
13102 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13103 "3238 Reducing IO channels to match number of "
13104 "MSI-X vectors, requested %d got %d\n",
13105 phba->cfg_irq_chann, vectors);
13106 if (phba->cfg_irq_chann > vectors)
13107 phba->cfg_irq_chann = vectors;
13108 }
13109
13110 return rc;
13111
13112 cfg_fail_out:
13113 /* free the irq already requested */
13114 for (--index; index >= 0; index--) {
13115 eqhdl = lpfc_get_eq_hdl(index);
13116 lpfc_irq_clear_aff(eqhdl);
13117 free_irq(eqhdl->irq, eqhdl);
13118 }
13119
13120 /* Unconfigure MSI-X capability structure */
13121 pci_free_irq_vectors(phba->pcidev);
13122
13123 vec_fail_out:
13124 return rc;
13125 }
13126
13127 /**
13128 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
13129 * @phba: pointer to lpfc hba data structure.
13130 *
13131 * This routine is invoked to enable the MSI interrupt mode to device with
13132 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
13133 * called to enable the MSI vector. The device driver is responsible for
13134 * calling the request_irq() to register MSI vector with a interrupt the
13135 * handler, which is done in this function.
13136 *
13137 * Return codes
13138 * 0 - successful
13139 * other values - error
13140 **/
13141 static int
lpfc_sli4_enable_msi(struct lpfc_hba * phba)13142 lpfc_sli4_enable_msi(struct lpfc_hba *phba)
13143 {
13144 int rc, index;
13145 unsigned int cpu;
13146 struct lpfc_hba_eq_hdl *eqhdl;
13147
13148 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
13149 PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
13150 if (rc > 0)
13151 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13152 "0487 PCI enable MSI mode success.\n");
13153 else {
13154 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13155 "0488 PCI enable MSI mode failed (%d)\n", rc);
13156 return rc ? rc : -1;
13157 }
13158
13159 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13160 0, LPFC_DRIVER_NAME, phba);
13161 if (rc) {
13162 pci_free_irq_vectors(phba->pcidev);
13163 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13164 "0490 MSI request_irq failed (%d)\n", rc);
13165 return rc;
13166 }
13167
13168 eqhdl = lpfc_get_eq_hdl(0);
13169 rc = pci_irq_vector(phba->pcidev, 0);
13170 if (rc < 0) {
13171 pci_free_irq_vectors(phba->pcidev);
13172 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13173 "0496 MSI pci_irq_vec failed (%d)\n", rc);
13174 return rc;
13175 }
13176 eqhdl->irq = rc;
13177
13178 cpu = cpumask_first(cpu_present_mask);
13179 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
13180
13181 for (index = 0; index < phba->cfg_irq_chann; index++) {
13182 eqhdl = lpfc_get_eq_hdl(index);
13183 eqhdl->idx = index;
13184 }
13185
13186 return 0;
13187 }
13188
13189 /**
13190 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
13191 * @phba: pointer to lpfc hba data structure.
13192 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
13193 *
13194 * This routine is invoked to enable device interrupt and associate driver's
13195 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
13196 * interface spec. Depends on the interrupt mode configured to the driver,
13197 * the driver will try to fallback from the configured interrupt mode to an
13198 * interrupt mode which is supported by the platform, kernel, and device in
13199 * the order of:
13200 * MSI-X -> MSI -> IRQ.
13201 *
13202 * Return codes
13203 * Interrupt mode (2, 1, 0) - successful
13204 * LPFC_INTR_ERROR - error
13205 **/
13206 static uint32_t
lpfc_sli4_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)13207 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
13208 {
13209 uint32_t intr_mode = LPFC_INTR_ERROR;
13210 int retval, idx;
13211
13212 if (cfg_mode == 2) {
13213 /* Preparation before conf_msi mbox cmd */
13214 retval = 0;
13215 if (!retval) {
13216 /* Now, try to enable MSI-X interrupt mode */
13217 retval = lpfc_sli4_enable_msix(phba);
13218 if (!retval) {
13219 /* Indicate initialization to MSI-X mode */
13220 phba->intr_type = MSIX;
13221 intr_mode = 2;
13222 }
13223 }
13224 }
13225
13226 /* Fallback to MSI if MSI-X initialization failed */
13227 if (cfg_mode >= 1 && phba->intr_type == NONE) {
13228 retval = lpfc_sli4_enable_msi(phba);
13229 if (!retval) {
13230 /* Indicate initialization to MSI mode */
13231 phba->intr_type = MSI;
13232 intr_mode = 1;
13233 }
13234 }
13235
13236 /* Fallback to INTx if both MSI-X/MSI initalization failed */
13237 if (phba->intr_type == NONE) {
13238 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13239 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
13240 if (!retval) {
13241 struct lpfc_hba_eq_hdl *eqhdl;
13242 unsigned int cpu;
13243
13244 /* Indicate initialization to INTx mode */
13245 phba->intr_type = INTx;
13246 intr_mode = 0;
13247
13248 eqhdl = lpfc_get_eq_hdl(0);
13249 retval = pci_irq_vector(phba->pcidev, 0);
13250 if (retval < 0) {
13251 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13252 "0502 INTR pci_irq_vec failed (%d)\n",
13253 retval);
13254 return LPFC_INTR_ERROR;
13255 }
13256 eqhdl->irq = retval;
13257
13258 cpu = cpumask_first(cpu_present_mask);
13259 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
13260 cpu);
13261 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
13262 eqhdl = lpfc_get_eq_hdl(idx);
13263 eqhdl->idx = idx;
13264 }
13265 }
13266 }
13267 return intr_mode;
13268 }
13269
13270 /**
13271 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
13272 * @phba: pointer to lpfc hba data structure.
13273 *
13274 * This routine is invoked to disable device interrupt and disassociate
13275 * the driver's interrupt handler(s) from interrupt vector(s) to device
13276 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
13277 * will release the interrupt vector(s) for the message signaled interrupt.
13278 **/
13279 static void
lpfc_sli4_disable_intr(struct lpfc_hba * phba)13280 lpfc_sli4_disable_intr(struct lpfc_hba *phba)
13281 {
13282 /* Disable the currently initialized interrupt mode */
13283 if (phba->intr_type == MSIX) {
13284 int index;
13285 struct lpfc_hba_eq_hdl *eqhdl;
13286
13287 /* Free up MSI-X multi-message vectors */
13288 for (index = 0; index < phba->cfg_irq_chann; index++) {
13289 eqhdl = lpfc_get_eq_hdl(index);
13290 lpfc_irq_clear_aff(eqhdl);
13291 free_irq(eqhdl->irq, eqhdl);
13292 }
13293 } else {
13294 free_irq(phba->pcidev->irq, phba);
13295 }
13296
13297 pci_free_irq_vectors(phba->pcidev);
13298
13299 /* Reset interrupt management states */
13300 phba->intr_type = NONE;
13301 phba->sli.slistat.sli_intr = 0;
13302 }
13303
13304 /**
13305 * lpfc_unset_hba - Unset SLI3 hba device initialization
13306 * @phba: pointer to lpfc hba data structure.
13307 *
13308 * This routine is invoked to unset the HBA device initialization steps to
13309 * a device with SLI-3 interface spec.
13310 **/
13311 static void
lpfc_unset_hba(struct lpfc_hba * phba)13312 lpfc_unset_hba(struct lpfc_hba *phba)
13313 {
13314 set_bit(FC_UNLOADING, &phba->pport->load_flag);
13315
13316 kfree(phba->vpi_bmask);
13317 kfree(phba->vpi_ids);
13318
13319 lpfc_stop_hba_timers(phba);
13320
13321 phba->pport->work_port_events = 0;
13322
13323 lpfc_sli_hba_down(phba);
13324
13325 lpfc_sli_brdrestart(phba);
13326
13327 lpfc_sli_disable_intr(phba);
13328
13329 return;
13330 }
13331
13332 /**
13333 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
13334 * @phba: Pointer to HBA context object.
13335 *
13336 * This function is called in the SLI4 code path to wait for completion
13337 * of device's XRIs exchange busy. It will check the XRI exchange busy
13338 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
13339 * that, it will check the XRI exchange busy on outstanding FCP and ELS
13340 * I/Os every 30 seconds, log error message, and wait forever. Only when
13341 * all XRI exchange busy complete, the driver unload shall proceed with
13342 * invoking the function reset ioctl mailbox command to the CNA and the
13343 * the rest of the driver unload resource release.
13344 **/
13345 static void
lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba * phba)13346 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
13347 {
13348 struct lpfc_sli4_hdw_queue *qp;
13349 int idx, ccnt;
13350 int wait_time = 0;
13351 int io_xri_cmpl = 1;
13352 int nvmet_xri_cmpl = 1;
13353 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13354
13355 /* Driver just aborted IOs during the hba_unset process. Pause
13356 * here to give the HBA time to complete the IO and get entries
13357 * into the abts lists.
13358 */
13359 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
13360
13361 /* Wait for NVME pending IO to flush back to transport. */
13362 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13363 lpfc_nvme_wait_for_io_drain(phba);
13364
13365 ccnt = 0;
13366 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13367 qp = &phba->sli4_hba.hdwq[idx];
13368 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
13369 if (!io_xri_cmpl) /* if list is NOT empty */
13370 ccnt++;
13371 }
13372 if (ccnt)
13373 io_xri_cmpl = 0;
13374
13375 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13376 nvmet_xri_cmpl =
13377 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13378 }
13379
13380 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
13381 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
13382 if (!nvmet_xri_cmpl)
13383 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13384 "6424 NVMET XRI exchange busy "
13385 "wait time: %d seconds.\n",
13386 wait_time/1000);
13387 if (!io_xri_cmpl)
13388 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13389 "6100 IO XRI exchange busy "
13390 "wait time: %d seconds.\n",
13391 wait_time/1000);
13392 if (!els_xri_cmpl)
13393 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13394 "2878 ELS XRI exchange busy "
13395 "wait time: %d seconds.\n",
13396 wait_time/1000);
13397 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
13398 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
13399 } else {
13400 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
13401 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
13402 }
13403
13404 ccnt = 0;
13405 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13406 qp = &phba->sli4_hba.hdwq[idx];
13407 io_xri_cmpl = list_empty(
13408 &qp->lpfc_abts_io_buf_list);
13409 if (!io_xri_cmpl) /* if list is NOT empty */
13410 ccnt++;
13411 }
13412 if (ccnt)
13413 io_xri_cmpl = 0;
13414
13415 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13416 nvmet_xri_cmpl = list_empty(
13417 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13418 }
13419 els_xri_cmpl =
13420 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13421
13422 }
13423 }
13424
13425 /**
13426 * lpfc_sli4_hba_unset - Unset the fcoe hba
13427 * @phba: Pointer to HBA context object.
13428 *
13429 * This function is called in the SLI4 code path to reset the HBA's FCoE
13430 * function. The caller is not required to hold any lock. This routine
13431 * issues PCI function reset mailbox command to reset the FCoE function.
13432 * At the end of the function, it calls lpfc_hba_down_post function to
13433 * free any pending commands.
13434 **/
13435 static void
lpfc_sli4_hba_unset(struct lpfc_hba * phba)13436 lpfc_sli4_hba_unset(struct lpfc_hba *phba)
13437 {
13438 int wait_cnt = 0;
13439 LPFC_MBOXQ_t *mboxq;
13440 struct pci_dev *pdev = phba->pcidev;
13441
13442 lpfc_stop_hba_timers(phba);
13443 hrtimer_cancel(&phba->cmf_stats_timer);
13444 hrtimer_cancel(&phba->cmf_timer);
13445
13446 if (phba->pport)
13447 phba->sli4_hba.intr_enable = 0;
13448
13449 /*
13450 * Gracefully wait out the potential current outstanding asynchronous
13451 * mailbox command.
13452 */
13453
13454 /* First, block any pending async mailbox command from posted */
13455 spin_lock_irq(&phba->hbalock);
13456 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
13457 spin_unlock_irq(&phba->hbalock);
13458 /* Now, trying to wait it out if we can */
13459 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13460 msleep(10);
13461 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
13462 break;
13463 }
13464 /* Forcefully release the outstanding mailbox command if timed out */
13465 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13466 spin_lock_irq(&phba->hbalock);
13467 mboxq = phba->sli.mbox_active;
13468 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
13469 __lpfc_mbox_cmpl_put(phba, mboxq);
13470 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13471 phba->sli.mbox_active = NULL;
13472 spin_unlock_irq(&phba->hbalock);
13473 }
13474
13475 /* Abort all iocbs associated with the hba */
13476 lpfc_sli_hba_iocb_abort(phba);
13477
13478 if (!pci_channel_offline(phba->pcidev))
13479 /* Wait for completion of device XRI exchange busy */
13480 lpfc_sli4_xri_exchange_busy_wait(phba);
13481
13482 /* per-phba callback de-registration for hotplug event */
13483 if (phba->pport)
13484 lpfc_cpuhp_remove(phba);
13485
13486 /* Disable PCI subsystem interrupt */
13487 lpfc_sli4_disable_intr(phba);
13488
13489 /* Disable SR-IOV if enabled */
13490 if (phba->cfg_sriov_nr_virtfn)
13491 pci_disable_sriov(pdev);
13492
13493 /* Stop kthread signal shall trigger work_done one more time */
13494 kthread_stop(phba->worker_thread);
13495
13496 /* Disable FW logging to host memory */
13497 lpfc_ras_stop_fwlog(phba);
13498
13499 /* Reset SLI4 HBA FCoE function */
13500 lpfc_pci_function_reset(phba);
13501
13502 /* release all queue allocated resources. */
13503 lpfc_sli4_queue_destroy(phba);
13504
13505 /* Free RAS DMA memory */
13506 if (phba->ras_fwlog.ras_enabled)
13507 lpfc_sli4_ras_dma_free(phba);
13508
13509 /* Stop the SLI4 device port */
13510 if (phba->pport)
13511 phba->pport->work_port_events = 0;
13512 }
13513
13514 static uint32_t
lpfc_cgn_crc32(uint32_t crc,u8 byte)13515 lpfc_cgn_crc32(uint32_t crc, u8 byte)
13516 {
13517 uint32_t msb = 0;
13518 uint32_t bit;
13519
13520 for (bit = 0; bit < 8; bit++) {
13521 msb = (crc >> 31) & 1;
13522 crc <<= 1;
13523
13524 if (msb ^ (byte & 1)) {
13525 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER;
13526 crc |= 1;
13527 }
13528 byte >>= 1;
13529 }
13530 return crc;
13531 }
13532
13533 static uint32_t
lpfc_cgn_reverse_bits(uint32_t wd)13534 lpfc_cgn_reverse_bits(uint32_t wd)
13535 {
13536 uint32_t result = 0;
13537 uint32_t i;
13538
13539 for (i = 0; i < 32; i++) {
13540 result <<= 1;
13541 result |= (1 & (wd >> i));
13542 }
13543 return result;
13544 }
13545
13546 /*
13547 * The routine corresponds with the algorithm the HBA firmware
13548 * uses to validate the data integrity.
13549 */
13550 uint32_t
lpfc_cgn_calc_crc32(void * ptr,uint32_t byteLen,uint32_t crc)13551 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc)
13552 {
13553 uint32_t i;
13554 uint32_t result;
13555 uint8_t *data = (uint8_t *)ptr;
13556
13557 for (i = 0; i < byteLen; ++i)
13558 crc = lpfc_cgn_crc32(crc, data[i]);
13559
13560 result = ~lpfc_cgn_reverse_bits(crc);
13561 return result;
13562 }
13563
13564 void
lpfc_init_congestion_buf(struct lpfc_hba * phba)13565 lpfc_init_congestion_buf(struct lpfc_hba *phba)
13566 {
13567 struct lpfc_cgn_info *cp;
13568 uint16_t size;
13569 uint32_t crc;
13570
13571 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13572 "6235 INIT Congestion Buffer %p\n", phba->cgn_i);
13573
13574 if (!phba->cgn_i)
13575 return;
13576 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13577
13578 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
13579 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
13580 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
13581 atomic_set(&phba->cgn_sync_warn_cnt, 0);
13582
13583 atomic_set(&phba->cgn_driver_evt_cnt, 0);
13584 atomic_set(&phba->cgn_latency_evt_cnt, 0);
13585 atomic64_set(&phba->cgn_latency_evt, 0);
13586 phba->cgn_evt_minute = 0;
13587
13588 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat));
13589 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ);
13590 cp->cgn_info_version = LPFC_CGN_INFO_V4;
13591
13592 /* cgn parameters */
13593 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
13594 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
13595 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
13596 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
13597
13598 lpfc_cgn_update_tstamp(phba, &cp->base_time);
13599
13600 /* Fill in default LUN qdepth */
13601 if (phba->pport) {
13602 size = (uint16_t)(phba->pport->cfg_lun_queue_depth);
13603 cp->cgn_lunq = cpu_to_le16(size);
13604 }
13605
13606 /* last used Index initialized to 0xff already */
13607
13608 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13609 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13610 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13611 cp->cgn_info_crc = cpu_to_le32(crc);
13612
13613 phba->cgn_evt_timestamp = jiffies +
13614 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
13615 }
13616
13617 void
lpfc_init_congestion_stat(struct lpfc_hba * phba)13618 lpfc_init_congestion_stat(struct lpfc_hba *phba)
13619 {
13620 struct lpfc_cgn_info *cp;
13621 uint32_t crc;
13622
13623 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13624 "6236 INIT Congestion Stat %p\n", phba->cgn_i);
13625
13626 if (!phba->cgn_i)
13627 return;
13628
13629 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13630 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat));
13631
13632 lpfc_cgn_update_tstamp(phba, &cp->stat_start);
13633 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13634 cp->cgn_info_crc = cpu_to_le32(crc);
13635 }
13636
13637 /**
13638 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA
13639 * @phba: Pointer to hba context object.
13640 * @reg: flag to determine register or unregister.
13641 */
13642 static int
__lpfc_reg_congestion_buf(struct lpfc_hba * phba,int reg)13643 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg)
13644 {
13645 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf;
13646 union lpfc_sli4_cfg_shdr *shdr;
13647 uint32_t shdr_status, shdr_add_status;
13648 LPFC_MBOXQ_t *mboxq;
13649 int length, rc;
13650
13651 if (!phba->cgn_i)
13652 return -ENXIO;
13653
13654 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
13655 if (!mboxq) {
13656 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13657 "2641 REG_CONGESTION_BUF mbox allocation fail: "
13658 "HBA state x%x reg %d\n",
13659 phba->pport->port_state, reg);
13660 return -ENOMEM;
13661 }
13662
13663 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) -
13664 sizeof(struct lpfc_sli4_cfg_mhdr));
13665 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13666 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length,
13667 LPFC_SLI4_MBX_EMBED);
13668 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf;
13669 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1);
13670 if (reg > 0)
13671 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1);
13672 else
13673 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0);
13674 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info);
13675 reg_congestion_buf->addr_lo =
13676 putPaddrLow(phba->cgn_i->phys);
13677 reg_congestion_buf->addr_hi =
13678 putPaddrHigh(phba->cgn_i->phys);
13679
13680 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13681 shdr = (union lpfc_sli4_cfg_shdr *)
13682 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
13683 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
13684 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
13685 &shdr->response);
13686 mempool_free(mboxq, phba->mbox_mem_pool);
13687 if (shdr_status || shdr_add_status || rc) {
13688 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13689 "2642 REG_CONGESTION_BUF mailbox "
13690 "failed with status x%x add_status x%x,"
13691 " mbx status x%x reg %d\n",
13692 shdr_status, shdr_add_status, rc, reg);
13693 return -ENXIO;
13694 }
13695 return 0;
13696 }
13697
13698 int
lpfc_unreg_congestion_buf(struct lpfc_hba * phba)13699 lpfc_unreg_congestion_buf(struct lpfc_hba *phba)
13700 {
13701 lpfc_cmf_stop(phba);
13702 return __lpfc_reg_congestion_buf(phba, 0);
13703 }
13704
13705 int
lpfc_reg_congestion_buf(struct lpfc_hba * phba)13706 lpfc_reg_congestion_buf(struct lpfc_hba *phba)
13707 {
13708 return __lpfc_reg_congestion_buf(phba, 1);
13709 }
13710
13711 /**
13712 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
13713 * @phba: Pointer to HBA context object.
13714 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
13715 *
13716 * This function is called in the SLI4 code path to read the port's
13717 * sli4 capabilities.
13718 *
13719 * This function may be be called from any context that can block-wait
13720 * for the completion. The expectation is that this routine is called
13721 * typically from probe_one or from the online routine.
13722 **/
13723 int
lpfc_get_sli4_parameters(struct lpfc_hba * phba,LPFC_MBOXQ_t * mboxq)13724 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
13725 {
13726 int rc;
13727 struct lpfc_mqe *mqe = &mboxq->u.mqe;
13728 struct lpfc_pc_sli4_params *sli4_params;
13729 uint32_t mbox_tmo;
13730 int length;
13731 bool exp_wqcq_pages = true;
13732 struct lpfc_sli4_parameters *mbx_sli4_parameters;
13733
13734 /*
13735 * By default, the driver assumes the SLI4 port requires RPI
13736 * header postings. The SLI4_PARAM response will correct this
13737 * assumption.
13738 */
13739 phba->sli4_hba.rpi_hdrs_in_use = 1;
13740
13741 /* Read the port's SLI4 Config Parameters */
13742 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
13743 sizeof(struct lpfc_sli4_cfg_mhdr));
13744 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13745 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
13746 length, LPFC_SLI4_MBX_EMBED);
13747 if (!phba->sli4_hba.intr_enable)
13748 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13749 else {
13750 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
13751 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
13752 }
13753 if (unlikely(rc))
13754 return rc;
13755 sli4_params = &phba->sli4_hba.pc_sli4_params;
13756 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
13757 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
13758 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
13759 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
13760 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
13761 mbx_sli4_parameters);
13762 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
13763 mbx_sli4_parameters);
13764 if (bf_get(cfg_phwq, mbx_sli4_parameters))
13765 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
13766 else
13767 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
13768 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
13769 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
13770 mbx_sli4_parameters);
13771 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
13772 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
13773 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
13774 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
13775 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
13776 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
13777 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
13778 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
13779 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
13780 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
13781 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
13782 mbx_sli4_parameters);
13783 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
13784 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
13785 mbx_sli4_parameters);
13786 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13787 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13788 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters);
13789
13790 /* Check for Extended Pre-Registered SGL support */
13791 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
13792
13793 /* Check for firmware nvme support */
13794 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
13795 bf_get(cfg_xib, mbx_sli4_parameters));
13796
13797 if (rc) {
13798 /* Save this to indicate the Firmware supports NVME */
13799 sli4_params->nvme = 1;
13800
13801 /* Firmware NVME support, check driver FC4 NVME support */
13802 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
13803 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13804 "6133 Disabling NVME support: "
13805 "FC4 type not supported: x%x\n",
13806 phba->cfg_enable_fc4_type);
13807 goto fcponly;
13808 }
13809 } else {
13810 /* No firmware NVME support, check driver FC4 NVME support */
13811 sli4_params->nvme = 0;
13812 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13813 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
13814 "6101 Disabling NVME support: Not "
13815 "supported by firmware (%d %d) x%x\n",
13816 bf_get(cfg_nvme, mbx_sli4_parameters),
13817 bf_get(cfg_xib, mbx_sli4_parameters),
13818 phba->cfg_enable_fc4_type);
13819 fcponly:
13820 phba->nvmet_support = 0;
13821 phba->cfg_nvmet_mrq = 0;
13822 phba->cfg_nvme_seg_cnt = 0;
13823
13824 /* If no FC4 type support, move to just SCSI support */
13825 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
13826 return -ENODEV;
13827 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
13828 }
13829 }
13830
13831 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
13832 * accommodate 512K and 1M IOs in a single nvme buf.
13833 */
13834 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13835 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
13836
13837 /* Enable embedded Payload BDE if support is indicated */
13838 if (bf_get(cfg_pbde, mbx_sli4_parameters))
13839 phba->cfg_enable_pbde = 1;
13840 else
13841 phba->cfg_enable_pbde = 0;
13842
13843 /*
13844 * To support Suppress Response feature we must satisfy 3 conditions.
13845 * lpfc_suppress_rsp module parameter must be set (default).
13846 * In SLI4-Parameters Descriptor:
13847 * Extended Inline Buffers (XIB) must be supported.
13848 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
13849 * (double negative).
13850 */
13851 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
13852 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
13853 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
13854 else
13855 phba->cfg_suppress_rsp = 0;
13856
13857 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
13858 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
13859
13860 /* Make sure that sge_supp_len can be handled by the driver */
13861 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
13862 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
13863
13864 rc = dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len);
13865 if (unlikely(rc)) {
13866 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13867 "6400 Can't set dma maximum segment size\n");
13868 return rc;
13869 }
13870
13871 /*
13872 * Check whether the adapter supports an embedded copy of the
13873 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
13874 * to use this option, 128-byte WQEs must be used.
13875 */
13876 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
13877 phba->fcp_embed_io = 1;
13878 else
13879 phba->fcp_embed_io = 0;
13880
13881 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13882 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
13883 bf_get(cfg_xib, mbx_sli4_parameters),
13884 phba->cfg_enable_pbde,
13885 phba->fcp_embed_io, sli4_params->nvme,
13886 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
13887
13888 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13889 LPFC_SLI_INTF_IF_TYPE_2) &&
13890 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
13891 LPFC_SLI_INTF_FAMILY_LNCR_A0))
13892 exp_wqcq_pages = false;
13893
13894 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
13895 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
13896 exp_wqcq_pages &&
13897 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
13898 phba->enab_exp_wqcq_pages = 1;
13899 else
13900 phba->enab_exp_wqcq_pages = 0;
13901 /*
13902 * Check if the SLI port supports MDS Diagnostics
13903 */
13904 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
13905 phba->mds_diags_support = 1;
13906 else
13907 phba->mds_diags_support = 0;
13908
13909 /*
13910 * Check if the SLI port supports NSLER
13911 */
13912 if (bf_get(cfg_nsler, mbx_sli4_parameters))
13913 phba->nsler = 1;
13914 else
13915 phba->nsler = 0;
13916
13917 return 0;
13918 }
13919
13920 /**
13921 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
13922 * @pdev: pointer to PCI device
13923 * @pid: pointer to PCI device identifier
13924 *
13925 * This routine is to be called to attach a device with SLI-3 interface spec
13926 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
13927 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
13928 * information of the device and driver to see if the driver state that it can
13929 * support this kind of device. If the match is successful, the driver core
13930 * invokes this routine. If this routine determines it can claim the HBA, it
13931 * does all the initialization that it needs to do to handle the HBA properly.
13932 *
13933 * Return code
13934 * 0 - driver can claim the device
13935 * negative value - driver can not claim the device
13936 **/
13937 static int
lpfc_pci_probe_one_s3(struct pci_dev * pdev,const struct pci_device_id * pid)13938 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
13939 {
13940 struct lpfc_hba *phba;
13941 struct lpfc_vport *vport = NULL;
13942 struct Scsi_Host *shost = NULL;
13943 int error;
13944 uint32_t cfg_mode, intr_mode;
13945
13946 /* Allocate memory for HBA structure */
13947 phba = lpfc_hba_alloc(pdev);
13948 if (!phba)
13949 return -ENOMEM;
13950
13951 /* Perform generic PCI device enabling operation */
13952 error = lpfc_enable_pci_dev(phba);
13953 if (error)
13954 goto out_free_phba;
13955
13956 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
13957 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
13958 if (error)
13959 goto out_disable_pci_dev;
13960
13961 /* Set up SLI-3 specific device PCI memory space */
13962 error = lpfc_sli_pci_mem_setup(phba);
13963 if (error) {
13964 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13965 "1402 Failed to set up pci memory space.\n");
13966 goto out_disable_pci_dev;
13967 }
13968
13969 /* Set up SLI-3 specific device driver resources */
13970 error = lpfc_sli_driver_resource_setup(phba);
13971 if (error) {
13972 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13973 "1404 Failed to set up driver resource.\n");
13974 goto out_unset_pci_mem_s3;
13975 }
13976
13977 /* Initialize and populate the iocb list per host */
13978
13979 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
13980 if (error) {
13981 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13982 "1405 Failed to initialize iocb list.\n");
13983 goto out_unset_driver_resource_s3;
13984 }
13985
13986 /* Set up common device driver resources */
13987 error = lpfc_setup_driver_resource_phase2(phba);
13988 if (error) {
13989 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13990 "1406 Failed to set up driver resource.\n");
13991 goto out_free_iocb_list;
13992 }
13993
13994 /* Get the default values for Model Name and Description */
13995 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
13996
13997 /* Create SCSI host to the physical port */
13998 error = lpfc_create_shost(phba);
13999 if (error) {
14000 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14001 "1407 Failed to create scsi host.\n");
14002 goto out_unset_driver_resource;
14003 }
14004
14005 /* Configure sysfs attributes */
14006 vport = phba->pport;
14007 error = lpfc_alloc_sysfs_attr(vport);
14008 if (error) {
14009 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14010 "1476 Failed to allocate sysfs attr\n");
14011 goto out_destroy_shost;
14012 }
14013
14014 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14015 /* Now, trying to enable interrupt and bring up the device */
14016 cfg_mode = phba->cfg_use_msi;
14017 while (true) {
14018 /* Put device to a known state before enabling interrupt */
14019 lpfc_stop_port(phba);
14020 /* Configure and enable interrupt */
14021 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
14022 if (intr_mode == LPFC_INTR_ERROR) {
14023 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14024 "0431 Failed to enable interrupt.\n");
14025 error = -ENODEV;
14026 goto out_free_sysfs_attr;
14027 }
14028 /* SLI-3 HBA setup */
14029 if (lpfc_sli_hba_setup(phba)) {
14030 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14031 "1477 Failed to set up hba\n");
14032 error = -ENODEV;
14033 goto out_remove_device;
14034 }
14035
14036 /* Wait 50ms for the interrupts of previous mailbox commands */
14037 msleep(50);
14038 /* Check active interrupts on message signaled interrupts */
14039 if (intr_mode == 0 ||
14040 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
14041 /* Log the current active interrupt mode */
14042 phba->intr_mode = intr_mode;
14043 lpfc_log_intr_mode(phba, intr_mode);
14044 break;
14045 } else {
14046 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14047 "0447 Configure interrupt mode (%d) "
14048 "failed active interrupt test.\n",
14049 intr_mode);
14050 /* Disable the current interrupt mode */
14051 lpfc_sli_disable_intr(phba);
14052 /* Try next level of interrupt mode */
14053 cfg_mode = --intr_mode;
14054 }
14055 }
14056
14057 /* Perform post initialization setup */
14058 lpfc_post_init_setup(phba);
14059
14060 /* Check if there are static vports to be created. */
14061 lpfc_create_static_vport(phba);
14062
14063 return 0;
14064
14065 out_remove_device:
14066 lpfc_unset_hba(phba);
14067 out_free_sysfs_attr:
14068 lpfc_free_sysfs_attr(vport);
14069 out_destroy_shost:
14070 lpfc_destroy_shost(phba);
14071 out_unset_driver_resource:
14072 lpfc_unset_driver_resource_phase2(phba);
14073 out_free_iocb_list:
14074 lpfc_free_iocb_list(phba);
14075 out_unset_driver_resource_s3:
14076 lpfc_sli_driver_resource_unset(phba);
14077 out_unset_pci_mem_s3:
14078 lpfc_sli_pci_mem_unset(phba);
14079 out_disable_pci_dev:
14080 lpfc_disable_pci_dev(phba);
14081 if (shost)
14082 scsi_host_put(shost);
14083 out_free_phba:
14084 lpfc_hba_free(phba);
14085 return error;
14086 }
14087
14088 /**
14089 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
14090 * @pdev: pointer to PCI device
14091 *
14092 * This routine is to be called to disattach a device with SLI-3 interface
14093 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
14094 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14095 * device to be removed from the PCI subsystem properly.
14096 **/
14097 static void
lpfc_pci_remove_one_s3(struct pci_dev * pdev)14098 lpfc_pci_remove_one_s3(struct pci_dev *pdev)
14099 {
14100 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14101 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14102 struct lpfc_vport **vports;
14103 struct lpfc_hba *phba = vport->phba;
14104 int i;
14105
14106 set_bit(FC_UNLOADING, &vport->load_flag);
14107
14108 lpfc_free_sysfs_attr(vport);
14109
14110 /* Release all the vports against this physical port */
14111 vports = lpfc_create_vport_work_array(phba);
14112 if (vports != NULL)
14113 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14114 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14115 continue;
14116 fc_vport_terminate(vports[i]->fc_vport);
14117 }
14118 lpfc_destroy_vport_work_array(phba, vports);
14119
14120 /* Remove FC host with the physical port */
14121 fc_remove_host(shost);
14122 scsi_remove_host(shost);
14123
14124 /* Clean up all nodes, mailboxes and IOs. */
14125 lpfc_cleanup(vport);
14126
14127 /*
14128 * Bring down the SLI Layer. This step disable all interrupts,
14129 * clears the rings, discards all mailbox commands, and resets
14130 * the HBA.
14131 */
14132
14133 /* HBA interrupt will be disabled after this call */
14134 lpfc_sli_hba_down(phba);
14135 /* Stop kthread signal shall trigger work_done one more time */
14136 kthread_stop(phba->worker_thread);
14137 /* Final cleanup of txcmplq and reset the HBA */
14138 lpfc_sli_brdrestart(phba);
14139
14140 kfree(phba->vpi_bmask);
14141 kfree(phba->vpi_ids);
14142
14143 lpfc_stop_hba_timers(phba);
14144 spin_lock_irq(&phba->port_list_lock);
14145 list_del_init(&vport->listentry);
14146 spin_unlock_irq(&phba->port_list_lock);
14147
14148 lpfc_debugfs_terminate(vport);
14149
14150 /* Disable SR-IOV if enabled */
14151 if (phba->cfg_sriov_nr_virtfn)
14152 pci_disable_sriov(pdev);
14153
14154 /* Disable interrupt */
14155 lpfc_sli_disable_intr(phba);
14156
14157 scsi_host_put(shost);
14158
14159 /*
14160 * Call scsi_free before mem_free since scsi bufs are released to their
14161 * corresponding pools here.
14162 */
14163 lpfc_scsi_free(phba);
14164 lpfc_free_iocb_list(phba);
14165
14166 lpfc_mem_free_all(phba);
14167
14168 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
14169 phba->hbqslimp.virt, phba->hbqslimp.phys);
14170
14171 /* Free resources associated with SLI2 interface */
14172 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
14173 phba->slim2p.virt, phba->slim2p.phys);
14174
14175 /* unmap adapter SLIM and Control Registers */
14176 iounmap(phba->ctrl_regs_memmap_p);
14177 iounmap(phba->slim_memmap_p);
14178
14179 lpfc_hba_free(phba);
14180
14181 pci_release_mem_regions(pdev);
14182 pci_disable_device(pdev);
14183 }
14184
14185 /**
14186 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
14187 * @dev_d: pointer to device
14188 *
14189 * This routine is to be called from the kernel's PCI subsystem to support
14190 * system Power Management (PM) to device with SLI-3 interface spec. When
14191 * PM invokes this method, it quiesces the device by stopping the driver's
14192 * worker thread for the device, turning off device's interrupt and DMA,
14193 * and bring the device offline. Note that as the driver implements the
14194 * minimum PM requirements to a power-aware driver's PM support for the
14195 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
14196 * to the suspend() method call will be treated as SUSPEND and the driver will
14197 * fully reinitialize its device during resume() method call, the driver will
14198 * set device to PCI_D3hot state in PCI config space instead of setting it
14199 * according to the @msg provided by the PM.
14200 *
14201 * Return code
14202 * 0 - driver suspended the device
14203 * Error otherwise
14204 **/
14205 static int __maybe_unused
lpfc_pci_suspend_one_s3(struct device * dev_d)14206 lpfc_pci_suspend_one_s3(struct device *dev_d)
14207 {
14208 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14209 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14210
14211 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14212 "0473 PCI device Power Management suspend.\n");
14213
14214 /* Bring down the device */
14215 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14216 lpfc_offline(phba);
14217 kthread_stop(phba->worker_thread);
14218
14219 /* Disable interrupt from device */
14220 lpfc_sli_disable_intr(phba);
14221
14222 return 0;
14223 }
14224
14225 /**
14226 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
14227 * @dev_d: pointer to device
14228 *
14229 * This routine is to be called from the kernel's PCI subsystem to support
14230 * system Power Management (PM) to device with SLI-3 interface spec. When PM
14231 * invokes this method, it restores the device's PCI config space state and
14232 * fully reinitializes the device and brings it online. Note that as the
14233 * driver implements the minimum PM requirements to a power-aware driver's
14234 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
14235 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
14236 * driver will fully reinitialize its device during resume() method call,
14237 * the device will be set to PCI_D0 directly in PCI config space before
14238 * restoring the state.
14239 *
14240 * Return code
14241 * 0 - driver suspended the device
14242 * Error otherwise
14243 **/
14244 static int __maybe_unused
lpfc_pci_resume_one_s3(struct device * dev_d)14245 lpfc_pci_resume_one_s3(struct device *dev_d)
14246 {
14247 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14248 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14249 uint32_t intr_mode;
14250 int error;
14251
14252 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14253 "0452 PCI device Power Management resume.\n");
14254
14255 /* Startup the kernel thread for this host adapter. */
14256 phba->worker_thread = kthread_run(lpfc_do_work, phba,
14257 "lpfc_worker_%d", phba->brd_no);
14258 if (IS_ERR(phba->worker_thread)) {
14259 error = PTR_ERR(phba->worker_thread);
14260 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14261 "0434 PM resume failed to start worker "
14262 "thread: error=x%x.\n", error);
14263 return error;
14264 }
14265
14266 /* Init cpu_map array */
14267 lpfc_cpu_map_array_init(phba);
14268 /* Init hba_eq_hdl array */
14269 lpfc_hba_eq_hdl_array_init(phba);
14270 /* Configure and enable interrupt */
14271 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14272 if (intr_mode == LPFC_INTR_ERROR) {
14273 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14274 "0430 PM resume Failed to enable interrupt\n");
14275 return -EIO;
14276 } else
14277 phba->intr_mode = intr_mode;
14278
14279 /* Restart HBA and bring it online */
14280 lpfc_sli_brdrestart(phba);
14281 lpfc_online(phba);
14282
14283 /* Log the current active interrupt mode */
14284 lpfc_log_intr_mode(phba, phba->intr_mode);
14285
14286 return 0;
14287 }
14288
14289 /**
14290 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
14291 * @phba: pointer to lpfc hba data structure.
14292 *
14293 * This routine is called to prepare the SLI3 device for PCI slot recover. It
14294 * aborts all the outstanding SCSI I/Os to the pci device.
14295 **/
14296 static void
lpfc_sli_prep_dev_for_recover(struct lpfc_hba * phba)14297 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
14298 {
14299 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14300 "2723 PCI channel I/O abort preparing for recovery\n");
14301
14302 /*
14303 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
14304 * and let the SCSI mid-layer to retry them to recover.
14305 */
14306 lpfc_sli_abort_fcp_rings(phba);
14307 }
14308
14309 /**
14310 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
14311 * @phba: pointer to lpfc hba data structure.
14312 *
14313 * This routine is called to prepare the SLI3 device for PCI slot reset. It
14314 * disables the device interrupt and pci device, and aborts the internal FCP
14315 * pending I/Os.
14316 **/
14317 static void
lpfc_sli_prep_dev_for_reset(struct lpfc_hba * phba)14318 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
14319 {
14320 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14321 "2710 PCI channel disable preparing for reset\n");
14322
14323 /* Block any management I/Os to the device */
14324 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
14325
14326 /* Block all SCSI devices' I/Os on the host */
14327 lpfc_scsi_dev_block(phba);
14328
14329 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
14330 lpfc_sli_flush_io_rings(phba);
14331
14332 /* stop all timers */
14333 lpfc_stop_hba_timers(phba);
14334
14335 /* Disable interrupt and pci device */
14336 lpfc_sli_disable_intr(phba);
14337 pci_disable_device(phba->pcidev);
14338 }
14339
14340 /**
14341 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
14342 * @phba: pointer to lpfc hba data structure.
14343 *
14344 * This routine is called to prepare the SLI3 device for PCI slot permanently
14345 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
14346 * pending I/Os.
14347 **/
14348 static void
lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba * phba)14349 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
14350 {
14351 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14352 "2711 PCI channel permanent disable for failure\n");
14353 /* Block all SCSI devices' I/Os on the host */
14354 lpfc_scsi_dev_block(phba);
14355 lpfc_sli4_prep_dev_for_reset(phba);
14356
14357 /* stop all timers */
14358 lpfc_stop_hba_timers(phba);
14359
14360 /* Clean up all driver's outstanding SCSI I/Os */
14361 lpfc_sli_flush_io_rings(phba);
14362 }
14363
14364 /**
14365 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
14366 * @pdev: pointer to PCI device.
14367 * @state: the current PCI connection state.
14368 *
14369 * This routine is called from the PCI subsystem for I/O error handling to
14370 * device with SLI-3 interface spec. This function is called by the PCI
14371 * subsystem after a PCI bus error affecting this device has been detected.
14372 * When this function is invoked, it will need to stop all the I/Os and
14373 * interrupt(s) to the device. Once that is done, it will return
14374 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
14375 * as desired.
14376 *
14377 * Return codes
14378 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
14379 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
14380 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14381 **/
14382 static pci_ers_result_t
lpfc_io_error_detected_s3(struct pci_dev * pdev,pci_channel_state_t state)14383 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
14384 {
14385 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14386 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14387
14388 switch (state) {
14389 case pci_channel_io_normal:
14390 /* Non-fatal error, prepare for recovery */
14391 lpfc_sli_prep_dev_for_recover(phba);
14392 return PCI_ERS_RESULT_CAN_RECOVER;
14393 case pci_channel_io_frozen:
14394 /* Fatal error, prepare for slot reset */
14395 lpfc_sli_prep_dev_for_reset(phba);
14396 return PCI_ERS_RESULT_NEED_RESET;
14397 case pci_channel_io_perm_failure:
14398 /* Permanent failure, prepare for device down */
14399 lpfc_sli_prep_dev_for_perm_failure(phba);
14400 return PCI_ERS_RESULT_DISCONNECT;
14401 default:
14402 /* Unknown state, prepare and request slot reset */
14403 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14404 "0472 Unknown PCI error state: x%x\n", state);
14405 lpfc_sli_prep_dev_for_reset(phba);
14406 return PCI_ERS_RESULT_NEED_RESET;
14407 }
14408 }
14409
14410 /**
14411 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
14412 * @pdev: pointer to PCI device.
14413 *
14414 * This routine is called from the PCI subsystem for error handling to
14415 * device with SLI-3 interface spec. This is called after PCI bus has been
14416 * reset to restart the PCI card from scratch, as if from a cold-boot.
14417 * During the PCI subsystem error recovery, after driver returns
14418 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
14419 * recovery and then call this routine before calling the .resume method
14420 * to recover the device. This function will initialize the HBA device,
14421 * enable the interrupt, but it will just put the HBA to offline state
14422 * without passing any I/O traffic.
14423 *
14424 * Return codes
14425 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
14426 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14427 */
14428 static pci_ers_result_t
lpfc_io_slot_reset_s3(struct pci_dev * pdev)14429 lpfc_io_slot_reset_s3(struct pci_dev *pdev)
14430 {
14431 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14432 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14433 struct lpfc_sli *psli = &phba->sli;
14434 uint32_t intr_mode;
14435
14436 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
14437 if (pci_enable_device_mem(pdev)) {
14438 printk(KERN_ERR "lpfc: Cannot re-enable "
14439 "PCI device after reset.\n");
14440 return PCI_ERS_RESULT_DISCONNECT;
14441 }
14442
14443 pci_restore_state(pdev);
14444
14445 /*
14446 * As the new kernel behavior of pci_restore_state() API call clears
14447 * device saved_state flag, need to save the restored state again.
14448 */
14449 pci_save_state(pdev);
14450
14451 if (pdev->is_busmaster)
14452 pci_set_master(pdev);
14453
14454 spin_lock_irq(&phba->hbalock);
14455 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
14456 spin_unlock_irq(&phba->hbalock);
14457
14458 /* Configure and enable interrupt */
14459 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14460 if (intr_mode == LPFC_INTR_ERROR) {
14461 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14462 "0427 Cannot re-enable interrupt after "
14463 "slot reset.\n");
14464 return PCI_ERS_RESULT_DISCONNECT;
14465 } else
14466 phba->intr_mode = intr_mode;
14467
14468 /* Take device offline, it will perform cleanup */
14469 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14470 lpfc_offline(phba);
14471 lpfc_sli_brdrestart(phba);
14472
14473 /* Log the current active interrupt mode */
14474 lpfc_log_intr_mode(phba, phba->intr_mode);
14475
14476 return PCI_ERS_RESULT_RECOVERED;
14477 }
14478
14479 /**
14480 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
14481 * @pdev: pointer to PCI device
14482 *
14483 * This routine is called from the PCI subsystem for error handling to device
14484 * with SLI-3 interface spec. It is called when kernel error recovery tells
14485 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
14486 * error recovery. After this call, traffic can start to flow from this device
14487 * again.
14488 */
14489 static void
lpfc_io_resume_s3(struct pci_dev * pdev)14490 lpfc_io_resume_s3(struct pci_dev *pdev)
14491 {
14492 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14493 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14494
14495 /* Bring device online, it will be no-op for non-fatal error resume */
14496 lpfc_online(phba);
14497 }
14498
14499 /**
14500 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
14501 * @phba: pointer to lpfc hba data structure.
14502 *
14503 * returns the number of ELS/CT IOCBs to reserve
14504 **/
14505 int
lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba * phba)14506 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
14507 {
14508 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14509
14510 if (phba->sli_rev == LPFC_SLI_REV4) {
14511 if (max_xri <= 100)
14512 return 10;
14513 else if (max_xri <= 256)
14514 return 25;
14515 else if (max_xri <= 512)
14516 return 50;
14517 else if (max_xri <= 1024)
14518 return 100;
14519 else if (max_xri <= 1536)
14520 return 150;
14521 else if (max_xri <= 2048)
14522 return 200;
14523 else
14524 return 250;
14525 } else
14526 return 0;
14527 }
14528
14529 /**
14530 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
14531 * @phba: pointer to lpfc hba data structure.
14532 *
14533 * returns the number of ELS/CT + NVMET IOCBs to reserve
14534 **/
14535 int
lpfc_sli4_get_iocb_cnt(struct lpfc_hba * phba)14536 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
14537 {
14538 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
14539
14540 if (phba->nvmet_support)
14541 max_xri += LPFC_NVMET_BUF_POST;
14542 return max_xri;
14543 }
14544
14545
14546 static int
lpfc_log_write_firmware_error(struct lpfc_hba * phba,uint32_t offset,uint32_t magic_number,uint32_t ftype,uint32_t fid,uint32_t fsize,const struct firmware * fw)14547 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
14548 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
14549 const struct firmware *fw)
14550 {
14551 int rc;
14552 u8 sli_family;
14553
14554 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14555 /* Three cases: (1) FW was not supported on the detected adapter.
14556 * (2) FW update has been locked out administratively.
14557 * (3) Some other error during FW update.
14558 * In each case, an unmaskable message is written to the console
14559 * for admin diagnosis.
14560 */
14561 if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
14562 (sli_family == LPFC_SLI_INTF_FAMILY_G6 &&
14563 magic_number != MAGIC_NUMBER_G6) ||
14564 (sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
14565 magic_number != MAGIC_NUMBER_G7) ||
14566 (sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
14567 magic_number != MAGIC_NUMBER_G7P)) {
14568 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14569 "3030 This firmware version is not supported on"
14570 " this HBA model. Device:%x Magic:%x Type:%x "
14571 "ID:%x Size %d %zd\n",
14572 phba->pcidev->device, magic_number, ftype, fid,
14573 fsize, fw->size);
14574 rc = -EINVAL;
14575 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
14576 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14577 "3021 Firmware downloads have been prohibited "
14578 "by a system configuration setting on "
14579 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14580 "%zd\n",
14581 phba->pcidev->device, magic_number, ftype, fid,
14582 fsize, fw->size);
14583 rc = -EACCES;
14584 } else {
14585 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14586 "3022 FW Download failed. Add Status x%x "
14587 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14588 "%zd\n",
14589 offset, phba->pcidev->device, magic_number,
14590 ftype, fid, fsize, fw->size);
14591 rc = -EIO;
14592 }
14593 return rc;
14594 }
14595
14596 /**
14597 * lpfc_write_firmware - attempt to write a firmware image to the port
14598 * @fw: pointer to firmware image returned from request_firmware.
14599 * @context: pointer to firmware image returned from request_firmware.
14600 *
14601 **/
14602 static void
lpfc_write_firmware(const struct firmware * fw,void * context)14603 lpfc_write_firmware(const struct firmware *fw, void *context)
14604 {
14605 struct lpfc_hba *phba = (struct lpfc_hba *)context;
14606 char fwrev[FW_REV_STR_SIZE];
14607 struct lpfc_grp_hdr *image;
14608 struct list_head dma_buffer_list;
14609 int i, rc = 0;
14610 struct lpfc_dmabuf *dmabuf, *next;
14611 uint32_t offset = 0, temp_offset = 0;
14612 uint32_t magic_number, ftype, fid, fsize;
14613
14614 /* It can be null in no-wait mode, sanity check */
14615 if (!fw) {
14616 rc = -ENXIO;
14617 goto out;
14618 }
14619 image = (struct lpfc_grp_hdr *)fw->data;
14620
14621 magic_number = be32_to_cpu(image->magic_number);
14622 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
14623 fid = bf_get_be32(lpfc_grp_hdr_id, image);
14624 fsize = be32_to_cpu(image->size);
14625
14626 INIT_LIST_HEAD(&dma_buffer_list);
14627 lpfc_decode_firmware_rev(phba, fwrev, 1);
14628 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
14629 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14630 "3023 Updating Firmware, Current Version:%s "
14631 "New Version:%s\n",
14632 fwrev, image->revision);
14633 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
14634 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
14635 GFP_KERNEL);
14636 if (!dmabuf) {
14637 rc = -ENOMEM;
14638 goto release_out;
14639 }
14640 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14641 SLI4_PAGE_SIZE,
14642 &dmabuf->phys,
14643 GFP_KERNEL);
14644 if (!dmabuf->virt) {
14645 kfree(dmabuf);
14646 rc = -ENOMEM;
14647 goto release_out;
14648 }
14649 list_add_tail(&dmabuf->list, &dma_buffer_list);
14650 }
14651 while (offset < fw->size) {
14652 temp_offset = offset;
14653 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
14654 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
14655 memcpy(dmabuf->virt,
14656 fw->data + temp_offset,
14657 fw->size - temp_offset);
14658 temp_offset = fw->size;
14659 break;
14660 }
14661 memcpy(dmabuf->virt, fw->data + temp_offset,
14662 SLI4_PAGE_SIZE);
14663 temp_offset += SLI4_PAGE_SIZE;
14664 }
14665 rc = lpfc_wr_object(phba, &dma_buffer_list,
14666 (fw->size - offset), &offset);
14667 if (rc) {
14668 rc = lpfc_log_write_firmware_error(phba, offset,
14669 magic_number,
14670 ftype,
14671 fid,
14672 fsize,
14673 fw);
14674 goto release_out;
14675 }
14676 }
14677 rc = offset;
14678 } else
14679 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14680 "3029 Skipped Firmware update, Current "
14681 "Version:%s New Version:%s\n",
14682 fwrev, image->revision);
14683
14684 release_out:
14685 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
14686 list_del(&dmabuf->list);
14687 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
14688 dmabuf->virt, dmabuf->phys);
14689 kfree(dmabuf);
14690 }
14691 release_firmware(fw);
14692 out:
14693 if (rc < 0)
14694 lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI,
14695 "3062 Firmware update error, status %d.\n", rc);
14696 else
14697 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14698 "3024 Firmware update success: size %d.\n", rc);
14699 }
14700
14701 /**
14702 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
14703 * @phba: pointer to lpfc hba data structure.
14704 * @fw_upgrade: which firmware to update.
14705 *
14706 * This routine is called to perform Linux generic firmware upgrade on device
14707 * that supports such feature.
14708 **/
14709 int
lpfc_sli4_request_firmware_update(struct lpfc_hba * phba,uint8_t fw_upgrade)14710 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
14711 {
14712 char file_name[ELX_FW_NAME_SIZE] = {0};
14713 int ret;
14714 const struct firmware *fw;
14715
14716 /* Only supported on SLI4 interface type 2 for now */
14717 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
14718 LPFC_SLI_INTF_IF_TYPE_2)
14719 return -EPERM;
14720
14721 scnprintf(file_name, sizeof(file_name), "%s.grp", phba->ModelName);
14722
14723 if (fw_upgrade == INT_FW_UPGRADE) {
14724 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
14725 file_name, &phba->pcidev->dev,
14726 GFP_KERNEL, (void *)phba,
14727 lpfc_write_firmware);
14728 } else if (fw_upgrade == RUN_FW_UPGRADE) {
14729 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
14730 if (!ret)
14731 lpfc_write_firmware(fw, (void *)phba);
14732 } else {
14733 ret = -EINVAL;
14734 }
14735
14736 return ret;
14737 }
14738
14739 /**
14740 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
14741 * @pdev: pointer to PCI device
14742 * @pid: pointer to PCI device identifier
14743 *
14744 * This routine is called from the kernel's PCI subsystem to device with
14745 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14746 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
14747 * information of the device and driver to see if the driver state that it
14748 * can support this kind of device. If the match is successful, the driver
14749 * core invokes this routine. If this routine determines it can claim the HBA,
14750 * it does all the initialization that it needs to do to handle the HBA
14751 * properly.
14752 *
14753 * Return code
14754 * 0 - driver can claim the device
14755 * negative value - driver can not claim the device
14756 **/
14757 static int
lpfc_pci_probe_one_s4(struct pci_dev * pdev,const struct pci_device_id * pid)14758 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
14759 {
14760 struct lpfc_hba *phba;
14761 struct lpfc_vport *vport = NULL;
14762 struct Scsi_Host *shost = NULL;
14763 int error;
14764 uint32_t cfg_mode, intr_mode;
14765
14766 /* Allocate memory for HBA structure */
14767 phba = lpfc_hba_alloc(pdev);
14768 if (!phba)
14769 return -ENOMEM;
14770
14771 INIT_LIST_HEAD(&phba->poll_list);
14772
14773 /* Perform generic PCI device enabling operation */
14774 error = lpfc_enable_pci_dev(phba);
14775 if (error)
14776 goto out_free_phba;
14777
14778 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
14779 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
14780 if (error)
14781 goto out_disable_pci_dev;
14782
14783 /* Set up SLI-4 specific device PCI memory space */
14784 error = lpfc_sli4_pci_mem_setup(phba);
14785 if (error) {
14786 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14787 "1410 Failed to set up pci memory space.\n");
14788 goto out_disable_pci_dev;
14789 }
14790
14791 /* Set up SLI-4 Specific device driver resources */
14792 error = lpfc_sli4_driver_resource_setup(phba);
14793 if (error) {
14794 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14795 "1412 Failed to set up driver resource.\n");
14796 goto out_unset_pci_mem_s4;
14797 }
14798
14799 spin_lock_init(&phba->rrq_list_lock);
14800 INIT_LIST_HEAD(&phba->active_rrq_list);
14801 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
14802
14803 /* Set up common device driver resources */
14804 error = lpfc_setup_driver_resource_phase2(phba);
14805 if (error) {
14806 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14807 "1414 Failed to set up driver resource.\n");
14808 goto out_unset_driver_resource_s4;
14809 }
14810
14811 /* Get the default values for Model Name and Description */
14812 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14813
14814 /* Now, trying to enable interrupt and bring up the device */
14815 cfg_mode = phba->cfg_use_msi;
14816
14817 /* Put device to a known state before enabling interrupt */
14818 phba->pport = NULL;
14819 lpfc_stop_port(phba);
14820
14821 /* Init cpu_map array */
14822 lpfc_cpu_map_array_init(phba);
14823
14824 /* Init hba_eq_hdl array */
14825 lpfc_hba_eq_hdl_array_init(phba);
14826
14827 /* Configure and enable interrupt */
14828 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
14829 if (intr_mode == LPFC_INTR_ERROR) {
14830 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14831 "0426 Failed to enable interrupt.\n");
14832 error = -ENODEV;
14833 goto out_unset_driver_resource;
14834 }
14835 /* Default to single EQ for non-MSI-X */
14836 if (phba->intr_type != MSIX) {
14837 phba->cfg_irq_chann = 1;
14838 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14839 if (phba->nvmet_support)
14840 phba->cfg_nvmet_mrq = 1;
14841 }
14842 }
14843 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
14844
14845 /* Create SCSI host to the physical port */
14846 error = lpfc_create_shost(phba);
14847 if (error) {
14848 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14849 "1415 Failed to create scsi host.\n");
14850 goto out_disable_intr;
14851 }
14852 vport = phba->pport;
14853 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14854
14855 /* Configure sysfs attributes */
14856 error = lpfc_alloc_sysfs_attr(vport);
14857 if (error) {
14858 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14859 "1416 Failed to allocate sysfs attr\n");
14860 goto out_destroy_shost;
14861 }
14862
14863 /* Set up SLI-4 HBA */
14864 if (lpfc_sli4_hba_setup(phba)) {
14865 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14866 "1421 Failed to set up hba\n");
14867 error = -ENODEV;
14868 goto out_free_sysfs_attr;
14869 }
14870
14871 /* Log the current active interrupt mode */
14872 phba->intr_mode = intr_mode;
14873 lpfc_log_intr_mode(phba, intr_mode);
14874
14875 /* Perform post initialization setup */
14876 lpfc_post_init_setup(phba);
14877
14878 /* NVME support in FW earlier in the driver load corrects the
14879 * FC4 type making a check for nvme_support unnecessary.
14880 */
14881 if (phba->nvmet_support == 0) {
14882 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14883 /* Create NVME binding with nvme_fc_transport. This
14884 * ensures the vport is initialized. If the localport
14885 * create fails, it should not unload the driver to
14886 * support field issues.
14887 */
14888 error = lpfc_nvme_create_localport(vport);
14889 if (error) {
14890 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14891 "6004 NVME registration "
14892 "failed, error x%x\n",
14893 error);
14894 }
14895 }
14896 }
14897
14898 /* check for firmware upgrade or downgrade */
14899 if (phba->cfg_request_firmware_upgrade)
14900 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
14901
14902 /* Check if there are static vports to be created. */
14903 lpfc_create_static_vport(phba);
14904
14905 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14906 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
14907
14908 return 0;
14909
14910 out_free_sysfs_attr:
14911 lpfc_free_sysfs_attr(vport);
14912 out_destroy_shost:
14913 lpfc_destroy_shost(phba);
14914 out_disable_intr:
14915 lpfc_sli4_disable_intr(phba);
14916 out_unset_driver_resource:
14917 lpfc_unset_driver_resource_phase2(phba);
14918 out_unset_driver_resource_s4:
14919 lpfc_sli4_driver_resource_unset(phba);
14920 out_unset_pci_mem_s4:
14921 lpfc_sli4_pci_mem_unset(phba);
14922 out_disable_pci_dev:
14923 lpfc_disable_pci_dev(phba);
14924 if (shost)
14925 scsi_host_put(shost);
14926 out_free_phba:
14927 lpfc_hba_free(phba);
14928 return error;
14929 }
14930
14931 /**
14932 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
14933 * @pdev: pointer to PCI device
14934 *
14935 * This routine is called from the kernel's PCI subsystem to device with
14936 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14937 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14938 * device to be removed from the PCI subsystem properly.
14939 **/
14940 static void
lpfc_pci_remove_one_s4(struct pci_dev * pdev)14941 lpfc_pci_remove_one_s4(struct pci_dev *pdev)
14942 {
14943 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14944 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14945 struct lpfc_vport **vports;
14946 struct lpfc_hba *phba = vport->phba;
14947 int i;
14948
14949 /* Mark the device unloading flag */
14950 set_bit(FC_UNLOADING, &vport->load_flag);
14951 if (phba->cgn_i)
14952 lpfc_unreg_congestion_buf(phba);
14953
14954 lpfc_free_sysfs_attr(vport);
14955
14956 /* Release all the vports against this physical port */
14957 vports = lpfc_create_vport_work_array(phba);
14958 if (vports != NULL)
14959 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14960 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14961 continue;
14962 fc_vport_terminate(vports[i]->fc_vport);
14963 }
14964 lpfc_destroy_vport_work_array(phba, vports);
14965
14966 /* Remove FC host with the physical port */
14967 fc_remove_host(shost);
14968 scsi_remove_host(shost);
14969
14970 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
14971 * localports are destroyed after to cleanup all transport memory.
14972 */
14973 lpfc_cleanup(vport);
14974 lpfc_nvmet_destroy_targetport(phba);
14975 lpfc_nvme_destroy_localport(vport);
14976
14977 /* De-allocate multi-XRI pools */
14978 if (phba->cfg_xri_rebalancing)
14979 lpfc_destroy_multixri_pools(phba);
14980
14981 /*
14982 * Bring down the SLI Layer. This step disables all interrupts,
14983 * clears the rings, discards all mailbox commands, and resets
14984 * the HBA FCoE function.
14985 */
14986 lpfc_debugfs_terminate(vport);
14987
14988 lpfc_stop_hba_timers(phba);
14989 spin_lock_irq(&phba->port_list_lock);
14990 list_del_init(&vport->listentry);
14991 spin_unlock_irq(&phba->port_list_lock);
14992
14993 /* Perform scsi free before driver resource_unset since scsi
14994 * buffers are released to their corresponding pools here.
14995 */
14996 lpfc_io_free(phba);
14997 lpfc_free_iocb_list(phba);
14998 lpfc_sli4_hba_unset(phba);
14999
15000 lpfc_unset_driver_resource_phase2(phba);
15001 lpfc_sli4_driver_resource_unset(phba);
15002
15003 /* Unmap adapter Control and Doorbell registers */
15004 lpfc_sli4_pci_mem_unset(phba);
15005
15006 /* Release PCI resources and disable device's PCI function */
15007 scsi_host_put(shost);
15008 lpfc_disable_pci_dev(phba);
15009
15010 /* Finally, free the driver's device data structure */
15011 lpfc_hba_free(phba);
15012
15013 return;
15014 }
15015
15016 /**
15017 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
15018 * @dev_d: pointer to device
15019 *
15020 * This routine is called from the kernel's PCI subsystem to support system
15021 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
15022 * this method, it quiesces the device by stopping the driver's worker
15023 * thread for the device, turning off device's interrupt and DMA, and bring
15024 * the device offline. Note that as the driver implements the minimum PM
15025 * requirements to a power-aware driver's PM support for suspend/resume -- all
15026 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
15027 * method call will be treated as SUSPEND and the driver will fully
15028 * reinitialize its device during resume() method call, the driver will set
15029 * device to PCI_D3hot state in PCI config space instead of setting it
15030 * according to the @msg provided by the PM.
15031 *
15032 * Return code
15033 * 0 - driver suspended the device
15034 * Error otherwise
15035 **/
15036 static int __maybe_unused
lpfc_pci_suspend_one_s4(struct device * dev_d)15037 lpfc_pci_suspend_one_s4(struct device *dev_d)
15038 {
15039 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15040 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15041
15042 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15043 "2843 PCI device Power Management suspend.\n");
15044
15045 /* Bring down the device */
15046 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
15047 lpfc_offline(phba);
15048 kthread_stop(phba->worker_thread);
15049
15050 /* Disable interrupt from device */
15051 lpfc_sli4_disable_intr(phba);
15052 lpfc_sli4_queue_destroy(phba);
15053
15054 return 0;
15055 }
15056
15057 /**
15058 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
15059 * @dev_d: pointer to device
15060 *
15061 * This routine is called from the kernel's PCI subsystem to support system
15062 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
15063 * this method, it restores the device's PCI config space state and fully
15064 * reinitializes the device and brings it online. Note that as the driver
15065 * implements the minimum PM requirements to a power-aware driver's PM for
15066 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
15067 * to the suspend() method call will be treated as SUSPEND and the driver
15068 * will fully reinitialize its device during resume() method call, the device
15069 * will be set to PCI_D0 directly in PCI config space before restoring the
15070 * state.
15071 *
15072 * Return code
15073 * 0 - driver suspended the device
15074 * Error otherwise
15075 **/
15076 static int __maybe_unused
lpfc_pci_resume_one_s4(struct device * dev_d)15077 lpfc_pci_resume_one_s4(struct device *dev_d)
15078 {
15079 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15080 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15081 uint32_t intr_mode;
15082 int error;
15083
15084 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15085 "0292 PCI device Power Management resume.\n");
15086
15087 /* Startup the kernel thread for this host adapter. */
15088 phba->worker_thread = kthread_run(lpfc_do_work, phba,
15089 "lpfc_worker_%d", phba->brd_no);
15090 if (IS_ERR(phba->worker_thread)) {
15091 error = PTR_ERR(phba->worker_thread);
15092 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15093 "0293 PM resume failed to start worker "
15094 "thread: error=x%x.\n", error);
15095 return error;
15096 }
15097
15098 /* Configure and enable interrupt */
15099 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15100 if (intr_mode == LPFC_INTR_ERROR) {
15101 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15102 "0294 PM resume Failed to enable interrupt\n");
15103 return -EIO;
15104 } else
15105 phba->intr_mode = intr_mode;
15106
15107 /* Restart HBA and bring it online */
15108 lpfc_sli_brdrestart(phba);
15109 lpfc_online(phba);
15110
15111 /* Log the current active interrupt mode */
15112 lpfc_log_intr_mode(phba, phba->intr_mode);
15113
15114 return 0;
15115 }
15116
15117 /**
15118 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
15119 * @phba: pointer to lpfc hba data structure.
15120 *
15121 * This routine is called to prepare the SLI4 device for PCI slot recover. It
15122 * aborts all the outstanding SCSI I/Os to the pci device.
15123 **/
15124 static void
lpfc_sli4_prep_dev_for_recover(struct lpfc_hba * phba)15125 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
15126 {
15127 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15128 "2828 PCI channel I/O abort preparing for recovery\n");
15129 /*
15130 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
15131 * and let the SCSI mid-layer to retry them to recover.
15132 */
15133 lpfc_sli_abort_fcp_rings(phba);
15134 }
15135
15136 /**
15137 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
15138 * @phba: pointer to lpfc hba data structure.
15139 *
15140 * This routine is called to prepare the SLI4 device for PCI slot reset. It
15141 * disables the device interrupt and pci device, and aborts the internal FCP
15142 * pending I/Os.
15143 **/
15144 static void
lpfc_sli4_prep_dev_for_reset(struct lpfc_hba * phba)15145 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
15146 {
15147 int offline = pci_channel_offline(phba->pcidev);
15148
15149 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15150 "2826 PCI channel disable preparing for reset offline"
15151 " %d\n", offline);
15152
15153 /* Block any management I/Os to the device */
15154 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
15155
15156
15157 /* HBA_PCI_ERR was set in io_error_detect */
15158 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
15159 /* Flush all driver's outstanding I/Os as we are to reset */
15160 lpfc_sli_flush_io_rings(phba);
15161 lpfc_offline(phba);
15162
15163 /* stop all timers */
15164 lpfc_stop_hba_timers(phba);
15165
15166 lpfc_sli4_queue_destroy(phba);
15167 /* Disable interrupt and pci device */
15168 lpfc_sli4_disable_intr(phba);
15169 pci_disable_device(phba->pcidev);
15170 }
15171
15172 /**
15173 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
15174 * @phba: pointer to lpfc hba data structure.
15175 *
15176 * This routine is called to prepare the SLI4 device for PCI slot permanently
15177 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
15178 * pending I/Os.
15179 **/
15180 static void
lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba * phba)15181 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
15182 {
15183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15184 "2827 PCI channel permanent disable for failure\n");
15185
15186 /* Block all SCSI devices' I/Os on the host */
15187 lpfc_scsi_dev_block(phba);
15188
15189 /* stop all timers */
15190 lpfc_stop_hba_timers(phba);
15191
15192 /* Clean up all driver's outstanding I/Os */
15193 lpfc_sli_flush_io_rings(phba);
15194 }
15195
15196 /**
15197 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
15198 * @pdev: pointer to PCI device.
15199 * @state: the current PCI connection state.
15200 *
15201 * This routine is called from the PCI subsystem for error handling to device
15202 * with SLI-4 interface spec. This function is called by the PCI subsystem
15203 * after a PCI bus error affecting this device has been detected. When this
15204 * function is invoked, it will need to stop all the I/Os and interrupt(s)
15205 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
15206 * for the PCI subsystem to perform proper recovery as desired.
15207 *
15208 * Return codes
15209 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15210 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15211 **/
15212 static pci_ers_result_t
lpfc_io_error_detected_s4(struct pci_dev * pdev,pci_channel_state_t state)15213 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
15214 {
15215 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15216 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15217 bool hba_pci_err;
15218
15219 switch (state) {
15220 case pci_channel_io_normal:
15221 /* Non-fatal error, prepare for recovery */
15222 lpfc_sli4_prep_dev_for_recover(phba);
15223 return PCI_ERS_RESULT_CAN_RECOVER;
15224 case pci_channel_io_frozen:
15225 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15226 /* Fatal error, prepare for slot reset */
15227 if (!hba_pci_err)
15228 lpfc_sli4_prep_dev_for_reset(phba);
15229 else
15230 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15231 "2832 Already handling PCI error "
15232 "state: x%x\n", state);
15233 return PCI_ERS_RESULT_NEED_RESET;
15234 case pci_channel_io_perm_failure:
15235 set_bit(HBA_PCI_ERR, &phba->bit_flags);
15236 /* Permanent failure, prepare for device down */
15237 lpfc_sli4_prep_dev_for_perm_failure(phba);
15238 return PCI_ERS_RESULT_DISCONNECT;
15239 default:
15240 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15241 if (!hba_pci_err)
15242 lpfc_sli4_prep_dev_for_reset(phba);
15243 /* Unknown state, prepare and request slot reset */
15244 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15245 "2825 Unknown PCI error state: x%x\n", state);
15246 lpfc_sli4_prep_dev_for_reset(phba);
15247 return PCI_ERS_RESULT_NEED_RESET;
15248 }
15249 }
15250
15251 /**
15252 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
15253 * @pdev: pointer to PCI device.
15254 *
15255 * This routine is called from the PCI subsystem for error handling to device
15256 * with SLI-4 interface spec. It is called after PCI bus has been reset to
15257 * restart the PCI card from scratch, as if from a cold-boot. During the
15258 * PCI subsystem error recovery, after the driver returns
15259 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
15260 * recovery and then call this routine before calling the .resume method to
15261 * recover the device. This function will initialize the HBA device, enable
15262 * the interrupt, but it will just put the HBA to offline state without
15263 * passing any I/O traffic.
15264 *
15265 * Return codes
15266 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15267 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15268 */
15269 static pci_ers_result_t
lpfc_io_slot_reset_s4(struct pci_dev * pdev)15270 lpfc_io_slot_reset_s4(struct pci_dev *pdev)
15271 {
15272 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15273 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15274 struct lpfc_sli *psli = &phba->sli;
15275 uint32_t intr_mode;
15276 bool hba_pci_err;
15277
15278 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
15279 if (pci_enable_device_mem(pdev)) {
15280 printk(KERN_ERR "lpfc: Cannot re-enable "
15281 "PCI device after reset.\n");
15282 return PCI_ERS_RESULT_DISCONNECT;
15283 }
15284
15285 pci_restore_state(pdev);
15286
15287 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags);
15288 if (!hba_pci_err)
15289 dev_info(&pdev->dev,
15290 "hba_pci_err was not set, recovering slot reset.\n");
15291 /*
15292 * As the new kernel behavior of pci_restore_state() API call clears
15293 * device saved_state flag, need to save the restored state again.
15294 */
15295 pci_save_state(pdev);
15296
15297 if (pdev->is_busmaster)
15298 pci_set_master(pdev);
15299
15300 spin_lock_irq(&phba->hbalock);
15301 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
15302 spin_unlock_irq(&phba->hbalock);
15303
15304 /* Init cpu_map array */
15305 lpfc_cpu_map_array_init(phba);
15306 /* Configure and enable interrupt */
15307 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15308 if (intr_mode == LPFC_INTR_ERROR) {
15309 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15310 "2824 Cannot re-enable interrupt after "
15311 "slot reset.\n");
15312 return PCI_ERS_RESULT_DISCONNECT;
15313 } else
15314 phba->intr_mode = intr_mode;
15315 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
15316
15317 /* Log the current active interrupt mode */
15318 lpfc_log_intr_mode(phba, phba->intr_mode);
15319
15320 return PCI_ERS_RESULT_RECOVERED;
15321 }
15322
15323 /**
15324 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
15325 * @pdev: pointer to PCI device
15326 *
15327 * This routine is called from the PCI subsystem for error handling to device
15328 * with SLI-4 interface spec. It is called when kernel error recovery tells
15329 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
15330 * error recovery. After this call, traffic can start to flow from this device
15331 * again.
15332 **/
15333 static void
lpfc_io_resume_s4(struct pci_dev * pdev)15334 lpfc_io_resume_s4(struct pci_dev *pdev)
15335 {
15336 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15337 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15338
15339 /*
15340 * In case of slot reset, as function reset is performed through
15341 * mailbox command which needs DMA to be enabled, this operation
15342 * has to be moved to the io resume phase. Taking device offline
15343 * will perform the necessary cleanup.
15344 */
15345 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
15346 /* Perform device reset */
15347 lpfc_sli_brdrestart(phba);
15348 /* Bring the device back online */
15349 lpfc_online(phba);
15350 }
15351 }
15352
15353 /**
15354 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
15355 * @pdev: pointer to PCI device
15356 * @pid: pointer to PCI device identifier
15357 *
15358 * This routine is to be registered to the kernel's PCI subsystem. When an
15359 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
15360 * at PCI device-specific information of the device and driver to see if the
15361 * driver state that it can support this kind of device. If the match is
15362 * successful, the driver core invokes this routine. This routine dispatches
15363 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
15364 * do all the initialization that it needs to do to handle the HBA device
15365 * properly.
15366 *
15367 * Return code
15368 * 0 - driver can claim the device
15369 * negative value - driver can not claim the device
15370 **/
15371 static int
lpfc_pci_probe_one(struct pci_dev * pdev,const struct pci_device_id * pid)15372 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
15373 {
15374 int rc;
15375 struct lpfc_sli_intf intf;
15376
15377 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
15378 return -ENODEV;
15379
15380 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
15381 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
15382 rc = lpfc_pci_probe_one_s4(pdev, pid);
15383 else
15384 rc = lpfc_pci_probe_one_s3(pdev, pid);
15385
15386 return rc;
15387 }
15388
15389 /**
15390 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
15391 * @pdev: pointer to PCI device
15392 *
15393 * This routine is to be registered to the kernel's PCI subsystem. When an
15394 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
15395 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
15396 * remove routine, which will perform all the necessary cleanup for the
15397 * device to be removed from the PCI subsystem properly.
15398 **/
15399 static void
lpfc_pci_remove_one(struct pci_dev * pdev)15400 lpfc_pci_remove_one(struct pci_dev *pdev)
15401 {
15402 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15403 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15404
15405 switch (phba->pci_dev_grp) {
15406 case LPFC_PCI_DEV_LP:
15407 lpfc_pci_remove_one_s3(pdev);
15408 break;
15409 case LPFC_PCI_DEV_OC:
15410 lpfc_pci_remove_one_s4(pdev);
15411 break;
15412 default:
15413 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15414 "1424 Invalid PCI device group: 0x%x\n",
15415 phba->pci_dev_grp);
15416 break;
15417 }
15418 return;
15419 }
15420
15421 /**
15422 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
15423 * @dev: pointer to device
15424 *
15425 * This routine is to be registered to the kernel's PCI subsystem to support
15426 * system Power Management (PM). When PM invokes this method, it dispatches
15427 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
15428 * suspend the device.
15429 *
15430 * Return code
15431 * 0 - driver suspended the device
15432 * Error otherwise
15433 **/
15434 static int __maybe_unused
lpfc_pci_suspend_one(struct device * dev)15435 lpfc_pci_suspend_one(struct device *dev)
15436 {
15437 struct Scsi_Host *shost = dev_get_drvdata(dev);
15438 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15439 int rc = -ENODEV;
15440
15441 switch (phba->pci_dev_grp) {
15442 case LPFC_PCI_DEV_LP:
15443 rc = lpfc_pci_suspend_one_s3(dev);
15444 break;
15445 case LPFC_PCI_DEV_OC:
15446 rc = lpfc_pci_suspend_one_s4(dev);
15447 break;
15448 default:
15449 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15450 "1425 Invalid PCI device group: 0x%x\n",
15451 phba->pci_dev_grp);
15452 break;
15453 }
15454 return rc;
15455 }
15456
15457 /**
15458 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
15459 * @dev: pointer to device
15460 *
15461 * This routine is to be registered to the kernel's PCI subsystem to support
15462 * system Power Management (PM). When PM invokes this method, it dispatches
15463 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
15464 * resume the device.
15465 *
15466 * Return code
15467 * 0 - driver suspended the device
15468 * Error otherwise
15469 **/
15470 static int __maybe_unused
lpfc_pci_resume_one(struct device * dev)15471 lpfc_pci_resume_one(struct device *dev)
15472 {
15473 struct Scsi_Host *shost = dev_get_drvdata(dev);
15474 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15475 int rc = -ENODEV;
15476
15477 switch (phba->pci_dev_grp) {
15478 case LPFC_PCI_DEV_LP:
15479 rc = lpfc_pci_resume_one_s3(dev);
15480 break;
15481 case LPFC_PCI_DEV_OC:
15482 rc = lpfc_pci_resume_one_s4(dev);
15483 break;
15484 default:
15485 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15486 "1426 Invalid PCI device group: 0x%x\n",
15487 phba->pci_dev_grp);
15488 break;
15489 }
15490 return rc;
15491 }
15492
15493 /**
15494 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
15495 * @pdev: pointer to PCI device.
15496 * @state: the current PCI connection state.
15497 *
15498 * This routine is registered to the PCI subsystem for error handling. This
15499 * function is called by the PCI subsystem after a PCI bus error affecting
15500 * this device has been detected. When this routine is invoked, it dispatches
15501 * the action to the proper SLI-3 or SLI-4 device error detected handling
15502 * routine, which will perform the proper error detected operation.
15503 *
15504 * Return codes
15505 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15506 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15507 **/
15508 static pci_ers_result_t
lpfc_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)15509 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
15510 {
15511 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15512 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15513 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15514
15515 if (phba->link_state == LPFC_HBA_ERROR &&
15516 test_bit(HBA_IOQ_FLUSH, &phba->hba_flag))
15517 return PCI_ERS_RESULT_NEED_RESET;
15518
15519 switch (phba->pci_dev_grp) {
15520 case LPFC_PCI_DEV_LP:
15521 rc = lpfc_io_error_detected_s3(pdev, state);
15522 break;
15523 case LPFC_PCI_DEV_OC:
15524 rc = lpfc_io_error_detected_s4(pdev, state);
15525 break;
15526 default:
15527 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15528 "1427 Invalid PCI device group: 0x%x\n",
15529 phba->pci_dev_grp);
15530 break;
15531 }
15532 return rc;
15533 }
15534
15535 /**
15536 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
15537 * @pdev: pointer to PCI device.
15538 *
15539 * This routine is registered to the PCI subsystem for error handling. This
15540 * function is called after PCI bus has been reset to restart the PCI card
15541 * from scratch, as if from a cold-boot. When this routine is invoked, it
15542 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
15543 * routine, which will perform the proper device reset.
15544 *
15545 * Return codes
15546 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15547 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15548 **/
15549 static pci_ers_result_t
lpfc_io_slot_reset(struct pci_dev * pdev)15550 lpfc_io_slot_reset(struct pci_dev *pdev)
15551 {
15552 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15553 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15554 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15555
15556 switch (phba->pci_dev_grp) {
15557 case LPFC_PCI_DEV_LP:
15558 rc = lpfc_io_slot_reset_s3(pdev);
15559 break;
15560 case LPFC_PCI_DEV_OC:
15561 rc = lpfc_io_slot_reset_s4(pdev);
15562 break;
15563 default:
15564 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15565 "1428 Invalid PCI device group: 0x%x\n",
15566 phba->pci_dev_grp);
15567 break;
15568 }
15569 return rc;
15570 }
15571
15572 /**
15573 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
15574 * @pdev: pointer to PCI device
15575 *
15576 * This routine is registered to the PCI subsystem for error handling. It
15577 * is called when kernel error recovery tells the lpfc driver that it is
15578 * OK to resume normal PCI operation after PCI bus error recovery. When
15579 * this routine is invoked, it dispatches the action to the proper SLI-3
15580 * or SLI-4 device io_resume routine, which will resume the device operation.
15581 **/
15582 static void
lpfc_io_resume(struct pci_dev * pdev)15583 lpfc_io_resume(struct pci_dev *pdev)
15584 {
15585 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15586 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15587
15588 switch (phba->pci_dev_grp) {
15589 case LPFC_PCI_DEV_LP:
15590 lpfc_io_resume_s3(pdev);
15591 break;
15592 case LPFC_PCI_DEV_OC:
15593 lpfc_io_resume_s4(pdev);
15594 break;
15595 default:
15596 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15597 "1429 Invalid PCI device group: 0x%x\n",
15598 phba->pci_dev_grp);
15599 break;
15600 }
15601 return;
15602 }
15603
15604 /**
15605 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
15606 * @phba: pointer to lpfc hba data structure.
15607 *
15608 * This routine checks to see if OAS is supported for this adapter. If
15609 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
15610 * the enable oas flag is cleared and the pool created for OAS device data
15611 * is destroyed.
15612 *
15613 **/
15614 static void
lpfc_sli4_oas_verify(struct lpfc_hba * phba)15615 lpfc_sli4_oas_verify(struct lpfc_hba *phba)
15616 {
15617
15618 if (!phba->cfg_EnableXLane)
15619 return;
15620
15621 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15622 phba->cfg_fof = 1;
15623 } else {
15624 phba->cfg_fof = 0;
15625 mempool_destroy(phba->device_data_mem_pool);
15626 phba->device_data_mem_pool = NULL;
15627 }
15628
15629 return;
15630 }
15631
15632 /**
15633 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
15634 * @phba: pointer to lpfc hba data structure.
15635 *
15636 * This routine checks to see if RAS is supported by the adapter. Check the
15637 * function through which RAS support enablement is to be done.
15638 **/
15639 void
lpfc_sli4_ras_init(struct lpfc_hba * phba)15640 lpfc_sli4_ras_init(struct lpfc_hba *phba)
15641 {
15642 /* if ASIC_GEN_NUM >= 0xC) */
15643 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15644 LPFC_SLI_INTF_IF_TYPE_6) ||
15645 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
15646 LPFC_SLI_INTF_FAMILY_G6)) {
15647 phba->ras_fwlog.ras_hwsupport = true;
15648 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
15649 phba->cfg_ras_fwlog_buffsize)
15650 phba->ras_fwlog.ras_enabled = true;
15651 else
15652 phba->ras_fwlog.ras_enabled = false;
15653 } else {
15654 phba->ras_fwlog.ras_hwsupport = false;
15655 }
15656 }
15657
15658
15659 MODULE_DEVICE_TABLE(pci, lpfc_id_table);
15660
15661 static const struct pci_error_handlers lpfc_err_handler = {
15662 .error_detected = lpfc_io_error_detected,
15663 .slot_reset = lpfc_io_slot_reset,
15664 .resume = lpfc_io_resume,
15665 };
15666
15667 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one,
15668 lpfc_pci_suspend_one,
15669 lpfc_pci_resume_one);
15670
15671 static struct pci_driver lpfc_driver = {
15672 .name = LPFC_DRIVER_NAME,
15673 .id_table = lpfc_id_table,
15674 .probe = lpfc_pci_probe_one,
15675 .remove = lpfc_pci_remove_one,
15676 .shutdown = lpfc_pci_remove_one,
15677 .driver.pm = &lpfc_pci_pm_ops_one,
15678 .err_handler = &lpfc_err_handler,
15679 };
15680
15681 static const struct file_operations lpfc_mgmt_fop = {
15682 .owner = THIS_MODULE,
15683 };
15684
15685 static struct miscdevice lpfc_mgmt_dev = {
15686 .minor = MISC_DYNAMIC_MINOR,
15687 .name = "lpfcmgmt",
15688 .fops = &lpfc_mgmt_fop,
15689 };
15690
15691 /**
15692 * lpfc_init - lpfc module initialization routine
15693 *
15694 * This routine is to be invoked when the lpfc module is loaded into the
15695 * kernel. The special kernel macro module_init() is used to indicate the
15696 * role of this routine to the kernel as lpfc module entry point.
15697 *
15698 * Return codes
15699 * 0 - successful
15700 * -ENOMEM - FC attach transport failed
15701 * all others - failed
15702 */
15703 static int __init
lpfc_init(void)15704 lpfc_init(void)
15705 {
15706 int error = 0;
15707
15708 pr_info(LPFC_MODULE_DESC "\n");
15709 pr_info(LPFC_COPYRIGHT "\n");
15710
15711 error = misc_register(&lpfc_mgmt_dev);
15712 if (error)
15713 printk(KERN_ERR "Could not register lpfcmgmt device, "
15714 "misc_register returned with status %d", error);
15715
15716 error = -ENOMEM;
15717 lpfc_transport_functions.vport_create = lpfc_vport_create;
15718 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
15719 lpfc_transport_template =
15720 fc_attach_transport(&lpfc_transport_functions);
15721 if (lpfc_transport_template == NULL)
15722 goto unregister;
15723 lpfc_vport_transport_template =
15724 fc_attach_transport(&lpfc_vport_transport_functions);
15725 if (lpfc_vport_transport_template == NULL) {
15726 fc_release_transport(lpfc_transport_template);
15727 goto unregister;
15728 }
15729 lpfc_wqe_cmd_template();
15730 lpfc_nvmet_cmd_template();
15731
15732 /* Initialize in case vector mapping is needed */
15733 lpfc_present_cpu = num_present_cpus();
15734
15735 lpfc_pldv_detect = false;
15736
15737 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
15738 "lpfc/sli4:online",
15739 lpfc_cpu_online, lpfc_cpu_offline);
15740 if (error < 0)
15741 goto cpuhp_failure;
15742 lpfc_cpuhp_state = error;
15743
15744 error = pci_register_driver(&lpfc_driver);
15745 if (error)
15746 goto unwind;
15747
15748 return error;
15749
15750 unwind:
15751 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15752 cpuhp_failure:
15753 fc_release_transport(lpfc_transport_template);
15754 fc_release_transport(lpfc_vport_transport_template);
15755 unregister:
15756 misc_deregister(&lpfc_mgmt_dev);
15757
15758 return error;
15759 }
15760
lpfc_dmp_dbg(struct lpfc_hba * phba)15761 void lpfc_dmp_dbg(struct lpfc_hba *phba)
15762 {
15763 unsigned int start_idx;
15764 unsigned int dbg_cnt;
15765 unsigned int temp_idx;
15766 int i;
15767 int j = 0;
15768 unsigned long rem_nsec;
15769
15770 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
15771 return;
15772
15773 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
15774 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
15775 if (!dbg_cnt)
15776 goto out;
15777 temp_idx = start_idx;
15778 if (dbg_cnt >= DBG_LOG_SZ) {
15779 dbg_cnt = DBG_LOG_SZ;
15780 temp_idx -= 1;
15781 } else {
15782 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
15783 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
15784 } else {
15785 if (start_idx < dbg_cnt)
15786 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
15787 else
15788 start_idx -= dbg_cnt;
15789 }
15790 }
15791 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
15792 start_idx, temp_idx, dbg_cnt);
15793
15794 for (i = 0; i < dbg_cnt; i++) {
15795 if ((start_idx + i) < DBG_LOG_SZ)
15796 temp_idx = (start_idx + i) % DBG_LOG_SZ;
15797 else
15798 temp_idx = j++;
15799 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
15800 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
15801 temp_idx,
15802 (unsigned long)phba->dbg_log[temp_idx].t_ns,
15803 rem_nsec / 1000,
15804 phba->dbg_log[temp_idx].log);
15805 }
15806 out:
15807 atomic_set(&phba->dbg_log_cnt, 0);
15808 atomic_set(&phba->dbg_log_dmping, 0);
15809 }
15810
15811 __printf(2, 3)
lpfc_dbg_print(struct lpfc_hba * phba,const char * fmt,...)15812 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
15813 {
15814 unsigned int idx;
15815 va_list args;
15816 int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
15817 struct va_format vaf;
15818
15819
15820 va_start(args, fmt);
15821 if (unlikely(dbg_dmping)) {
15822 vaf.fmt = fmt;
15823 vaf.va = &args;
15824 dev_info(&phba->pcidev->dev, "%pV", &vaf);
15825 va_end(args);
15826 return;
15827 }
15828 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
15829 DBG_LOG_SZ;
15830
15831 atomic_inc(&phba->dbg_log_cnt);
15832
15833 vscnprintf(phba->dbg_log[idx].log,
15834 sizeof(phba->dbg_log[idx].log), fmt, args);
15835 va_end(args);
15836
15837 phba->dbg_log[idx].t_ns = local_clock();
15838 }
15839
15840 /**
15841 * lpfc_exit - lpfc module removal routine
15842 *
15843 * This routine is invoked when the lpfc module is removed from the kernel.
15844 * The special kernel macro module_exit() is used to indicate the role of
15845 * this routine to the kernel as lpfc module exit point.
15846 */
15847 static void __exit
lpfc_exit(void)15848 lpfc_exit(void)
15849 {
15850 misc_deregister(&lpfc_mgmt_dev);
15851 pci_unregister_driver(&lpfc_driver);
15852 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15853 fc_release_transport(lpfc_transport_template);
15854 fc_release_transport(lpfc_vport_transport_template);
15855 idr_destroy(&lpfc_hba_index);
15856 }
15857
15858 module_init(lpfc_init);
15859 module_exit(lpfc_exit);
15860 MODULE_LICENSE("GPL");
15861 MODULE_DESCRIPTION(LPFC_MODULE_DESC);
15862 MODULE_AUTHOR("Broadcom");
15863 MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
15864