1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Atheros AR933X SoC built-in UART driver
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 */
9
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/platform_device.h>
18 #include <linux/of.h>
19 #include <linux/of_platform.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/slab.h>
25 #include <linux/io.h>
26 #include <linux/irq.h>
27 #include <linux/clk.h>
28
29 #include <asm/div64.h>
30
31 #include <asm/mach-ath79/ar933x_uart.h>
32
33 #include "serial_mctrl_gpio.h"
34
35 #define DRIVER_NAME "ar933x-uart"
36
37 #define AR933X_UART_MAX_SCALE 0xff
38 #define AR933X_UART_MAX_STEP 0xffff
39
40 #define AR933X_UART_MIN_BAUD 300
41 #define AR933X_UART_MAX_BAUD 3000000
42
43 #define AR933X_DUMMY_STATUS_RD 0x01
44
45 static struct uart_driver ar933x_uart_driver;
46
47 struct ar933x_uart_port {
48 struct uart_port port;
49 unsigned int ier; /* shadow Interrupt Enable Register */
50 unsigned int min_baud;
51 unsigned int max_baud;
52 struct clk *clk;
53 struct mctrl_gpios *gpios;
54 struct gpio_desc *rts_gpiod;
55 };
56
ar933x_uart_read(struct ar933x_uart_port * up,int offset)57 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
58 int offset)
59 {
60 return readl(up->port.membase + offset);
61 }
62
ar933x_uart_write(struct ar933x_uart_port * up,int offset,unsigned int value)63 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 int offset, unsigned int value)
65 {
66 writel(value, up->port.membase + offset);
67 }
68
ar933x_uart_rmw(struct ar933x_uart_port * up,unsigned int offset,unsigned int mask,unsigned int val)69 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
70 unsigned int offset,
71 unsigned int mask,
72 unsigned int val)
73 {
74 unsigned int t;
75
76 t = ar933x_uart_read(up, offset);
77 t &= ~mask;
78 t |= val;
79 ar933x_uart_write(up, offset, t);
80 }
81
ar933x_uart_rmw_set(struct ar933x_uart_port * up,unsigned int offset,unsigned int val)82 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
83 unsigned int offset,
84 unsigned int val)
85 {
86 ar933x_uart_rmw(up, offset, 0, val);
87 }
88
ar933x_uart_rmw_clear(struct ar933x_uart_port * up,unsigned int offset,unsigned int val)89 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
90 unsigned int offset,
91 unsigned int val)
92 {
93 ar933x_uart_rmw(up, offset, val, 0);
94 }
95
ar933x_uart_start_tx_interrupt(struct ar933x_uart_port * up)96 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
97 {
98 up->ier |= AR933X_UART_INT_TX_EMPTY;
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
100 }
101
ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port * up)102 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
103 {
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
106 }
107
ar933x_uart_start_rx_interrupt(struct ar933x_uart_port * up)108 static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
109 {
110 up->ier |= AR933X_UART_INT_RX_VALID;
111 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
112 }
113
ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port * up)114 static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
115 {
116 up->ier &= ~AR933X_UART_INT_RX_VALID;
117 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
118 }
119
ar933x_uart_putc(struct ar933x_uart_port * up,int ch)120 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
121 {
122 unsigned int rdata;
123
124 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
125 rdata |= AR933X_UART_DATA_TX_CSR;
126 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
127 }
128
ar933x_uart_tx_empty(struct uart_port * port)129 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
130 {
131 struct ar933x_uart_port *up =
132 container_of(port, struct ar933x_uart_port, port);
133 unsigned long flags;
134 unsigned int rdata;
135
136 uart_port_lock_irqsave(&up->port, &flags);
137 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138 uart_port_unlock_irqrestore(&up->port, flags);
139
140 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
141 }
142
ar933x_uart_get_mctrl(struct uart_port * port)143 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
144 {
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
148
149 mctrl_gpio_get(up->gpios, &ret);
150
151 return ret;
152 }
153
ar933x_uart_set_mctrl(struct uart_port * port,unsigned int mctrl)154 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
155 {
156 struct ar933x_uart_port *up =
157 container_of(port, struct ar933x_uart_port, port);
158
159 mctrl_gpio_set(up->gpios, mctrl);
160 }
161
ar933x_uart_start_tx(struct uart_port * port)162 static void ar933x_uart_start_tx(struct uart_port *port)
163 {
164 struct ar933x_uart_port *up =
165 container_of(port, struct ar933x_uart_port, port);
166
167 ar933x_uart_start_tx_interrupt(up);
168 }
169
ar933x_uart_wait_tx_complete(struct ar933x_uart_port * up)170 static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
171 {
172 unsigned int status;
173 unsigned int timeout = 60000;
174
175 /* Wait up to 60ms for the character(s) to be sent. */
176 do {
177 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
178 if (--timeout == 0)
179 break;
180 udelay(1);
181 } while (status & AR933X_UART_CS_TX_BUSY);
182
183 if (timeout == 0)
184 dev_err(up->port.dev, "waiting for TX timed out\n");
185 }
186
ar933x_uart_rx_flush(struct ar933x_uart_port * up)187 static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
188 {
189 unsigned int status;
190
191 /* clear RX_VALID interrupt */
192 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
193
194 /* remove characters from the RX FIFO */
195 do {
196 ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
197 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
198 } while (status & AR933X_UART_DATA_RX_CSR);
199 }
200
ar933x_uart_stop_tx(struct uart_port * port)201 static void ar933x_uart_stop_tx(struct uart_port *port)
202 {
203 struct ar933x_uart_port *up =
204 container_of(port, struct ar933x_uart_port, port);
205
206 ar933x_uart_stop_tx_interrupt(up);
207 }
208
ar933x_uart_stop_rx(struct uart_port * port)209 static void ar933x_uart_stop_rx(struct uart_port *port)
210 {
211 struct ar933x_uart_port *up =
212 container_of(port, struct ar933x_uart_port, port);
213
214 ar933x_uart_stop_rx_interrupt(up);
215 }
216
ar933x_uart_break_ctl(struct uart_port * port,int break_state)217 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
218 {
219 struct ar933x_uart_port *up =
220 container_of(port, struct ar933x_uart_port, port);
221 unsigned long flags;
222
223 uart_port_lock_irqsave(&up->port, &flags);
224 if (break_state == -1)
225 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226 AR933X_UART_CS_TX_BREAK);
227 else
228 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229 AR933X_UART_CS_TX_BREAK);
230 uart_port_unlock_irqrestore(&up->port, flags);
231 }
232
233 /*
234 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
235 */
ar933x_uart_get_baud(unsigned int clk,unsigned int scale,unsigned int step)236 static unsigned long ar933x_uart_get_baud(unsigned int clk,
237 unsigned int scale,
238 unsigned int step)
239 {
240 u64 t;
241 u32 div;
242
243 div = (2 << 16) * (scale + 1);
244 t = clk;
245 t *= step;
246 t += (div / 2);
247 do_div(t, div);
248
249 return t;
250 }
251
ar933x_uart_get_scale_step(unsigned int clk,unsigned int baud,unsigned int * scale,unsigned int * step)252 static void ar933x_uart_get_scale_step(unsigned int clk,
253 unsigned int baud,
254 unsigned int *scale,
255 unsigned int *step)
256 {
257 unsigned int tscale;
258 long min_diff;
259
260 *scale = 0;
261 *step = 0;
262
263 min_diff = baud;
264 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
265 u64 tstep;
266 int diff;
267
268 tstep = baud * (tscale + 1);
269 tstep *= (2 << 16);
270 do_div(tstep, clk);
271
272 if (tstep > AR933X_UART_MAX_STEP)
273 break;
274
275 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
276 if (diff < min_diff) {
277 min_diff = diff;
278 *scale = tscale;
279 *step = tstep;
280 }
281 }
282 }
283
ar933x_uart_set_termios(struct uart_port * port,struct ktermios * new,const struct ktermios * old)284 static void ar933x_uart_set_termios(struct uart_port *port,
285 struct ktermios *new,
286 const struct ktermios *old)
287 {
288 struct ar933x_uart_port *up =
289 container_of(port, struct ar933x_uart_port, port);
290 unsigned int cs;
291 unsigned long flags;
292 unsigned int baud, scale, step;
293
294 /* Only CS8 is supported */
295 new->c_cflag &= ~CSIZE;
296 new->c_cflag |= CS8;
297
298 /* Only one stop bit is supported */
299 new->c_cflag &= ~CSTOPB;
300
301 cs = 0;
302 if (new->c_cflag & PARENB) {
303 if (!(new->c_cflag & PARODD))
304 cs |= AR933X_UART_CS_PARITY_EVEN;
305 else
306 cs |= AR933X_UART_CS_PARITY_ODD;
307 } else {
308 cs |= AR933X_UART_CS_PARITY_NONE;
309 }
310
311 /* Mark/space parity is not supported */
312 new->c_cflag &= ~CMSPAR;
313
314 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
315 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
316
317 /*
318 * Ok, we're now changing the port state. Do it with
319 * interrupts disabled.
320 */
321 uart_port_lock_irqsave(&up->port, &flags);
322
323 /* disable the UART */
324 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
325 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
326
327 /* Update the per-port timeout. */
328 uart_update_timeout(port, new->c_cflag, baud);
329
330 up->port.ignore_status_mask = 0;
331
332 /* ignore all characters if CREAD is not set */
333 if ((new->c_cflag & CREAD) == 0)
334 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
335
336 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
337 scale << AR933X_UART_CLOCK_SCALE_S | step);
338
339 /* setup configuration register */
340 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
341
342 /* enable host interrupt */
343 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
344 AR933X_UART_CS_HOST_INT_EN);
345
346 /* enable RX and TX ready overide */
347 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
348 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
349
350 /* reenable the UART */
351 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
352 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
354
355 uart_port_unlock_irqrestore(&up->port, flags);
356
357 if (tty_termios_baud_rate(new))
358 tty_termios_encode_baud_rate(new, baud, baud);
359 }
360
ar933x_uart_rx_chars(struct ar933x_uart_port * up)361 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
362 {
363 struct tty_port *port = &up->port.state->port;
364 int max_count = 256;
365
366 do {
367 unsigned int rdata;
368 unsigned char ch;
369
370 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
371 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
372 break;
373
374 /* remove the character from the FIFO */
375 ar933x_uart_write(up, AR933X_UART_DATA_REG,
376 AR933X_UART_DATA_RX_CSR);
377
378 up->port.icount.rx++;
379 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
380
381 if (uart_prepare_sysrq_char(&up->port, ch))
382 continue;
383
384 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
385 tty_insert_flip_char(port, ch, TTY_NORMAL);
386 } while (max_count-- > 0);
387
388 tty_flip_buffer_push(port);
389 }
390
ar933x_uart_tx_chars(struct ar933x_uart_port * up)391 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
392 {
393 struct tty_port *tport = &up->port.state->port;
394 struct serial_rs485 *rs485conf = &up->port.rs485;
395 int count;
396 bool half_duplex_send = false;
397
398 if (uart_tx_stopped(&up->port))
399 return;
400
401 if ((rs485conf->flags & SER_RS485_ENABLED) &&
402 (up->port.x_char || !kfifo_is_empty(&tport->xmit_fifo))) {
403 ar933x_uart_stop_rx_interrupt(up);
404 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
405 half_duplex_send = true;
406 }
407
408 count = up->port.fifosize;
409 do {
410 unsigned int rdata;
411 unsigned char c;
412
413 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
414 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
415 break;
416
417 if (up->port.x_char) {
418 ar933x_uart_putc(up, up->port.x_char);
419 up->port.icount.tx++;
420 up->port.x_char = 0;
421 continue;
422 }
423
424 if (!uart_fifo_get(&up->port, &c))
425 break;
426
427 ar933x_uart_putc(up, c);
428 } while (--count > 0);
429
430 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
431 uart_write_wakeup(&up->port);
432
433 if (!kfifo_is_empty(&tport->xmit_fifo)) {
434 ar933x_uart_start_tx_interrupt(up);
435 } else if (half_duplex_send) {
436 ar933x_uart_wait_tx_complete(up);
437 ar933x_uart_rx_flush(up);
438 ar933x_uart_start_rx_interrupt(up);
439 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
440 }
441 }
442
ar933x_uart_interrupt(int irq,void * dev_id)443 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
444 {
445 struct ar933x_uart_port *up = dev_id;
446 unsigned int status;
447
448 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
449 if ((status & AR933X_UART_CS_HOST_INT) == 0)
450 return IRQ_NONE;
451
452 uart_port_lock(&up->port);
453
454 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
455 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
456
457 if (status & AR933X_UART_INT_RX_VALID) {
458 ar933x_uart_write(up, AR933X_UART_INT_REG,
459 AR933X_UART_INT_RX_VALID);
460 ar933x_uart_rx_chars(up);
461 }
462
463 if (status & AR933X_UART_INT_TX_EMPTY) {
464 ar933x_uart_write(up, AR933X_UART_INT_REG,
465 AR933X_UART_INT_TX_EMPTY);
466 ar933x_uart_stop_tx_interrupt(up);
467 ar933x_uart_tx_chars(up);
468 }
469
470 uart_unlock_and_check_sysrq(&up->port);
471
472 return IRQ_HANDLED;
473 }
474
ar933x_uart_startup(struct uart_port * port)475 static int ar933x_uart_startup(struct uart_port *port)
476 {
477 struct ar933x_uart_port *up =
478 container_of(port, struct ar933x_uart_port, port);
479 unsigned long flags;
480 int ret;
481
482 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
483 up->port.irqflags, dev_name(up->port.dev), up);
484 if (ret)
485 return ret;
486
487 uart_port_lock_irqsave(&up->port, &flags);
488
489 /* Enable HOST interrupts */
490 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
491 AR933X_UART_CS_HOST_INT_EN);
492
493 /* enable RX and TX ready overide */
494 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
495 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
496
497 /* Enable RX interrupts */
498 ar933x_uart_start_rx_interrupt(up);
499
500 uart_port_unlock_irqrestore(&up->port, flags);
501
502 return 0;
503 }
504
ar933x_uart_shutdown(struct uart_port * port)505 static void ar933x_uart_shutdown(struct uart_port *port)
506 {
507 struct ar933x_uart_port *up =
508 container_of(port, struct ar933x_uart_port, port);
509
510 /* Disable all interrupts */
511 up->ier = 0;
512 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
513
514 /* Disable break condition */
515 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
516 AR933X_UART_CS_TX_BREAK);
517
518 free_irq(up->port.irq, up);
519 }
520
ar933x_uart_type(struct uart_port * port)521 static const char *ar933x_uart_type(struct uart_port *port)
522 {
523 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
524 }
525
ar933x_uart_release_port(struct uart_port * port)526 static void ar933x_uart_release_port(struct uart_port *port)
527 {
528 /* Nothing to release ... */
529 }
530
ar933x_uart_request_port(struct uart_port * port)531 static int ar933x_uart_request_port(struct uart_port *port)
532 {
533 /* UARTs always present */
534 return 0;
535 }
536
ar933x_uart_config_port(struct uart_port * port,int flags)537 static void ar933x_uart_config_port(struct uart_port *port, int flags)
538 {
539 if (flags & UART_CONFIG_TYPE)
540 port->type = PORT_AR933X;
541 }
542
ar933x_uart_verify_port(struct uart_port * port,struct serial_struct * ser)543 static int ar933x_uart_verify_port(struct uart_port *port,
544 struct serial_struct *ser)
545 {
546 struct ar933x_uart_port *up =
547 container_of(port, struct ar933x_uart_port, port);
548
549 if (ser->type != PORT_UNKNOWN &&
550 ser->type != PORT_AR933X)
551 return -EINVAL;
552
553 if (ser->irq < 0 || ser->irq >= NR_IRQS)
554 return -EINVAL;
555
556 if (ser->baud_base < up->min_baud ||
557 ser->baud_base > up->max_baud)
558 return -EINVAL;
559
560 return 0;
561 }
562
563 static const struct uart_ops ar933x_uart_ops = {
564 .tx_empty = ar933x_uart_tx_empty,
565 .set_mctrl = ar933x_uart_set_mctrl,
566 .get_mctrl = ar933x_uart_get_mctrl,
567 .stop_tx = ar933x_uart_stop_tx,
568 .start_tx = ar933x_uart_start_tx,
569 .stop_rx = ar933x_uart_stop_rx,
570 .break_ctl = ar933x_uart_break_ctl,
571 .startup = ar933x_uart_startup,
572 .shutdown = ar933x_uart_shutdown,
573 .set_termios = ar933x_uart_set_termios,
574 .type = ar933x_uart_type,
575 .release_port = ar933x_uart_release_port,
576 .request_port = ar933x_uart_request_port,
577 .config_port = ar933x_uart_config_port,
578 .verify_port = ar933x_uart_verify_port,
579 };
580
ar933x_config_rs485(struct uart_port * port,struct ktermios * termios,struct serial_rs485 * rs485conf)581 static int ar933x_config_rs485(struct uart_port *port, struct ktermios *termios,
582 struct serial_rs485 *rs485conf)
583 {
584 struct ar933x_uart_port *up =
585 container_of(port, struct ar933x_uart_port, port);
586
587 if (port->rs485.flags & SER_RS485_ENABLED)
588 gpiod_set_value(up->rts_gpiod,
589 !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
590
591 return 0;
592 }
593
594 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
595 static struct ar933x_uart_port *
596 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
597
ar933x_uart_wait_xmitr(struct ar933x_uart_port * up)598 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
599 {
600 unsigned int status;
601 unsigned int timeout = 60000;
602
603 /* Wait up to 60ms for the character(s) to be sent. */
604 do {
605 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
606 if (--timeout == 0)
607 break;
608 udelay(1);
609 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
610 }
611
ar933x_uart_console_putchar(struct uart_port * port,unsigned char ch)612 static void ar933x_uart_console_putchar(struct uart_port *port, unsigned char ch)
613 {
614 struct ar933x_uart_port *up =
615 container_of(port, struct ar933x_uart_port, port);
616
617 ar933x_uart_wait_xmitr(up);
618 ar933x_uart_putc(up, ch);
619 }
620
ar933x_uart_console_write(struct console * co,const char * s,unsigned int count)621 static void ar933x_uart_console_write(struct console *co, const char *s,
622 unsigned int count)
623 {
624 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
625 unsigned long flags;
626 unsigned int int_en;
627 int locked = 1;
628
629 if (oops_in_progress)
630 locked = uart_port_trylock_irqsave(&up->port, &flags);
631 else
632 uart_port_lock_irqsave(&up->port, &flags);
633
634 /*
635 * First save the IER then disable the interrupts
636 */
637 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
638 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
639
640 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
641
642 /*
643 * Finally, wait for transmitter to become empty
644 * and restore the IER
645 */
646 ar933x_uart_wait_xmitr(up);
647 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
648
649 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
650
651 if (locked)
652 uart_port_unlock_irqrestore(&up->port, flags);
653 }
654
ar933x_uart_console_setup(struct console * co,char * options)655 static int ar933x_uart_console_setup(struct console *co, char *options)
656 {
657 struct ar933x_uart_port *up;
658 int baud = 115200;
659 int bits = 8;
660 int parity = 'n';
661 int flow = 'n';
662
663 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
664 return -EINVAL;
665
666 up = ar933x_console_ports[co->index];
667 if (!up)
668 return -ENODEV;
669
670 if (options)
671 uart_parse_options(options, &baud, &parity, &bits, &flow);
672
673 return uart_set_options(&up->port, co, baud, parity, bits, flow);
674 }
675
676 static struct console ar933x_uart_console = {
677 .name = "ttyATH",
678 .write = ar933x_uart_console_write,
679 .device = uart_console_device,
680 .setup = ar933x_uart_console_setup,
681 .flags = CON_PRINTBUFFER,
682 .index = -1,
683 .data = &ar933x_uart_driver,
684 };
685 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
686
687 static struct uart_driver ar933x_uart_driver = {
688 .owner = THIS_MODULE,
689 .driver_name = DRIVER_NAME,
690 .dev_name = "ttyATH",
691 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
692 .cons = NULL, /* filled in runtime */
693 };
694
695 static const struct serial_rs485 ar933x_rs485_supported = {
696 .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
697 };
698
ar933x_uart_probe(struct platform_device * pdev)699 static int ar933x_uart_probe(struct platform_device *pdev)
700 {
701 struct ar933x_uart_port *up;
702 struct uart_port *port;
703 struct resource *mem_res;
704 struct device_node *np;
705 unsigned int baud;
706 int id;
707 int ret;
708 int irq;
709
710 np = pdev->dev.of_node;
711 if (IS_ENABLED(CONFIG_OF) && np) {
712 id = of_alias_get_id(np, "serial");
713 if (id < 0) {
714 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
715 id);
716 return id;
717 }
718 } else {
719 id = pdev->id;
720 if (id == -1)
721 id = 0;
722 }
723
724 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
725 return -EINVAL;
726
727 irq = platform_get_irq(pdev, 0);
728 if (irq < 0)
729 return irq;
730
731 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
732 GFP_KERNEL);
733 if (!up)
734 return -ENOMEM;
735
736 up->clk = devm_clk_get(&pdev->dev, "uart");
737 if (IS_ERR(up->clk)) {
738 dev_err(&pdev->dev, "unable to get UART clock\n");
739 return PTR_ERR(up->clk);
740 }
741
742 port = &up->port;
743
744 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
745 if (IS_ERR(port->membase))
746 return PTR_ERR(port->membase);
747
748 ret = clk_prepare_enable(up->clk);
749 if (ret)
750 return ret;
751
752 port->uartclk = clk_get_rate(up->clk);
753 if (!port->uartclk) {
754 ret = -EINVAL;
755 goto err_disable_clk;
756 }
757
758 port->mapbase = mem_res->start;
759 port->line = id;
760 port->irq = irq;
761 port->dev = &pdev->dev;
762 port->type = PORT_AR933X;
763 port->iotype = UPIO_MEM32;
764
765 port->regshift = 2;
766 port->fifosize = AR933X_UART_FIFO_SIZE;
767 port->ops = &ar933x_uart_ops;
768 port->rs485_config = ar933x_config_rs485;
769 port->rs485_supported = ar933x_rs485_supported;
770
771 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
772 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
773
774 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
775 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
776
777 ret = uart_get_rs485_mode(port);
778 if (ret)
779 goto err_disable_clk;
780
781 up->gpios = mctrl_gpio_init(port, 0);
782 if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
783 ret = PTR_ERR(up->gpios);
784 goto err_disable_clk;
785 }
786
787 up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
788
789 if (!up->rts_gpiod) {
790 port->rs485_supported.flags &= ~SER_RS485_ENABLED;
791 if (port->rs485.flags & SER_RS485_ENABLED) {
792 dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
793 port->rs485.flags &= ~SER_RS485_ENABLED;
794 }
795 }
796
797 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
798 ar933x_console_ports[up->port.line] = up;
799 #endif
800
801 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
802 if (ret)
803 goto err_disable_clk;
804
805 platform_set_drvdata(pdev, up);
806 return 0;
807
808 err_disable_clk:
809 clk_disable_unprepare(up->clk);
810 return ret;
811 }
812
ar933x_uart_remove(struct platform_device * pdev)813 static void ar933x_uart_remove(struct platform_device *pdev)
814 {
815 struct ar933x_uart_port *up;
816
817 up = platform_get_drvdata(pdev);
818
819 if (up) {
820 uart_remove_one_port(&ar933x_uart_driver, &up->port);
821 clk_disable_unprepare(up->clk);
822 }
823 }
824
825 #ifdef CONFIG_OF
826 static const struct of_device_id ar933x_uart_of_ids[] = {
827 { .compatible = "qca,ar9330-uart" },
828 {},
829 };
830 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
831 #endif
832
833 static struct platform_driver ar933x_uart_platform_driver = {
834 .probe = ar933x_uart_probe,
835 .remove_new = ar933x_uart_remove,
836 .driver = {
837 .name = DRIVER_NAME,
838 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
839 },
840 };
841
ar933x_uart_init(void)842 static int __init ar933x_uart_init(void)
843 {
844 int ret;
845
846 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
847 ar933x_uart_driver.cons = &ar933x_uart_console;
848 #endif
849
850 ret = uart_register_driver(&ar933x_uart_driver);
851 if (ret)
852 goto err_out;
853
854 ret = platform_driver_register(&ar933x_uart_platform_driver);
855 if (ret)
856 goto err_unregister_uart_driver;
857
858 return 0;
859
860 err_unregister_uart_driver:
861 uart_unregister_driver(&ar933x_uart_driver);
862 err_out:
863 return ret;
864 }
865
ar933x_uart_exit(void)866 static void __exit ar933x_uart_exit(void)
867 {
868 platform_driver_unregister(&ar933x_uart_platform_driver);
869 uart_unregister_driver(&ar933x_uart_driver);
870 }
871
872 module_init(ar933x_uart_init);
873 module_exit(ar933x_uart_exit);
874
875 MODULE_DESCRIPTION("Atheros AR933X UART driver");
876 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
877 MODULE_LICENSE("GPL v2");
878 MODULE_ALIAS("platform:" DRIVER_NAME);
879