1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/PPCFixupKinds.h"
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "llvm/BinaryFormat/ELF.h"
12 #include "llvm/BinaryFormat/MachO.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCELFObjectWriter.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCMachObjectWriter.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbolELF.h"
22 #include "llvm/MC/MCValue.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
25 using namespace llvm;
26
adjustFixupValue(unsigned Kind,uint64_t Value)27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
28 switch (Kind) {
29 default:
30 llvm_unreachable("Unknown fixup kind!");
31 case FK_Data_1:
32 case FK_Data_2:
33 case FK_Data_4:
34 case FK_Data_8:
35 case PPC::fixup_ppc_nofixup:
36 return Value;
37 case PPC::fixup_ppc_brcond14:
38 case PPC::fixup_ppc_brcond14abs:
39 return Value & 0xfffc;
40 case PPC::fixup_ppc_br24:
41 case PPC::fixup_ppc_br24abs:
42 case PPC::fixup_ppc_br24_notoc:
43 return Value & 0x3fffffc;
44 case PPC::fixup_ppc_half16:
45 return Value & 0xffff;
46 case PPC::fixup_ppc_half16ds:
47 return Value & 0xfffc;
48 case PPC::fixup_ppc_pcrel34:
49 case PPC::fixup_ppc_imm34:
50 return Value & 0x3ffffffff;
51 }
52 }
53
getFixupKindNumBytes(unsigned Kind)54 static unsigned getFixupKindNumBytes(unsigned Kind) {
55 switch (Kind) {
56 default:
57 llvm_unreachable("Unknown fixup kind!");
58 case FK_Data_1:
59 return 1;
60 case FK_Data_2:
61 case PPC::fixup_ppc_half16:
62 case PPC::fixup_ppc_half16ds:
63 return 2;
64 case FK_Data_4:
65 case PPC::fixup_ppc_brcond14:
66 case PPC::fixup_ppc_brcond14abs:
67 case PPC::fixup_ppc_br24:
68 case PPC::fixup_ppc_br24abs:
69 case PPC::fixup_ppc_br24_notoc:
70 return 4;
71 case PPC::fixup_ppc_pcrel34:
72 case PPC::fixup_ppc_imm34:
73 case FK_Data_8:
74 return 8;
75 case PPC::fixup_ppc_nofixup:
76 return 0;
77 }
78 }
79
80 namespace {
81
82 class PPCAsmBackend : public MCAsmBackend {
83 protected:
84 Triple TT;
85 public:
PPCAsmBackend(const Target & T,const Triple & TT)86 PPCAsmBackend(const Target &T, const Triple &TT)
87 : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
88 TT(TT) {}
89
getNumFixupKinds() const90 unsigned getNumFixupKinds() const override {
91 return PPC::NumTargetFixupKinds;
92 }
93
getFixupKindInfo(MCFixupKind Kind) const94 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
95 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
96 // name offset bits flags
97 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
98 { "fixup_ppc_br24_notoc", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
99 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
100 { "fixup_ppc_br24abs", 6, 24, 0 },
101 { "fixup_ppc_brcond14abs", 16, 14, 0 },
102 { "fixup_ppc_half16", 0, 16, 0 },
103 { "fixup_ppc_half16ds", 0, 14, 0 },
104 { "fixup_ppc_pcrel34", 0, 34, MCFixupKindInfo::FKF_IsPCRel },
105 { "fixup_ppc_imm34", 0, 34, 0 },
106 { "fixup_ppc_nofixup", 0, 0, 0 }
107 };
108 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
109 // name offset bits flags
110 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
111 { "fixup_ppc_br24_notoc", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
112 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel },
113 { "fixup_ppc_br24abs", 2, 24, 0 },
114 { "fixup_ppc_brcond14abs", 2, 14, 0 },
115 { "fixup_ppc_half16", 0, 16, 0 },
116 { "fixup_ppc_half16ds", 2, 14, 0 },
117 { "fixup_ppc_pcrel34", 0, 34, MCFixupKindInfo::FKF_IsPCRel },
118 { "fixup_ppc_imm34", 0, 34, 0 },
119 { "fixup_ppc_nofixup", 0, 0, 0 }
120 };
121
122 // Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They
123 // do not require any extra processing.
124 if (Kind >= FirstLiteralRelocationKind)
125 return MCAsmBackend::getFixupKindInfo(FK_NONE);
126
127 if (Kind < FirstTargetFixupKind)
128 return MCAsmBackend::getFixupKindInfo(Kind);
129
130 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
131 "Invalid kind!");
132 return (Endian == support::little
133 ? InfosLE
134 : InfosBE)[Kind - FirstTargetFixupKind];
135 }
136
applyFixup(const MCAssembler & Asm,const MCFixup & Fixup,const MCValue & Target,MutableArrayRef<char> Data,uint64_t Value,bool IsResolved,const MCSubtargetInfo * STI) const137 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
138 const MCValue &Target, MutableArrayRef<char> Data,
139 uint64_t Value, bool IsResolved,
140 const MCSubtargetInfo *STI) const override {
141 MCFixupKind Kind = Fixup.getKind();
142 if (Kind >= FirstLiteralRelocationKind)
143 return;
144 Value = adjustFixupValue(Kind, Value);
145 if (!Value) return; // Doesn't change encoding.
146
147 unsigned Offset = Fixup.getOffset();
148 unsigned NumBytes = getFixupKindNumBytes(Kind);
149
150 // For each byte of the fragment that the fixup touches, mask in the bits
151 // from the fixup value. The Value has been "split up" into the appropriate
152 // bitfields above.
153 for (unsigned i = 0; i != NumBytes; ++i) {
154 unsigned Idx = Endian == support::little ? i : (NumBytes - 1 - i);
155 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
156 }
157 }
158
shouldForceRelocation(const MCAssembler & Asm,const MCFixup & Fixup,const MCValue & Target)159 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
160 const MCValue &Target) override {
161 MCFixupKind Kind = Fixup.getKind();
162 switch ((unsigned)Kind) {
163 default:
164 return Kind >= FirstLiteralRelocationKind;
165 case PPC::fixup_ppc_br24:
166 case PPC::fixup_ppc_br24abs:
167 case PPC::fixup_ppc_br24_notoc:
168 // If the target symbol has a local entry point we must not attempt
169 // to resolve the fixup directly. Emit a relocation and leave
170 // resolution of the final target address to the linker.
171 if (const MCSymbolRefExpr *A = Target.getSymA()) {
172 if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) {
173 // The "other" values are stored in the last 6 bits of the second
174 // byte. The traditional defines for STO values assume the full byte
175 // and thus the shift to pack it.
176 unsigned Other = S->getOther() << 2;
177 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0)
178 return true;
179 }
180 }
181 return false;
182 }
183 }
184
fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout) const185 bool fixupNeedsRelaxation(const MCFixup &Fixup,
186 uint64_t Value,
187 const MCRelaxableFragment *DF,
188 const MCAsmLayout &Layout) const override {
189 // FIXME.
190 llvm_unreachable("relaxInstruction() unimplemented");
191 }
192
relaxInstruction(MCInst & Inst,const MCSubtargetInfo & STI) const193 void relaxInstruction(MCInst &Inst,
194 const MCSubtargetInfo &STI) const override {
195 // FIXME.
196 llvm_unreachable("relaxInstruction() unimplemented");
197 }
198
writeNopData(raw_ostream & OS,uint64_t Count) const199 bool writeNopData(raw_ostream &OS, uint64_t Count) const override {
200 uint64_t NumNops = Count / 4;
201 for (uint64_t i = 0; i != NumNops; ++i)
202 support::endian::write<uint32_t>(OS, 0x60000000, Endian);
203
204 OS.write_zeros(Count % 4);
205
206 return true;
207 }
208 };
209 } // end anonymous namespace
210
211
212 // FIXME: This should be in a separate file.
213 namespace {
214
215 class ELFPPCAsmBackend : public PPCAsmBackend {
216 public:
ELFPPCAsmBackend(const Target & T,const Triple & TT)217 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
218
219 std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const220 createObjectTargetWriter() const override {
221 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
222 bool Is64 = TT.isPPC64();
223 return createPPCELFObjectWriter(Is64, OSABI);
224 }
225
226 Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
227 };
228
229 class XCOFFPPCAsmBackend : public PPCAsmBackend {
230 public:
XCOFFPPCAsmBackend(const Target & T,const Triple & TT)231 XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
232 : PPCAsmBackend(T, TT) {}
233
234 std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const235 createObjectTargetWriter() const override {
236 return createPPCXCOFFObjectWriter(TT.isArch64Bit());
237 }
238 };
239
240 } // end anonymous namespace
241
getFixupKind(StringRef Name) const242 Optional<MCFixupKind> ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
243 if (TT.isOSBinFormatELF()) {
244 unsigned Type;
245 if (TT.isPPC64()) {
246 Type = llvm::StringSwitch<unsigned>(Name)
247 #define ELF_RELOC(X, Y) .Case(#X, Y)
248 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
249 #undef ELF_RELOC
250 .Case("BFD_RELOC_NONE", ELF::R_PPC64_NONE)
251 .Case("BFD_RELOC_16", ELF::R_PPC64_ADDR16)
252 .Case("BFD_RELOC_32", ELF::R_PPC64_ADDR32)
253 .Case("BFD_RELOC_64", ELF::R_PPC64_ADDR64)
254 .Default(-1u);
255 } else {
256 Type = llvm::StringSwitch<unsigned>(Name)
257 #define ELF_RELOC(X, Y) .Case(#X, Y)
258 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
259 #undef ELF_RELOC
260 .Case("BFD_RELOC_NONE", ELF::R_PPC_NONE)
261 .Case("BFD_RELOC_16", ELF::R_PPC_ADDR16)
262 .Case("BFD_RELOC_32", ELF::R_PPC_ADDR32)
263 .Default(-1u);
264 }
265 if (Type != -1u)
266 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
267 }
268 return None;
269 }
270
createPPCAsmBackend(const Target & T,const MCSubtargetInfo & STI,const MCRegisterInfo & MRI,const MCTargetOptions & Options)271 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
272 const MCSubtargetInfo &STI,
273 const MCRegisterInfo &MRI,
274 const MCTargetOptions &Options) {
275 const Triple &TT = STI.getTargetTriple();
276 if (TT.isOSBinFormatXCOFF())
277 return new XCOFFPPCAsmBackend(T, TT);
278
279 return new ELFPPCAsmBackend(T, TT);
280 }
281