1 /* Common hooks for ARM.
2 Copyright (C) 1991-2020 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #define INCLUDE_LIST
21 #define INCLUDE_VECTOR
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "memmodel.h"
27 #include "tm_p.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
30 #include "opts.h"
31 #include "flags.h"
32 #include "sbitmap.h"
33 #include "diagnostic.h"
34 #include <algorithm>
35
36 /* Set default optimization options. */
37 static const struct default_options arm_option_optimization_table[] =
38 {
39 /* Enable section anchors by default at -O1 or higher. */
40 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
41 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
42 { OPT_LEVELS_NONE, 0, NULL, 0 }
43 };
44
45 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
46
47 enum unwind_info_type
arm_except_unwind_info(struct gcc_options * opts)48 arm_except_unwind_info (struct gcc_options *opts)
49 {
50 /* Honor the --enable-sjlj-exceptions configure switch. */
51 #ifdef CONFIG_SJLJ_EXCEPTIONS
52 if (CONFIG_SJLJ_EXCEPTIONS)
53 return UI_SJLJ;
54 #endif
55
56 if (ARM_DWARF_UNWIND_TABLES)
57 return UI_DWARF2;
58
59 /* If not using ARM EABI unwind tables... */
60 if (ARM_UNWIND_INFO)
61 {
62 /* For simplicity elsewhere in this file, indicate that all unwind
63 info is disabled if we're not emitting unwind tables. */
64 if (!opts->x_flag_exceptions && !opts->x_flag_unwind_tables)
65 return UI_NONE;
66 else
67 return UI_TARGET;
68 }
69
70 /* ... honor target configurations requesting DWARF2 EH... */
71 #ifdef DWARF2_UNWIND_INFO
72 if (DWARF2_UNWIND_INFO)
73 return UI_DWARF2;
74 #endif
75
76 /* ... or fallback to sjlj exceptions for backwards compatibility. */
77 return UI_SJLJ;
78 }
79
80 #define ARM_CPU_NAME_LENGTH 20
81
82 /* Truncate NAME at the first '.' or '+' character seen, or return
83 NAME unmodified. */
84
85 const char *
arm_rewrite_selected_cpu(const char * name)86 arm_rewrite_selected_cpu (const char *name)
87 {
88 static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0};
89 char *arg_pos;
90
91 strncpy (output_buf, name, ARM_CPU_NAME_LENGTH);
92 output_buf[ARM_CPU_NAME_LENGTH] = 0;
93
94 arg_pos = strchr (output_buf, '.');
95
96 /* If we found a '.' truncate the entry at that point. */
97 if (arg_pos)
98 *arg_pos = '\0';
99
100 arg_pos = strchr (output_buf, '+');
101
102 /* If we found a '+' truncate the entry at that point. */
103 if (arg_pos)
104 *arg_pos = '\0';
105
106 return output_buf;
107 }
108
109 /* Called by the driver to rewrite a name passed to the -mcpu
110 argument in preparation to be passed to the assembler. The
111 names passed from the command line will be in ARGV, we want
112 to use the right-most argument, which should be in
113 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
114
115 const char *
arm_rewrite_mcpu(int argc,const char ** argv)116 arm_rewrite_mcpu (int argc, const char **argv)
117 {
118 gcc_assert (argc);
119 return arm_rewrite_selected_cpu (argv[argc - 1]);
120 }
121
122 /* Comparator for arm_rewrite_selected_arch. Compare the two arch extension
123 strings FIRST and SECOND and return TRUE if FIRST is less than SECOND
124 alphabetically. */
125
126 static bool
compare_opt_names(const char * first,const char * second)127 compare_opt_names (const char *first, const char *second)
128 {
129 return strcmp (first, second) <= 0;
130 }
131
132 /* Rewrite the architecture string for passing to the assembler.
133 Although the syntax is similar we cannot assume that it supports
134 the newer FP related options. So strip any option that only
135 defines features in the standard -mfpu options out. We'll generate
136 a suitable -mfpu option elsewhere to carry that information. NAME
137 should already have been canonicalized, so we do not expect to
138 encounter +no.. options that remove features. A final problem is
139 that the assembler expects the feature extensions to be listed
140 alphabetically, so we build a list of required options and then
141 sort them into canonical order in the resulting string. */
142 const char *
arm_rewrite_selected_arch(const char * name)143 arm_rewrite_selected_arch (const char *name)
144 {
145 /* The result we return needs to be semi persistent, so handle being
146 re-invoked. */
147 static char *asm_arch = NULL;
148
149 if (asm_arch)
150 {
151 free (asm_arch);
152 asm_arch = NULL;
153 }
154
155 const char *arg_pos = strchr (name, '+');
156
157 /* No extension options? just return the original string. */
158 if (arg_pos == NULL)
159 return name;
160
161 const arch_option *arch_opt
162 = arm_parse_arch_option_name (all_architectures, "-march", name);
163
164 auto_sbitmap fpu_bits (isa_num_bits);
165 static const enum isa_feature fpu_bitlist[]
166 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
167
168 arm_initialize_isa (fpu_bits, fpu_bitlist);
169
170 auto_sbitmap opt_bits (isa_num_bits);
171
172 /* Ensure that the resulting string is large enough for the result. We
173 never add options, so using strdup here will ensure that. */
174 asm_arch = xstrdup (name);
175 asm_arch[arg_pos - name] = '\0';
176
177 std::vector<const char *>optlist;
178
179 while (arg_pos)
180 {
181 const char *end = strchr (arg_pos + 1, '+');
182 size_t len = end ? end - arg_pos : strlen (arg_pos);
183
184 for (const cpu_arch_extension *entry = arch_opt->common.extensions;
185 entry->name != NULL;
186 entry++)
187 {
188 if (strncmp (entry->name, arg_pos + 1, len - 1) == 0
189 && entry->name[len - 1] == '\0')
190 {
191 /* Don't expect removal options. */
192 gcc_assert (!entry->remove);
193 arm_initialize_isa (opt_bits, entry->isa_bits);
194 if (!bitmap_subset_p (opt_bits, fpu_bits))
195 optlist.push_back (entry->name);
196 bitmap_clear (opt_bits);
197 break;
198 }
199 }
200
201 arg_pos = end;
202 }
203
204 std::sort (optlist.begin (), optlist.end (), compare_opt_names);
205
206 for (std::vector<const char *>::iterator opt_iter = optlist.begin ();
207 opt_iter != optlist.end ();
208 ++opt_iter)
209 {
210 strcat (asm_arch, "+");
211 strcat (asm_arch, (*opt_iter));
212 }
213
214 return asm_arch;
215 }
216
217 /* Called by the driver to rewrite a name passed to the -march
218 argument in preparation to be passed to the assembler. The
219 names passed from the command line will be in ARGV, we want
220 to use the right-most argument, which should be in
221 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
222
223 const char *
arm_rewrite_march(int argc,const char ** argv)224 arm_rewrite_march (int argc, const char **argv)
225 {
226 gcc_assert (argc);
227 return arm_rewrite_selected_arch (argv[argc - 1]);
228 }
229
230 #include "arm-cpu-cdata.h"
231
232 /* Scan over a raw feature array BITS checking for BIT being present.
233 This is slower than the normal bitmask checks, but we would spend longer
234 initializing that than doing the check this way. Returns true iff
235 BIT is found. */
236 static bool
check_isa_bits_for(const enum isa_feature * bits,enum isa_feature bit)237 check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
238 {
239 while (*bits != isa_nobit)
240 if (*bits++ == bit)
241 return true;
242
243 return false;
244 }
245
246 /* Called by the driver to check whether the target denoted by current
247 command line options is a Thumb-only target. ARGV is an array of
248 tupples (normally only one) where the first element of the tupple
249 is 'cpu' or 'arch' and the second is the option passed to the
250 compiler for that. An architecture tupple is always taken in
251 preference to a cpu tupple and the last of each type always
252 overrides any earlier setting. */
253
254 const char *
arm_target_thumb_only(int argc,const char ** argv)255 arm_target_thumb_only (int argc, const char **argv)
256 {
257 const char *arch = NULL;
258 const char *cpu = NULL;
259
260 if (argc % 2 != 0)
261 fatal_error (input_location,
262 "%%:target_mode_check takes an even number of parameters");
263
264 while (argc)
265 {
266 if (strcmp (argv[0], "arch") == 0)
267 arch = argv[1];
268 else if (strcmp (argv[0], "cpu") == 0)
269 cpu = argv[1];
270 else
271 fatal_error (input_location,
272 "unrecognized option passed to %%:target_mode_check");
273 argc -= 2;
274 argv += 2;
275 }
276
277 /* No architecture, or CPU, has option extensions that change
278 whether or not we have a Thumb-only device, so there is no need
279 to scan any option extensions specified. */
280
281 /* If the architecture is specified, that overrides any CPU setting. */
282 if (arch)
283 {
284 const arch_option *arch_opt
285 = arm_parse_arch_option_name (all_architectures, "-march", arch,
286 false);
287
288 if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
289 isa_bit_notm))
290 return "-mthumb";
291 }
292 else if (cpu)
293 {
294 const cpu_option *cpu_opt
295 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu, false);
296
297 if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
298 isa_bit_notm))
299 return "-mthumb";
300 }
301
302 /* Compiler hasn't been configured with a default, and the CPU
303 doesn't require Thumb, so default to ARM. */
304 return "-marm";
305 }
306
307 /* List the permitted CPU option names. If TARGET is a near miss for an
308 entry, print out the suggested alternative. */
309 static void
arm_print_hint_for_cpu_option(const char * target,const cpu_option * list)310 arm_print_hint_for_cpu_option (const char *target,
311 const cpu_option *list)
312 {
313 auto_vec<const char*> candidates;
314 for (; list->common.name != NULL; list++)
315 {
316 candidates.safe_push (list->common.name);
317 if (list->aliases)
318 {
319 for (const cpu_alias *alias = list->aliases; alias->name != NULL;
320 alias++)
321 if (alias->visible)
322 candidates.safe_push (alias->name);
323 }
324 }
325
326 #ifdef HAVE_LOCAL_CPU_DETECT
327 /* Add also "native" as possible value. */
328 candidates.safe_push ("native");
329 #endif
330
331 char *s;
332 const char *hint = candidates_list_and_hint (target, s, candidates);
333 if (hint)
334 inform (input_location, "valid arguments are: %s; did you mean %qs?",
335 s, hint);
336 else
337 inform (input_location, "valid arguments are: %s", s);
338
339 XDELETEVEC (s);
340 }
341
342 /* Parse the base component of a CPU selection in LIST. Return a
343 pointer to the entry in the architecture table. OPTNAME is the
344 name of the option we are parsing and can be used if a diagnostic
345 is needed. If COMPLAIN is true (the default) emit error
346 messages and hints on invalid input. */
347 const cpu_option *
arm_parse_cpu_option_name(const cpu_option * list,const char * optname,const char * target,bool complain)348 arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
349 const char *target, bool complain)
350 {
351 const cpu_option *entry;
352 const char *end = strchr (target, '+');
353 size_t len = end ? end - target : strlen (target);
354
355 for (entry = list; entry->common.name != NULL; entry++)
356 {
357 if (strncmp (entry->common.name, target, len) == 0
358 && entry->common.name[len] == '\0')
359 return entry;
360
361 /* Match against any legal alias for this CPU candidate. */
362 if (entry->aliases)
363 {
364 for (const cpu_alias *alias = entry->aliases; alias->name != NULL;
365 alias++)
366 if (strncmp (alias->name, target, len) == 0
367 && alias->name[len] == '\0')
368 return entry;
369 }
370 }
371
372 if (complain)
373 {
374 error_at (input_location, "unrecognized %s target: %s", optname, target);
375 arm_print_hint_for_cpu_option (target, list);
376 }
377 return NULL;
378 }
379
380 /* List the permitted architecture option names. If TARGET is a near
381 miss for an entry, print out the suggested alternative. */
382 static void
arm_print_hint_for_arch_option(const char * target,const arch_option * list)383 arm_print_hint_for_arch_option (const char *target,
384 const arch_option *list)
385 {
386 auto_vec<const char*> candidates;
387 for (; list->common.name != NULL; list++)
388 candidates.safe_push (list->common.name);
389
390 #ifdef HAVE_LOCAL_CPU_DETECT
391 /* Add also "native" as possible value. */
392 candidates.safe_push ("native");
393 #endif
394
395 char *s;
396 const char *hint = candidates_list_and_hint (target, s, candidates);
397 if (hint)
398 inform (input_location, "valid arguments are: %s; did you mean %qs?",
399 s, hint);
400 else
401 inform (input_location, "valid arguments are: %s", s);
402
403 XDELETEVEC (s);
404 }
405
406 /* Parse the base component of a CPU or architecture selection in
407 LIST. Return a pointer to the entry in the architecture table.
408 OPTNAME is the name of the option we are parsing and can be used if
409 a diagnostic is needed. If COMPLAIN is true (the default) emit error
410 messages and hints on invalid input. */
411 const arch_option *
arm_parse_arch_option_name(const arch_option * list,const char * optname,const char * target,bool complain)412 arm_parse_arch_option_name (const arch_option *list, const char *optname,
413 const char *target, bool complain)
414 {
415 const arch_option *entry;
416 const char *end = strchr (target, '+');
417 size_t len = end ? end - target : strlen (target);
418
419 for (entry = list; entry->common.name != NULL; entry++)
420 {
421 if (strncmp (entry->common.name, target, len) == 0
422 && entry->common.name[len] == '\0')
423 return entry;
424 }
425
426 if (complain)
427 {
428 error_at (input_location, "unrecognized %s target: %s", optname, target);
429 arm_print_hint_for_arch_option (target, list);
430 }
431 return NULL;
432 }
433
434 /* List the permitted architecture option names. If TARGET is a near
435 miss for an entry, print out the suggested alternative. */
436 static void
arm_print_hint_for_fpu_option(const char * target)437 arm_print_hint_for_fpu_option (const char *target)
438 {
439 auto_vec<const char*> candidates;
440 for (int i = 0; i < TARGET_FPU_auto; i++)
441 candidates.safe_push (all_fpus[i].name);
442 char *s;
443 const char *hint = candidates_list_and_hint (target, s, candidates);
444 if (hint)
445 inform (input_location, "valid arguments are: %s; did you mean %qs?",
446 s, hint);
447 else
448 inform (input_location, "valid arguments are: %s", s);
449
450 XDELETEVEC (s);
451 }
452
453 static const arm_fpu_desc *
arm_parse_fpu_option(const char * opt)454 arm_parse_fpu_option (const char *opt)
455 {
456 int i;
457
458 for (i = 0; i < TARGET_FPU_auto; i++)
459 {
460 if (strcmp (all_fpus[i].name, opt) == 0)
461 return all_fpus + i;
462 }
463
464 error_at (input_location, "unrecognized %<-mfpu%> target: %s", opt);
465 arm_print_hint_for_fpu_option (opt);
466 return NULL;
467 }
468
469 /* Convert a static initializer array of feature bits to sbitmap
470 representation. */
471 void
arm_initialize_isa(sbitmap isa,const enum isa_feature * isa_bits)472 arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
473 {
474 bitmap_clear (isa);
475 while (*isa_bits != isa_nobit)
476 bitmap_set_bit (isa, *(isa_bits++));
477 }
478
479 /* OPT isn't a recognized feature. Print a suitable error message and
480 suggest a possible value. Always print the list of permitted
481 values. */
482 static void
arm_unrecognized_feature(const char * opt,size_t len,const cpu_arch_option * target)483 arm_unrecognized_feature (const char *opt, size_t len,
484 const cpu_arch_option *target)
485 {
486 char *this_opt = XALLOCAVEC (char, len+1);
487 auto_vec<const char*> candidates;
488
489 strncpy (this_opt, opt, len);
490 this_opt[len] = 0;
491
492 error_at (input_location, "%qs does not support feature %qs", target->name,
493 this_opt);
494 for (const cpu_arch_extension *list = target->extensions;
495 list->name != NULL;
496 list++)
497 candidates.safe_push (list->name);
498
499 char *s;
500 const char *hint = candidates_list_and_hint (this_opt, s, candidates);
501
502 if (hint)
503 inform (input_location, "valid feature names are: %s; did you mean %qs?",
504 s, hint);
505 else
506 inform (input_location, "valid feature names are: %s", s);
507
508 XDELETEVEC (s);
509 }
510
511 /* Parse any feature extensions to add to (or remove from) the
512 permitted ISA selection. */
513 void
arm_parse_option_features(sbitmap isa,const cpu_arch_option * target,const char * opts_in)514 arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
515 const char *opts_in)
516 {
517 const char *opts = opts_in;
518
519 if (!opts)
520 return;
521
522 if (!target->extensions)
523 {
524 error_at (input_location, "%s does not take any feature options",
525 target->name);
526 return;
527 }
528
529 while (opts)
530 {
531 gcc_assert (*opts == '+');
532 const struct cpu_arch_extension *entry;
533 const char *end = strchr (++opts, '+');
534 size_t len = end ? end - opts : strlen (opts);
535 bool matched = false;
536
537 for (entry = target->extensions;
538 !matched && entry->name != NULL;
539 entry++)
540 {
541 if (strncmp (entry->name, opts, len) == 0
542 && entry->name[len] == '\0')
543 {
544 if (isa)
545 {
546 const enum isa_feature *f = entry->isa_bits;
547 if (entry->remove)
548 {
549 while (*f != isa_nobit)
550 bitmap_clear_bit (isa, *(f++));
551 }
552 else
553 {
554 while (*f != isa_nobit)
555 bitmap_set_bit (isa, *(f++));
556 }
557 }
558 matched = true;
559 }
560 }
561
562 if (!matched)
563 arm_unrecognized_feature (opts, len, target);
564
565 opts = end;
566 }
567 }
568
569 class candidate_extension
570 {
571 public:
572 const cpu_arch_extension *extension;
573 sbitmap isa_bits;
574 bool required;
575
candidate_extension(const cpu_arch_extension * ext,sbitmap bits)576 candidate_extension (const cpu_arch_extension *ext, sbitmap bits)
577 : extension (ext), isa_bits (bits), required (true)
578 {}
~candidate_extension()579 ~candidate_extension ()
580 {
581 sbitmap_free (isa_bits);
582 }
583 };
584
585 /* Generate a canonical representation of the -march option from the
586 current -march string (if given) and other options on the command
587 line that might affect the architecture. This aids multilib selection
588 by ensuring that:
589 a) the option is always present
590 b) only the minimal set of options are used
591 c) when there are multiple extensions, they are in a consistent order.
592
593 The options array consists of couplets of information where the
594 first item in each couplet is the string describing which option
595 name was selected (arch, cpu, fpu) and the second is the value
596 passed for that option.
597
598 arch_for_multilib is boolean variable taking value true or false.
599 arch_for_multilib is false when the canonical representation is for -march
600 option and it is true when canonical representation is for -mlibarch option.
601 On passing arch_for_multilib true the canonical string generated will be
602 without the compiler options which are not required for multilib linking. */
603 static const char *
arm_canon_arch_option_1(int argc,const char ** argv,bool arch_for_multilib)604 arm_canon_arch_option_1 (int argc, const char **argv, bool arch_for_multilib)
605 {
606 const char *arch = NULL;
607 const char *cpu = NULL;
608 const char *fpu = NULL;
609 const char *abi = NULL;
610 static char *canonical_arch = NULL;
611
612 /* Just in case we're called more than once. */
613 if (canonical_arch)
614 {
615 free (canonical_arch);
616 canonical_arch = NULL;
617 }
618
619 if (argc & 1)
620 fatal_error (input_location,
621 "%%:canon_for_mlib takes 1 or more pairs of parameters");
622
623 while (argc)
624 {
625 if (strcmp (argv[0], "arch") == 0)
626 arch = argv[1];
627 else if (strcmp (argv[0], "cpu") == 0)
628 cpu = argv[1];
629 else if (strcmp (argv[0], "fpu") == 0)
630 fpu = argv[1];
631 else if (strcmp (argv[0], "abi") == 0)
632 abi = argv[1];
633 else
634 fatal_error (input_location,
635 "unrecognized operand to %%:canon_for_mlib");
636
637 argc -= 2;
638 argv += 2;
639 }
640
641 auto_sbitmap target_isa (isa_num_bits);
642 auto_sbitmap base_isa (isa_num_bits);
643 auto_sbitmap fpu_isa (isa_num_bits);
644
645 bitmap_clear (fpu_isa);
646
647 const arch_option *selected_arch = NULL;
648
649 /* At least one of these must be defined by either the specs or the
650 user. */
651 gcc_assert (cpu || arch);
652
653 if (!fpu)
654 fpu = FPUTYPE_AUTO;
655
656 if (!abi)
657 {
658 if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT)
659 abi = "soft";
660 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP)
661 abi = "softfp";
662 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD)
663 abi = "hard";
664 }
665
666 /* First build up a bitmap describing the target architecture. */
667 if (arch)
668 {
669 selected_arch = arm_parse_arch_option_name (all_architectures, "-march",
670 arch, !arch_for_multilib);
671
672 if (selected_arch == NULL)
673 return "";
674
675 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
676 arm_parse_option_features (target_isa, &selected_arch->common,
677 strchr (arch, '+'));
678 if (arch_for_multilib)
679 {
680 const enum isa_feature removable_bits[] = {ISA_IGNORE_FOR_MULTILIB,
681 isa_nobit};
682 sbitmap isa_bits = sbitmap_alloc (isa_num_bits);
683 arm_initialize_isa (isa_bits, removable_bits);
684 bitmap_and_compl (target_isa, target_isa, isa_bits);
685 }
686
687 if (fpu && strcmp (fpu, "auto") != 0)
688 {
689 /* We assume that architectures do not have any FPU bits
690 enabled by default. If they did, we would need to strip
691 these out first. */
692 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
693 if (target_fpu == NULL)
694 return "";
695
696 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
697 bitmap_ior (target_isa, target_isa, fpu_isa);
698 }
699 }
700 else if (cpu)
701 {
702 const cpu_option *selected_cpu
703 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu,
704 !arch_for_multilib);
705
706 if (selected_cpu == NULL)
707 return "";
708
709 arm_initialize_isa (target_isa, selected_cpu->common.isa_bits);
710 arm_parse_option_features (target_isa, &selected_cpu->common,
711 strchr (cpu, '+'));
712 if (fpu && strcmp (fpu, "auto") != 0)
713 {
714 /* The easiest and safest way to remove the default fpu
715 capabilities is to look for a '+no..' option that removes
716 the base FPU bit (isa_bit_vfpv2). If that doesn't exist
717 then the best we can do is strip out all the bits that
718 might be part of the most capable FPU we know about,
719 which is "crypto-neon-fp-armv8". */
720 bool default_fpu_found = false;
721 if (selected_cpu->common.extensions)
722 {
723 const cpu_arch_extension *ext;
724 for (ext = selected_cpu->common.extensions; ext->name != NULL;
725 ++ext)
726 {
727 if (ext->remove
728 && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2))
729 {
730 arm_initialize_isa (fpu_isa, ext->isa_bits);
731 bitmap_and_compl (target_isa, target_isa, fpu_isa);
732 default_fpu_found = true;
733 }
734 }
735
736 }
737
738 if (!default_fpu_found)
739 {
740 arm_initialize_isa
741 (fpu_isa,
742 all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits);
743 bitmap_and_compl (target_isa, target_isa, fpu_isa);
744 }
745
746 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
747 if (target_fpu == NULL)
748 return "";
749
750 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
751 bitmap_ior (target_isa, target_isa, fpu_isa);
752 }
753
754 selected_arch = all_architectures + selected_cpu->arch;
755 }
756
757 /* If we have a soft-float ABI, disable the FPU. */
758 if (abi && strcmp (abi, "soft") == 0)
759 {
760 /* Clearing the VFPv2 bit is sufficient to stop any extention that
761 builds on the FPU from matching. */
762 bitmap_clear_bit (target_isa, isa_bit_vfpv2);
763 }
764
765 /* If we don't have a selected architecture by now, something's
766 badly wrong. */
767 gcc_assert (selected_arch);
768
769 arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
770
771 /* Architecture has no extension options, so just return the canonical
772 architecture name. */
773 if (selected_arch->common.extensions == NULL)
774 return selected_arch->common.name;
775
776 /* We're only interested in extension bits. */
777 bitmap_and_compl (target_isa, target_isa, base_isa);
778
779 /* There are no extensions needed. Just return the canonical architecture
780 name. */
781 if (bitmap_empty_p (target_isa))
782 return selected_arch->common.name;
783
784 /* What is left is the architecture that the compiler will target. We
785 now need to map that back into a suitable option+features list.
786
787 The list is built in two passes. First we scan every additive
788 option feature supported by the architecture. If the option
789 provides a subset of the features we need we add it to the list
790 of candidates. We then scan backwards over the list of
791 candidates and if we find a feature that adds nothing to one that
792 was later in the list we mark it as redundant. The result is a
793 minimal list of required features for the target
794 architecture. */
795
796 std::list<candidate_extension *> extensions;
797
798 auto_sbitmap target_isa_unsatisfied (isa_num_bits);
799 bitmap_copy (target_isa_unsatisfied, target_isa);
800
801 sbitmap isa_bits = NULL;
802 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
803 cand->name != NULL;
804 cand++)
805 {
806 if (cand->remove || cand->alias)
807 continue;
808
809 if (isa_bits == NULL)
810 isa_bits = sbitmap_alloc (isa_num_bits);
811
812 arm_initialize_isa (isa_bits, cand->isa_bits);
813 if (bitmap_subset_p (isa_bits, target_isa))
814 {
815 extensions.push_back (new candidate_extension (cand, isa_bits));
816 bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied,
817 isa_bits);
818 isa_bits = NULL;
819 }
820 }
821
822 /* There's one extra case to consider, which is that the user has
823 specified an FPU that is less capable than this architecture
824 supports. In that case the code above will fail to find a
825 suitable feature. We handle this by scanning the list of options
826 again, matching the first option that provides an FPU that is
827 more capable than the selected FPU.
828
829 Note that the other case (user specified a more capable FPU than
830 this architecture supports) should end up selecting the most
831 capable FPU variant that we do support. This is sufficient for
832 multilib selection. */
833
834 if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_vfpv2)
835 && bitmap_bit_p (fpu_isa, isa_bit_vfpv2))
836 {
837 std::list<candidate_extension *>::iterator ipoint = extensions.begin ();
838
839 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
840 cand->name != NULL;
841 cand++)
842 {
843 if (cand->remove || cand->alias)
844 continue;
845
846 if (isa_bits == NULL)
847 isa_bits = sbitmap_alloc (isa_num_bits);
848
849 /* We need to keep the features in canonical order, so move the
850 insertion point if this feature is a candidate. */
851 if (ipoint != extensions.end ()
852 && (*ipoint)->extension == cand)
853 ++ipoint;
854
855 arm_initialize_isa (isa_bits, cand->isa_bits);
856 if (bitmap_subset_p (fpu_isa, isa_bits))
857 {
858 extensions.insert (ipoint,
859 new candidate_extension (cand, isa_bits));
860 isa_bits = NULL;
861 break;
862 }
863 }
864 }
865
866 if (isa_bits)
867 sbitmap_free (isa_bits);
868
869 bitmap_clear (target_isa);
870 size_t len = 1;
871 for (std::list<candidate_extension *>::reverse_iterator riter
872 = extensions.rbegin ();
873 riter != extensions.rend (); ++riter)
874 {
875 if (bitmap_subset_p ((*riter)->isa_bits, target_isa))
876 (*riter)->required = false;
877 else
878 {
879 bitmap_ior (target_isa, target_isa, (*riter)->isa_bits);
880 len += strlen ((*riter)->extension->name) + 1;
881 }
882 }
883
884 canonical_arch
885 = (char *) xmalloc (len + strlen (selected_arch->common.name));
886
887 strcpy (canonical_arch, selected_arch->common.name);
888
889 for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
890 iter != extensions.end (); ++iter)
891 {
892 if ((*iter)->required)
893 {
894 strcat (canonical_arch, "+");
895 strcat (canonical_arch, (*iter)->extension->name);
896 }
897 delete (*iter);
898 }
899
900 return canonical_arch;
901 }
902
903 /* If building big-endian on a BE8 target generate a --be8 option for
904 the linker. Takes four types of option: "little" - little-endian;
905 "big" - big-endian; "be8" - force be8 iff big-endian; and "arch"
906 "<arch-name>" (two arguments) - the target architecture. The
907 parameter names are generated by the driver from the command-line
908 options. */
909 const char *
arm_be8_option(int argc,const char ** argv)910 arm_be8_option (int argc, const char **argv)
911 {
912 int endian = TARGET_ENDIAN_DEFAULT;
913 const char *arch = NULL;
914 int arg;
915 bool force = false;
916
917 for (arg = 0; arg < argc; arg++)
918 {
919 if (strcmp (argv[arg], "little") == 0)
920 endian = 0;
921 else if (strcmp (argv[arg], "big") == 0)
922 endian = 1;
923 else if (strcmp (argv[arg], "be8") == 0)
924 force = true;
925 else if (strcmp (argv[arg], "arch") == 0)
926 {
927 arg++;
928 gcc_assert (arg < argc);
929 arch = argv[arg];
930 }
931 else
932 gcc_unreachable ();
933 }
934
935 /* Little endian - no be8 option. */
936 if (!endian)
937 return "";
938
939 if (force)
940 return "--be8";
941
942 /* Arch might not be set iff arm_canon_arch (above) detected an
943 error. Do nothing in that case. */
944 if (!arch)
945 return "";
946
947 const arch_option *selected_arch
948 = arm_parse_arch_option_name (all_architectures, "-march", arch);
949
950 /* Similarly if the given arch option was itself invalid. */
951 if (!selected_arch)
952 return "";
953
954 if (check_isa_bits_for (selected_arch->common.isa_bits, isa_bit_be8))
955 return "--be8";
956
957 return "";
958 }
959
960 /* Generate a -mfpu= option for passing to the assembler. This is
961 only called when -mfpu was set (possibly defaulted) to auto and is
962 needed to ensure that the assembler knows the correct FPU to use.
963 It wouldn't really be needed except that the compiler can be used
964 to invoke the assembler directly on hand-written files that lack
965 the necessary internal .fpu directives. We assume that the architecture
966 canonicalization calls have already been made so that we have a final
967 -march= option to derive the fpu from. */
968 const char*
arm_asm_auto_mfpu(int argc,const char ** argv)969 arm_asm_auto_mfpu (int argc, const char **argv)
970 {
971 static char *auto_fpu = NULL;
972 const char *arch = NULL;
973 static const enum isa_feature fpu_bitlist[]
974 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
975 const arch_option *selected_arch;
976 static const char* fpuname = "softvfp";
977
978 /* Handle multiple calls to this routine. */
979 if (auto_fpu)
980 {
981 free (auto_fpu);
982 auto_fpu = NULL;
983 }
984
985 while (argc)
986 {
987 if (strcmp (argv[0], "arch") == 0)
988 arch = argv[1];
989 else
990 fatal_error (input_location,
991 "unrecognized operand to %%:asm_auto_mfpu");
992 argc -= 2;
993 argv += 2;
994 }
995
996 auto_sbitmap target_isa (isa_num_bits);
997 auto_sbitmap fpubits (isa_num_bits);
998
999 gcc_assert (arch != NULL);
1000 selected_arch = arm_parse_arch_option_name (all_architectures,
1001 "-march", arch);
1002 if (selected_arch == NULL)
1003 return "";
1004
1005 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
1006 arm_parse_option_features (target_isa, &selected_arch->common,
1007 strchr (arch, '+'));
1008 arm_initialize_isa (fpubits, fpu_bitlist);
1009
1010 bitmap_and (fpubits, fpubits, target_isa);
1011
1012 /* The logic below is essentially identical to that in
1013 arm.c:arm_identify_fpu_from_isa(), but that only works in the main
1014 part of the compiler. */
1015
1016 /* If there are no FPU capability bits, we just pass -mfpu=softvfp. */
1017 if (!bitmap_empty_p (fpubits))
1018 {
1019 unsigned int i;
1020 auto_sbitmap cand_fpubits (isa_num_bits);
1021 for (i = 0; i < TARGET_FPU_auto; i++)
1022 {
1023 arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits);
1024 if (bitmap_equal_p (fpubits, cand_fpubits))
1025 {
1026 fpuname = all_fpus[i].name;
1027 break;
1028 }
1029 }
1030
1031 gcc_assert (i != TARGET_FPU_auto
1032 || bitmap_bit_p (target_isa, isa_bit_vfp_base));
1033 }
1034
1035 auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
1036 strcpy (auto_fpu, "-mfpu=");
1037 strcat (auto_fpu, fpuname);
1038 return auto_fpu;
1039 }
1040
1041 #undef ARM_CPU_NAME_LENGTH
1042
1043
1044 #undef TARGET_DEFAULT_TARGET_FLAGS
1045 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
1046
1047 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1048 #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table
1049
1050 #undef TARGET_EXCEPT_UNWIND_INFO
1051 #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
1052
1053 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
1054
1055 /* Returns a canonical representation of the -march option from the current
1056 -march string (if given) and other options on the command line that might
1057 affect the architecture. */
1058 const char *
arm_canon_arch_option(int argc,const char ** argv)1059 arm_canon_arch_option (int argc, const char **argv)
1060 {
1061 return arm_canon_arch_option_1 (argc, argv, false);
1062 }
1063
1064 /* Returns a canonical representation of the -mlibarch option from the current
1065 -march string (if given) and other options on the command line that might
1066 affect the architecture after removing the compiler extension options which
1067 are not required for multilib linking. */
1068 const char *
arm_canon_arch_multilib_option(int argc,const char ** argv)1069 arm_canon_arch_multilib_option (int argc, const char **argv)
1070 {
1071 return arm_canon_arch_option_1 (argc, argv, true);
1072 }
1073