1 /* Definitions of target machine for GNU compiler. 2 Renesas H8/300 (generic) 3 Copyright (C) 1992-2022 Free Software Foundation, Inc. 4 Contributed by Steve Chamberlain (sac@cygnus.com), 5 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). 6 7 This file is part of GCC. 8 9 GCC is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 GCC is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with GCC; see the file COPYING3. If not see 21 <http://www.gnu.org/licenses/>. */ 22 23 #ifndef GCC_H8300_H 24 #define GCC_H8300_H 25 26 extern int cpu_type; 27 28 /* Various globals defined in h8300.cc. */ 29 30 extern const char *h8_push_op, *h8_pop_op, *h8_mov_op; 31 extern const char * const *h8_reg_names; 32 33 /* Target CPU builtins. */ 34 #define TARGET_CPU_CPP_BUILTINS() \ 35 do \ 36 { \ 37 if (TARGET_H8300SX) \ 38 { \ 39 builtin_define ("__H8300SX__"); \ 40 if (TARGET_NORMAL_MODE) \ 41 { \ 42 builtin_define ("__NORMAL_MODE__"); \ 43 } \ 44 } \ 45 else if (TARGET_H8300S) \ 46 { \ 47 builtin_define ("__H8300S__"); \ 48 builtin_assert ("cpu=h8300s"); \ 49 builtin_assert ("machine=h8300s"); \ 50 if (TARGET_NORMAL_MODE) \ 51 { \ 52 builtin_define ("__NORMAL_MODE__"); \ 53 } \ 54 } \ 55 else \ 56 { \ 57 builtin_define ("__H8300H__"); \ 58 builtin_assert ("cpu=h8300h"); \ 59 builtin_assert ("machine=h8300h"); \ 60 if (TARGET_NORMAL_MODE) \ 61 { \ 62 builtin_define ("__NORMAL_MODE__"); \ 63 } \ 64 } \ 65 } \ 66 while (0) 67 68 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" 69 70 /* Macros used in the machine description to test the flags. */ 71 72 /* Select between the H8/300 and H8/300H CPUs. */ 73 #define TARGET_H8300S (TARGET_H8300S_1 || TARGET_H8300SX) 74 /* Some multiply instructions are not available in all H8SX variants. 75 Use this macro instead of TARGET_H8300SX to indicate this, even 76 though we don't actually generate different code for now. */ 77 #define TARGET_H8300SXMUL TARGET_H8300SX 78 79 #ifdef IN_LIBGCC2 80 #undef TARGET_H8300H 81 #undef TARGET_H8300S 82 #undef TARGET_NORMAL_MODE 83 /* If compiling libgcc2, make these compile time constants based on what 84 flags are we actually compiling with. */ 85 #ifdef __H8300H__ 86 #define TARGET_H8300H 1 87 #else 88 #define TARGET_H8300H 0 89 #endif 90 #ifdef __H8300S__ 91 #define TARGET_H8300S 1 92 #else 93 #define TARGET_H8300S 0 94 #endif 95 #ifdef __NORMAL_MODE__ 96 #define TARGET_NORMAL_MODE 1 97 #else 98 #define TARGET_NORMAL_MODE 0 99 #endif 100 #endif /* !IN_LIBGCC2 */ 101 102 /* Default target_flags if no switches specified. */ 103 104 #ifndef TARGET_DEFAULT 105 #define TARGET_DEFAULT (MASK_H8300H | MASK_QUICKCALL) 106 #endif 107 108 /* We want dwarf2 info available to gdb. */ 109 #define DWARF2_DEBUGGING_INFO 1 110 111 /* The return address is pushed on the stack. */ 112 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM)) 113 #define INCOMING_FRAME_SP_OFFSET (POINTER_SIZE / 8) 114 115 #define DWARF_CIE_DATA_ALIGNMENT 2 116 117 /* Define this if addresses of constant functions 118 shouldn't be put through pseudo regs where they can be cse'd. 119 Desirable on machines where ordinary constants are expensive 120 but a CALL with constant address is cheap. 121 122 Calls through a register are cheaper than calls to named 123 functions; however, the register pressure this causes makes 124 CSEing of function addresses generally a lose. */ 125 #define NO_FUNCTION_CSE 1 126 127 /* Target machine storage layout */ 128 129 /* Define this if most significant bit is lowest numbered 130 in instructions that operate on numbered bit-fields. 131 This is not true on the H8/300. */ 132 #define BITS_BIG_ENDIAN 0 133 134 /* Define this if most significant byte of a word is the lowest numbered. */ 135 /* That is true on the H8/300. */ 136 #define BYTES_BIG_ENDIAN 1 137 138 /* Define this if most significant word of a multiword number is lowest 139 numbered. */ 140 #define WORDS_BIG_ENDIAN 1 141 142 #define MAX_BITS_PER_WORD 32 143 144 /* Width of a word, in units (bytes). */ 145 #define UNITS_PER_WORD 4 146 #define MIN_UNITS_PER_WORD 2 147 148 #define SHORT_TYPE_SIZE 16 149 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16) 150 #define LONG_TYPE_SIZE 32 151 #define LONG_LONG_TYPE_SIZE 64 152 #define FLOAT_TYPE_SIZE 32 153 #define DOUBLE_TYPE_SIZE 32 154 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE 155 156 #define MAX_FIXED_MODE_SIZE 32 157 158 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 159 #define PARM_BOUNDARY 32 160 161 /* Allocation boundary (in *bits*) for the code of a function. */ 162 #define FUNCTION_BOUNDARY 16 163 164 /* Alignment of field after `int : 0' in a structure. */ 165 /* One can argue this should be 32 for -mint32, but since 32-bit ints only 166 need 16-bit alignment, this is left as is so that -mint32 doesn't change 167 structure layouts. */ 168 #define EMPTY_FIELD_BOUNDARY 16 169 170 /* No data type wants to be aligned rounder than this. 171 32-bit values are aligned as such on the H8/300H and H8S for speed. */ 172 #define BIGGEST_ALIGNMENT \ 173 ((! TARGET_ALIGN_300) ? 32 : 16) 174 175 /* The stack goes in 32 bit lumps. */ 176 #define STACK_BOUNDARY 32 177 178 /* Define this if move instructions will actually fail to work 179 when given unaligned data. */ 180 /* On the H8/300, longs can be aligned on halfword boundaries, but not 181 byte boundaries. */ 182 #define STRICT_ALIGNMENT 1 183 184 /* Standard register usage. */ 185 186 /* Number of actual hardware registers. 187 The hardware registers are assigned numbers for the compiler 188 from 0 to just below FIRST_PSEUDO_REGISTER. 189 190 All registers that the compiler knows about must be given numbers, 191 even those that are not normally considered general registers. 192 193 Reg 9 does not correspond to any hardware register, but instead 194 appears in the RTL as an argument pointer prior to reload, and is 195 eliminated during reloading in favor of either the stack or frame 196 pointer. */ 197 198 #define FIRST_PSEUDO_REGISTER 13 199 200 /* 1 for registers that have pervasive standard uses 201 and are not available for the register allocator. */ 202 203 #define FIXED_REGISTERS \ 204 /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp cc */ \ 205 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1 } 206 207 /* 1 for registers not available across function calls. 208 These must include the FIXED_REGISTERS and also any 209 registers that can be used without being saved. 210 The latter must include the registers where values are returned 211 and the register where structure-value addresses are passed. 212 Aside from that, you can include as many other registers as you 213 like. 214 215 H8 destroys r0,r1,r2,r3. */ 216 217 #define CALL_USED_REGISTERS \ 218 /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ 219 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1 } 220 221 #define REG_ALLOC_ORDER \ 222 /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ 223 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10, 11, 12 } 224 225 /* A C expression that is nonzero if hard register NEW_REG can be 226 considered for use as a rename register for OLD_REG register */ 227 228 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ 229 h8300_hard_regno_rename_ok (OLD_REG, NEW_REG) 230 231 /* Specify the registers used for certain standard purposes. 232 The values of these macros are register numbers. */ 233 234 /* H8/300 pc is not overloaded on a register. */ 235 236 /*#define PC_REGNUM 15*/ 237 238 /* Register to use for pushing function arguments. */ 239 #define STACK_POINTER_REGNUM SP_REG 240 241 /* Base register for access to local variables of the function. */ 242 #define HARD_FRAME_POINTER_REGNUM HFP_REG 243 244 /* Base register for access to local variables of the function. */ 245 #define FRAME_POINTER_REGNUM FP_REG 246 247 /* Base register for access to arguments of the function. */ 248 #define ARG_POINTER_REGNUM AP_REG 249 250 /* Register in which static-chain is passed to a function. */ 251 #define STATIC_CHAIN_REGNUM SC_REG 252 253 /* Fake register that holds the address on the stack of the 254 current function's return address. */ 255 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG 256 257 /* A C expression whose value is RTL representing the value of the return 258 address for the frame COUNT steps up from the current frame. 259 FRAMEADDR is already the frame pointer of the COUNT frame, assuming 260 a stack layout with the frame pointer as the first saved register. */ 261 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME)) 262 263 /* Define the classes of registers for register constraints in the 264 machine description. Also define ranges of constants. 265 266 One of the classes must always be named ALL_REGS and include all hard regs. 267 If there is more than one class, another class must be named NO_REGS 268 and contain no registers. 269 270 The name GENERAL_REGS must be the name of a class (or an alias for 271 another name such as ALL_REGS). This is the class of registers 272 that is allowed by "g" or "r" in a register constraint. 273 Also, registers outside this class are allocated only when 274 instructions express preferences for them. 275 276 The classes must be numbered in nondecreasing order; that is, 277 a larger-numbered class must never be contained completely 278 in a smaller-numbered class. 279 280 For any two classes, it is very desirable that there be another 281 class that represents their union. */ 282 283 enum reg_class { 284 NO_REGS, COUNTER_REGS, SOURCE_REGS, DESTINATION_REGS, 285 GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES 286 }; 287 288 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 289 290 /* Give names of register classes as strings for dump file. */ 291 292 #define REG_CLASS_NAMES \ 293 { "NO_REGS", "COUNTER_REGS", "SOURCE_REGS", "DESTINATION_REGS", \ 294 "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" } 295 296 /* Define which registers fit in which classes. 297 This is an initializer for a vector of HARD_REG_SET 298 of length N_REG_CLASSES. */ 299 300 #define REG_CLASS_CONTENTS \ 301 { {0}, /* No regs */ \ 302 {0x010}, /* COUNTER_REGS */ \ 303 {0x020}, /* SOURCE_REGS */ \ 304 {0x040}, /* DESTINATION_REGS */ \ 305 {0xeff}, /* GENERAL_REGS */ \ 306 {0x100}, /* MAC_REGS */ \ 307 {0xfff}, /* ALL_REGS */ \ 308 } 309 310 /* The same information, inverted: 311 Return the class number of the smallest class containing 312 reg number REGNO. This could be a conditional expression 313 or could index an array. */ 314 315 #define REGNO_REG_CLASS(REGNO) \ 316 ((REGNO) == MAC_REG ? MAC_REGS \ 317 : (REGNO) == COUNTER_REG ? COUNTER_REGS \ 318 : (REGNO) == SOURCE_REG ? SOURCE_REGS \ 319 : (REGNO) == DESTINATION_REG ? DESTINATION_REGS \ 320 : GENERAL_REGS) 321 322 /* The class value for index registers, and the one for base regs. */ 323 324 #define INDEX_REG_CLASS (TARGET_H8300SX ? GENERAL_REGS : NO_REGS) 325 #define BASE_REG_CLASS GENERAL_REGS 326 327 /* Stack layout; function entry, exit and calling. */ 328 329 /* Define this if pushing a word on the stack 330 makes the stack pointer a smaller address. */ 331 332 #define STACK_GROWS_DOWNWARD 1 333 334 /* Define this to nonzero if the nominal address of the stack frame 335 is at the high-address end of the local variables; 336 that is, each additional local variable allocated 337 goes at a more negative offset in the frame. */ 338 339 #define FRAME_GROWS_DOWNWARD 1 340 341 #define PUSH_ROUNDING(BYTES) h8300_push_rounding (BYTES) 342 343 /* Offset of first parameter from the argument pointer register value. */ 344 /* Is equal to the size of the saved fp + pc, even if an fp isn't 345 saved since the value is used before we know. */ 346 347 #define FIRST_PARM_OFFSET(FNDECL) 0 348 349 /* Definitions for register eliminations. 350 351 This is an array of structures. Each structure initializes one pair 352 of eliminable registers. The "from" register number is given first, 353 followed by "to". Eliminations of the same "from" register are listed 354 in order of preference. 355 356 We have three registers that can be eliminated on the h8300. 357 First, the frame pointer register can often be eliminated in favor 358 of the stack pointer register. Secondly, the argument pointer 359 register and the return address pointer register are always 360 eliminated; they are replaced with either the stack or frame 361 pointer. */ 362 363 #define ELIMINABLE_REGS \ 364 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 365 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 366 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 367 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 368 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 369 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} 370 371 /* Define the offset between two registers, one to be eliminated, and the other 372 its replacement, at the start of a routine. */ 373 374 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 375 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO))) 376 377 /* Define this if PCC uses the nonreentrant convention for returning 378 structure and union values. */ 379 380 /*#define PCC_STATIC_STRUCT_RETURN*/ 381 382 /* 1 if N is a possible register number for function argument passing. 383 On the H8, no registers are used in this way. */ 384 385 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0) 386 387 /* When this hook returns true for MODE, the compiler allows 388 registers explicitly used in the rtl to be used as spill registers 389 but prevents the compiler from extending the lifetime of these 390 registers. */ 391 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true 392 393 /* Define a data type for recording info about an argument list 394 during the scan of that argument list. This data type should 395 hold all necessary information about the function itself 396 and about the args processed so far, enough to enable macros 397 such as FUNCTION_ARG to determine where the next arg should go. 398 399 On the H8/300, this is a two item struct, the first is the number 400 of bytes scanned so far and the second is the rtx of the called 401 library function if any. */ 402 403 #define CUMULATIVE_ARGS struct cum_arg 404 struct cum_arg 405 { 406 int nbytes; 407 rtx libcall; 408 }; 409 410 /* Initialize a variable CUM of type CUMULATIVE_ARGS 411 for a call to a function whose data type is FNTYPE. 412 For a library call, FNTYPE is 0. 413 414 On the H8/300, the offset starts at 0. */ 415 416 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 417 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME) 418 419 /* Output assembler code to FILE to increment profiler label # LABELNO 420 for profiling a function entry. */ 421 422 #define FUNCTION_PROFILER(FILE, LABELNO) \ 423 fprintf (FILE, "\t%s\t#.LP%d,%s\n\tjsr @mcount\n", \ 424 h8_mov_op, (LABELNO), h8_reg_names[0]); 425 426 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 427 the stack pointer does not matter. The value is tested only in 428 functions that have frame pointers. 429 No definition is equivalent to always zero. */ 430 431 #define EXIT_IGNORE_STACK 0 432 433 /* Length in units of the trampoline for entering a nested function. */ 434 435 #define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12) 436 437 /* Addressing modes, and classification of registers for them. */ 438 439 #define HAVE_POST_INCREMENT 1 440 #define HAVE_PRE_DECREMENT 1 441 #define HAVE_POST_DECREMENT TARGET_H8300SX 442 #define HAVE_PRE_INCREMENT TARGET_H8300SX 443 444 /* Macros to check register numbers against specific register classes. */ 445 446 /* These assume that REGNO is a hard or pseudo reg number. 447 They give nonzero only if REGNO is a hard reg of the suitable class 448 or a pseudo reg currently allocated to a suitable hard reg. 449 Since they use reg_renumber, they are safe only once reg_renumber 450 has been allocated, which happens in reginfo.cc during register 451 allocation. */ 452 453 #define REGNO_OK_FOR_INDEX_P(regno) 0 454 455 #define REGNO_OK_FOR_BASE_P(regno) \ 456 (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \ 457 || reg_renumber[regno] >= 0) 458 459 /* Maximum number of registers that can appear in a valid memory address. */ 460 461 #define MAX_REGS_PER_ADDRESS 1 462 463 /* 1 if X is an rtx for a constant that is a valid address. */ 464 465 #define CONSTANT_ADDRESS_P(X) \ 466 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 467 || (GET_CODE (X) == CONST_INT \ 468 /* We handle signed and unsigned offsets here. */ \ 469 && INTVAL (X) > -0x1000000 \ 470 && INTVAL (X) < 0x1000000) \ 471 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST)) 472 473 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 474 and check its validity for a certain class. 475 We have two alternate definitions for each of them. 476 The usual definition accepts all pseudo regs; the other rejects 477 them unless they have been allocated suitable hard regs. 478 The symbol REG_OK_STRICT causes the latter definition to be used. 479 480 Most source files want to accept pseudo regs in the hope that 481 they will get allocated to the class that the insn wants them to be in. 482 Source files for reload pass need to be strict. 483 After reload, it makes no difference, since pseudo regs have 484 been eliminated by then. */ 485 486 /* Non-strict versions. */ 487 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) 0 488 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */ 489 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 490 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != MAC_REG) 491 492 /* Strict versions. */ 493 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 494 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 495 496 #ifndef REG_OK_STRICT 497 498 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 499 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 500 501 #else 502 503 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 504 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 505 506 #endif 507 508 509 /* Specify the machine mode that this machine uses 510 for the index in the tablejump instruction. */ 511 #define CASE_VECTOR_MODE Pmode 512 513 /* Define this as 1 if `char' should by default be signed; else as 0. 514 515 On the H8/300, sign extension is expensive, so we'll say that chars 516 are unsigned. */ 517 #define DEFAULT_SIGNED_CHAR 0 518 519 /* Max number of bytes we can move from memory to memory 520 in one reasonably fast instruction. */ 521 #define MOVE_MAX 4 522 #define MAX_MOVE_MAX 4 523 524 #define SELECT_CC_MODE(OP, X, Y) h8300_select_cc_mode (OP, X, Y) 525 526 /* Nonzero if access to memory by bytes is slow and undesirable. */ 527 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE 528 529 /* Define if shifts truncate the shift count 530 which implies one can omit a sign-extension or zero-extension 531 of a shift count. */ 532 /* #define SHIFT_COUNT_TRUNCATED */ 533 534 /* Specify the machine mode that pointers have. 535 After generation of rtl, the compiler makes no further distinction 536 between pointers and any other objects of this machine mode. */ 537 #define Pmode \ 538 (!TARGET_NORMAL_MODE ? SImode : HImode) 539 540 /* ANSI C types. 541 We use longs for the H8/300H and the H8S because ints can be 16 or 32. 542 GCC requires SIZE_TYPE to be the same size as pointers. */ 543 #define SIZE_TYPE \ 544 (TARGET_NORMAL_MODE ? TARGET_INT32 ? "short unsigned int" : "unsigned int" : "long unsigned int") 545 #define PTRDIFF_TYPE \ 546 (TARGET_NORMAL_MODE ? TARGET_INT32 ? "short int" : "int" : "long int") 547 548 #define POINTER_SIZE \ 549 (!TARGET_NORMAL_MODE ? 32 : 16) 550 551 #define WCHAR_TYPE "short unsigned int" 552 #define WCHAR_TYPE_SIZE 16 553 554 /* A function address in a call instruction 555 is a byte address (for indexing purposes) 556 so give the MEM rtx a byte's mode. */ 557 #define FUNCTION_MODE QImode 558 559 /* Return the length of JUMP's delay slot insn (0 if it has none). 560 If JUMP is a delayed branch, NEXT_INSN (PREV_INSN (JUMP)) will 561 be the containing SEQUENCE, not JUMP itself. */ 562 #define DELAY_SLOT_LENGTH(JUMP) \ 563 (NEXT_INSN (PREV_INSN (JUMP)) == JUMP ? 0 : 2) 564 565 #define BRANCH_COST(speed_p, predictable_p) 0 566 567 /* Tell final.cc how to eliminate redundant test instructions. */ 568 569 /* Here we define machine-dependent flags and fields in cc_status 570 (see `conditions.h'). No extra ones are needed for the h8300. */ 571 572 /* The add insns don't set overflow in a usable way. */ 573 #define CC_OVERFLOW_UNUSABLE 01000 574 /* The mov,and,or,xor insns don't set carry. That's OK though as the 575 Z bit is all we need when doing unsigned comparisons on the result of 576 these insns (since they're always with 0). However, conditions.h has 577 CC_NO_OVERFLOW defined for this purpose. Rename it to something more 578 understandable. */ 579 #define CC_NO_CARRY CC_NO_OVERFLOW 580 581 /* Control the assembler format that we output. */ 582 583 /* Output to assembler file text saying following lines 584 may contain character constants, extra white space, comments, etc. */ 585 586 #define ASM_APP_ON "; #APP\n" 587 588 /* Output to assembler file text saying following lines 589 no longer contain unusual constructs. */ 590 591 #define ASM_APP_OFF "; #NO_APP\n" 592 593 #define FILE_ASM_OP "\t.file\n" 594 595 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */ 596 #define ASM_WORD_OP \ 597 (TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t") 598 599 #define TEXT_SECTION_ASM_OP "\t.section .text" 600 #define DATA_SECTION_ASM_OP "\t.section .data" 601 #define BSS_SECTION_ASM_OP "\t.section .bss" 602 603 #undef DO_GLOBAL_CTORS_BODY 604 #define DO_GLOBAL_CTORS_BODY \ 605 { \ 606 extern func_ptr __ctors[]; \ 607 extern func_ptr __ctors_end[]; \ 608 func_ptr *p; \ 609 for (p = __ctors_end; p > __ctors; ) \ 610 { \ 611 (*--p)(); \ 612 } \ 613 } 614 615 #undef DO_GLOBAL_DTORS_BODY 616 #define DO_GLOBAL_DTORS_BODY \ 617 { \ 618 extern func_ptr __dtors[]; \ 619 extern func_ptr __dtors_end[]; \ 620 func_ptr *p; \ 621 for (p = __dtors; p < __dtors_end; p++) \ 622 { \ 623 (*p)(); \ 624 } \ 625 } 626 627 /* How to refer to registers in assembler output. 628 This sequence is indexed by compiler's hard-register-number (see above). */ 629 630 #define REGISTER_NAMES \ 631 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap", "fp", "cc" } 632 633 #define ADDITIONAL_REGISTER_NAMES \ 634 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \ 635 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} } 636 637 /* Globalizing directive for a label. */ 638 #define GLOBAL_ASM_OP "\t.global " 639 640 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ 641 ASM_OUTPUT_LABEL (FILE, NAME) 642 643 /* This is how to store into the string LABEL 644 the symbol_ref name of an internal numbered label where 645 PREFIX is the class of label and NUM is the number within the class. 646 This is suitable for output with `assemble_name'. 647 648 N.B.: The h8300.md branch_true and branch_false patterns also know 649 how to generate internal labels. */ 650 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 651 sprintf (LABEL, "*.%s%lu", PREFIX, (unsigned long)(NUM)) 652 653 /* This is how to output an insn to push a register on the stack. 654 It need not be very fast code. */ 655 656 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 657 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO]) 658 659 /* This is how to output an insn to pop a register from the stack. 660 It need not be very fast code. */ 661 662 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 663 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO]) 664 665 /* This is how to output an element of a case-vector that is absolute. */ 666 667 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 668 fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE) 669 670 /* This is how to output an element of a case-vector that is relative. */ 671 672 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 673 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL) 674 675 /* This is how to output an assembler line 676 that says to advance the location counter 677 to a multiple of 2**LOG bytes. */ 678 679 #define ASM_OUTPUT_ALIGN(FILE, LOG) \ 680 if ((LOG) != 0) \ 681 fprintf (FILE, "\t.align %d\n", (LOG)) 682 683 #define ASM_OUTPUT_SKIP(FILE, SIZE) \ 684 fprintf (FILE, "\t.space %d\n", (int)(SIZE)) 685 686 /* This says how to output an assembler line 687 to define a global common symbol. */ 688 689 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 690 ( fputs ("\t.comm ", (FILE)), \ 691 assemble_name ((FILE), (NAME)), \ 692 fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE))) 693 694 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 695 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) 696 697 /* This says how to output an assembler line 698 to define a local common symbol. */ 699 700 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 701 ( fputs ("\t.lcomm ", (FILE)), \ 702 assemble_name ((FILE), (NAME)), \ 703 fprintf ((FILE), ",%d\n", (int)(SIZE))) 704 705 #define ASM_PN_FORMAT "%s___%lu" 706 707 /* H8300 specific pragmas. */ 708 #define REGISTER_TARGET_PRAGMAS() \ 709 do \ 710 { \ 711 c_register_pragma (0, "saveall", h8300_pr_saveall); \ 712 c_register_pragma (0, "interrupt", h8300_pr_interrupt); \ 713 } \ 714 while (0) 715 716 #define FINAL_PRESCAN_INSN(insn, operand, nop) \ 717 final_prescan_insn (insn, operand, nop) 718 719 extern int h8300_move_ratio; 720 #define MOVE_RATIO(speed) h8300_move_ratio 721 722 /* Machine-specific symbol_ref flags. */ 723 #define SYMBOL_FLAG_FUNCVEC_FUNCTION (SYMBOL_FLAG_MACH_DEP << 0) 724 #define SYMBOL_FLAG_EIGHTBIT_DATA (SYMBOL_FLAG_MACH_DEP << 1) 725 #define SYMBOL_FLAG_TINY_DATA (SYMBOL_FLAG_MACH_DEP << 2) 726 727 #endif /* ! GCC_H8300_H */ 728