1//Original:/proj/frio/dv/testcases/seq/se_bug_ui2/se_bug_ui2.dsp 2// Description: 16 bit special cases Undefined Instructions in Supervisor Mode 3# mach: bfin 4# sim: --environment operating 5 6#include "test.h" 7.include "testutils.inc" 8start 9 10// 11// Constants and Defines 12// 13 14include(gen_int.inc) 15include(selfcheck.inc) 16include(std.inc) 17include(mmrs.inc) 18include(symtable.inc) 19 20#ifndef STACKSIZE 21#define STACKSIZE 0x10 // change for how much stack you need 22#endif 23#ifndef ITABLE 24#define ITABLE 0xF0000000 25#endif 26 27GEN_INT_INIT(ITABLE) // set location for interrupt table 28 29// 30// Reset/Bootstrap Code 31// (Here we should set the processor operating modes, initialize registers, 32// etc.) 33// 34 35BOOT: 36INIT_R_REGS(0); // initialize general purpose regs 37 38INIT_P_REGS(0); // initialize the pointers 39 40INIT_I_REGS(0); // initialize the dsp address regs 41INIT_M_REGS(0); 42INIT_L_REGS(0); 43INIT_B_REGS(0); 44 45CLI R1; // inhibit events during MMR writes 46 47LD32_LABEL(sp, USTACK); // setup the user stack pointer 48USP = SP; 49 50LD32_LABEL(sp, KSTACK); // setup the kernel stack pointer 51FP = SP; // and frame pointer 52 53LD32(p0, EVT0); // Setup Event Vectors and Handlers 54 55 P0 += 4; // EVT0 not used (Emulation) 56 57 P0 += 4; // EVT1 not used (Reset) 58 59LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 60 [ P0 ++ ] = R0; 61 62LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 63 [ P0 ++ ] = R0; 64 65 P0 += 4; // EVT4 not used (Global Interrupt Enable) 66 67LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 68 [ P0 ++ ] = R0; 69 70LD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 71 [ P0 ++ ] = R0; 72 73LD32_LABEL(r0, I7HANDLE); // IVG7 Handler 74 [ P0 ++ ] = R0; 75 76LD32_LABEL(r0, I8HANDLE); // IVG8 Handler 77 [ P0 ++ ] = R0; 78 79LD32_LABEL(r0, I9HANDLE); // IVG9 Handler 80 [ P0 ++ ] = R0; 81 82LD32_LABEL(r0, I10HANDLE);// IVG10 Handler 83 [ P0 ++ ] = R0; 84 85LD32_LABEL(r0, I11HANDLE);// IVG11 Handler 86 [ P0 ++ ] = R0; 87 88LD32_LABEL(r0, I12HANDLE);// IVG12 Handler 89 [ P0 ++ ] = R0; 90 91LD32_LABEL(r0, I13HANDLE);// IVG13 Handler 92 [ P0 ++ ] = R0; 93 94LD32_LABEL(r0, I14HANDLE);// IVG14 Handler 95 [ P0 ++ ] = R0; 96 97LD32_LABEL(r0, I15HANDLE);// IVG15 Handler 98 [ P0 ++ ] = R0; 99 100LD32(p0, EVT_OVERRIDE); 101 R0 = 0; 102 [ P0 ++ ] = R0; 103 104 R1 = -1; // Change this to mask interrupts (*) 105CSYNC; // wait for MMR writes to finish 106STI R1; // sync and reenable events (implicit write to IMASK) 107 108DUMMY: 109 110 R0 = 0 (Z); 111 112LT0 = r0; // set loop counters to something deterministic 113LB0 = r0; 114LC0 = r0; 115LT1 = r0; 116LB1 = r0; 117LC1 = r0; 118 119ASTAT = r0; // reset other internal regs 120SYSCFG = r0; 121RETS = r0; // prevent X's breaking LINK instruction 122 123// The following code sets up the test for running in USER mode 124 125LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 126 // ReturnFromInterrupt (RTI) 127RETI = r0; // We need to load the return address 128 129// Comment the following line for a USER Mode test 130 131JUMP STARTSUP; // jump to code start for SUPERVISOR mode 132 133RTI; 134 135STARTSUP: 136LD32_LABEL(p1, BEGIN); 137 138LD32(p0, EVT15); 139 140CLI R1; // inhibit events during write to MMR 141 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 142CSYNC; // wait for it 143STI R1; // reenable events with proper imask 144 145RAISE 15; // after we RTI, INT 15 should be taken 146 147RTI; 148 149// 150// The Main Program 151// 152 153STARTUSER: 154 155LINK 0; // change for how much stack frame space you need. 156 157JUMP BEGIN; 158 159//********************************************************************* 160 161BEGIN: 162 163 // COMMENT the following line for USER MODE tests 164 [ -- SP ] = RETI; // enable interrupts in supervisor mode 165 166 // **** YOUR CODE GOES HERE **** 167 168 // count of UI's will be in r5, which was initialized to 0 by header 169 170// .dw 0x41FD ; 171// .dw 0x41FE ; 172// .dw 0x41FF ; 173 .dw 0x9040 ; 174 .dw 0x9049 ; 175 .dw 0x9052 ; 176 .dw 0x905B ; 177 .dw 0x9064 ; 178 .dw 0x906D ; 179 .dw 0x9076 ; 180 .dw 0x907F ; 181 .dw 0x90C0 ; 182 .dw 0x90C9 ; 183 .dw 0x90D2 ; 184 .dw 0x90DB ; 185 .dw 0x90E4 ; 186 .dw 0x90ED ; 187 .dw 0x90F6 ; 188 .dw 0x90FF ; 189 .dw 0x9180 ; 190 191 192CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC); 193 // Xhandler counts all EXCAUSE = 0x21; 194CHECKREG(r5, 17); // count of all 16 bit UI's. 195 196END: 197dbg_pass; // End the test 198 199//********************************************************************* 200 201// 202// Handlers for Events 203// 204 205NHANDLE: // NMI Handler 2 206RTN; 207 208XHANDLE: // Exception Handler 3 209 // 16 bit illegal opcode handler - skips bad instruction 210 211 // handler MADE LEAN and destructive so test runs more quckly 212 // se_undefinedinstruction1.dsp tests using a "nice" handler 213 214// [--sp] = ASTAT; // save what we damage 215// [--sp] = (r7 - r6); 216 R7 = SEQSTAT; 217 R7 <<= 26; 218 R7 >>= 26; // only want EXCAUSE 219 R6 = 0x21; // EXCAUSE 0x21 means I-Fetch Undefined Instruction 220CC = r7 == r6; 221IF CC JUMP UNDEFINEDINSTRUCTION; // If EXCAUSE != 0x21 then leave 222 223 R6 = 0x22; // Also accept illegal insn combo 224CC = r7 == r6; 225IF CC JUMP UNDEFINEDINSTRUCTION; // If EXCAUSE != 0x21 then leave 226 227dbg_fail; 228 229UNDEFINEDINSTRUCTION: 230 R7 = RETX; // Fix up return address 231 232 R7 += 2; // skip offending 16 bit instruction 233 234RETX = r7; // and put back in RETX 235 236 R5 += 1; // Increment global counter 237 238OUT: 239// (r7 - r6) = [sp++]; 240// ASTAT = [sp++]; 241 242RTX; 243 244HWHANDLE: // HW Error Handler 5 245RTI; 246 247THANDLE: // Timer Handler 6 248RTI; 249 250I7HANDLE: // IVG 7 Handler 251RTI; 252 253I8HANDLE: // IVG 8 Handler 254RTI; 255 256I9HANDLE: // IVG 9 Handler 257RTI; 258 259I10HANDLE: // IVG 10 Handler 260RTI; 261 262I11HANDLE: // IVG 11 Handler 263RTI; 264 265I12HANDLE: // IVG 12 Handler 266RTI; 267 268I13HANDLE: // IVG 13 Handler 269RTI; 270 271I14HANDLE: // IVG 14 Handler 272RTI; 273 274I15HANDLE: // IVG 15 Handler 275RTI; 276 277 278 // padding for the icache 279 280EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; 281 282// 283// Data Segment 284// 285 286.data 287DATA: 288 .space (0x10); 289 290// Stack Segments (Both Kernel and User) 291 292 .space (STACKSIZE); 293KSTACK: 294 295 .space (STACKSIZE); 296USTACK: 297