12020-09-08 David Faust <david.faust@oracle.com> 2 3 * bpf.cpu (define-alu-instructions): Correct semantic operators 4 for div, mod to unsigned versions. 5 62020-09-01 Alan Modra <amodra@gmail.com> 7 8 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed 9 value by two rather than shifting left. 10 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract. 11 122020-08-26 David Faust <david.faust@oracle.com> 13 14 * bpf.cpu (arch bpf): Add xbpf mach and isas. 15 (define-xbpf-isa) New pmacro. 16 (all-isas) Add xbpfle,xbpfbe. 17 (endian-isas): New pmacro. 18 (mach xbpf): New. 19 (model xbpf-def): Likewise. 20 (h-gpr): Add xbpf mach. 21 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa. 22 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa. 23 (define-alu-insn-un): Use new endian-isas pmacro. 24 (define-alu-insn-bin, define-alu-insn-mov): Likewise. 25 (define-endian-insn, define-lddw): Likewise. 26 (dlind, dxli, dxsi, dsti): Likewise. 27 (define-cond-jump-insn, define-call-insn): Likewise. 28 (define-atomic-insns): Likewise. 29 302020-07-04 Nick Clifton <nickc@redhat.com> 31 32 Binutils 2.35 branch created. 33 342020-06-25 David Faust <david.faust@oracle.com> 35 36 * bpf.cpu (f-offset16): Change type from INT to HI. 37 (dxli): Simplify memory access. 38 (dxsi): Likewise. 39 (define-endian-insn): Update c-call in semantics. 40 (dlabs) Likewise. 41 (dlind) Likewise. 42 432020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> 44 45 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64. 46 * bpf.opc (bpf_print_insn): Do not set endian_code here. 47 482020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> 49 50 * mep.opc (print_slot_insn): Pass the insn endianness to 51 cgen_get_insn_value. 52 532020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> 54 David Faust <david.faust@oracle.com> 55 56 * bpf.cpu (define-alu-insn-un): Add definitions of semantics. 57 (define-alu-insn-mov): Likewise. 58 (daib): Likewise. 59 (define-alu-instructions): Likewise. 60 (define-endian-insn): Likewise. 61 (define-lddw): Likewise. 62 (dlabs): Likewise. 63 (dlind): Likewise. 64 (dxli): Likewise. 65 (dxsi): Likewise. 66 (dsti): Likewise. 67 (define-ldstx-insns): Likewise. 68 (define-st-insns): Likewise. 69 (define-cond-jump-insn): Likewise. 70 (dcji): Likewise. 71 (define-condjump-insns): Likewise. 72 (define-call-insn): Likewise. 73 (ja): Likewise. 74 ("exit"): Likewise. 75 (define-atomic-insns): Likewise. 76 (sem-exchange-and-add): New macro. 77 * bpf.cpu ("brkpt"): New instruction. 78 (bpfbf): Set word-bitsize to 32 and insn-endian big. 79 (h-gpr): Prefer r0 to `a' and r6 to `ctx'. 80 (h-pc): Expand definition. 81 * bpf.opc (bpf_print_insn): Set endian_code to BIG. 82 832020-05-21 Alan Modra <amodra@gmail.com> 84 85 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace 86 "if (x) free (x)" with "free (x)". 87 882020-05-19 Stafford Horne <shorne@gmail.com> 89 90 PR 25184 91 * or1k.cpu (arch or1k): Remove or64 and or64nd machs. 92 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros. 93 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions. 94 * or1kcommon.cpu (h-fdr): Remove hardware. 95 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions. 96 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern. 97 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern. 98 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern. 99 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove. 100 1012020-02-16 David Faust <david.faust@oracle.com> 102 103 * bpf.cpu (define-cond-jump-insn): Renamed from djci. 104 (dcji) New version with support for JMP32 105 1062020-02-03 Alan Modra <amodra@gmail.com> 107 108 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value. 109 1102020-02-01 Alan Modra <amodra@gmail.com> 111 112 * frv.cpu (f-u12): Multiply rather than left shift signed values. 113 (f-label16, f-label24): Likewise. 114 1152020-01-30 Alan Modra <amodra@gmail.com> 116 117 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting. 118 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise. 119 (f-dst32-rn-prefixed-QI): Likewise. 120 (f-dsp-32-s32): Mask before shifting left. 121 (f-dsp-48-u32, f-dsp-48-s32): Likewise. 122 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than 123 shifting left. 124 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise. 125 (h-gr-SI): Mask before shifting. 126 1272020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> 128 129 * bpf.cpu (define-alu-insn-un): The unary BPF instructions 130 (neg and neg32) use OP_SRC_K even if they operate only in 131 registers. 132 1332020-01-18 Nick Clifton <nickc@redhat.com> 134 135 Binutils 2.34 branch created. 136 1372020-01-13 Alan Modra <amodra@gmail.com> 138 139 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't 140 left shift signed values. 141 1422020-01-06 Alan Modra <amodra@gmail.com> 143 144 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign 145 bits before shifting rather than masking after shifting. 146 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise. 147 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise. 148 (f-dsp-64-u16, f-dsp-8-s24): Likewise. 149 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift. 150 1512020-01-04 Alan Modra <amodra@gmail.com> 152 153 * m32r.cpu (f-disp8): Avoid left shift of negative values. 154 (f-disp16, f-disp24): Likewise. 155 1562019-12-23 Alan Modra <amodra@gmail.com> 157 158 * iq2000.cpu (f-offset): Avoid left shift of negative values. 159 1602019-12-20 Alan Modra <amodra@gmail.com> 161 162 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values. 163 1642019-12-17 Alan Modra <amodra@gmail.com> 165 166 * bpf.cpu (f-imm64): Avoid signed overflow. 167 1682019-12-16 Alan Modra <amodra@gmail.com> 169 170 * xstormy16.cpu (f-rel12a): Avoid signed overflow. 171 1722019-12-11 Alan Modra <amodra@gmail.com> 173 174 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts. 175 * lm32.cpu (f-branch, f-vall): Likewise. 176 * m32.cpu (f-lab-8-16): Likewise. 177 1782019-12-11 Alan Modra <amodra@gmail.com> 179 180 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than 181 shift left to avoid UB on left shift of negative values. 182 1832019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com> 184 185 * bpf.cpu: Fix comment describing the 128-bit instruction format. 186 1872019-09-09 Phil Blundell <pb@pbcl.net> 188 189 binutils 2.33 branch created. 190 1912019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> 192 193 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of 194 %a and %ctx. 195 1962019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com> 197 198 * bpf.cpu (dlabs): New pmacro. 199 (dlind): Likewise. 200 2012019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> 202 203 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an 204 explicit 'dst' argument. 205 2062019-06-13 Stafford Horne <shorne@gmail.com> 207 208 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol. 209 2102019-06-13 Stafford Horne <shorne@gmail.com> 211 212 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a 213 (l-adrp): Improve comment. 214 2152019-06-13 Stafford Horne <shorne@gmail.com> 216 217 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S, 218 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D, 219 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes. 220 (float-setflag-insn-base): New pmacro based on float-setflag-insn. 221 (float-setflag-symantics, float-setflag-unordered-cmp-symantics, 222 float-setflag-unordered-symantics): New pmacro for instruction 223 symantics. 224 (float-setflag-insn): Update to use float-setflag-insn-base. 225 (float-setflag-unordered-insn): New pmacro for generating instructions. 226 2272019-06-13 Andrey Bacherov <avbacherov@opencores.org> 228 Stafford Horne <shorne@gmail.com> 229 230 * or1k.cpu (ORFPX64A32-MACHS): New pmacro. 231 (ORFPX-MACHS): Removed pmacro. 232 * or1k.opc (or1k_cgen_insn_supported): New function. 233 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro. 234 (parse_regpair, print_regpair): New functions. 235 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder 236 and add comments. 237 (h-fdr): Update comment to indicate or64. 238 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs. 239 (h-fd32r): New hardware for 64-bit fpu registers. 240 (h-i64r): New hardware for 64-bit int registers. 241 * or1korbis.cpu (f-resv-8-1): New field. 242 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS. 243 (rDDF, rADF, rBDF): Update operand comment to indicate or64. 244 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields. 245 (h-roff1): New hardware. 246 (double-field-and-ops mnemonic): New pmacro to generate operations 247 rDD32F, rAD32F, rBD32F, rDDI and rADI. 248 (float-regreg-insn): Update single precision generator to MACH 249 ORFPX32-MACHS. Add generator for or32 64-bit instructions. 250 (float-setflag-insn): Update single precision generator to MACH 251 ORFPX32-MACHS. Fix double instructions from single to double 252 precision. Add generator for or32 64-bit instructions. 253 (float-cust-insn cust-num): Update single precision generator to MACH 254 ORFPX32-MACHS. Add generator for or32 64-bit instructions. 255 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to 256 ORFPX32-MACHS. 257 (lf-rem-d): Fix operation from mod to rem. 258 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction. 259 (lf-itof-d): Fix operands from single to double. 260 (lf-ftoi-d): Update operand mode from DI to WI. 261 2622019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> 263 264 * bpf.cpu: New file. 265 * bpf.opc: Likewise. 266 2672018-06-24 Nick Clifton <nickc@redhat.com> 268 269 2.32 branch created. 270 2712018-10-05 Richard Henderson <rth@twiddle.net> 272 Stafford Horne <shorne@gmail.com> 273 274 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. 275 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. 276 (l-mul): Fix overflow support and indentation. 277 (l-mulu): Fix overflow support and indentation. 278 (l-muld, l-muldu, l-msbu, l-macu): New instructions. 279 (l-div); Remove incorrect carry behavior. 280 (l-divu): Fix carry and overflow behavior. 281 (l-mac): Add overflow support. 282 (l-msb, l-msbu): Add carry and overflow support. 283 2842018-10-05 Richard Henderson <rth@twiddle.net> 285 286 * or1k.opc (parse_disp26): Add support for plta() relocations. 287 (parse_disp21): New function. 288 (or1k_rclass): New enum. 289 (or1k_rtype): New enum. 290 (or1k_imm16_relocs): Define new PO and SPO relocation mappings. 291 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations. 292 (parse_imm16): Add support for the new 21bit and 13bit relocations. 293 * or1korbis.cpu (f-disp26): Don't assume SI. 294 (f-disp21): New pc-relative 21-bit 13 shifted to right. 295 (insn-opcode): Add ADRP. 296 (l-adrp): New instruction. 297 2982018-10-05 Richard Henderson <rth@twiddle.net> 299 300 * or1k.opc: Add RTYPE_ enum. 301 (INVALID_STORE_RELOC): New string. 302 (or1k_imm16_relocs): New array array. 303 (parse_reloc): New static function that just does the parsing. 304 (parse_imm16): New static function for generic parsing. 305 (parse_simm16): Change to just call parse_imm16. 306 (parse_simm16_split): New function. 307 (parse_uimm16): Change to call parse_imm16. 308 (parse_uimm16_split): New function. 309 * or1korbis.cpu (simm16-split): Change to use new simm16_split. 310 (uimm16-split): Change to use new uimm16_split. 311 3122018-07-24 Alan Modra <amodra@gmail.com> 313 314 PR 23430 315 * or1kcommon.cpu (spr-reg-indices): Fix description typo. 316 3172018-05-09 Sebastian Rasmussen <sebras@gmail.com> 318 319 * or1kcommon.cpu (spr-reg-info): Typo fix. 320 3212018-03-03 Alan Modra <amodra@gmail.com> 322 323 * frv.opc: Include opintl.h. 324 (add_next_to_vliw): Use opcodes_error_handler to print error. 325 Standardize error message. 326 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. 327 3282018-01-13 Nick Clifton <nickc@redhat.com> 329 330 2.30 branch created. 331 3322017-03-15 Stafford Horne <shorne@gmail.com> 333 334 * or1kcommon.cpu: Add pc set semantics to also update ppc. 335 3362016-10-06 Alan Modra <amodra@gmail.com> 337 338 * mep.opc (expand_string): Add fall through comment. 339 3402016-03-03 Alan Modra <amodra@gmail.com> 341 342 * fr30.cpu (f-m4): Replace bogus comment with a better guess 343 at what is really going on. 344 3452016-03-02 Alan Modra <amodra@gmail.com> 346 347 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 348 3492016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 350 351 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 352 a constant to better align disassembler output. 353 3542014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 355 356 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 357 3582014-06-12 Alan Modra <amodra@gmail.com> 359 360 * or1k.opc: Whitespace fixes. 361 3622014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 363 364 * or1korbis.cpu (h-atomic-reserve): New hardware. 365 (h-atomic-address): Likewise. 366 (insn-opcode): Add opcodes for LWA and SWA. 367 (atomic-reserve): New operand. 368 (atomic-address): Likewise. 369 (l-lwa, l-swa): New instructions. 370 (l-lbs): Fix typo in comment. 371 (store-insn): Clear atomic reserve on store to atomic-address. 372 Fix register names in fmt field. 373 3742014-04-22 Christian Svensson <blue@cmd.nu> 375 376 * openrisc.cpu: Delete. 377 * openrisc.opc: Delete. 378 * or1k.cpu: New file. 379 * or1k.opc: New file. 380 * or1kcommon.cpu: New file. 381 * or1korbis.cpu: New file. 382 * or1korfpx.cpu: New file. 383 3842013-12-07 Mike Frysinger <vapier@gentoo.org> 385 386 * epiphany.opc: Remove +x file mode. 387 3882013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 389 390 PR binutils/15241 391 * lm32.cpu (Control and status registers): Add CFG2, PSW, 392 TLBVADDR, TLBPADDR and TLBBADVADDR. 393 3942012-11-30 Oleg Raikhman <oleg@adapteva.com> 395 Joern Rennecke <joern.rennecke@embecosm.com> 396 397 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 398 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 399 (testset-insn): Add NO_DIS attribute to t.l. 400 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 401 (move-insns): Add NO-DIS attribute to cmov.l. 402 (op-mmr-movts): Add NO-DIS attribute to movts.l. 403 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 404 (op-rrr): Add NO-DIS attribute to .l. 405 (shift-rrr): Add NO-DIS attribute to .l. 406 (op-shift-rri): Add NO-DIS attribute to i32.l. 407 (bitrl, movtl): Add NO-DIS attribute. 408 (op-iextrrr): Add NO-DIS attribute to .l 409 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 410 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 411 4122012-02-27 Alan Modra <amodra@gmail.com> 413 414 * mt.opc (print_dollarhex): Trim values to 32 bits. 415 4162011-12-15 Nick Clifton <nickc@redhat.com> 417 418 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 419 hosts. 420 4212011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 422 423 * epiphany.opc (parse_branch_addr): Fix type of valuep. 424 Cast value before printing it as a long. 425 (parse_postindex): Fix type of valuep. 426 4272011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 428 429 * cpu/epiphany.cpu: New file. 430 * cpu/epiphany.opc: New file. 431 4322011-08-22 Nick Clifton <nickc@redhat.com> 433 434 * fr30.cpu: Newly contributed file. 435 * fr30.opc: Likewise. 436 * ip2k.cpu: Likewise. 437 * ip2k.opc: Likewise. 438 * mep-avc.cpu: Likewise. 439 * mep-avc2.cpu: Likewise. 440 * mep-c5.cpu: Likewise. 441 * mep-core.cpu: Likewise. 442 * mep-default.cpu: Likewise. 443 * mep-ext-cop.cpu: Likewise. 444 * mep-fmax.cpu: Likewise. 445 * mep-h1.cpu: Likewise. 446 * mep-ivc2.cpu: Likewise. 447 * mep-rhcop.cpu: Likewise. 448 * mep-sample-ucidsp.cpu: Likewise. 449 * mep.cpu: Likewise. 450 * mep.opc: Likewise. 451 * openrisc.cpu: Likewise. 452 * openrisc.opc: Likewise. 453 * xstormy16.cpu: Likewise. 454 * xstormy16.opc: Likewise. 455 4562010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 457 458 * frv.opc: #undef DEBUG. 459 4602010-07-03 DJ Delorie <dj@delorie.com> 461 462 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 463 4642010-02-11 Doug Evans <dje@sebabeach.org> 465 466 * m32r.cpu (HASH-PREFIX): Delete. 467 (duhpo, dshpo): New pmacros. 468 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 469 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 470 attribute, define with dshpo. 471 (uimm24): Delete HASH-PREFIX attribute. 472 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 473 (print_signed_with_hash_prefix): New function. 474 (print_unsigned_with_hash_prefix): New function. 475 * xc16x.cpu (dowh): New pmacro. 476 (upof16): Define with dowh, specify print handler. 477 (qbit, qlobit, qhibit): Ditto. 478 (upag16): Ditto. 479 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 480 (print_with_dot_prefix): New functions. 481 (print_with_pof_prefix, print_with_pag_prefix): New functions. 482 4832010-01-24 Doug Evans <dje@sebabeach.org> 484 485 * frv.cpu (floating-point-conversion): Update call to fp conv op. 486 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 487 conditional-floating-point-conversion, ne-floating-point-conversion, 488 float-parallel-mul-add-double-semantics): Ditto. 489 4902010-01-05 Doug Evans <dje@sebabeach.org> 491 492 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 493 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 494 4952010-01-02 Doug Evans <dje@sebabeach.org> 496 497 * m32c.opc (parse_signed16): Fix typo. 498 4992009-12-11 Nick Clifton <nickc@redhat.com> 500 501 * frv.opc: Fix shadowed variable warnings. 502 * m32c.opc: Fix shadowed variable warnings. 503 5042009-11-14 Doug Evans <dje@sebabeach.org> 505 506 Must use VOID expression in VOID context. 507 * xc16x.cpu (mov4): Fix mode of `sequence'. 508 (mov9, mov10): Ditto. 509 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 510 (callr, callseg, calls, trap, rets, reti): Ditto. 511 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 512 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 513 (exts, exts1, extsr, extsr1, prior): Ditto. 514 5152009-10-23 Doug Evans <dje@sebabeach.org> 516 517 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 518 cgen-ops.h -> cgen/basic-ops.h. 519 5202009-09-25 Alan Modra <amodra@bigpond.net.au> 521 522 * m32r.cpu (stb-plus): Typo fix. 523 5242009-09-23 Doug Evans <dje@sebabeach.org> 525 526 * m32r.cpu (sth-plus): Fix address mode and calculation. 527 (stb-plus): Ditto. 528 (clrpsw): Fix mask calculation. 529 (bset, bclr, btst): Make mode in bit calculation match expression. 530 531 * xc16x.cpu (rtl-version): Set to 0.8. 532 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 533 make uppercase. Remove unnecessary name-prefix spec. 534 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 535 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 536 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 537 (h-cr): New hardware. 538 (muls): Comment out parts that won't compile, add fixme. 539 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 540 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 541 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 542 5432009-07-16 Doug Evans <dje@sebabeach.org> 544 545 * cpu/simplify.inc (*): One line doc strings don't need \n. 546 (df): Invoke define-full-ifield instead of claiming it's an alias. 547 (dno): Define. 548 (dnop): Mark as deprecated. 549 5502009-06-22 Alan Modra <amodra@bigpond.net.au> 551 552 * m32c.opc (parse_lab_5_3): Use correct enum. 553 5542009-01-07 Hans-Peter Nilsson <hp@axis.com> 555 556 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 557 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 558 (media-arith-sat-semantics): Explicitly sign- or zero-extend 559 arguments of "operation" to DI using "mode" and the new pmacros. 560 5612009-01-03 Hans-Peter Nilsson <hp@axis.com> 562 563 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 564 of number 2, PID. 565 5662008-12-23 Jon Beniston <jon@beniston.com> 567 568 * lm32.cpu: New file. 569 * lm32.opc: New file. 570 5712008-01-29 Alan Modra <amodra@bigpond.net.au> 572 573 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 574 to source. 575 5762007-10-22 Hans-Peter Nilsson <hp@axis.com> 577 578 * cris.cpu (movs, movu): Use result of extension operation when 579 updating flags. 580 5812007-07-04 Nick Clifton <nickc@redhat.com> 582 583 * cris.cpu: Update copyright notice to refer to GPLv3. 584 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 585 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 586 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 587 xc16x.opc: Likewise. 588 * iq2000.cpu: Fix copyright notice to refer to FSF. 589 5902007-04-30 Mark Salter <msalter@sadr.localdomain> 591 592 * frv.cpu (spr-names): Support new coprocessor SPR registers. 593 5942007-04-20 Nick Clifton <nickc@redhat.com> 595 596 * xc16x.cpu: Restore after accidentally overwriting this file with 597 xc16x.opc. 598 5992007-03-29 DJ Delorie <dj@redhat.com> 600 601 * m32c.cpu (Imm-8-s4n): Fix print hook. 602 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 603 (arith-jnz-imm4-dst-defn): Make relaxable. 604 (arith-jnz16-imm4-dst-defn): Fix encodings. 605 6062007-03-20 DJ Delorie <dj@redhat.com> 607 608 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 609 mem20): New. 610 (src16-16-20-An-relative-*): New. 611 (dst16-*-20-An-relative-*): New. 612 (dst16-16-16sa-*): New 613 (dst16-16-16ar-*): New 614 (dst32-16-16sa-Unprefixed-*): New 615 (jsri): Fix operands. 616 (setzx): Fix encoding. 617 6182007-03-08 Alan Modra <amodra@bigpond.net.au> 619 620 * m32r.opc: Formatting. 621 6222006-05-22 Nick Clifton <nickc@redhat.com> 623 624 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 625 6262006-04-10 DJ Delorie <dj@redhat.com> 627 628 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 629 decides if this function accepts symbolic constants or not. 630 (parse_signed_bitbase): Likewise. 631 (parse_unsigned_bitbase8): Pass the new parameter. 632 (parse_unsigned_bitbase11): Likewise. 633 (parse_unsigned_bitbase16): Likewise. 634 (parse_unsigned_bitbase19): Likewise. 635 (parse_unsigned_bitbase27): Likewise. 636 (parse_signed_bitbase8): Likewise. 637 (parse_signed_bitbase11): Likewise. 638 (parse_signed_bitbase19): Likewise. 639 6402006-03-13 DJ Delorie <dj@redhat.com> 641 642 * m32c.cpu (Bit3-S): New. 643 (btst:s): New. 644 * m32c.opc (parse_bit3_S): New. 645 646 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 647 (btst): Add optional :G suffix for MACH32. 648 (or.b:S): New. 649 (pop.w:G): Add optional :G suffix for MACH16. 650 (push.b.imm): Fix syntax. 651 6522006-03-10 DJ Delorie <dj@redhat.com> 653 654 * m32c.cpu (mul.l): New. 655 (mulu.l): New. 656 6572006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 658 659 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 660 an error message otherwise. 661 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 662 Fix up comments to correctly describe the functions. 663 6642006-02-24 DJ Delorie <dj@redhat.com> 665 666 * m32c.cpu (RL_TYPE): New attribute, with macros. 667 (Lab-8-24): Add RELAX. 668 (unary-insn-defn-g, binary-arith-imm-dst-defn, 669 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 670 (binary-arith-src-dst-defn): Add 2ADDR attribute. 671 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 672 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 673 attribute. 674 (jsri16, jsri32): Add 1ADDR attribute. 675 (jsr32.w, jsr32.a): Add JUMP attribute. 676 6772006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 678 Anil Paranjape <anilp1@kpitcummins.com> 679 Shilin Shakti <shilins@kpitcummins.com> 680 681 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 682 description. 683 * xc16x.opc: New file containing supporting XC16C routines. 684 6852006-02-10 Nick Clifton <nickc@redhat.com> 686 687 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 688 6892006-01-06 DJ Delorie <dj@redhat.com> 690 691 * m32c.cpu (mov.w:q): Fix mode. 692 (push32.b.imm): Likewise, for the comment. 693 6942005-12-16 Nathan Sidwell <nathan@codesourcery.com> 695 696 Second part of ms1 to mt renaming. 697 * mt.cpu (define-arch, define-isa): Set name to mt. 698 (define-mach): Adjust. 699 * mt.opc (CGEN_ASM_HASH): Update. 700 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 701 (parse_loopsize, parse_imm16): Adjust. 702 7032005-12-13 DJ Delorie <dj@redhat.com> 704 705 * m32c.cpu (jsri): Fix order so register names aren't treated as 706 symbols. 707 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 708 indexwd, indexws): Fix encodings. 709 7102005-12-12 Nathan Sidwell <nathan@codesourcery.com> 711 712 * mt.cpu: Rename from ms1.cpu. 713 * mt.opc: Rename from ms1.opc. 714 7152005-12-06 Hans-Peter Nilsson <hp@axis.com> 716 717 * cris.cpu (simplecris-common-writable-specregs) 718 (simplecris-common-readable-specregs): Split from 719 simplecris-common-specregs. All users changed. 720 (cris-implemented-writable-specregs-v0) 721 (cris-implemented-readable-specregs-v0): Similar from 722 cris-implemented-specregs-v0. 723 (cris-implemented-writable-specregs-v3) 724 (cris-implemented-readable-specregs-v3) 725 (cris-implemented-writable-specregs-v8) 726 (cris-implemented-readable-specregs-v8) 727 (cris-implemented-writable-specregs-v10) 728 (cris-implemented-readable-specregs-v10) 729 (cris-implemented-writable-specregs-v32) 730 (cris-implemented-readable-specregs-v32): Similar. 731 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 732 insns and specializations. 733 7342005-11-08 Nathan Sidwell <nathan@codesourcery.com> 735 736 Add ms2 737 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 738 model. 739 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 740 f-cb2incr, f-rc3): New fields. 741 (LOOP): New instruction. 742 (JAL-HAZARD): New hazard. 743 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 744 New operands. 745 (mul, muli, dbnz, iflush): Enable for ms2 746 (jal, reti): Has JAL-HAZARD. 747 (ldctxt, ldfb, stfb): Only ms1. 748 (fbcb): Only ms1,ms1-003. 749 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 750 fbcbincrs, mfbcbincrs): Enable for ms2. 751 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 752 * ms1.opc (parse_loopsize): New. 753 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 754 (print_pcrel): New. 755 7562005-10-28 Dave Brolley <brolley@redhat.com> 757 758 Contribute the following change: 759 2003-09-24 Dave Brolley <brolley@redhat.com> 760 761 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 762 CGEN_ATTR_VALUE_TYPE. 763 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 764 Use cgen_bitset_intersect_p. 765 7662005-10-27 DJ Delorie <dj@redhat.com> 767 768 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 769 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 770 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 771 imm operand is needed. 772 (adjnz, sbjnz): Pass the right operands. 773 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 774 unary-insn): Add -g variants for opcodes that need to support :G. 775 (not.BW:G, push.BW:G): Call it. 776 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 777 stzx16-imm8-imm8-abs16): Fix operand typos. 778 * m32c.opc (m32c_asm_hash): Support bnCND. 779 (parse_signed4n, print_signed4n): New. 780 7812005-10-26 DJ Delorie <dj@redhat.com> 782 783 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 784 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 785 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 786 dsp8[sp] is signed. 787 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 788 (mov.BW:S r0,r1): Fix typo r1l->r1. 789 (tst): Allow :G suffix. 790 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 791 7922005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 793 794 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 795 7962005-10-25 DJ Delorie <dj@redhat.com> 797 798 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 799 making one a macro of the other. 800 8012005-10-21 DJ Delorie <dj@redhat.com> 802 803 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 804 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 805 indexld, indexls): .w variants have `1' bit. 806 (rot32.b): QI, not SI. 807 (rot32.w): HI, not SI. 808 (xchg16): HI for .w variant. 809 8102005-10-19 Nick Clifton <nickc@redhat.com> 811 812 * m32r.opc (parse_slo16): Fix bad application of previous patch. 813 8142005-10-18 Andreas Schwab <schwab@suse.de> 815 816 * m32r.opc (parse_slo16): Better version of previous patch. 817 8182005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 819 820 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 821 size. 822 8232005-07-25 DJ Delorie <dj@redhat.com> 824 825 * m32c.opc (parse_unsigned8): Add %dsp8(). 826 (parse_signed8): Add %hi8(). 827 (parse_unsigned16): Add %dsp16(). 828 (parse_signed16): Add %lo16() and %hi16(). 829 (parse_lab_5_3): Make valuep a bfd_vma *. 830 8312005-07-18 Nick Clifton <nickc@redhat.com> 832 833 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 834 components. 835 (f-lab32-jmp-s): Fix insertion sequence. 836 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 837 (Dsp-40-s8): Make parameter be signed. 838 (Dsp-40-s16): Likewise. 839 (Dsp-48-s8): Likewise. 840 (Dsp-48-s16): Likewise. 841 (Imm-13-u3): Likewise. (Despite its name!) 842 (BitBase16-16-s8): Make the parameter be unsigned. 843 (BitBase16-8-u11-S): Likewise. 844 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 845 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 846 relaxation. 847 848 * m32c.opc: Fix formatting. 849 Use safe-ctype.h instead of ctype.h 850 Move duplicated code sequences into a macro. 851 Fix compile time warnings about signedness mismatches. 852 Remove dead code. 853 (parse_lab_5_3): New parser function. 854 8552005-07-16 Jim Blandy <jimb@redhat.com> 856 857 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 858 to represent isa sets. 859 8602005-07-15 Jim Blandy <jimb@redhat.com> 861 862 * m32c.cpu, m32c.opc: Fix copyright. 863 8642005-07-14 Jim Blandy <jimb@redhat.com> 865 866 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 867 8682005-07-14 Alan Modra <amodra@bigpond.net.au> 869 870 * ms1.opc (print_dollarhex): Correct format string. 871 8722005-07-06 Alan Modra <amodra@bigpond.net.au> 873 874 * iq2000.cpu: Include from binutils cpu dir. 875 8762005-07-05 Nick Clifton <nickc@redhat.com> 877 878 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 879 unsigned in order to avoid compile time warnings about sign 880 conflicts. 881 882 * ms1.opc (parse_*): Likewise. 883 (parse_imm16): Use a "void *" as it is passed both signed and 884 unsigned arguments. 885 8862005-07-01 Nick Clifton <nickc@redhat.com> 887 888 * frv.opc: Update to ISO C90 function declaration style. 889 * iq2000.opc: Likewise. 890 * m32r.opc: Likewise. 891 * sh.opc: Likewise. 892 8932005-06-15 Dave Brolley <brolley@redhat.com> 894 895 Contributed by Red Hat. 896 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 897 * ms1.opc: New file. Written by Stan Cox. 898 8992005-05-10 Nick Clifton <nickc@redhat.com> 900 901 * Update the address and phone number of the FSF organization in 902 the GPL notices in the following files: 903 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 904 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 905 sh64-media.cpu, simplify.inc 906 9072005-02-24 Alan Modra <amodra@bigpond.net.au> 908 909 * frv.opc (parse_A): Warning fix. 910 9112005-02-23 Nick Clifton <nickc@redhat.com> 912 913 * frv.opc: Fixed compile time warnings about differing signed'ness 914 of pointers passed to functions. 915 * m32r.opc: Likewise. 916 9172005-02-11 Nick Clifton <nickc@redhat.com> 918 919 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 920 'bfd_vma *' in order avoid compile time warning message. 921 9222005-01-28 Hans-Peter Nilsson <hp@axis.com> 923 924 * cris.cpu (mstep): Add missing insn. 925 9262005-01-25 Alexandre Oliva <aoliva@redhat.com> 927 928 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 929 * frv.cpu: Add support for TLS annotations in loads and calll. 930 * frv.opc (parse_symbolic_address): New. 931 (parse_ldd_annotation): New. 932 (parse_call_annotation): New. 933 (parse_ld_annotation): New. 934 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 935 Introduce TLS relocations. 936 (parse_d12, parse_s12, parse_u12): Likewise. 937 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 938 (parse_call_label, print_at): New. 939 9402004-12-21 Mikael Starvik <starvik@axis.com> 941 942 * cris.cpu (cris-set-mem): Correct integral write semantics. 943 9442004-11-29 Hans-Peter Nilsson <hp@axis.com> 945 946 * cris.cpu: New file. 947 9482004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 949 950 * iq2000.cpu: Added quotes around macro arguments so that they 951 will work with newer versions of guile. 952 9532004-10-27 Nick Clifton <nickc@redhat.com> 954 955 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 956 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 957 operand. 958 * iq2000.cpu (dnop index): Rename to _index to avoid complications 959 with guile. 960 9612004-08-27 Richard Sandiford <rsandifo@redhat.com> 962 963 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 964 9652004-05-15 Nick Clifton <nickc@redhat.com> 966 967 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 968 9692004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 970 971 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 972 9732004-03-01 Richard Sandiford <rsandifo@redhat.com> 974 975 * frv.cpu (define-arch frv): Add fr450 mach. 976 (define-mach fr450): New. 977 (define-model fr450): New. Add profile units to every fr450 insn. 978 (define-attr UNIT): Add MDCUTSSI. 979 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 980 (define-attr AUDIO): New boolean. 981 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 982 (f-LRA-null, f-TLBPR-null): New fields. 983 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 984 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 985 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 986 (LRA-null, TLBPR-null): New macros. 987 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 988 (load-real-address): New macro. 989 (lrai, lrad, tlbpr): New instructions. 990 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 991 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 992 (mdcutssi): Change UNIT attribute to MDCUTSSI. 993 (media-low-clear-semantics, media-scope-limit-semantics) 994 (media-quad-limit, media-quad-shift): New macros. 995 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 996 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 997 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 998 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 999 (fr450_unit_mapping): New array. 1000 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 1001 for new MDCUTSSI unit. 1002 (fr450_check_insn_major_constraints): New function. 1003 (check_insn_major_constraints): Use it. 1004 10052004-03-01 Richard Sandiford <rsandifo@redhat.com> 1006 1007 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 1008 (scutss): Change unit to I0. 1009 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 1010 (mqsaths): Fix FR400-MAJOR categorization. 1011 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 1012 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 1013 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 1014 combinations. 1015 10162004-03-01 Richard Sandiford <rsandifo@redhat.com> 1017 1018 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 1019 (rstb, rsth, rst, rstd, rstq): Delete. 1020 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 1021 10222004-02-23 Nick Clifton <nickc@redhat.com> 1023 1024 * Apply these patches from Renesas: 1025 1026 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1027 1028 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 1029 disassembling codes for 0x*2 addresses. 1030 1031 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1032 1033 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 1034 1035 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1036 1037 * cpu/m32r.cpu : Add new model m32r2. 1038 Add new instructions. 1039 Replace occurrances of 'Mitsubishi' with 'Renesas'. 1040 Changed PIPE attr of push from O to OS. 1041 Care for Little-endian of M32R. 1042 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 1043 Care for Little-endian of M32R. 1044 (parse_slo16): signed extension for value. 1045 10462004-02-20 Andrew Cagney <cagney@redhat.com> 1047 1048 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 1049 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 1050 1051 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 1052 written by Ben Elliston. 1053 10542004-01-14 Richard Sandiford <rsandifo@redhat.com> 1055 1056 * frv.cpu (UNIT): Add IACC. 1057 (iacc-multiply-r-r): Use it. 1058 * frv.opc (fr400_unit_mapping): Add entry for IACC. 1059 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 1060 10612004-01-06 Alexandre Oliva <aoliva@redhat.com> 1062 1063 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 1064 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 1065 cut&paste errors in shifting/truncating numerical operands. 1066 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 1067 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 1068 (parse_uslo16): Likewise. 1069 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 1070 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 1071 (parse_s12): Likewise. 1072 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 1073 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 1074 (parse_uslo16): Likewise. 1075 (parse_uhi16): Parse gothi and gotfuncdeschi. 1076 (parse_d12): Parse got12 and gotfuncdesc12. 1077 (parse_s12): Likewise. 1078 10792003-10-10 Dave Brolley <brolley@redhat.com> 1080 1081 * frv.cpu (dnpmop): New p-macro. 1082 (GRdoublek): Use dnpmop. 1083 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 1084 (store-double-r-r): Use (.sym regtype doublek). 1085 (r-store-double): Ditto. 1086 (store-double-r-r-u): Ditto. 1087 (conditional-store-double): Ditto. 1088 (conditional-store-double-u): Ditto. 1089 (store-double-r-simm): Ditto. 1090 (fmovs): Assign to UNIT FMALL. 1091 10922003-10-06 Dave Brolley <brolley@redhat.com> 1093 1094 * frv.cpu, frv.opc: Add support for fr550. 1095 10962003-09-24 Dave Brolley <brolley@redhat.com> 1097 1098 * frv.cpu (u-commit): New modelling unit for fr500. 1099 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 1100 (commit-r): Use u-commit model for fr500. 1101 (commit): Ditto. 1102 (conditional-float-binary-op): Take profiling data as an argument. 1103 Update callers. 1104 (ne-float-binary-op): Ditto. 1105 11062003-09-19 Michael Snyder <msnyder@redhat.com> 1107 1108 * frv.cpu (nldqi): Delete unimplemented instruction. 1109 11102003-09-12 Dave Brolley <brolley@redhat.com> 1111 1112 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 1113 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 1114 frv_ref_SI to get input register referenced for profiling. 1115 (clear-ne-flag-all): Pass insn profiling in as an argument. 1116 (clrgr,clrfr,clrga,clrfa): Add profiling information. 1117 11182003-09-11 Michael Snyder <msnyder@redhat.com> 1119 1120 * frv.cpu: Typographical corrections. 1121 11222003-09-09 Dave Brolley <brolley@redhat.com> 1123 1124 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 1125 (conditional-media-dual-complex, media-quad-complex): Likewise. 1126 11272003-09-04 Dave Brolley <brolley@redhat.com> 1128 1129 * frv.cpu (register-transfer): Pass in all attributes in on argument. 1130 Update all callers. 1131 (conditional-register-transfer): Ditto. 1132 (cache-preload): Ditto. 1133 (floating-point-conversion): Ditto. 1134 (floating-point-neg): Ditto. 1135 (float-abs): Ditto. 1136 (float-binary-op-s): Ditto. 1137 (conditional-float-binary-op): Ditto. 1138 (ne-float-binary-op): Ditto. 1139 (float-dual-arith): Ditto. 1140 (ne-float-dual-arith): Ditto. 1141 11422003-09-03 Dave Brolley <brolley@redhat.com> 1143 1144 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 1145 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 1146 MCLRACC-1. 1147 (A): Removed operand. 1148 (A0,A1): New operands replace operand A. 1149 (mnop): Now a real insn 1150 (mclracc): Removed insn. 1151 (mclracc-0, mclracc-1): New insns replace mclracc. 1152 (all insns): Use new UNIT attributes. 1153 11542003-08-21 Nick Clifton <nickc@redhat.com> 1155 1156 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 1157 and u-media-dual-btoh with output parameter. 1158 (cmbtoh): Add profiling hack. 1159 11602003-08-19 Michael Snyder <msnyder@redhat.com> 1161 1162 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 1163 11642003-06-10 Doug Evans <dje@sebabeach.org> 1165 1166 * frv.cpu: Add IDOC attribute. 1167 11682003-06-06 Andrew Cagney <cagney@redhat.com> 1169 1170 Contributed by Red Hat. 1171 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 1172 Stan Cox, and Frank Ch. Eigler. 1173 * iq2000.opc: New file. Written by Ben Elliston, Frank 1174 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 1175 * iq2000m.cpu: New file. Written by Jeff Johnston. 1176 * iq10.cpu: New file. Written by Jeff Johnston. 1177 11782003-06-05 Nick Clifton <nickc@redhat.com> 1179 1180 * frv.cpu (FRintieven): New operand. An even-numbered only 1181 version of the FRinti operand. 1182 (FRintjeven): Likewise for FRintj. 1183 (FRintkeven): Likewise for FRintk. 1184 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 1185 media-quad-arith-sat-semantics, media-quad-arith-sat, 1186 conditional-media-quad-arith-sat, mdunpackh, 1187 media-quad-multiply-semantics, media-quad-multiply, 1188 conditional-media-quad-multiply, media-quad-complex-i, 1189 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 1190 conditional-media-quad-multiply-acc, munpackh, 1191 media-quad-multiply-cross-acc-semantics, mdpackh, 1192 media-quad-multiply-cross-acc, mbtoh-semantics, 1193 media-quad-cross-multiply-cross-acc-semantics, 1194 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 1195 media-quad-cross-multiply-acc-semantics, cmbtoh, 1196 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 1197 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 1198 cmhtob): Use new operands. 1199 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 1200 (parse_even_register): New function. 1201 12022003-06-03 Nick Clifton <nickc@redhat.com> 1203 1204 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 1205 immediate value not unsigned. 1206 12072003-06-03 Andrew Cagney <cagney@redhat.com> 1208 1209 Contributed by Red Hat. 1210 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 1211 and Eric Christopher. 1212 * frv.opc: New file. Written by Catherine Moore, and Dave 1213 Brolley. 1214 * simplify.inc: New file. Written by Doug Evans. 1215 12162003-05-02 Andrew Cagney <cagney@redhat.com> 1217 1218 * New file. 1219 1220 1221Copyright (C) 2003-2012 Free Software Foundation, Inc. 1222 1223Copying and distribution of this file, with or without modification, 1224are permitted in any medium without royalty provided the copyright 1225notice and this notice are preserved. 1226 1227Local Variables: 1228mode: change-log 1229left-margin: 8 1230fill-column: 74 1231version-control: never 1232End: 1233