1 /* $NetBSD: pthread_md.h,v 1.13 2023/05/25 14:30:02 riastradh Exp $ */
2
3 /*
4 * Copyright (c) 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #ifndef _LIB_PTHREAD_ARM_MD_H
39 #define _LIB_PTHREAD_ARM_MD_H
40
41 static inline unsigned long
pthread__sp(void)42 pthread__sp(void)
43 {
44 unsigned long ret;
45
46 __asm volatile("mov %0, sp"
47 : "=r" (ret));
48
49 return (ret);
50 }
51
52 #if defined(__thumb__) && defined(_ARM_ARCH_6)
53 #define pthread__smt_wait() __asm __volatile(".inst.n 0xbf20") /* wfe */
54 #define pthread__smt_wake() __asm __volatile(".inst.n 0xbf40") /* sev */
55 #elif !defined(__thumb__)
56 #define pthread__smt_wait() __asm __volatile(".inst 0xe320f002") /* wfe */
57 #define pthread__smt_wake() __asm __volatile(".inst 0xe320f004") /* sev */
58 #else
59 #define pthread__smt_wait() __nothing
60 #define pthread__smt_wake() __nothing
61 #endif
62
63 #define pthread__uc_sp(ucp) ((ucp)->uc_mcontext.__gregs[_REG_SP])
64
65 /*
66 * Set initial, sane values for registers whose values aren't just
67 * "don't care".
68 */
69 /* Set CPSR to PSR_USR32_MODE (0x10) from arm/armreg.h */
70 #define _INITCONTEXT_U_MD(ucp) \
71 (ucp)->uc_mcontext.__gregs[_REG_CPSR] = 0x10;
72
73 #endif /* _LIB_PTHREAD_ARM_MD_H */
74