1 /* $NetBSD: if_cs.c,v 1.13 2022/05/29 10:47:39 andvar Exp $ */
2
3 /*
4 * Copyright (c) 2004 Christopher Gilbert
5 * All rights reserved.
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27 /*
28 * Copyright 1997
29 * Digital Equipment Corporation. All rights reserved.
30 *
31 * This software is furnished under license and may be used and
32 * copied only in accordance with the following terms and conditions.
33 * Subject to these conditions, you may download, copy, install,
34 * use, modify and distribute this software in source and/or binary
35 * form. No title or ownership is transferred hereby.
36 *
37 * 1) Any source code used, modified or distributed must reproduce
38 * and retain this copyright notice and list of conditions as
39 * they appear in the source file.
40 *
41 * 2) No right is granted to use any trade name, trademark, or logo of
42 * Digital Equipment Corporation. Neither the "Digital Equipment
43 * Corporation" name nor any trademark or logo of Digital Equipment
44 * Corporation may be used to endorse or promote products derived
45 * from this software without the prior written permission of
46 * Digital Equipment Corporation.
47 *
48 * 3) This software is provided "AS-IS" and any express or implied
49 * warranties, including but not limited to, any implied warranties
50 * of merchantability, fitness for a particular purpose, or
51 * non-infringement are disclaimed. In no event shall DIGITAL be
52 * liable for any damages whatsoever, and in particular, DIGITAL
53 * shall not be liable for special, indirect, consequential, or
54 * incidental damages or damages for lost profits, loss of
55 * revenue or loss of use, whether such damages arise in contract,
56 * negligence, tort, under statute, in equity, at law or otherwise,
57 * even if advised of the possibility of such damage.
58 */
59
60 #include <sys/cdefs.h>
61 __KERNEL_RCSID(0, "$NetBSD: if_cs.c,v 1.13 2022/05/29 10:47:39 andvar Exp $");
62
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/socket.h>
66 #include <sys/device.h>
67 #include <sys/bus.h>
68
69 #include <net/if.h>
70 #include <net/if_ether.h>
71 #include <net/if_media.h>
72
73 #include <machine/intr.h>
74
75 #include <acorn32/eb7500atx/rsbus.h>
76
77 #include <dev/ic/cs89x0reg.h>
78 #include <dev/ic/cs89x0var.h>
79
80 /*
81 * the CS network interface is accessed at the following address locations:
82 * 030104f1 CS8920 PNP Low
83 * 03010600 03010640 CS8920 Default I/O registers
84 * 030114f1 CS8920 PNP High
85 * 03014000 03016000 CS8920 Default Memory
86 *
87 * IRQ is mapped as:
88 * CS8920 IRQ 3 INT5
89 *
90 * It must be configured as the following:
91 * The CS8920 PNP address should be configured for ISA base at 0x300
92 * to achieve the default register mapping as specified.
93 * Note memory addresses are all have bit 23 tied high in hardware.
94 * This only effects the value programmed into the CS8920 memory offset
95 * registers.
96 *
97 * Just to add to the fun the I/O registers are laid out as:
98 * xxxxR1R0
99 * xxxxR3R2
100 * xxxxR5R4
101 *
102 * This works fine for 16bit accesses, but it makes access to single
103 * register hard (which does happen on a reset, as we've got to toggle
104 * the chip into 16bit mode)
105 *
106 * Network DRQ is connected to DRQ5
107 */
108
109 /*
110 * make a private tag so that we can use rsbus's map/unmap
111 */
112 static struct bus_space cs_rsbus_bs_tag;
113
114 int cs_rsbus_probe(device_t, cfdata_t, void *);
115 void cs_rsbus_attach(device_t, device_t, void *);
116
117 static uint8_t cs_rbus_read_1(struct cs_softc *, bus_size_t);
118
119 CFATTACH_DECL_NEW(cs_rsbus, sizeof(struct cs_softc),
120 cs_rsbus_probe, cs_rsbus_attach, NULL, NULL);
121
122 /* Available media */
123 int cs_rbus_media [] = {
124 IFM_ETHER | IFM_10_T | IFM_FDX,
125 IFM_ETHER | IFM_10_T
126 };
127
128 int
cs_rsbus_probe(device_t parent,cfdata_t cf,void * aux)129 cs_rsbus_probe(device_t parent, cfdata_t cf, void *aux)
130 {
131 /* For now it'll always attach */
132 return 1;
133 }
134
135 void
cs_rsbus_attach(device_t parent,device_t self,void * aux)136 cs_rsbus_attach(device_t parent, device_t self, void *aux)
137 {
138 struct cs_softc *sc = device_private(self);
139 struct rsbus_attach_args *rs = aux;
140 u_int iobase;
141
142 sc->sc_dev = self;
143
144 /* Member copy */
145 cs_rsbus_bs_tag = *rs->sa_iot;
146
147 /* Registers are normally accessed in pairs, on a 4 byte aligned */
148 cs_rsbus_bs_tag.bs_cookie = (void *)1;
149
150 sc->sc_iot = sc->sc_memt = &cs_rsbus_bs_tag;
151
152 #if 0 /* Do DMA later */
153 if (ia->ia_ndrq > 0)
154 isc->sc_drq = ia->ia_drq[0].ir_drq;
155 else
156 isc->sc_drq = -1;
157 #endif
158
159 /* Device always interrupts on 3 but that routes to IRQ 5 */
160 sc->sc_irq = 3;
161
162 printf("\n");
163
164 /* Map the device. */
165 iobase = 0x03010600;
166 if (bus_space_map(sc->sc_iot, iobase, CS8900_IOSIZE * 4,
167 0, &sc->sc_ioh)) {
168 printf("%s: unable to map i/o space\n", device_xname(self));
169 return;
170 }
171
172 #if 0
173 if (bus_space_map(sc->sc_memt, iobase + 0x3A00,
174 CS8900_MEMSIZE * 4, 0, &sc->sc_memh)) {
175 printf("%s: unable to map memory space\n", device_xname(self));
176 } else {
177 sc->sc_cfgflags |= CFGFLG_MEM_MODE | CFGFLG_USE_SA;
178 sc->sc_pktpgaddr = 1<<23;
179 //(0x4000 >> 1) | (1<<23);
180 }
181 #endif
182 sc->sc_ih = intr_claim(IRQ_INT5, IPL_NET, "cs", cs_intr, sc);
183 if (sc->sc_ih == NULL) {
184 printf("%s: unable to establish interrupt\n",
185 device_xname(sc->sc_dev));
186 return;
187 }
188
189 /* DMA is for later */
190 sc->sc_dma_chipinit = NULL;
191 sc->sc_dma_attach = NULL;
192 sc->sc_dma_process_rx = NULL;
193
194 sc->sc_cfgflags |= CFGFLG_PARSE_EEPROM;
195 sc->sc_io_read_1 = cs_rbus_read_1;
196
197 /*
198 * Also provide media, otherwise it attempts to read the media from
199 * the EEPROM, which again fails
200 */
201 cs_attach(sc, NULL, cs_rbus_media, __arraycount(cs_rbus_media),
202 IFM_ETHER | IFM_10_T | IFM_FDX);
203 }
204
205 /*
206 * Provide a function to correctly do reading from oddly numbered registers
207 * as you can't simply shift the register number
208 */
209 static uint8_t
cs_rbus_read_1(struct cs_softc * sc,bus_size_t a)210 cs_rbus_read_1(struct cs_softc *sc, bus_size_t a)
211 {
212 bus_size_t offset;
213
214 /* If it's an even address then just use the bus_space_read_1 */
215 if ((a & 1) == 0)
216 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, a);
217
218 /*
219 * Otherwise we've get to work out the aligned address and then add
220 * one
221 */
222 offset = (a & ~1) << 1;
223 offset++;
224
225 /* And read it, with no shift (cookie is 0) */
226 return sc->sc_iot->bs_r_1(0, (sc)->sc_ioh, offset);
227 }
228