xref: /netbsd/sys/arch/evbppc/virtex/dev/tft_ll.c (revision 60a8b3b4)
1 /* 	$NetBSD: tft_ll.c,v 1.5 2021/03/29 13:14:13 rin Exp $ */
2 
3 /*
4  * Copyright (c) 2006 Jachym Holecek
5  * All rights reserved.
6  *
7  * Written for DFC Design, s.r.o.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  *
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tft_ll.c,v 1.5 2021/03/29 13:14:13 rin Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/mbuf.h>
38 #include <sys/kernel.h>
39 #include <sys/socket.h>
40 #include <sys/ioctl.h>
41 #include <sys/device.h>
42 #include <sys/queue.h>
43 
44 #include <uvm/uvm_extern.h>
45 
46 #include <sys/bus.h>
47 
48 /* XXX needed? */
49 #include <dev/wscons/wsdisplayvar.h>
50 #include <dev/wscons/wsconsio.h>
51 #include <dev/rasops/rasops.h>
52 #include <dev/wscons/wsdisplay_vconsvar.h>
53 
54 #include <evbppc/virtex/dev/xcvbusvar.h>
55 #include <evbppc/virtex/dev/cdmacreg.h>
56 #include <evbppc/virtex/dev/tftreg.h>
57 #include <evbppc/virtex/dev/tftvar.h>
58 
59 
60 struct ll_tft_control {
61 	struct cdmac_descr      cd_dsc;
62 	u_char                  cd_img[];
63 };
64 
65 CTASSERT(offsetof(struct ll_tft_control, cd_img) == sizeof(struct cdmac_descr));
66 
67 struct ll_tft_softc {
68 	struct tft_softc 	lsc_sc;
69 
70 	bus_space_tag_t 	lsc_dma_iot;
71 	bus_space_handle_t 	lsc_dma_ioh;
72 
73 	bus_dma_tag_t 		lsc_dmat;
74 	bus_dmamap_t 		lsc_dmap;
75 
76 	struct ll_tft_control 	*lsc_cd;
77 	bus_dma_segment_t 	lsc_seg;
78 };
79 
80 static void 	ll_tft_attach(device_t, device_t, void *);
81 static paddr_t 	ll_tft_mmap(void *, void *, off_t, int);
82 static void 	ll_tft_shutdown(void *);
83 
84 CFATTACH_DECL_NEW(ll_tft, sizeof(struct ll_tft_softc),
85     xcvbus_child_match, ll_tft_attach, NULL, NULL);
86 
87 
88 static struct wsdisplay_accessops ll_tft_accessops = {
89 	.mmap 			= ll_tft_mmap,
90 };
91 
92 
93 static void
ll_tft_attach(device_t parent,device_t self,void * aux)94 ll_tft_attach(device_t parent, device_t self, void *aux)
95 {
96 	struct xcvbus_attach_args *vaa = aux;
97 	struct ll_dmac 		*tx = vaa->vaa_tx_dmac;
98 	struct ll_tft_softc 	*lsc = device_private(self);
99 	struct tft_softc 	*sc = &lsc->lsc_sc;
100 	int 			nseg, error;
101 
102 	KASSERT(tx);
103 
104 	lsc->lsc_dma_iot 	= tx->dmac_iot;
105 	lsc->lsc_dmat 		= vaa->vaa_dmat;
106 	sc->sc_iot 		= vaa->vaa_iot;
107 	sc->sc_dev		= self;
108 
109 	aprint_normal(": LL_TFT\n");
110 
111 	if ((error = bus_space_map(sc->sc_iot, vaa->vaa_addr, TFT_SIZE,
112 	    0, &sc->sc_ioh)) != 0) {
113 	    	aprint_error_dev(self, "could not map device registers\n");
114 	    	goto fail_0;
115 	}
116 	if ((error = bus_space_map(lsc->lsc_dma_iot, tx->dmac_ctrl_addr,
117 	    CDMAC_CTRL_SIZE, 0, &lsc->lsc_dma_ioh)) != 0) {
118 		aprint_error_dev(self, "could not map dmac registers\n");
119 		goto fail_1;
120 	}
121 
122 	/* Fill in resolution, depth, size. */
123 	tft_mode(sc->sc_dev);
124 
125 	/* Allocate and map framebuffer control data. */
126 	if ((error = bus_dmamem_alloc(lsc->lsc_dmat,
127 	    sizeof(struct ll_tft_control) + sc->sc_size, 8, 0,
128 	    &lsc->lsc_seg, 1, &nseg, 0)) != 0) {
129 	    	aprint_error_dev(self, "could not allocate framebuffer\n");
130 		goto fail_2;
131 	}
132 	if ((error = bus_dmamem_map(lsc->lsc_dmat, &lsc->lsc_seg, nseg,
133 	    sizeof(struct ll_tft_control) + sc->sc_size,
134 	    (void **)&lsc->lsc_cd, BUS_DMA_COHERENT)) != 0) {
135 	    	aprint_error_dev(self, "could not map framebuffer\n");
136 		goto fail_3;
137 	}
138 	if ((error = bus_dmamap_create(lsc->lsc_dmat,
139 	    sizeof(struct ll_tft_control) + sc->sc_size, 1,
140 	    sizeof(struct ll_tft_control) + sc->sc_size, 0, 0,
141 	    &lsc->lsc_dmap)) != 0) {
142 	    	aprint_error_dev(self, "could not create framebuffer DMA map\n");
143 		goto fail_4;
144 	}
145 	if ((error = bus_dmamap_load(lsc->lsc_dmat, lsc->lsc_dmap, lsc->lsc_cd,
146 	    sizeof(struct ll_tft_control) + sc->sc_size, NULL, 0)) != 0) {
147 	    	aprint_error_dev(self, "could not load framebuffer DMA map\n");
148 		goto fail_5;
149 	}
150 
151 	/* Clear screen, setup descriptor. */
152 	memset(lsc->lsc_cd, 0x00, sizeof(struct ll_tft_control));
153 	sc->sc_image = lsc->lsc_cd->cd_img;
154 
155 	lsc->lsc_cd->cd_dsc.desc_next = lsc->lsc_dmap->dm_segs[0].ds_addr;
156 	lsc->lsc_cd->cd_dsc.desc_addr = lsc->lsc_dmap->dm_segs[0].ds_addr +
157 	    offsetof(struct ll_tft_control, cd_img);
158 	lsc->lsc_cd->cd_dsc.desc_size = sc->sc_size;
159 	lsc->lsc_cd->cd_dsc.desc_stat = CDMAC_STAT_SOP;
160 
161 	bus_dmamap_sync(lsc->lsc_dmat, lsc->lsc_dmap, 0,
162 	    sizeof(struct ll_tft_control) + sc->sc_size,
163 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
164 
165 	sc->sc_sdhook = shutdownhook_establish(ll_tft_shutdown, sc);
166 	if (sc->sc_sdhook == NULL)
167 		aprint_error_dev(self,
168 		    "WARNING: unable to establish shutdown hook\n");
169 
170 	tft_attach(self, &ll_tft_accessops);
171 
172 	aprint_normal_dev(self, "video memory pa 0x%08x\n",
173 	    (uint32_t)lsc->lsc_cd->cd_dsc.desc_addr);
174 
175 	/* Timing sensitive... */
176 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_RESET);
177 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, TFT_CTRL, CTRL_ENABLE);
178 	bus_space_write_4(lsc->lsc_dma_iot, lsc->lsc_dma_ioh, CDMAC_CURDESC,
179 	    lsc->lsc_dmap->dm_segs[0].ds_addr);
180 
181 	return ;
182 
183  fail_5:
184  	bus_dmamap_destroy(lsc->lsc_dmat, lsc->lsc_dmap);
185  fail_4:
186  	bus_dmamem_unmap(lsc->lsc_dmat, (void *)lsc->lsc_cd,
187  	    sizeof(struct ll_tft_control) + sc->sc_size);
188  fail_3:
189  	bus_dmamem_free(lsc->lsc_dmat, &lsc->lsc_seg, nseg);
190  fail_2:
191 	bus_space_unmap(lsc->lsc_dma_iot, lsc->lsc_dma_ioh, CDMAC_CTRL_SIZE);
192  fail_1:
193 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, TFT_SIZE);
194  fail_0:
195 	aprint_error_dev(self, "error %d\n", error);
196 }
197 
198 static paddr_t
ll_tft_mmap(void * arg,void * scr,off_t offs,int prot)199 ll_tft_mmap(void *arg, void *scr, off_t offs, int prot)
200 {
201 	struct ll_tft_softc 	*lsc = arg;
202 	paddr_t 		pa;
203 
204 	if (offs < lsc->lsc_sc.sc_size) {
205 		pa = bus_dmamem_mmap(lsc->lsc_dmat, &lsc->lsc_seg, 1,
206 		    offs + offsetof(struct ll_tft_control, cd_img),
207 		    prot, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
208 
209 		return (pa);
210 	}
211 
212 	return (-1);
213 }
214 
215 static void
ll_tft_shutdown(void * arg)216 ll_tft_shutdown(void *arg)
217 {
218 	struct ll_tft_softc 	*lsc = arg;
219 
220 	bus_space_write_4(lsc->lsc_dma_iot, lsc->lsc_dma_ioh, 0,
221 	    CDMAC_STAT_RESET);
222 
223 	tft_shutdown(&lsc->lsc_sc);
224 }
225