xref: /netbsd/sys/arch/mips/cavium/octeon_dma.c (revision 5fbbc8cb)
1 /*	$NetBSD: octeon_dma.c,v 1.3 2019/12/15 16:48:26 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Platform-specific DMA support for the MIPS OCTEON.  Copied from MALTA code.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: octeon_dma.c,v 1.3 2019/12/15 16:48:26 tsutsui Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 
42 #include <mips/cpuregs.h>
43 
44 #define	_MIPS_BUS_DMA_PRIVATE
45 #include <sys/bus.h>
46 
47 #include <mips/cavium/octeonvar.h>
48 
49 void
octeon_dma_init(struct octeon_config * mcp)50 octeon_dma_init(struct octeon_config *mcp)
51 {
52 	bus_dma_tag_t t;
53 
54 	/* XXX need 32bit tag? */
55 	t = &mcp->mc_iobus_dmat;
56 	t->_cookie = mcp;
57 	t->_wbase = 0;
58 	t->_bounce_alloc_lo = 0;
59 	t->_bounce_alloc_hi = 0;
60 	t->_dmamap_ops = mips_bus_dmamap_ops;
61 	t->_dmamem_ops = mips_bus_dmamem_ops;
62 	t->_dmatag_ops = mips_bus_dmatag_ops;
63 
64 	/* XXX struct copy */
65 	mcp->mc_bootbus_dmat = mcp->mc_iobus_dmat;
66 	mcp->mc_core1_dmat = mcp->mc_iobus_dmat;
67 	mcp->mc_fpa_dmat = mcp->mc_iobus_dmat;
68 
69 #ifdef __mips_n32
70 	mcp->mc_fpa_dmat._bounce_alloc_hi = round_page(MIPS_PHYS_MASK);
71 #endif
72 }
73