1 /* $NetBSD: bus.h,v 1.23 2021/04/23 06:15:16 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Per Fogelstrom. All rights reserved. 35 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #ifndef _MIPSCO_BUS_H_ 65 #define _MIPSCO_BUS_H_ 66 #ifdef _KERNEL 67 68 #include <mips/locore.h> 69 70 #ifdef BUS_SPACE_DEBUG 71 #include <sys/systm.h> /* for printf() prototype */ 72 /* 73 * Macros for checking the aligned-ness of pointers passed to bus 74 * space ops. Strict alignment is required by the MIPS architecture, 75 * and a trap will occur if unaligned access is performed. These 76 * may aid in the debugging of a broken device driver by displaying 77 * useful information about the problem. 78 */ 79 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 80 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 81 82 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 83 ({ \ 84 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 85 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 86 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 87 } \ 88 (void) 0; \ 89 }) 90 91 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 92 #else 93 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 94 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 95 #endif /* BUS_SPACE_DEBUG */ 96 97 /* 98 * Bus address and size types 99 */ 100 typedef u_long bus_addr_t; 101 typedef u_long bus_size_t; 102 103 #define PRIxBUSADDR "lx" 104 #define PRIxBUSSIZE "lx" 105 #define PRIuBUSSIZE "lu" 106 107 /* 108 * Access methods for bus resources and address space. 109 */ 110 typedef u_int32_t bus_space_handle_t; 111 112 #define PRIxBSH "lx" 113 114 typedef struct mipsco_bus_space *bus_space_tag_t; 115 116 struct mipsco_bus_space { 117 const char *bs_name; 118 struct extent *bs_extent; 119 bus_addr_t bs_start; 120 bus_size_t bs_size; 121 122 paddr_t bs_pbase; 123 vaddr_t bs_vbase; 124 125 u_int8_t bs_stride; /* log2(stride) */ 126 u_int8_t bs_bswap; /* byte swap in stream methods */ 127 128 u_int8_t bs_offset_1; 129 u_int8_t bs_offset_2; 130 u_int8_t bs_offset_4; 131 u_int8_t bs_offset_8; 132 133 /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */ 134 int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t, 135 bus_size_t, int, bus_space_handle_t *); 136 137 /* dispose a bus_space handle (MD) */ 138 int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t, 139 bus_size_t); 140 141 /* convert bus_space tag/handle to physical address (MD) */ 142 int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t, 143 paddr_t *); 144 145 /* mapping/unmapping */ 146 int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int, 147 bus_space_handle_t *); 148 void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t, 149 bus_size_t); 150 int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t, 151 bus_size_t, bus_size_t, bus_space_handle_t *); 152 paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int); 153 154 155 /* allocation/deallocation */ 156 int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, 157 bus_size_t, bus_size_t, bus_size_t, int, 158 bus_addr_t *, bus_space_handle_t *); 159 void (*bs_free)(bus_space_tag_t, bus_space_handle_t, 160 bus_size_t); 161 162 /* interrupt attach */ 163 void (*bs_intr_establish)( 164 bus_space_tag_t, 165 int, /*bus-specific intr*/ 166 int, /*priority/class*/ 167 int, /*flags*/ 168 int (*)(void *), /*handler*/ 169 void *); /*handler arg*/ 170 171 void *bs_aux; 172 }; 173 174 /* vaddr_t argument of mipsco_bus_space_init() */ 175 #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0) 176 177 /* machine dependent utility function for bus_space users */ 178 void mipsco_bus_space_malloc_set_safe(void); 179 void mipsco_bus_space_init(bus_space_tag_t, const char *, 180 paddr_t, vaddr_t, bus_addr_t, bus_size_t); 181 void mipsco_bus_space_init_extent(bus_space_tag_t, void *, size_t); 182 void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int); 183 void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *, 184 paddr_t, bus_addr_t, bus_size_t); 185 void mipsco_large_bus_space_init(bus_space_tag_t, const char *, 186 paddr_t, bus_addr_t, bus_size_t); 187 188 /* machine dependent utility function for bus_space implementations */ 189 int mipsco_bus_space_extent_malloc_flag(void); 190 191 /* these are provided for subclasses which override base bus_space. */ 192 193 int mipsco_bus_space_compose_handle(bus_space_tag_t, 194 bus_addr_t, bus_size_t, int, bus_space_handle_t *); 195 int mipsco_bus_space_dispose_handle(bus_space_tag_t, 196 bus_space_handle_t, bus_size_t); 197 int mipsco_bus_space_paddr(bus_space_tag_t, 198 bus_space_handle_t, paddr_t *); 199 200 int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t, 201 bus_addr_t, bus_size_t, int, bus_space_handle_t *); 202 int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t, 203 bus_space_handle_t, bus_size_t); 204 int mipsco_sparse_bus_space_paddr(bus_space_tag_t, 205 bus_space_handle_t, paddr_t *); 206 207 int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 208 bus_space_handle_t *); 209 void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t, 210 bus_size_t); 211 int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t, 212 bus_size_t, bus_size_t, bus_space_handle_t *); 213 paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t, 214 int, int); 215 int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, 216 bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, 217 bus_space_handle_t *); 218 #define mipsco_bus_space_free mipsco_bus_space_unmap 219 220 /* 221 * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr, 222 * bus_size_t size, int flags, bus_space_handle_t *bshp); 223 * 224 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 225 * Compose a bus_space handle from tag/handle/addr/size/flags. 226 * A helper function for bus_space_map()/bus_space_alloc() implementation. 227 */ 228 #define bus_space_compose_handle(bst, addr, size, flags, bshp) \ 229 (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp) 230 231 /* 232 * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr, 233 * bus_space_handle_t bsh, bus_size_t size); 234 * 235 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 236 * Dispose a bus_space handle. 237 * A helper function for bus_space_unmap()/bus_space_free() implementation. 238 */ 239 #define bus_space_dispose_handle(bst, bsh, size) \ 240 (*(bst)->bs_dispose_handle)(bst, bsh, size) 241 242 /* 243 * int bus_space_paddr(bus_space_tag_t tag, 244 * bus_space_handle_t bsh, paddr_t *pap); 245 * 246 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE: 247 * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha) 248 * Return physical address of a region. 249 * A helper function for device mmap entry. 250 */ 251 #define bus_space_paddr(bst, bsh, pap) \ 252 (*(bst)->bs_paddr)(bst, bsh, pap) 253 254 /* 255 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t); 256 * 257 * Get the kernel virtual address for the mapped bus space. 258 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR. 259 * (XXX not enforced) 260 */ 261 #define bus_space_vaddr(bst, bsh) \ 262 ((void *)(bsh)) 263 264 /* 265 * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t, 266 * int, int); 267 * 268 * Mmap bus space on behalf of the user. 269 */ 270 #define bus_space_mmap(bst, addr, off, prot, flags) \ 271 (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags)) 272 273 /* 274 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 275 * bus_size_t size, int flags, bus_space_handle_t *bshp); 276 * 277 * Map a region of bus space. 278 */ 279 280 #define BUS_SPACE_MAP_CACHEABLE 0x01 281 #define BUS_SPACE_MAP_LINEAR 0x02 282 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 283 284 #define bus_space_map(t, a, s, f, hp) \ 285 (*(t)->bs_map)((t), (a), (s), (f), (hp)) 286 287 /* 288 * void bus_space_unmap(bus_space_tag_t t, 289 * bus_space_handle_t bsh, bus_size_t size); 290 * 291 * Unmap a region of bus space. 292 */ 293 294 #define bus_space_unmap(t, h, s) \ 295 (*(t)->bs_unmap)((t), (h), (s)) 296 297 /* 298 * int bus_space_subregion(bus_space_tag_t t, 299 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 300 * bus_space_handle_t *nbshp); 301 * 302 * Get a new handle for a subregion of an already-mapped area of bus space. 303 */ 304 305 #define bus_space_subregion(t, h, o, s, hp) \ 306 (*(t)->bs_subregion)((t), (h), (o), (s), (hp)) 307 308 /* 309 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 310 * bus_addr_t rend, bus_size_t size, bus_size_t align, 311 * bus_size_t boundary, int flags, bus_addr_t *addrp, 312 * bus_space_handle_t *bshp); 313 * 314 * Allocate a region of bus space. 315 */ 316 317 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 318 (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp)) 319 320 /* 321 * int bus_space_free(bus_space_tag_t t, 322 * bus_space_handle_t bsh, bus_size_t size); 323 * 324 * Free a region of bus space. 325 */ 326 327 #define bus_space_free(t, h, s) \ 328 (*(t)->bs_free)((t), (h), (s)) 329 330 /* 331 * void bus_intr_establish(bus_space_tag_t bst, 332 * int level, int pri, int flags, int (*func)(void *) 333 * void *arg); 334 * 335 * Attach interrupt handler and softc argument 336 */ 337 338 #define bus_intr_establish(t, i, c, f, ihf, iha) \ 339 (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha)) 340 341 342 /* 343 * Utility macros; do not use outside this file. 344 */ 345 #define __BS_TYPENAME(BITS) __CONCAT3(u_int,BITS,_t) 346 #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride) 347 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES) 348 349 /* 350 * Calculate the target address using the bus_space parameters 351 */ 352 #define __BS_ADDR(t, h, offset, BITS, BYTES) \ 353 ((volatile __CONCAT3(u_int,BITS,_t) *) \ 354 ((h) + __BS_OFFSET(t, offset, BYTES) + \ 355 (t)->__CONCAT(bs_offset_,BYTES))) 356 357 /* 358 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 359 * bus_space_handle_t bsh, bus_size_t offset); 360 * 361 * Read a 1, 2, 4, or 8 byte quantity from bus space 362 * described by tag/handle/offset. 363 */ 364 365 #define __bus_space_read(BYTES,BITS) \ 366 static __inline __CONCAT3(u_int,BITS,_t) \ 367 __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \ 368 bus_space_handle_t bsh, bus_size_t offset) \ 369 { \ 370 return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \ 371 } 372 373 __bus_space_read(1,8) 374 __bus_space_read(2,16) 375 __bus_space_read(4,32) 376 __bus_space_read(8,64) 377 378 /* 379 * void bus_space_read_multi_N(bus_space_tag_t tag, 380 * bus_space_handle_t bsh, bus_size_t offset, 381 * u_intN_t *addr, size_t count); 382 * 383 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 384 * described by tag/handle/offset and copy into buffer provided. 385 */ 386 387 #define __bus_space_read_multi(BYTES,BITS) \ 388 static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \ 389 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 390 __BS_TYPENAME(BITS) *, size_t); \ 391 \ 392 static __inline void \ 393 __BS_FUNCTION(bus_space_read_multi,BYTES)( \ 394 bus_space_tag_t t, \ 395 bus_space_handle_t h, \ 396 bus_size_t o, \ 397 __BS_TYPENAME(BITS) *a, \ 398 size_t c) \ 399 { \ 400 \ 401 while (c--) \ 402 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \ 403 } 404 405 __bus_space_read_multi(1,8) 406 __bus_space_read_multi(2,16) 407 __bus_space_read_multi(4,32) 408 __bus_space_read_multi(8,64) 409 410 411 /* 412 * void bus_space_read_region_N(bus_space_tag_t tag, 413 * bus_space_handle_t bsh, bus_size_t offset, 414 * u_intN_t *addr, size_t count); 415 * 416 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 417 * described by tag/handle and starting at `offset' and copy into 418 * buffer provided. 419 */ 420 421 #define __bus_space_read_region(BYTES,BITS) \ 422 static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \ 423 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 424 __BS_TYPENAME(BITS) *, size_t); \ 425 \ 426 static __inline void \ 427 __BS_FUNCTION(bus_space_read_region,BYTES)( \ 428 bus_space_tag_t t, \ 429 bus_space_handle_t h, \ 430 bus_size_t o, \ 431 __BS_TYPENAME(BITS) *a, \ 432 size_t c) \ 433 { \ 434 \ 435 while (c--) { \ 436 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \ 437 o += BYTES; \ 438 } \ 439 } 440 441 __bus_space_read_region(1,8) 442 __bus_space_read_region(2,16) 443 __bus_space_read_region(4,32) 444 __bus_space_read_region(8,64) 445 446 447 /* 448 * void bus_space_write_N(bus_space_tag_t tag, 449 * bus_space_handle_t bsh, bus_size_t offset, 450 * u_intN_t value); 451 * 452 * Write the 1, 2, 4, or 8 byte value `value' to bus space 453 * described by tag/handle/offset. 454 */ 455 456 #define __bus_space_write(BYTES,BITS) \ 457 static __inline void \ 458 __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \ 459 bus_space_handle_t bsh, \ 460 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \ 461 { \ 462 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \ 463 wbflush(); \ 464 } 465 466 __bus_space_write(1,8) 467 __bus_space_write(2,16) 468 __bus_space_write(4,32) 469 __bus_space_write(8,64) 470 471 /* 472 * void bus_space_write_multi_N(bus_space_tag_t tag, 473 * bus_space_handle_t bsh, bus_size_t offset, 474 * const u_intN_t *addr, size_t count); 475 * 476 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 477 * provided to bus space described by tag/handle/offset. 478 */ 479 480 #define __bus_space_write_multi(BYTES,BITS) \ 481 static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \ 482 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 483 __BS_TYPENAME(BITS) *, size_t); \ 484 \ 485 static __inline void \ 486 __BS_FUNCTION(bus_space_write_multi,BYTES)( \ 487 bus_space_tag_t t, \ 488 bus_space_handle_t h, \ 489 bus_size_t o, \ 490 __BS_TYPENAME(BITS) *a, \ 491 size_t c) \ 492 { \ 493 \ 494 while (c--) \ 495 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \ 496 } 497 498 __bus_space_write_multi(1,8) 499 __bus_space_write_multi(2,16) 500 __bus_space_write_multi(4,32) 501 __bus_space_write_multi(8,64) 502 503 504 /* 505 * void bus_space_write_region_N(bus_space_tag_t tag, 506 * bus_space_handle_t bsh, bus_size_t offset, 507 * const u_intN_t *addr, size_t count); 508 * 509 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 510 * to bus space described by tag/handle starting at `offset'. 511 */ 512 513 #define __bus_space_write_region(BYTES,BITS) \ 514 static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \ 515 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 516 const __BS_TYPENAME(BITS) *, size_t); \ 517 \ 518 static __inline void \ 519 __BS_FUNCTION(bus_space_write_region,BYTES)( \ 520 bus_space_tag_t t, \ 521 bus_space_handle_t h, \ 522 bus_size_t o, \ 523 const __BS_TYPENAME(BITS) *a, \ 524 size_t c) \ 525 { \ 526 \ 527 while (c--) { \ 528 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \ 529 o += BYTES; \ 530 } \ 531 } 532 533 __bus_space_write_region(1,8) 534 __bus_space_write_region(2,16) 535 __bus_space_write_region(4,32) 536 __bus_space_write_region(8,64) 537 538 539 /* 540 * void bus_space_set_multi_N(bus_space_tag_t tag, 541 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 542 * size_t count); 543 * 544 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 545 * by tag/handle/offset `count' times. 546 */ 547 548 #define __bus_space_set_multi(BYTES,BITS) \ 549 static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \ 550 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 551 __BS_TYPENAME(BITS), size_t); \ 552 \ 553 static __inline void \ 554 __BS_FUNCTION(bus_space_set_multi,BYTES)( \ 555 bus_space_tag_t t, \ 556 bus_space_handle_t h, \ 557 bus_size_t o, \ 558 __BS_TYPENAME(BITS) v, \ 559 size_t c) \ 560 { \ 561 \ 562 while (c--) \ 563 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \ 564 } 565 566 __bus_space_set_multi(1,8) 567 __bus_space_set_multi(2,16) 568 __bus_space_set_multi(4,32) 569 __bus_space_set_multi(8,64) 570 571 572 /* 573 * void bus_space_set_region_N(bus_space_tag_t tag, 574 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 575 * size_t count); 576 * 577 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 578 * by tag/handle starting at `offset'. 579 */ 580 581 #define __bus_space_set_region(BYTES,BITS) \ 582 static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \ 583 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 584 __BS_TYPENAME(BITS), size_t); \ 585 \ 586 static __inline void \ 587 __BS_FUNCTION(bus_space_set_region,BYTES)( \ 588 bus_space_tag_t t, \ 589 bus_space_handle_t h, \ 590 bus_size_t o, \ 591 __BS_TYPENAME(BITS) v, \ 592 size_t c) \ 593 { \ 594 \ 595 while (c--) { \ 596 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \ 597 o += BYTES; \ 598 } \ 599 } 600 601 __bus_space_set_region(1,8) 602 __bus_space_set_region(2,16) 603 __bus_space_set_region(4,32) 604 __bus_space_set_region(8,64) 605 606 607 /* 608 * void bus_space_copy_region_N(bus_space_tag_t tag, 609 * bus_space_handle_t bsh1, bus_size_t off1, 610 * bus_space_handle_t bsh2, bus_size_t off2, 611 * bus_size_t count); 612 * 613 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 614 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 615 */ 616 617 #define __bus_space_copy_region(BYTES) \ 618 static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \ 619 (bus_space_tag_t, \ 620 bus_space_handle_t bsh1, bus_size_t off1, \ 621 bus_space_handle_t bsh2, bus_size_t off2, \ 622 bus_size_t count); \ 623 \ 624 static __inline void \ 625 __BS_FUNCTION(bus_space_copy_region,BYTES)( \ 626 bus_space_tag_t t, \ 627 bus_space_handle_t h1, \ 628 bus_size_t o1, \ 629 bus_space_handle_t h2, \ 630 bus_size_t o2, \ 631 bus_size_t c) \ 632 { \ 633 bus_size_t o; \ 634 \ 635 if ((h1 + o1) >= (h2 + o2)) { \ 636 /* src after dest: copy forward */ \ 637 for (o = 0; c != 0; c--, o += BYTES) \ 638 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \ 639 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \ 640 } else { \ 641 /* dest after src: copy backwards */ \ 642 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 643 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \ 644 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \ 645 } \ 646 } 647 648 __bus_space_copy_region(1) 649 __bus_space_copy_region(2) 650 __bus_space_copy_region(4) 651 __bus_space_copy_region(8) 652 653 654 /* 655 * Operations which handle byte stream data on word access. 656 * 657 * These functions are defined to resolve endian mismatch, by either 658 * - When normal (i.e. stream-less) operations perform byte swap 659 * to resolve endian mismatch, these functions bypass the byte swap. 660 * or 661 * - When bus bridge performs automatic byte swap, these functions 662 * perform byte swap once more, to cancel the bridge's behavior. 663 * 664 * Mips Computer Systems platforms perform harware byte swapping - 665 * therefore the streaming methods can byte swap as determined from 666 * the bus space tag settings 667 * 668 */ 669 #define __BUS_SPACE_HAS_STREAM_METHODS 670 671 /* Force creation of stream methods using the standard template macros */ 672 #undef __BS_FUNCTION 673 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES) 674 675 #define __BS_BSWAP(bst, val, BITS) \ 676 ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val)) 677 678 679 #define __bus_space_read_stream(BYTES,BITS) \ 680 static __inline __BS_TYPENAME(BITS) \ 681 __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \ 682 bus_space_handle_t bsh, bus_size_t offset) \ 683 { \ 684 register __BS_TYPENAME(BITS) val = \ 685 __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \ 686 \ 687 return __BS_BSWAP(bst, val, BITS); \ 688 } 689 690 __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */ 691 __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */ 692 __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */ 693 694 695 #define __bus_space_write_stream(BYTES,BITS) \ 696 static __inline void \ 697 __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \ 698 bus_space_handle_t bsh, \ 699 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \ 700 { \ 701 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \ 702 __BS_BSWAP(bst, data, BITS); \ 703 wbflush(); \ 704 } 705 706 __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */ 707 __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */ 708 __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */ 709 710 __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */ 711 __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */ 712 __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */ 713 714 __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */ 715 __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */ 716 __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */ 717 718 __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */ 719 __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */ 720 __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */ 721 722 __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */ 723 __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */ 724 __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */ 725 726 __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */ 727 __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */ 728 __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */ 729 730 __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */ 731 __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */ 732 __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */ 733 734 #undef __bus_space_read 735 #undef __bus_space_write 736 #undef __bus_space_read_stream 737 #undef __bus_space_write_stream 738 #undef __bus_space_read_multi 739 #undef __bus_space_read_region 740 #undef __bus_space_write_multi 741 #undef __bus_space_write_region 742 #undef __bus_space_set_multi 743 #undef __bus_space_set_region 744 #undef __bus_space_copy_region 745 746 #undef __BS_TYPENAME 747 #undef __BS_OFFSET 748 #undef __BS_FUNCTION 749 #undef __BS_ADDR 750 751 /* 752 * Bus read/write barrier methods. 753 * 754 * void bus_space_barrier(bus_space_tag_t tag, 755 * bus_space_handle_t bsh, bus_size_t offset, 756 * bus_size_t len, int flags); 757 * 758 * On the MIPS, we just flush the write buffer. 759 */ 760 #define bus_space_barrier(t, h, o, l, f) \ 761 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \ 762 wbflush())) 763 764 #define BUS_SPACE_BARRIER_READ 0x01 765 #define BUS_SPACE_BARRIER_WRITE 0x02 766 767 /* 768 * Flags used in various bus DMA methods. 769 */ 770 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 771 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 772 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 773 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 774 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 775 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 776 #define BUS_DMA_BUS2 0x020 777 #define BUS_DMA_BUS3 0x040 778 #define BUS_DMA_BUS4 0x080 779 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 780 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 781 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 782 783 #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 784 785 /* Forwards needed by prototypes below. */ 786 struct mbuf; 787 struct uio; 788 789 /* 790 * Operations performed by bus_dmamap_sync(). 791 */ 792 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 793 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 794 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 795 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 796 797 typedef struct mipsco_bus_dma_tag *bus_dma_tag_t; 798 typedef struct mipsco_bus_dmamap *bus_dmamap_t; 799 800 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 801 802 /* 803 * bus_dma_segment_t 804 * 805 * Describes a single contiguous DMA transaction. Values 806 * are suitable for programming into DMA registers. 807 */ 808 struct mipsco_bus_dma_segment { 809 /* 810 * PUBLIC MEMBERS: these are used by device drivers. 811 */ 812 bus_addr_t ds_addr; /* DMA address */ 813 bus_size_t ds_len; /* length of transfer */ 814 /* 815 * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers. 816 */ 817 vaddr_t _ds_paddr; /* CPU physical address */ 818 vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */ 819 }; 820 typedef struct mipsco_bus_dma_segment bus_dma_segment_t; 821 822 /* 823 * bus_dma_tag_t 824 * 825 * A machine-dependent opaque type describing the implementation of 826 * DMA for a given bus. 827 */ 828 829 struct mipsco_bus_dma_tag { 830 bus_addr_t dma_offset; 831 832 /* 833 * DMA mapping methods. 834 */ 835 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 836 bus_size_t, bus_size_t, int, bus_dmamap_t *); 837 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 838 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 839 bus_size_t, struct proc *, int); 840 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 841 struct mbuf *, int); 842 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 843 struct uio *, int); 844 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 845 bus_dma_segment_t *, int, bus_size_t, int); 846 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 847 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 848 bus_addr_t, bus_size_t, int); 849 850 /* 851 * DMA memory utility functions. 852 */ 853 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 854 bus_size_t, bus_dma_segment_t *, int, int *, int); 855 void (*_dmamem_free)(bus_dma_tag_t, 856 bus_dma_segment_t *, int); 857 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 858 int, size_t, void **, int); 859 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 860 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 861 int, off_t, int, int); 862 }; 863 864 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 865 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 866 #define bus_dmamap_destroy(t, p) \ 867 (*(t)->_dmamap_destroy)((t), (p)) 868 #define bus_dmamap_load(t, m, b, s, p, f) \ 869 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 870 #define bus_dmamap_load_mbuf(t, m, b, f) \ 871 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 872 #define bus_dmamap_load_uio(t, m, u, f) \ 873 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 874 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 875 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 876 #define bus_dmamap_unload(t, p) \ 877 (*(t)->_dmamap_unload)((t), (p)) 878 #define bus_dmamap_sync(t, p, o, l, ops) \ 879 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 880 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 881 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 882 #define bus_dmamem_free(t, sg, n) \ 883 (*(t)->_dmamem_free)((t), (sg), (n)) 884 #define bus_dmamem_map(t, sg, n, s, k, f) \ 885 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 886 #define bus_dmamem_unmap(t, k, s) \ 887 (*(t)->_dmamem_unmap)((t), (k), (s)) 888 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 889 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 890 891 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 892 #define bus_dmatag_destroy(t) 893 894 /* 895 * bus_dmamap_t 896 * 897 * Describes a DMA mapping. 898 */ 899 struct mipsco_bus_dmamap { 900 /* 901 * PRIVATE MEMBERS: not for use by machine-independent code. 902 */ 903 bus_size_t _dm_size; /* largest DMA transfer mappable */ 904 int _dm_segcnt; /* number of segs this map can map */ 905 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 906 bus_size_t _dm_boundary; /* don't cross this */ 907 int _dm_flags; /* misc. flags */ 908 909 /* 910 * Private cookie to be used by the DMA back-end. 911 */ 912 void *_dm_cookie; 913 914 /* 915 * PUBLIC MEMBERS: these are used by machine-independent code. 916 */ 917 bus_size_t dm_maxsegsz; /* largest possible segment */ 918 bus_size_t dm_mapsize; /* size of the mapping */ 919 int dm_nsegs; /* # valid segments in mapping */ 920 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 921 }; 922 923 #ifdef _MIPSCO_BUS_DMA_PRIVATE 924 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 925 bus_size_t, int, bus_dmamap_t *); 926 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 927 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 928 bus_size_t, struct proc *, int); 929 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 930 struct mbuf *, int); 931 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 932 struct uio *, int); 933 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 934 bus_dma_segment_t *, int, bus_size_t, int); 935 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 936 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 937 bus_size_t, int); 938 939 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 940 bus_size_t alignment, bus_size_t boundary, 941 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 942 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 943 bus_size_t alignment, bus_size_t boundary, 944 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 945 paddr_t low, paddr_t high); 946 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 947 int nsegs); 948 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 949 int nsegs, size_t size, void **kvap, int flags); 950 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 951 size_t size); 952 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 953 int nsegs, off_t off, int prot, int flags); 954 955 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 956 bus_size_t alignment, bus_size_t boundary, 957 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 958 paddr_t low, paddr_t high); 959 #endif /* _MIPSCO_BUS_DMA_PRIVATE */ 960 961 void _bus_dma_tag_init(bus_dma_tag_t tag); 962 963 #endif /* _KERNEL */ 964 #endif /* _MIPSCO_BUS_H_ */ 965