1 /* $NetBSD: bus.h,v 1.23 2021/01/23 19:38:08 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _NEWSMIPS_BUS_H_ 34 #define _NEWSMIPS_BUS_H_ 35 36 #include <mips/locore.h> 37 38 /* 39 * Utility macros; do not use outside this file. 40 */ 41 #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(uint,BITS) 42 #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t) 43 44 /* 45 * Bus address and size types 46 */ 47 typedef u_long bus_addr_t; 48 typedef u_long bus_size_t; 49 50 #define PRIxBUSADDR "lx" 51 #define PRIxBUSSIZE "lx" 52 #define PRIuBUSSIZE "lu" 53 54 /* 55 * Access methods for bus resources and address space. 56 */ 57 typedef int bus_space_tag_t; 58 typedef u_long bus_space_handle_t; 59 60 #define PRIxBSH "lx" 61 62 /* 63 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 64 * bus_size_t size, int flags, bus_space_handle_t *bshp); 65 * 66 * Map a region of bus space. 67 */ 68 69 #define BUS_SPACE_MAP_CACHEABLE 0x01 70 #define BUS_SPACE_MAP_LINEAR 0x02 71 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 72 73 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 74 int, bus_space_handle_t *); 75 76 /* 77 * void bus_space_unmap(bus_space_tag_t t, 78 * bus_space_handle_t bsh, bus_size_t size); 79 * 80 * Unmap a region of bus space. 81 */ 82 83 void bus_space_unmap (bus_space_tag_t, bus_space_handle_t, bus_size_t); 84 85 /* 86 * int bus_space_subregion(bus_space_tag_t t, 87 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 88 * bus_space_handle_t *nbshp); 89 * 90 * Get a new handle for a subregion of an already-mapped area of bus space. 91 */ 92 93 int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, 94 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 95 96 /* 97 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 98 * bus_addr_t rend, bus_size_t size, bus_size_t align, 99 * bus_size_t boundary, int flags, bus_addr_t *addrp, 100 * bus_space_handle_t *bshp); 101 * 102 * Allocate a region of bus space. 103 */ 104 105 int bus_space_alloc (bus_space_tag_t t, bus_addr_t rstart, 106 bus_addr_t rend, bus_size_t size, bus_size_t align, 107 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 108 bus_space_handle_t *bshp); 109 110 /* 111 * int bus_space_free (bus_space_tag_t t, 112 * bus_space_handle_t bsh, bus_size_t size); 113 * 114 * Free a region of bus space. 115 */ 116 117 void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 118 bus_size_t size); 119 120 /* 121 * uintN_t bus_space_read_N(bus_space_tag_t tag, 122 * bus_space_handle_t bsh, bus_size_t offset); 123 * 124 * Read a 1, 2, 4, or 8 byte quantity from bus space 125 * described by tag/handle/offset. 126 */ 127 128 #define bus_space_read_1(t, h, o) \ 129 ((void) t, (*(volatile uint8_t *)((h) + (o)))) 130 131 #define bus_space_read_2(t, h, o) \ 132 ((void) t, (*(volatile uint16_t *)((h) + (o)))) 133 134 #define bus_space_read_4(t, h, o) \ 135 ((void) t, (*(volatile uint32_t *)((h) + (o)))) 136 137 /* 138 * void bus_space_read_multi_N(bus_space_tag_t tag, 139 * bus_space_handle_t bsh, bus_size_t offset, 140 * uintN_t *addr, size_t count); 141 * 142 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 143 * described by tag/handle/offset and copy into buffer provided. 144 */ 145 146 #define __NEWSMIPS_bus_space_read_multi(BYTES,BITS) \ 147 static __inline void __CONCAT(bus_space_read_multi_,BYTES) \ 148 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 149 __PB_TYPENAME(BITS) *, size_t); \ 150 \ 151 static __inline void \ 152 __CONCAT(bus_space_read_multi_,BYTES)( \ 153 bus_space_tag_t t, \ 154 bus_space_handle_t h, \ 155 bus_size_t o, \ 156 __PB_TYPENAME(BITS) *a, \ 157 size_t c) \ 158 { \ 159 \ 160 while (c--) \ 161 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 162 } 163 164 __NEWSMIPS_bus_space_read_multi(1,8) 165 __NEWSMIPS_bus_space_read_multi(2,16) 166 __NEWSMIPS_bus_space_read_multi(4,32) 167 168 #undef __NEWSMIPS_bus_space_read_multi 169 170 /* 171 * void bus_space_read_region_N(bus_space_tag_t tag, 172 * bus_space_handle_t bsh, bus_size_t offset, 173 * uintN_t *addr, size_t count); 174 * 175 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 176 * described by tag/handle and starting at `offset' and copy into 177 * buffer provided. 178 */ 179 180 #define __NEWSMIPS_bus_space_read_region(BYTES,BITS) \ 181 static __inline void __CONCAT(bus_space_read_region_,BYTES) \ 182 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 183 __PB_TYPENAME(BITS) *, size_t); \ 184 \ 185 static __inline void \ 186 __CONCAT(bus_space_read_region_,BYTES)( \ 187 bus_space_tag_t t, \ 188 bus_space_handle_t h, \ 189 bus_size_t o, \ 190 __PB_TYPENAME(BITS) *a, \ 191 size_t c) \ 192 { \ 193 \ 194 while (c--) { \ 195 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 196 o += BYTES; \ 197 } \ 198 } 199 200 __NEWSMIPS_bus_space_read_region(1,8) 201 __NEWSMIPS_bus_space_read_region(2,16) 202 __NEWSMIPS_bus_space_read_region(4,32) 203 204 #undef __NEWSMIPS_bus_space_read_region 205 206 /* 207 * void bus_space_write_N(bus_space_tag_t tag, 208 * bus_space_handle_t bsh, bus_size_t offset, 209 * uintN_t value); 210 * 211 * Write the 1, 2, 4, or 8 byte value `value' to bus space 212 * described by tag/handle/offset. 213 */ 214 215 #define bus_space_write_1(t, h, o, v) \ 216 do { \ 217 (void) t; \ 218 *(volatile uint8_t *)((h) + (o)) = (v); \ 219 } while (0) 220 221 #define bus_space_write_2(t, h, o, v) \ 222 do { \ 223 (void) t; \ 224 *(volatile uint16_t *)((h) + (o)) = (v); \ 225 } while (0) 226 227 #define bus_space_write_4(t, h, o, v) \ 228 do { \ 229 (void) t; \ 230 *(volatile uint32_t *)((h) + (o)) = (v); \ 231 } while (0) 232 233 /* 234 * void bus_space_write_multi_N(bus_space_tag_t tag, 235 * bus_space_handle_t bsh, bus_size_t offset, 236 * const uintN_t *addr, size_t count); 237 * 238 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 239 * provided to bus space described by tag/handle/offset. 240 */ 241 242 #define __NEWSMIPS_bus_space_write_multi(BYTES,BITS) \ 243 static __inline void __CONCAT(bus_space_write_multi_,BYTES) \ 244 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 245 const __PB_TYPENAME(BITS) *, size_t); \ 246 \ 247 static __inline void \ 248 __CONCAT(bus_space_write_multi_,BYTES)( \ 249 bus_space_tag_t t, \ 250 bus_space_handle_t h, \ 251 bus_size_t o, \ 252 const __PB_TYPENAME(BITS) *a, \ 253 size_t c) \ 254 { \ 255 \ 256 while (c--) \ 257 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 258 } 259 260 __NEWSMIPS_bus_space_write_multi(1,8) 261 __NEWSMIPS_bus_space_write_multi(2,16) 262 __NEWSMIPS_bus_space_write_multi(4,32) 263 264 #undef __NEWSMIPS_bus_space_write_multi 265 266 /* 267 * void bus_space_write_region_N(bus_space_tag_t tag, 268 * bus_space_handle_t bsh, bus_size_t offset, 269 * const uintN_t *addr, size_t count); 270 * 271 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 272 * to bus space described by tag/handle starting at `offset'. 273 */ 274 275 #define __NEWSMIPS_bus_space_write_region(BYTES,BITS) \ 276 static __inline void __CONCAT(bus_space_write_region_,BYTES) \ 277 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 278 const __PB_TYPENAME(BITS) *, size_t); \ 279 \ 280 static __inline void \ 281 __CONCAT(bus_space_write_region_,BYTES)( \ 282 bus_space_tag_t t, \ 283 bus_space_handle_t h, \ 284 bus_size_t o, \ 285 const __PB_TYPENAME(BITS) *a, \ 286 size_t c) \ 287 { \ 288 \ 289 while (c--) { \ 290 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 291 o += BYTES; \ 292 } \ 293 } 294 295 __NEWSMIPS_bus_space_write_region(1,8) 296 __NEWSMIPS_bus_space_write_region(2,16) 297 __NEWSMIPS_bus_space_write_region(4,32) 298 299 #undef __NEWSMIPS_bus_space_write_region 300 301 /* 302 * void bus_space_set_multi_N(bus_space_tag_t tag, 303 * bus_space_handle_t bsh, bus_size_t offset, uintN_t val, 304 * size_t count); 305 * 306 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 307 * by tag/handle/offset `count' times. 308 */ 309 310 #define __NEWSMIPS_bus_space_set_multi(BYTES,BITS) \ 311 static __inline void __CONCAT(bus_space_set_multi_,BYTES) \ 312 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 313 __PB_TYPENAME(BITS), size_t); \ 314 \ 315 static __inline void \ 316 __CONCAT(bus_space_set_multi_,BYTES)( \ 317 bus_space_tag_t t, \ 318 bus_space_handle_t h, \ 319 bus_size_t o, \ 320 __PB_TYPENAME(BITS) v, \ 321 size_t c) \ 322 { \ 323 \ 324 while (c--) \ 325 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 326 } 327 328 __NEWSMIPS_bus_space_set_multi(1,8) 329 __NEWSMIPS_bus_space_set_multi(2,16) 330 __NEWSMIPS_bus_space_set_multi(4,32) 331 332 #undef __NEWSMIPS_bus_space_set_multi 333 334 /* 335 * void bus_space_set_region_N(bus_space_tag_t tag, 336 * bus_space_handle_t bsh, bus_size_t offset, uintN_t val, 337 * size_t count); 338 * 339 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 340 * by tag/handle starting at `offset'. 341 */ 342 343 #define __NEWSMIPS_bus_space_set_region(BYTES,BITS) \ 344 static __inline void __CONCAT(bus_space_set_region_,BYTES) \ 345 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 346 __PB_TYPENAME(BITS), size_t); \ 347 \ 348 static __inline void \ 349 __CONCAT(bus_space_set_region_,BYTES)( \ 350 bus_space_tag_t t, \ 351 bus_space_handle_t h, \ 352 bus_size_t o, \ 353 __PB_TYPENAME(BITS) v, \ 354 size_t c) \ 355 { \ 356 \ 357 while (c--) { \ 358 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 359 o += BYTES; \ 360 } \ 361 } 362 363 __NEWSMIPS_bus_space_set_region(1,8) 364 __NEWSMIPS_bus_space_set_region(2,16) 365 __NEWSMIPS_bus_space_set_region(4,32) 366 367 #undef __NEWSMIPS_bus_space_set_region 368 369 /* 370 * void bus_space_copy_region_N(bus_space_tag_t tag, 371 * bus_space_handle_t bsh1, bus_size_t off1, 372 * bus_space_handle_t bsh2, bus_size_t off2, 373 * bus_size_t count); 374 * 375 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 376 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 377 */ 378 379 #define __NEWSMIPS_copy_region(BYTES) \ 380 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 381 (bus_space_tag_t, \ 382 bus_space_handle_t bsh1, bus_size_t off1, \ 383 bus_space_handle_t bsh2, bus_size_t off2, \ 384 bus_size_t count); \ 385 \ 386 static __inline void \ 387 __CONCAT(bus_space_copy_region_,BYTES)( \ 388 bus_space_tag_t t, \ 389 bus_space_handle_t h1, \ 390 bus_size_t o1, \ 391 bus_space_handle_t h2, \ 392 bus_size_t o2, \ 393 bus_size_t c) \ 394 { \ 395 bus_size_t o; \ 396 \ 397 if ((h1 + o1) >= (h2 + o2)) { \ 398 /* src after dest: copy forward */ \ 399 for (o = 0; c != 0; c--, o += BYTES) \ 400 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 401 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 402 } else { \ 403 /* dest after src: copy backwards */ \ 404 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 405 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 406 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 407 } \ 408 } 409 410 __NEWSMIPS_copy_region(1) 411 __NEWSMIPS_copy_region(2) 412 __NEWSMIPS_copy_region(4) 413 414 #undef __NEWSMIPS_copy_region 415 416 /* 417 * Bus read/write barrier methods. 418 * 419 * void bus_space_barrier(bus_space_tag_t tag, 420 * bus_space_handle_t bsh, bus_size_t offset, 421 * bus_size_t len, int flags); 422 * 423 * On the MIPS, we just flush the write buffer. 424 */ 425 #define bus_space_barrier(t, h, o, l, f) \ 426 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \ 427 wbflush())) 428 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 429 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 430 431 #undef __PB_TYPENAME_PREFIX 432 #undef __PB_TYPENAME 433 434 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 435 436 /* 437 * Flags used in various bus DMA methods. 438 */ 439 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 440 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 441 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 442 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 443 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 444 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 445 #define BUS_DMA_BUS2 0x020 446 #define BUS_DMA_BUS3 0x040 447 #define BUS_DMA_BUS4 0x080 448 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 449 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 450 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 451 452 #define NEWSMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 453 #define NEWSMIPS_DMAMAP_MAPTBL 0x20000 /* use DMA maping table */ 454 455 /* Forwards needed by prototypes below. */ 456 struct mbuf; 457 struct uio; 458 459 /* 460 * Operations performed by bus_dmamap_sync(). 461 */ 462 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 463 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 464 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 465 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 466 467 typedef struct newsmips_bus_dma_tag *bus_dma_tag_t; 468 typedef struct newsmips_bus_dmamap *bus_dmamap_t; 469 470 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 471 472 /* 473 * bus_dma_segment_t 474 * 475 * Describes a single contiguous DMA transaction. Values 476 * are suitable for programming into DMA registers. 477 */ 478 struct newsmips_bus_dma_segment { 479 bus_addr_t ds_addr; /* DMA address */ 480 bus_size_t ds_len; /* length of transfer */ 481 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 482 }; 483 typedef struct newsmips_bus_dma_segment bus_dma_segment_t; 484 485 /* 486 * bus_dma_tag_t 487 * 488 * A machine-dependent opaque type describing the implementation of 489 * DMA for a given bus. 490 */ 491 492 struct newsmips_bus_dma_tag { 493 /* 494 * DMA mapping methods. 495 */ 496 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 497 bus_size_t, bus_size_t, int, bus_dmamap_t *); 498 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 499 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 500 bus_size_t, struct proc *, int); 501 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 502 struct mbuf *, int); 503 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 504 struct uio *, int); 505 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 506 bus_dma_segment_t *, int, bus_size_t, int); 507 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 508 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 509 bus_addr_t, bus_size_t, int); 510 511 /* 512 * DMA memory utility functions. 513 */ 514 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 515 bus_size_t, bus_dma_segment_t *, int, int *, int); 516 void (*_dmamem_free)(bus_dma_tag_t, 517 bus_dma_segment_t *, int); 518 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 519 int, size_t, void **, int); 520 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 521 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 522 int, off_t, int, int); 523 524 /* 525 * NEWSMIPS quirks. 526 * This is NOT a constant. Slot dependent information is 527 * required to flush DMA cache correctly. 528 */ 529 int _slotno; 530 bus_space_tag_t _slotbaset; 531 bus_space_handle_t _slotbaseh; 532 }; 533 534 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 535 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 536 #define bus_dmamap_destroy(t, p) \ 537 (*(t)->_dmamap_destroy)((t), (p)) 538 #define bus_dmamap_load(t, m, b, s, p, f) \ 539 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 540 #define bus_dmamap_load_mbuf(t, m, b, f) \ 541 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 542 #define bus_dmamap_load_uio(t, m, u, f) \ 543 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 544 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 545 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 546 #define bus_dmamap_unload(t, p) \ 547 (*(t)->_dmamap_unload)((t), (p)) 548 #define bus_dmamap_sync(t, p, o, l, ops) \ 549 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 550 551 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 552 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 553 #define bus_dmamem_free(t, sg, n) \ 554 (*(t)->_dmamem_free)((t), (sg), (n)) 555 #define bus_dmamem_map(t, sg, n, s, k, f) \ 556 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 557 #define bus_dmamem_unmap(t, k, s) \ 558 (*(t)->_dmamem_unmap)((t), (k), (s)) 559 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 560 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 561 562 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 563 #define bus_dmatag_destroy(t) 564 565 /* 566 * bus_dmamap_t 567 * 568 * Describes a DMA mapping. 569 */ 570 struct newsmips_bus_dmamap { 571 /* 572 * PRIVATE MEMBERS: not for use my machine-independent code. 573 */ 574 bus_size_t _dm_size; /* largest DMA transfer mappable */ 575 int _dm_segcnt; /* number of segs this map can map */ 576 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 577 bus_size_t _dm_boundary; /* don't cross this */ 578 int _dm_flags; /* misc. flags */ 579 int _dm_maptbl; /* DMA mapping table index */ 580 int _dm_maptblcnt; /* number of DMA mapping table */ 581 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 582 583 /* 584 * PUBLIC MEMBERS: these are used by machine-independent code. 585 */ 586 bus_size_t dm_maxsegsz; /* largest possible segment */ 587 bus_size_t dm_mapsize; /* size of the mapping */ 588 int dm_nsegs; /* # valid segments in mapping */ 589 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 590 }; 591 592 #ifdef _NEWSMIPS_BUS_DMA_PRIVATE 593 void newsmips_bus_dma_init(void); 594 595 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 596 bus_size_t, int, bus_dmamap_t *); 597 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 598 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 599 bus_size_t, struct proc *, int); 600 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 601 struct mbuf *, int); 602 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 603 struct uio *, int); 604 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 605 bus_dma_segment_t *, int, bus_size_t, int); 606 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 607 void _bus_dmamap_sync_r3k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 608 bus_size_t, int); 609 void _bus_dmamap_sync_r4k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 610 bus_size_t, int); 611 612 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 613 bus_size_t alignment, bus_size_t boundary, 614 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 615 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 616 int nsegs); 617 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 618 int nsegs, size_t size, void **kvap, int flags); 619 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 620 size_t size); 621 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 622 int nsegs, off_t off, int prot, int flags); 623 624 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 625 bus_size_t alignment, bus_size_t boundary, 626 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 627 vaddr_t low, vaddr_t high); 628 629 extern struct newsmips_bus_dma_tag newsmips_default_bus_dma_tag; 630 #endif /* _NEWSMIPS_BUS_DMA_PRIVATE */ 631 632 #endif /* _NEWSMIPS_BUS_H_ */ 633