1 /* $NetBSD: cpu.c,v 1.13 2010/12/20 00:25:41 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by NONAKA Kimihiro; by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.13 2010/12/20 00:25:41 matt Exp $"); 34 35 #include "opt_ppcparam.h" 36 #include "opt_multiprocessor.h" 37 #include "opt_interrupt.h" 38 #include "opt_altivec.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 44 #include <dev/ofw/openfirm.h> 45 46 #include <powerpc/openpic.h> 47 #include <powerpc/atomic.h> 48 #include <powerpc/spr.h> 49 #include <powerpc/oea/spr.h> 50 #include <powerpc/oea/hid.h> 51 #include <powerpc/oea/bat.h> 52 #ifdef ALTIVEC 53 #include <powerpc/altivec.h> 54 #endif 55 56 #ifdef MULTIPROCESSOR 57 #include <arch/powerpc/pic/picvar.h> 58 #include <arch/powerpc/pic/ipivar.h> 59 #include <powerpc/rtas.h> 60 #endif 61 62 #include <machine/autoconf.h> 63 #include <machine/cpu.h> 64 #include <machine/fpu.h> 65 #include <machine/pcb.h> 66 #include <machine/pio.h> 67 #include <machine/trap.h> 68 69 #include "pic_openpic.h" 70 71 #ifndef OPENPIC 72 #if NPIC_OPENPIC > 0 73 #define OPENPIC 74 #endif /* NOPENPIC > 0 */ 75 #endif /* OPENPIC */ 76 77 static int cpu_match(struct device *, struct cfdata *, void *); 78 static void cpu_attach(struct device *, struct device *, void *); 79 void cpu_OFgetspeed(struct device *, struct cpu_info *); 80 81 CFATTACH_DECL(cpu, sizeof(struct device), 82 cpu_match, cpu_attach, NULL, NULL); 83 84 extern struct cfdriver cpu_cd; 85 extern int machine_has_rtas; 86 87 int 88 cpu_match(struct device *parent, struct cfdata *cfdata, void *aux) 89 { 90 struct confargs *ca = aux; 91 int *reg = ca->ca_reg; 92 int node; 93 94 if (strcmp(ca->ca_name, cpu_cd.cd_name) != 0) 95 return 0; 96 97 node = OF_finddevice("/cpus"); 98 if (node != -1) { 99 for (node = OF_child(node); node != 0; node = OF_peer(node)) { 100 uint32_t cpunum; 101 int l; 102 103 l = OF_getprop(node, "reg", &cpunum, sizeof(cpunum)); 104 if (l == 4 && reg[0] == cpunum) 105 return 1; 106 } 107 } 108 if (reg[0] == 0) 109 return 1; 110 return 0; 111 } 112 113 void 114 cpu_OFgetspeed(struct device *self, struct cpu_info *ci) 115 { 116 int node; 117 node = OF_finddevice("/cpus"); 118 if (node != -1) { 119 for (node = OF_child(node); node; node = OF_peer(node)) { 120 uint32_t cpunum; 121 int l; 122 123 l = OF_getprop(node, "reg", &cpunum, sizeof(cpunum)); 124 if (l == sizeof(uint32_t) && ci->ci_cpuid == cpunum) { 125 uint32_t cf; 126 127 l = OF_getprop(node, "clock-frequency", 128 &cf, sizeof(cf)); 129 if (l == sizeof(uint32_t)) 130 ci->ci_khz = cf / 1000; 131 break; 132 } 133 } 134 } 135 if (ci->ci_khz) 136 aprint_normal_dev(self, "%u.%02u MHz\n", 137 ci->ci_khz / 1000, (ci->ci_khz / 10) % 100); 138 } 139 140 static void 141 cpu_print_cache_config(uint32_t size, uint32_t line) 142 { 143 char cbuf[7]; 144 145 format_bytes(cbuf, sizeof(cbuf), size); 146 aprint_normal("%s %dB/line", cbuf, line); 147 } 148 149 static void 150 cpu_OFprintcacheinfo(int node) 151 { 152 int l; 153 uint32_t dcache=0, icache=0, dline=0, iline=0; 154 155 OF_getprop(node, "i-cache-size", &icache, sizeof(icache)); 156 OF_getprop(node, "d-cache-size", &dcache, sizeof(dcache)); 157 OF_getprop(node, "i-cache-line-size", &iline, sizeof(iline)); 158 OF_getprop(node, "d-cache-line-size", &dline, sizeof(dline)); 159 if (OF_getprop(node, "cache-unified", &l, sizeof(l)) != -1) { 160 aprint_normal("cache "); 161 cpu_print_cache_config(icache, iline); 162 } else { 163 aprint_normal("I-cache "); 164 cpu_print_cache_config(icache, iline); 165 aprint_normal(", D-cache "); 166 cpu_print_cache_config(dcache, dline); 167 } 168 aprint_normal("\n"); 169 } 170 171 static void 172 cpu_OFgetcache(struct device *self, struct cpu_info *ci) 173 { 174 int node, cpu=-1; 175 char name[32]; 176 177 node = OF_finddevice("/cpus"); 178 if (node == -1) 179 return; 180 181 for (node = OF_child(node); node; node = OF_peer(node)) { 182 uint32_t cpunum; 183 int l; 184 185 l = OF_getprop(node, "reg", &cpunum, sizeof(cpunum)); 186 if (l == sizeof(uint32_t) && ci->ci_cpuid == cpunum) { 187 cpu = node; 188 break; 189 } 190 } 191 if (cpu == -1) 192 return; 193 /* now we have cpu */ 194 aprint_normal_dev(self, "L1 "); 195 cpu_OFprintcacheinfo(cpu); 196 for (node = OF_child(cpu); node; node = OF_peer(node)) { 197 if (OF_getprop(node, "name", name, sizeof(name)) != -1) { 198 if (strcmp("l2-cache", name) == 0) { 199 aprint_normal_dev(self, "L2 "); 200 cpu_OFprintcacheinfo(node); 201 } else if (strcmp("l3-cache", name) == 0) { 202 aprint_normal_dev(self, "L3 "); 203 cpu_OFprintcacheinfo(node); 204 } 205 } 206 } 207 } 208 209 210 void 211 cpu_attach(struct device *parent, struct device *self, void *aux) 212 { 213 struct cpu_info *ci; 214 struct confargs *ca = aux; 215 int id = ca->ca_reg[0]; 216 217 ci = cpu_attach_common(self, id); 218 if (ci == NULL) 219 return; 220 221 if (id > 0) 222 #ifdef MULTIPROCESSOR 223 cpu_spinup(self, ci); 224 #endif 225 226 if (ci->ci_khz == 0) 227 cpu_OFgetspeed(self, ci); 228 229 cpu_OFgetcache(self, ci); 230 return; 231 } 232 233 #ifdef MULTIPROCESSOR 234 235 extern volatile u_int cpu_spinstart_cpunum; 236 extern volatile u_int cpu_spinstart_ack; 237 238 int 239 md_setup_trampoline(volatile struct cpu_hatch_data *h, struct cpu_info *ci) 240 { 241 int i; 242 u_int msr; 243 244 msr = mfmsr(); 245 h->running = -1; 246 cpu_spinstart_cpunum = ci->ci_cpuid; 247 __asm volatile("dcbf 0,%0"::"r"(&cpu_spinstart_cpunum):"memory"); 248 249 for (i=0; i < 100000000; i++) 250 if (cpu_spinstart_ack == 0) 251 break; 252 return 1; 253 } 254 255 void 256 md_presync_timebase(volatile struct cpu_hatch_data *h) 257 { 258 uint64_t tb; 259 int junk; 260 261 if (machine_has_rtas && rtas_has_func(RTAS_FUNC_FREEZE_TIME_BASE)) { 262 rtas_call(RTAS_FUNC_FREEZE_TIME_BASE, 0, 1, &junk); 263 /* Sync timebase. */ 264 tb = mftb(); 265 266 h->tbu = tb >> 32; 267 h->tbl = tb & 0xffffffff; 268 269 h->running = 0; 270 } 271 /* otherwise, the machine has no rtas, or if it does, things 272 * are pre-syncd, per PAPR v2.2. I don't have anything without 273 * rtas, so if such a machine exists, someone will have to write 274 * code for it 275 */ 276 } 277 278 void 279 md_start_timebase(volatile struct cpu_hatch_data *h) 280 { 281 int i, junk; 282 /* 283 * wait for secondary spin up (1.5ms @ 604/200MHz) 284 * XXX we cannot use delay() here because timebase is not 285 * running. 286 */ 287 for (i = 0; i < 100000; i++) 288 if (h->running) 289 break; 290 291 /* Start timebase. */ 292 if (machine_has_rtas && rtas_has_func(RTAS_FUNC_THAW_TIME_BASE)) 293 rtas_call(RTAS_FUNC_THAW_TIME_BASE, 0, 1, &junk); 294 } 295 296 /* 297 * We wait for h->running to become 0, and then we know that the time is 298 * frozen and h->tb is correct. 299 */ 300 301 void 302 md_sync_timebase(volatile struct cpu_hatch_data *h) 303 { 304 /* Sync timebase. */ 305 u_int tbu = h->tbu; 306 u_int tbl = h->tbl; 307 while (h->running == -1) 308 ; 309 __asm volatile ("sync; isync"); 310 __asm volatile ("mttbl %0" :: "r"(0)); 311 __asm volatile ("mttbu %0" :: "r"(tbu)); 312 __asm volatile ("mttbl %0" :: "r"(tbl)); 313 } 314 315 void 316 md_setup_interrupts(void) 317 { 318 /* do nothing, this is handled in ofwpci */ 319 } 320 #endif /* MULTIPROCESSOR */ 321