1 /* $NetBSD: plgpio_acpi.c,v 1.7 2021/01/29 15:49:55 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill@invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: plgpio_acpi.c,v 1.7 2021/01/29 15:49:55 thorpej Exp $");
34
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <sys/device.h>
39 #include <sys/gpio.h>
40
41 #include <dev/acpi/acpireg.h>
42 #include <dev/acpi/acpivar.h>
43 #include <dev/acpi/acpi_intr.h>
44 #include <dev/acpi/acpi_event.h>
45
46 #include <dev/gpio/gpiovar.h>
47 #include <dev/ic/pl061var.h>
48 #include <dev/ic/pl061reg.h>
49
50 struct plgpio_acpi_softc;
51
52 struct plgpio_acpi_softc {
53 struct plgpio_softc sc_base;
54
55 ACPI_HANDLE sc_handle;
56
57 struct acpi_event * sc_event[8];
58 };
59
60 static int plgpio_acpi_match(device_t, cfdata_t, void *);
61 static void plgpio_acpi_attach(device_t, device_t, void *);
62
63 static void plgpio_acpi_register_event(void *, struct acpi_event *, ACPI_RESOURCE_GPIO *);
64 static int plgpio_acpi_intr(void *);
65
66 CFATTACH_DECL_NEW(plgpio_acpi, sizeof(struct plgpio_acpi_softc), plgpio_acpi_match, plgpio_acpi_attach, NULL, NULL);
67
68 static const struct device_compatible_entry compat_data[] = {
69 { .compat = "ARMH0061" },
70 DEVICE_COMPAT_EOL
71 };
72
73 static int
plgpio_acpi_match(device_t parent,cfdata_t cf,void * aux)74 plgpio_acpi_match(device_t parent, cfdata_t cf, void *aux)
75 {
76 struct acpi_attach_args *aa = aux;
77
78 return acpi_compatible_match(aa, compat_data);
79 }
80
81 static void
plgpio_acpi_attach(device_t parent,device_t self,void * aux)82 plgpio_acpi_attach(device_t parent, device_t self, void *aux)
83 {
84 struct plgpio_acpi_softc * const asc = device_private(self);
85 struct plgpio_softc * const sc = &asc->sc_base;
86 struct acpi_attach_args *aa = aux;
87 struct acpi_resources res;
88 struct acpi_mem *mem;
89 struct acpi_irq *irq;
90 ACPI_STATUS rv;
91 int error;
92 void *ih;
93
94 sc->sc_dev = self;
95 asc->sc_handle = aa->aa_node->ad_handle;
96
97 rv = acpi_resource_parse(sc->sc_dev, aa->aa_node->ad_handle, "_CRS",
98 &res, &acpi_resource_parse_ops_default);
99 if (ACPI_FAILURE(rv))
100 return;
101
102 mem = acpi_res_mem(&res, 0);
103 if (mem == NULL) {
104 aprint_error_dev(self, "couldn't find mem resource\n");
105 goto done;
106 }
107
108 irq = acpi_res_irq(&res, 0);
109 if (irq == NULL) {
110 aprint_error_dev(self, "couldn't find irq resource\n");
111 goto done;
112 }
113
114 sc->sc_dev = self;
115 sc->sc_bst = aa->aa_memt;
116 error = bus_space_map(sc->sc_bst, mem->ar_base, mem->ar_length, 0, &sc->sc_bsh);
117 if (error) {
118 aprint_error_dev(self, "couldn't map registers\n");
119 return;
120 }
121
122 plgpio_attach(sc);
123
124 rv = acpi_event_create_gpio(self, asc->sc_handle, plgpio_acpi_register_event, asc);
125 if (ACPI_FAILURE(rv)) {
126 if (rv != AE_NOT_FOUND)
127 aprint_error_dev(self, "failed to create events: %s\n", AcpiFormatException(rv));
128 goto done;
129 }
130
131 ih = acpi_intr_establish(self,
132 (uint64_t)(uintptr_t)asc->sc_handle,
133 IPL_VM, false, plgpio_acpi_intr, asc, device_xname(self));
134 if (ih == NULL)
135 aprint_error_dev(self, "couldn't establish interrupt\n");
136
137 done:
138 acpi_resource_cleanup(&res);
139 }
140
141 static void
plgpio_acpi_register_event(void * priv,struct acpi_event * ev,ACPI_RESOURCE_GPIO * gpio)142 plgpio_acpi_register_event(void *priv, struct acpi_event *ev, ACPI_RESOURCE_GPIO *gpio)
143 {
144 struct plgpio_acpi_softc * const asc = priv;
145 struct plgpio_softc * const sc = &asc->sc_base;
146 uint32_t ibe, iev, is, ie;
147
148 const int pin = gpio->PinTable[0];
149
150 if (pin >= __arraycount(asc->sc_event)) {
151 aprint_error_dev(asc->sc_base.sc_dev,
152 "ignoring event for pin %u (out of range)\n", pin);
153 return;
154 }
155 if (asc->sc_event[pin] != NULL) {
156 aprint_error_dev(asc->sc_base.sc_dev,
157 "ignoring duplicate pin %u\n", pin);
158 return;
159 }
160
161 asc->sc_event[pin] = ev;
162 asc->sc_base.sc_reserved_mask |= __BIT(pin);
163
164 /*
165 * Configure and enable interrupts for this pin.
166 */
167
168 ibe = PLGPIO_READ(sc, PL061_GPIOIBE_REG);
169 iev = PLGPIO_READ(sc, PL061_GPIOIEV_REG);
170 switch (gpio->Polarity) {
171 case ACPI_ACTIVE_HIGH:
172 ibe &= ~__BIT(pin);
173 iev |= __BIT(pin);
174 break;
175 case ACPI_ACTIVE_LOW:
176 ibe &= ~__BIT(pin);
177 iev &= ~__BIT(pin);
178 break;
179 case ACPI_ACTIVE_BOTH:
180 ibe |= __BIT(pin);
181 break;
182 }
183 PLGPIO_WRITE(sc, PL061_GPIOIBE_REG, ibe);
184 PLGPIO_WRITE(sc, PL061_GPIOIEV_REG, iev);
185
186 is = PLGPIO_READ(sc, PL061_GPIOIS_REG);
187 switch (gpio->Triggering) {
188 case ACPI_LEVEL_SENSITIVE:
189 is |= __BIT(pin);
190 break;
191 case ACPI_EDGE_SENSITIVE:
192 is &= ~__BIT(pin);
193 break;
194 }
195 PLGPIO_WRITE(sc, PL061_GPIOIS_REG, is);
196
197 delay(20);
198
199 PLGPIO_WRITE(sc, PL061_GPIOIC_REG, __BIT(pin));
200
201 ie = PLGPIO_READ(sc, PL061_GPIOIE_REG);
202 ie |= __BIT(pin);
203 PLGPIO_WRITE(sc, PL061_GPIOIE_REG, ie);
204 }
205
206 static int
plgpio_acpi_intr(void * priv)207 plgpio_acpi_intr(void *priv)
208 {
209 struct plgpio_acpi_softc * const asc = priv;
210 struct plgpio_softc * const sc = &asc->sc_base;
211 uint32_t mis;
212 int bit;
213
214 mis = PLGPIO_READ(sc, PL061_GPIOMIS_REG);
215 PLGPIO_WRITE(sc, PL061_GPIOIC_REG, mis);
216
217 while ((bit = __builtin_ffs(mis)) != 0) {
218 const int pin = bit - 1;
219 struct acpi_event * const ev = asc->sc_event[pin];
220 KASSERT(ev != NULL);
221
222 acpi_event_notify(ev);
223
224 mis &= ~__BIT(pin);
225 }
226
227 return 1;
228 }
229