1 /* $NetBSD: ehci.c,v 1.31 2002/05/28 12:42:38 augustss Exp $ */ 2 3 /* 4 * TODO 5 * hold off explorations by companion controllers until ehci has started. 6 */ 7 8 /* 9 * Copyright (c) 2001 The NetBSD Foundation, Inc. 10 * All rights reserved. 11 * 12 * This code is derived from software contributed to The NetBSD Foundation 13 * by Lennart Augustsson (lennart@augustsson.net). 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the NetBSD 26 * Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 46 * 47 * The EHCI 0.96 spec can be found at 48 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf 49 * and the USB 2.0 spec at 50 * http://www.usb.org/developers/data/usb_20.zip 51 * 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.31 2002/05/28 12:42:38 augustss Exp $"); 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/device.h> 62 #include <sys/select.h> 63 #include <sys/proc.h> 64 #include <sys/queue.h> 65 66 #include <machine/bus.h> 67 #include <machine/endian.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> 72 #include <dev/usb/usb_mem.h> 73 #include <dev/usb/usb_quirks.h> 74 75 #include <dev/usb/ehcireg.h> 76 #include <dev/usb/ehcivar.h> 77 78 #ifdef EHCI_DEBUG 79 #define DPRINTF(x) if (ehcidebug) printf x 80 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x 81 int ehcidebug = 0; 82 #ifndef __NetBSD__ 83 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 84 #endif 85 #else 86 #define DPRINTF(x) 87 #define DPRINTFN(n,x) 88 #endif 89 90 struct ehci_pipe { 91 struct usbd_pipe pipe; 92 ehci_soft_qh_t *sqh; 93 union { 94 ehci_soft_qtd_t *qtd; 95 /* ehci_soft_itd_t *itd; */ 96 } tail; 97 union { 98 /* Control pipe */ 99 struct { 100 usb_dma_t reqdma; 101 u_int length; 102 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 103 } ctl; 104 /* Interrupt pipe */ 105 /* XXX */ 106 /* Bulk pipe */ 107 struct { 108 u_int length; 109 } bulk; 110 /* Iso pipe */ 111 /* XXX */ 112 } u; 113 }; 114 115 Static void ehci_shutdown(void *); 116 Static void ehci_power(int, void *); 117 118 Static usbd_status ehci_open(usbd_pipe_handle); 119 Static void ehci_poll(struct usbd_bus *); 120 Static void ehci_softintr(void *); 121 Static int ehci_intr1(ehci_softc_t *); 122 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 123 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 124 Static void ehci_idone(struct ehci_xfer *); 125 Static void ehci_timeout(void *); 126 Static void ehci_timeout_task(void *); 127 128 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 129 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 130 131 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 132 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 133 134 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 135 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 136 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 137 Static void ehci_root_ctrl_close(usbd_pipe_handle); 138 Static void ehci_root_ctrl_done(usbd_xfer_handle); 139 140 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 141 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 142 Static void ehci_root_intr_abort(usbd_xfer_handle); 143 Static void ehci_root_intr_close(usbd_pipe_handle); 144 Static void ehci_root_intr_done(usbd_xfer_handle); 145 146 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 147 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 148 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 149 Static void ehci_device_ctrl_close(usbd_pipe_handle); 150 Static void ehci_device_ctrl_done(usbd_xfer_handle); 151 152 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 153 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 154 Static void ehci_device_bulk_abort(usbd_xfer_handle); 155 Static void ehci_device_bulk_close(usbd_pipe_handle); 156 Static void ehci_device_bulk_done(usbd_xfer_handle); 157 158 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 159 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 160 Static void ehci_device_intr_abort(usbd_xfer_handle); 161 Static void ehci_device_intr_close(usbd_pipe_handle); 162 Static void ehci_device_intr_done(usbd_xfer_handle); 163 164 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 165 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 166 Static void ehci_device_isoc_abort(usbd_xfer_handle); 167 Static void ehci_device_isoc_close(usbd_pipe_handle); 168 Static void ehci_device_isoc_done(usbd_xfer_handle); 169 170 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 171 Static void ehci_noop(usbd_pipe_handle pipe); 172 173 Static int ehci_str(usb_string_descriptor_t *, int, char *); 174 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 175 Static void ehci_pcd_able(ehci_softc_t *, int); 176 Static void ehci_pcd_enable(void *); 177 Static void ehci_disown(ehci_softc_t *, int, int); 178 179 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 180 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 181 182 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 183 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 184 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 185 ehci_softc_t *, int, int, usbd_xfer_handle, 186 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 187 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 188 ehci_soft_qtd_t *); 189 190 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 191 192 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 193 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 194 ehci_soft_qh_t *); 195 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 196 Static void ehci_sync_hc(ehci_softc_t *); 197 198 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 199 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 200 201 #ifdef EHCI_DEBUG 202 Static void ehci_dump_regs(ehci_softc_t *); 203 Static void ehci_dump(void); 204 Static ehci_softc_t *theehci; 205 Static void ehci_dump_link(ehci_link_t, int); 206 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 207 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 208 Static void ehci_dump_qtd(ehci_qtd_t *); 209 Static void ehci_dump_sqh(ehci_soft_qh_t *); 210 Static void ehci_dump_exfer(struct ehci_xfer *); 211 #endif 212 213 #define MS_TO_TICKS(ms) ((ms) * hz / 1000) 214 215 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 216 217 #define EHCI_INTR_ENDPT 1 218 219 #define ehci_add_intr_list(sc, ex) \ 220 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 221 #define ehci_del_intr_list(ex) \ 222 LIST_REMOVE((ex), inext) 223 224 Static struct usbd_bus_methods ehci_bus_methods = { 225 ehci_open, 226 ehci_softintr, 227 ehci_poll, 228 ehci_allocm, 229 ehci_freem, 230 ehci_allocx, 231 ehci_freex, 232 }; 233 234 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 235 ehci_root_ctrl_transfer, 236 ehci_root_ctrl_start, 237 ehci_root_ctrl_abort, 238 ehci_root_ctrl_close, 239 ehci_noop, 240 ehci_root_ctrl_done, 241 }; 242 243 Static struct usbd_pipe_methods ehci_root_intr_methods = { 244 ehci_root_intr_transfer, 245 ehci_root_intr_start, 246 ehci_root_intr_abort, 247 ehci_root_intr_close, 248 ehci_noop, 249 ehci_root_intr_done, 250 }; 251 252 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 253 ehci_device_ctrl_transfer, 254 ehci_device_ctrl_start, 255 ehci_device_ctrl_abort, 256 ehci_device_ctrl_close, 257 ehci_noop, 258 ehci_device_ctrl_done, 259 }; 260 261 Static struct usbd_pipe_methods ehci_device_intr_methods = { 262 ehci_device_intr_transfer, 263 ehci_device_intr_start, 264 ehci_device_intr_abort, 265 ehci_device_intr_close, 266 ehci_device_clear_toggle, 267 ehci_device_intr_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 271 ehci_device_bulk_transfer, 272 ehci_device_bulk_start, 273 ehci_device_bulk_abort, 274 ehci_device_bulk_close, 275 ehci_device_clear_toggle, 276 ehci_device_bulk_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 280 ehci_device_isoc_transfer, 281 ehci_device_isoc_start, 282 ehci_device_isoc_abort, 283 ehci_device_isoc_close, 284 ehci_noop, 285 ehci_device_isoc_done, 286 }; 287 288 usbd_status 289 ehci_init(ehci_softc_t *sc) 290 { 291 u_int32_t version, sparams, cparams, hcr; 292 u_int i; 293 usbd_status err; 294 ehci_soft_qh_t *sqh; 295 296 DPRINTF(("ehci_init: start\n")); 297 #ifdef EHCI_DEBUG 298 theehci = sc; 299 #endif 300 301 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 302 303 version = EREAD2(sc, EHCI_HCIVERSION); 304 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 305 version >> 8, version & 0xff); 306 307 sparams = EREAD4(sc, EHCI_HCSPARAMS); 308 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 309 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 310 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 311 printf("%s: wrong number of companions (%d != %d)\n", 312 USBDEVNAME(sc->sc_bus.bdev), 313 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 314 return (USBD_IOERROR); 315 } 316 if (sc->sc_ncomp > 0) { 317 printf("%s: companion controller%s, %d port%s each:", 318 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 319 EHCI_HCS_N_PCC(sparams), 320 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 321 for (i = 0; i < sc->sc_ncomp; i++) 322 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 323 printf("\n"); 324 } 325 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 326 cparams = EREAD4(sc, EHCI_HCCPARAMS); 327 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 328 329 sc->sc_bus.usbrev = USBREV_2_0; 330 331 /* Reset the controller */ 332 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 333 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 334 usb_delay_ms(&sc->sc_bus, 1); 335 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 336 for (i = 0; i < 100; i++) { 337 delay(10); 338 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 339 if (!hcr) 340 break; 341 } 342 if (hcr) { 343 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 344 return (USBD_IOERROR); 345 } 346 347 /* frame list size at default, read back what we got and use that */ 348 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 349 case 0: sc->sc_flsize = 1024*4; break; 350 case 1: sc->sc_flsize = 512*4; break; 351 case 2: sc->sc_flsize = 256*4; break; 352 case 3: return (USBD_IOERROR); 353 } 354 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize, 355 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 356 if (err) 357 return (err); 358 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 359 360 /* Set up the bus struct. */ 361 sc->sc_bus.methods = &ehci_bus_methods; 362 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 363 364 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 365 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 366 367 sc->sc_eintrs = EHCI_NORMAL_INTRS; 368 369 /* Allocate dummy QH that starts the async list. */ 370 sqh = ehci_alloc_sqh(sc); 371 if (sqh == NULL) { 372 err = USBD_NOMEM; 373 goto bad1; 374 } 375 /* Fill the QH */ 376 sqh->qh.qh_endp = 377 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 378 sqh->qh.qh_link = 379 htole32(sqh->physaddr | EHCI_LINK_QH); 380 sqh->qh.qh_curqtd = EHCI_NULL; 381 sqh->next = NULL; 382 /* Fill the overlay qTD */ 383 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 384 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 385 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 386 sqh->sqtd = NULL; 387 #ifdef EHCI_DEBUG 388 if (ehcidebug) { 389 ehci_dump_sqh(sqh); 390 } 391 #endif 392 393 /* Point to async list */ 394 sc->sc_async_head = sqh; 395 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 396 397 usb_callout_init(sc->sc_tmo_pcd); 398 399 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 400 401 /* Enable interrupts */ 402 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 403 404 /* Turn on controller */ 405 EOWRITE4(sc, EHCI_USBCMD, 406 EHCI_CMD_ITC_8 | /* 8 microframes */ 407 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 408 EHCI_CMD_ASE | 409 /* EHCI_CMD_PSE | */ 410 EHCI_CMD_RS); 411 412 /* Take over port ownership */ 413 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 414 415 for (i = 0; i < 100; i++) { 416 delay(10); 417 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 418 if (!hcr) 419 break; 420 } 421 if (hcr) { 422 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 423 return (USBD_IOERROR); 424 } 425 426 return (USBD_NORMAL_COMPLETION); 427 428 #if 0 429 bad2: 430 ehci_free_sqh(sc, sc->sc_async_head); 431 #endif 432 bad1: 433 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 434 return (err); 435 } 436 437 int 438 ehci_intr(void *v) 439 { 440 ehci_softc_t *sc = v; 441 442 if (sc == NULL || sc->sc_dying) 443 return (0); 444 445 /* If we get an interrupt while polling, then just ignore it. */ 446 if (sc->sc_bus.use_polling) { 447 #ifdef DIAGNOSTIC 448 printf("ehci_intr: ignored interrupt while polling\n"); 449 #endif 450 return (0); 451 } 452 453 return (ehci_intr1(sc)); 454 } 455 456 Static int 457 ehci_intr1(ehci_softc_t *sc) 458 { 459 u_int32_t intrs, eintrs; 460 461 DPRINTFN(20,("ehci_intr1: enter\n")); 462 463 /* In case the interrupt occurs before initialization has completed. */ 464 if (sc == NULL) { 465 #ifdef DIAGNOSTIC 466 printf("ehci_intr: sc == NULL\n"); 467 #endif 468 return (0); 469 } 470 471 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 472 473 if (!intrs) 474 return (0); 475 476 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 477 eintrs = intrs & sc->sc_eintrs; 478 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 479 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 480 (u_int)eintrs)); 481 if (!eintrs) 482 return (0); 483 484 sc->sc_bus.intr_context++; 485 sc->sc_bus.no_intrs++; 486 if (eintrs & EHCI_STS_IAA) { 487 DPRINTF(("ehci_intr1: door bell\n")); 488 wakeup(&sc->sc_async_head); 489 eintrs &= ~EHCI_STS_IAA; 490 } 491 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 492 DPRINTF(("ehci_intr1: %s %s\n", 493 eintrs & EHCI_STS_INT ? "INT" : "", 494 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 495 usb_schedsoftintr(&sc->sc_bus); 496 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 497 } 498 if (eintrs & EHCI_STS_HSE) { 499 printf("%s: unrecoverable error, controller halted\n", 500 USBDEVNAME(sc->sc_bus.bdev)); 501 /* XXX what else */ 502 } 503 if (eintrs & EHCI_STS_PCD) { 504 ehci_pcd(sc, sc->sc_intrxfer); 505 /* 506 * Disable PCD interrupt for now, because it will be 507 * on until the port has been reset. 508 */ 509 ehci_pcd_able(sc, 0); 510 /* Do not allow RHSC interrupts > 1 per second */ 511 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 512 eintrs &= ~EHCI_STS_PCD; 513 } 514 515 sc->sc_bus.intr_context--; 516 517 if (eintrs != 0) { 518 /* Block unprocessed interrupts. */ 519 sc->sc_eintrs &= ~eintrs; 520 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 521 printf("%s: blocking intrs 0x%x\n", 522 USBDEVNAME(sc->sc_bus.bdev), eintrs); 523 } 524 525 return (1); 526 } 527 528 void 529 ehci_pcd_able(ehci_softc_t *sc, int on) 530 { 531 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 532 if (on) 533 sc->sc_eintrs |= EHCI_STS_PCD; 534 else 535 sc->sc_eintrs &= ~EHCI_STS_PCD; 536 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 537 } 538 539 void 540 ehci_pcd_enable(void *v_sc) 541 { 542 ehci_softc_t *sc = v_sc; 543 544 ehci_pcd_able(sc, 1); 545 } 546 547 void 548 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 549 { 550 usbd_pipe_handle pipe; 551 struct ehci_pipe *epipe; 552 u_char *p; 553 int i, m; 554 555 if (xfer == NULL) { 556 /* Just ignore the change. */ 557 return; 558 } 559 560 pipe = xfer->pipe; 561 epipe = (struct ehci_pipe *)pipe; 562 563 p = KERNADDR(&xfer->dmabuf, 0); 564 m = min(sc->sc_noport, xfer->length * 8 - 1); 565 memset(p, 0, xfer->length); 566 for (i = 1; i <= m; i++) { 567 /* Pick out CHANGE bits from the status reg. */ 568 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 569 p[i/8] |= 1 << (i%8); 570 } 571 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 572 xfer->actlen = xfer->length; 573 xfer->status = USBD_NORMAL_COMPLETION; 574 575 usb_transfer_complete(xfer); 576 } 577 578 void 579 ehci_softintr(void *v) 580 { 581 ehci_softc_t *sc = v; 582 struct ehci_xfer *ex; 583 584 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 585 sc->sc_bus.intr_context)); 586 587 sc->sc_bus.intr_context++; 588 589 /* 590 * The only explanation I can think of for why EHCI is as brain dead 591 * as UHCI interrupt-wise is that Intel was involved in both. 592 * An interrupt just tells us that something is done, we have no 593 * clue what, so we need to scan through all active transfers. :-( 594 */ 595 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 596 ehci_check_intr(sc, ex); 597 598 if (sc->sc_softwake) { 599 sc->sc_softwake = 0; 600 wakeup(&sc->sc_softwake); 601 } 602 603 sc->sc_bus.intr_context--; 604 } 605 606 /* Check for an interrupt. */ 607 void 608 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 609 { 610 ehci_soft_qtd_t *sqtd, *lsqtd; 611 u_int32_t status; 612 613 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 614 615 if (ex->sqtdstart == NULL) { 616 printf("ehci_check_intr: sqtdstart=NULL\n"); 617 return; 618 } 619 lsqtd = ex->sqtdend; 620 #ifdef DIAGNOSTIC 621 if (lsqtd == NULL) { 622 printf("ehci_check_intr: sqtd==0\n"); 623 return; 624 } 625 #endif 626 /* 627 * If the last TD is still active we need to check whether there 628 * is a an error somewhere in the middle, or whether there was a 629 * short packet (SPD and not ACTIVE). 630 */ 631 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 632 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 633 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 634 status = le32toh(sqtd->qtd.qtd_status); 635 /* If there's an active QTD the xfer isn't done. */ 636 if (status & EHCI_QTD_ACTIVE) 637 break; 638 /* Any kind of error makes the xfer done. */ 639 if (status & EHCI_QTD_HALTED) 640 goto done; 641 /* We want short packets, and it is short: it's done */ 642 if (EHCI_QTD_SET_BYTES(status) != 0) 643 goto done; 644 } 645 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 646 ex, ex->sqtdstart)); 647 return; 648 } 649 done: 650 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 651 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 652 ehci_idone(ex); 653 } 654 655 void 656 ehci_idone(struct ehci_xfer *ex) 657 { 658 usbd_xfer_handle xfer = &ex->xfer; 659 #ifdef EHCI_DEBUG 660 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 661 #endif 662 ehci_soft_qtd_t *sqtd; 663 u_int32_t status = 0, nstatus; 664 int actlen; 665 666 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 667 #ifdef DIAGNOSTIC 668 { 669 int s = splhigh(); 670 if (ex->isdone) { 671 splx(s); 672 #ifdef EHCI_DEBUG 673 printf("ehci_idone: ex is done!\n "); 674 ehci_dump_exfer(ex); 675 #else 676 printf("ehci_idone: ex=%p is done!\n", ex); 677 #endif 678 return; 679 } 680 ex->isdone = 1; 681 splx(s); 682 } 683 #endif 684 685 if (xfer->status == USBD_CANCELLED || 686 xfer->status == USBD_TIMEOUT) { 687 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 688 return; 689 } 690 691 #ifdef EHCI_DEBUG 692 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 693 if (ehcidebug > 10) 694 ehci_dump_sqtds(ex->sqtdstart); 695 #endif 696 697 /* The transfer is done, compute actual length and status. */ 698 actlen = 0; 699 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 700 nstatus = le32toh(sqtd->qtd.qtd_status); 701 if (nstatus & EHCI_QTD_ACTIVE) 702 break; 703 704 status = nstatus; 705 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 706 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 707 } 708 709 /* If there are left over TDs we need to update the toggle. */ 710 if (sqtd != NULL) { 711 if (!(xfer->rqflags & URQ_REQUEST)) 712 printf("ehci_idone: need toggle update\n"); 713 #if 0 714 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token)); 715 #endif 716 } 717 718 status &= EHCI_QTD_STATERRS; 719 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 720 xfer->length, actlen, status)); 721 xfer->actlen = actlen; 722 if (status != 0) { 723 #ifdef EHCI_DEBUG 724 char sbuf[128]; 725 726 bitmask_snprintf((u_int32_t)status, 727 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE" 728 "\7HALTED", 729 sbuf, sizeof(sbuf)); 730 731 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2, 732 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 733 "status 0x%s\n", 734 xfer->pipe->device->address, 735 xfer->pipe->endpoint->edesc->bEndpointAddress, 736 sbuf)); 737 if (ehcidebug > 2) { 738 ehci_dump_sqh(epipe->sqh); 739 ehci_dump_sqtds(ex->sqtdstart); 740 } 741 #endif 742 if (status == EHCI_QTD_HALTED) 743 xfer->status = USBD_STALLED; 744 else 745 xfer->status = USBD_IOERROR; /* more info XXX */ 746 } else { 747 xfer->status = USBD_NORMAL_COMPLETION; 748 } 749 750 usb_transfer_complete(xfer); 751 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 752 } 753 754 /* 755 * Wait here until controller claims to have an interrupt. 756 * Then call ehci_intr and return. Use timeout to avoid waiting 757 * too long. 758 */ 759 void 760 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 761 { 762 int timo = xfer->timeout; 763 int usecs; 764 u_int32_t intrs; 765 766 xfer->status = USBD_IN_PROGRESS; 767 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 768 usb_delay_ms(&sc->sc_bus, 1); 769 if (sc->sc_dying) 770 break; 771 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 772 sc->sc_eintrs; 773 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 774 #ifdef OHCI_DEBUG 775 if (ehcidebug > 15) 776 ehci_dump_regs(sc); 777 #endif 778 if (intrs) { 779 ehci_intr1(sc); 780 if (xfer->status != USBD_IN_PROGRESS) 781 return; 782 } 783 } 784 785 /* Timeout */ 786 DPRINTF(("ehci_waitintr: timeout\n")); 787 xfer->status = USBD_TIMEOUT; 788 usb_transfer_complete(xfer); 789 /* XXX should free TD */ 790 } 791 792 void 793 ehci_poll(struct usbd_bus *bus) 794 { 795 ehci_softc_t *sc = (ehci_softc_t *)bus; 796 #ifdef EHCI_DEBUG 797 static int last; 798 int new; 799 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 800 if (new != last) { 801 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 802 last = new; 803 } 804 #endif 805 806 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 807 ehci_intr1(sc); 808 } 809 810 int 811 ehci_detach(struct ehci_softc *sc, int flags) 812 { 813 int rv = 0; 814 815 if (sc->sc_child != NULL) 816 rv = config_detach(sc->sc_child, flags); 817 818 if (rv != 0) 819 return (rv); 820 821 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 822 823 if (sc->sc_powerhook != NULL) 824 powerhook_disestablish(sc->sc_powerhook); 825 if (sc->sc_shutdownhook != NULL) 826 shutdownhook_disestablish(sc->sc_shutdownhook); 827 828 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 829 830 /* XXX free other data structures XXX */ 831 832 return (rv); 833 } 834 835 836 int 837 ehci_activate(device_ptr_t self, enum devact act) 838 { 839 struct ehci_softc *sc = (struct ehci_softc *)self; 840 int rv = 0; 841 842 switch (act) { 843 case DVACT_ACTIVATE: 844 return (EOPNOTSUPP); 845 break; 846 847 case DVACT_DEACTIVATE: 848 if (sc->sc_child != NULL) 849 rv = config_deactivate(sc->sc_child); 850 sc->sc_dying = 1; 851 break; 852 } 853 return (rv); 854 } 855 856 /* 857 * Handle suspend/resume. 858 * 859 * We need to switch to polling mode here, because this routine is 860 * called from an intterupt context. This is all right since we 861 * are almost suspended anyway. 862 */ 863 void 864 ehci_power(int why, void *v) 865 { 866 ehci_softc_t *sc = v; 867 //u_int32_t ctl; 868 int s; 869 870 #ifdef EHCI_DEBUG 871 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 872 ehci_dump_regs(sc); 873 #endif 874 875 s = splhardusb(); 876 switch (why) { 877 case PWR_SUSPEND: 878 case PWR_STANDBY: 879 sc->sc_bus.use_polling++; 880 #if 0 881 OOO 882 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK; 883 if (sc->sc_control == 0) { 884 /* 885 * Preserve register values, in case that APM BIOS 886 * does not recover them. 887 */ 888 sc->sc_control = ctl; 889 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE); 890 } 891 ctl |= EHCI_HCFS_SUSPEND; 892 OWRITE4(sc, EHCI_CONTROL, ctl); 893 #endif 894 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 895 sc->sc_bus.use_polling--; 896 break; 897 case PWR_RESUME: 898 sc->sc_bus.use_polling++; 899 #if 0 900 OOO 901 /* Some broken BIOSes do not recover these values */ 902 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 903 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 904 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 905 if (sc->sc_intre) 906 OWRITE4(sc, EHCI_INTERRUPT_ENABLE, 907 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE)); 908 if (sc->sc_control) 909 ctl = sc->sc_control; 910 else 911 ctl = OREAD4(sc, EHCI_CONTROL); 912 ctl |= EHCI_HCFS_RESUME; 913 OWRITE4(sc, EHCI_CONTROL, ctl); 914 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 915 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL; 916 OWRITE4(sc, EHCI_CONTROL, ctl); 917 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 918 sc->sc_control = sc->sc_intre = 0; 919 #endif 920 sc->sc_bus.use_polling--; 921 break; 922 case PWR_SOFTSUSPEND: 923 case PWR_SOFTSTANDBY: 924 case PWR_SOFTRESUME: 925 break; 926 } 927 splx(s); 928 } 929 930 /* 931 * Shut down the controller when the system is going down. 932 */ 933 void 934 ehci_shutdown(void *v) 935 { 936 ehci_softc_t *sc = v; 937 938 DPRINTF(("ehci_shutdown: stopping the HC\n")); 939 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 940 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 941 } 942 943 usbd_status 944 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 945 { 946 struct ehci_softc *sc = (struct ehci_softc *)bus; 947 usbd_status err; 948 949 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 950 #ifdef EHCI_DEBUG 951 if (err) 952 printf("ehci_allocm: usb_allocmem()=%d\n", err); 953 #endif 954 return (err); 955 } 956 957 void 958 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 959 { 960 struct ehci_softc *sc = (struct ehci_softc *)bus; 961 962 usb_freemem(&sc->sc_bus, dma); 963 } 964 965 usbd_xfer_handle 966 ehci_allocx(struct usbd_bus *bus) 967 { 968 struct ehci_softc *sc = (struct ehci_softc *)bus; 969 usbd_xfer_handle xfer; 970 971 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 972 if (xfer != NULL) { 973 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 974 #ifdef DIAGNOSTIC 975 if (xfer->busy_free != XFER_FREE) { 976 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 977 xfer->busy_free); 978 } 979 #endif 980 } else { 981 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 982 } 983 if (xfer != NULL) { 984 memset(xfer, 0, sizeof (struct ehci_xfer)); 985 #ifdef DIAGNOSTIC 986 EXFER(xfer)->isdone = 1; 987 xfer->busy_free = XFER_BUSY; 988 #endif 989 } 990 return (xfer); 991 } 992 993 void 994 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 995 { 996 struct ehci_softc *sc = (struct ehci_softc *)bus; 997 998 #ifdef DIAGNOSTIC 999 if (xfer->busy_free != XFER_BUSY) { 1000 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1001 xfer->busy_free); 1002 return; 1003 } 1004 xfer->busy_free = XFER_FREE; 1005 if (!EXFER(xfer)->isdone) { 1006 printf("ehci_freex: !isdone\n"); 1007 return; 1008 } 1009 #endif 1010 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1011 } 1012 1013 Static void 1014 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1015 { 1016 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1017 1018 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1019 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1020 #ifdef USB_DEBUG 1021 if (ehcidebug) 1022 usbd_dump_pipe(pipe); 1023 #endif 1024 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 1025 } 1026 1027 Static void 1028 ehci_noop(usbd_pipe_handle pipe) 1029 { 1030 } 1031 1032 #ifdef EHCI_DEBUG 1033 void 1034 ehci_dump_regs(ehci_softc_t *sc) 1035 { 1036 int i; 1037 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1038 EOREAD4(sc, EHCI_USBCMD), 1039 EOREAD4(sc, EHCI_USBSTS), 1040 EOREAD4(sc, EHCI_USBINTR)); 1041 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1042 EOREAD4(sc, EHCI_FRINDEX), 1043 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1044 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1045 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1046 for (i = 1; i <= sc->sc_noport; i++) 1047 printf("port %d status=0x%08x\n", i, 1048 EOREAD4(sc, EHCI_PORTSC(i))); 1049 } 1050 1051 void 1052 ehci_dump() 1053 { 1054 ehci_dump_regs(theehci); 1055 } 1056 1057 void 1058 ehci_dump_link(ehci_link_t link, int type) 1059 { 1060 link = le32toh(link); 1061 printf("0x%08x", link); 1062 if (link & EHCI_LINK_TERMINATE) 1063 printf("<T>"); 1064 else { 1065 printf("<"); 1066 if (type) { 1067 switch (EHCI_LINK_TYPE(link)) { 1068 case EHCI_LINK_ITD: printf("ITD"); break; 1069 case EHCI_LINK_QH: printf("QH"); break; 1070 case EHCI_LINK_SITD: printf("SITD"); break; 1071 case EHCI_LINK_FSTN: printf("FSTN"); break; 1072 } 1073 } 1074 printf(">"); 1075 } 1076 } 1077 1078 void 1079 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1080 { 1081 int i; 1082 u_int32_t stop; 1083 1084 stop = 0; 1085 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1086 ehci_dump_sqtd(sqtd); 1087 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE; 1088 } 1089 if (sqtd) 1090 printf("dump aborted, too many TDs\n"); 1091 } 1092 1093 void 1094 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1095 { 1096 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1097 ehci_dump_qtd(&sqtd->qtd); 1098 } 1099 1100 void 1101 ehci_dump_qtd(ehci_qtd_t *qtd) 1102 { 1103 u_int32_t s; 1104 char sbuf[128]; 1105 1106 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1107 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1108 printf("\n"); 1109 s = le32toh(qtd->qtd_status); 1110 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1111 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1112 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1113 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1114 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1115 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1116 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1117 EHCI_QTD_GET_PID(s), sbuf); 1118 for (s = 0; s < 5; s++) 1119 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1120 } 1121 1122 void 1123 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1124 { 1125 ehci_qh_t *qh = &sqh->qh; 1126 u_int32_t endp, endphub; 1127 1128 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1129 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1130 endp = le32toh(qh->qh_endp); 1131 printf(" endp=0x%08x\n", endp); 1132 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1133 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1134 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1135 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1136 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1137 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1138 EHCI_QH_GET_NRL(endp)); 1139 endphub = le32toh(qh->qh_endphub); 1140 printf(" endphub=0x%08x\n", endphub); 1141 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1142 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1143 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1144 EHCI_QH_GET_MULT(endphub)); 1145 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1146 printf("Overlay qTD:\n"); 1147 ehci_dump_qtd(&qh->qh_qtd); 1148 } 1149 1150 Static void 1151 ehci_dump_exfer(struct ehci_xfer *ex) 1152 { 1153 printf("ehci_dump_exfer: ex=%p\n", ex); 1154 } 1155 #endif 1156 1157 usbd_status 1158 ehci_open(usbd_pipe_handle pipe) 1159 { 1160 usbd_device_handle dev = pipe->device; 1161 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1162 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1163 u_int8_t addr = dev->address; 1164 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1165 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1166 ehci_soft_qh_t *sqh; 1167 usbd_status err; 1168 int s; 1169 int speed, naks; 1170 1171 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1172 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1173 1174 if (sc->sc_dying) 1175 return (USBD_IOERROR); 1176 1177 if (addr == sc->sc_addr) { 1178 switch (ed->bEndpointAddress) { 1179 case USB_CONTROL_ENDPOINT: 1180 pipe->methods = &ehci_root_ctrl_methods; 1181 break; 1182 case UE_DIR_IN | EHCI_INTR_ENDPT: 1183 pipe->methods = &ehci_root_intr_methods; 1184 break; 1185 default: 1186 return (USBD_INVAL); 1187 } 1188 return (USBD_NORMAL_COMPLETION); 1189 } 1190 1191 /* XXX All this stuff is only valid for async. */ 1192 switch (dev->speed) { 1193 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1194 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1195 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1196 default: panic("ehci_open: bad device speed %d\n", dev->speed); 1197 } 1198 naks = 8; /* XXX */ 1199 sqh = ehci_alloc_sqh(sc); 1200 if (sqh == NULL) 1201 goto bad0; 1202 /* qh_link filled when the QH is added */ 1203 sqh->qh.qh_endp = htole32( 1204 EHCI_QH_SET_ADDR(addr) | 1205 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) | 1206 EHCI_QH_SET_EPS(speed) | /* XXX */ 1207 /* XXX EHCI_QH_DTC ? */ 1208 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1209 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1210 EHCI_QH_CTL : 0) | 1211 EHCI_QH_SET_NRL(naks) 1212 ); 1213 sqh->qh.qh_endphub = htole32( 1214 EHCI_QH_SET_MULT(1) 1215 /* XXX TT stuff */ 1216 /* XXX interrupt mask */ 1217 ); 1218 sqh->qh.qh_curqtd = EHCI_NULL; 1219 /* Fill the overlay qTD */ 1220 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1221 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1222 sqh->qh.qh_qtd.qtd_status = htole32(0); 1223 1224 epipe->sqh = sqh; 1225 1226 switch (xfertype) { 1227 case UE_CONTROL: 1228 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1229 0, &epipe->u.ctl.reqdma); 1230 #ifdef EHCI_DEBUG 1231 if (err) 1232 printf("ehci_open: usb_allocmem()=%d\n", err); 1233 #endif 1234 if (err) 1235 goto bad1; 1236 pipe->methods = &ehci_device_ctrl_methods; 1237 s = splusb(); 1238 ehci_add_qh(sqh, sc->sc_async_head); 1239 splx(s); 1240 break; 1241 case UE_BULK: 1242 pipe->methods = &ehci_device_bulk_methods; 1243 s = splusb(); 1244 ehci_add_qh(sqh, sc->sc_async_head); 1245 splx(s); 1246 break; 1247 case UE_INTERRUPT: 1248 pipe->methods = &ehci_device_intr_methods; 1249 return (USBD_INVAL); 1250 case UE_ISOCHRONOUS: 1251 pipe->methods = &ehci_device_isoc_methods; 1252 return (USBD_INVAL); 1253 default: 1254 return (USBD_INVAL); 1255 } 1256 return (USBD_NORMAL_COMPLETION); 1257 1258 bad1: 1259 ehci_free_sqh(sc, sqh); 1260 bad0: 1261 return (USBD_NOMEM); 1262 } 1263 1264 /* 1265 * Add an ED to the schedule. Called at splusb(). 1266 */ 1267 void 1268 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1269 { 1270 SPLUSBCHECK; 1271 1272 sqh->next = head->next; 1273 sqh->qh.qh_link = head->qh.qh_link; 1274 head->next = sqh; 1275 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1276 1277 #ifdef EHCI_DEBUG 1278 if (ehcidebug > 5) { 1279 printf("ehci_add_qh:\n"); 1280 ehci_dump_sqh(sqh); 1281 } 1282 #endif 1283 } 1284 1285 /* 1286 * Remove an ED from the schedule. Called at splusb(). 1287 */ 1288 void 1289 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1290 { 1291 ehci_soft_qh_t *p; 1292 1293 SPLUSBCHECK; 1294 /* XXX */ 1295 for (p = head; p == NULL && p->next != sqh; p = p->next) 1296 ; 1297 if (p == NULL) 1298 panic("ehci_rem_qh: ED not found\n"); 1299 p->next = sqh->next; 1300 p->qh.qh_link = sqh->qh.qh_link; 1301 1302 ehci_sync_hc(sc); 1303 } 1304 1305 void 1306 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1307 { 1308 /* Halt while we are messing. */ 1309 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1310 sqh->qh.qh_curqtd = 0; 1311 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1312 sqh->sqtd = sqtd; 1313 /* Keep toggle, clear the rest, including length. */ 1314 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE); 1315 } 1316 1317 /* 1318 * Ensure that the HC has released all references to the QH. We do this 1319 * by asking for a Async Advance Doorbell interrupt and then we wait for 1320 * the interrupt. 1321 * To make this easier we first obtain exclusive use of the doorbell. 1322 */ 1323 void 1324 ehci_sync_hc(ehci_softc_t *sc) 1325 { 1326 int s, error; 1327 1328 if (sc->sc_dying) { 1329 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1330 return; 1331 } 1332 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1333 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1334 s = splhardusb(); 1335 /* ask for doorbell */ 1336 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1337 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1338 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1339 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1340 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1341 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1342 splx(s); 1343 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1344 #ifdef DIAGNOSTIC 1345 if (error) 1346 printf("ehci_sync_hc: tsleep() = %d\n", error); 1347 #endif 1348 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1349 } 1350 1351 /***********/ 1352 1353 /* 1354 * Data structures and routines to emulate the root hub. 1355 */ 1356 Static usb_device_descriptor_t ehci_devd = { 1357 USB_DEVICE_DESCRIPTOR_SIZE, 1358 UDESC_DEVICE, /* type */ 1359 {0x00, 0x02}, /* USB version */ 1360 UDCLASS_HUB, /* class */ 1361 UDSUBCLASS_HUB, /* subclass */ 1362 UDPROTO_HSHUBSTT, /* protocol */ 1363 64, /* max packet */ 1364 {0},{0},{0x00,0x01}, /* device id */ 1365 1,2,0, /* string indicies */ 1366 1 /* # of configurations */ 1367 }; 1368 1369 Static usb_device_qualifier_t ehci_odevd = { 1370 USB_DEVICE_DESCRIPTOR_SIZE, 1371 UDESC_DEVICE_QUALIFIER, /* type */ 1372 {0x00, 0x02}, /* USB version */ 1373 UDCLASS_HUB, /* class */ 1374 UDSUBCLASS_HUB, /* subclass */ 1375 UDPROTO_FSHUB, /* protocol */ 1376 64, /* max packet */ 1377 1, /* # of configurations */ 1378 0 1379 }; 1380 1381 Static usb_config_descriptor_t ehci_confd = { 1382 USB_CONFIG_DESCRIPTOR_SIZE, 1383 UDESC_CONFIG, 1384 {USB_CONFIG_DESCRIPTOR_SIZE + 1385 USB_INTERFACE_DESCRIPTOR_SIZE + 1386 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1387 1, 1388 1, 1389 0, 1390 UC_SELF_POWERED, 1391 0 /* max power */ 1392 }; 1393 1394 Static usb_interface_descriptor_t ehci_ifcd = { 1395 USB_INTERFACE_DESCRIPTOR_SIZE, 1396 UDESC_INTERFACE, 1397 0, 1398 0, 1399 1, 1400 UICLASS_HUB, 1401 UISUBCLASS_HUB, 1402 UIPROTO_HSHUBSTT, 1403 0 1404 }; 1405 1406 Static usb_endpoint_descriptor_t ehci_endpd = { 1407 USB_ENDPOINT_DESCRIPTOR_SIZE, 1408 UDESC_ENDPOINT, 1409 UE_DIR_IN | EHCI_INTR_ENDPT, 1410 UE_INTERRUPT, 1411 {8, 0}, /* max packet */ 1412 255 1413 }; 1414 1415 Static usb_hub_descriptor_t ehci_hubd = { 1416 USB_HUB_DESCRIPTOR_SIZE, 1417 UDESC_HUB, 1418 0, 1419 {0,0}, 1420 0, 1421 0, 1422 {0}, 1423 }; 1424 1425 Static int 1426 ehci_str(p, l, s) 1427 usb_string_descriptor_t *p; 1428 int l; 1429 char *s; 1430 { 1431 int i; 1432 1433 if (l == 0) 1434 return (0); 1435 p->bLength = 2 * strlen(s) + 2; 1436 if (l == 1) 1437 return (1); 1438 p->bDescriptorType = UDESC_STRING; 1439 l -= 2; 1440 for (i = 0; s[i] && l > 1; i++, l -= 2) 1441 USETW2(p->bString[i], 0, s[i]); 1442 return (2*i+2); 1443 } 1444 1445 /* 1446 * Simulate a hardware hub by handling all the necessary requests. 1447 */ 1448 Static usbd_status 1449 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1450 { 1451 usbd_status err; 1452 1453 /* Insert last in queue. */ 1454 err = usb_insert_transfer(xfer); 1455 if (err) 1456 return (err); 1457 1458 /* Pipe isn't running, start first */ 1459 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1460 } 1461 1462 Static usbd_status 1463 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1464 { 1465 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1466 usb_device_request_t *req; 1467 void *buf = NULL; 1468 int port, i; 1469 int s, len, value, index, l, totlen = 0; 1470 usb_port_status_t ps; 1471 usb_hub_descriptor_t hubd; 1472 usbd_status err; 1473 u_int32_t v; 1474 1475 if (sc->sc_dying) 1476 return (USBD_IOERROR); 1477 1478 #ifdef DIAGNOSTIC 1479 if (!(xfer->rqflags & URQ_REQUEST)) 1480 /* XXX panic */ 1481 return (USBD_INVAL); 1482 #endif 1483 req = &xfer->request; 1484 1485 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n", 1486 req->bmRequestType, req->bRequest)); 1487 1488 len = UGETW(req->wLength); 1489 value = UGETW(req->wValue); 1490 index = UGETW(req->wIndex); 1491 1492 if (len != 0) 1493 buf = KERNADDR(&xfer->dmabuf, 0); 1494 1495 #define C(x,y) ((x) | ((y) << 8)) 1496 switch(C(req->bRequest, req->bmRequestType)) { 1497 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1498 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1499 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1500 /* 1501 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1502 * for the integrated root hub. 1503 */ 1504 break; 1505 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1506 if (len > 0) { 1507 *(u_int8_t *)buf = sc->sc_conf; 1508 totlen = 1; 1509 } 1510 break; 1511 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1512 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value)); 1513 switch(value >> 8) { 1514 case UDESC_DEVICE: 1515 if ((value & 0xff) != 0) { 1516 err = USBD_IOERROR; 1517 goto ret; 1518 } 1519 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1520 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1521 memcpy(buf, &ehci_devd, l); 1522 break; 1523 /* 1524 * We can't really operate at another speed, but the spec says 1525 * we need this descriptor. 1526 */ 1527 case UDESC_DEVICE_QUALIFIER: 1528 if ((value & 0xff) != 0) { 1529 err = USBD_IOERROR; 1530 goto ret; 1531 } 1532 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1533 memcpy(buf, &ehci_odevd, l); 1534 break; 1535 /* 1536 * We can't really operate at another speed, but the spec says 1537 * we need this descriptor. 1538 */ 1539 case UDESC_OTHER_SPEED_CONFIGURATION: 1540 case UDESC_CONFIG: 1541 if ((value & 0xff) != 0) { 1542 err = USBD_IOERROR; 1543 goto ret; 1544 } 1545 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1546 memcpy(buf, &ehci_confd, l); 1547 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1548 value >> 8; 1549 buf = (char *)buf + l; 1550 len -= l; 1551 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1552 totlen += l; 1553 memcpy(buf, &ehci_ifcd, l); 1554 buf = (char *)buf + l; 1555 len -= l; 1556 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1557 totlen += l; 1558 memcpy(buf, &ehci_endpd, l); 1559 break; 1560 case UDESC_STRING: 1561 if (len == 0) 1562 break; 1563 *(u_int8_t *)buf = 0; 1564 totlen = 1; 1565 switch (value & 0xff) { 1566 case 1: /* Vendor */ 1567 totlen = ehci_str(buf, len, sc->sc_vendor); 1568 break; 1569 case 2: /* Product */ 1570 totlen = ehci_str(buf, len, "EHCI root hub"); 1571 break; 1572 } 1573 break; 1574 default: 1575 err = USBD_IOERROR; 1576 goto ret; 1577 } 1578 break; 1579 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1580 if (len > 0) { 1581 *(u_int8_t *)buf = 0; 1582 totlen = 1; 1583 } 1584 break; 1585 case C(UR_GET_STATUS, UT_READ_DEVICE): 1586 if (len > 1) { 1587 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1588 totlen = 2; 1589 } 1590 break; 1591 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1592 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1593 if (len > 1) { 1594 USETW(((usb_status_t *)buf)->wStatus, 0); 1595 totlen = 2; 1596 } 1597 break; 1598 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1599 if (value >= USB_MAX_DEVICES) { 1600 err = USBD_IOERROR; 1601 goto ret; 1602 } 1603 sc->sc_addr = value; 1604 break; 1605 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1606 if (value != 0 && value != 1) { 1607 err = USBD_IOERROR; 1608 goto ret; 1609 } 1610 sc->sc_conf = value; 1611 break; 1612 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1613 break; 1614 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1615 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1616 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1617 err = USBD_IOERROR; 1618 goto ret; 1619 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1620 break; 1621 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1622 break; 1623 /* Hub requests */ 1624 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1625 break; 1626 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1627 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1628 "port=%d feature=%d\n", 1629 index, value)); 1630 if (index < 1 || index > sc->sc_noport) { 1631 err = USBD_IOERROR; 1632 goto ret; 1633 } 1634 port = EHCI_PORTSC(index); 1635 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1636 switch(value) { 1637 case UHF_PORT_ENABLE: 1638 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1639 break; 1640 case UHF_PORT_SUSPEND: 1641 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1642 break; 1643 case UHF_PORT_POWER: 1644 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1645 break; 1646 case UHF_PORT_TEST: 1647 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test " 1648 "%d\n", index)); 1649 break; 1650 case UHF_PORT_INDICATOR: 1651 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind " 1652 "%d\n", index)); 1653 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1654 break; 1655 case UHF_C_PORT_CONNECTION: 1656 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1657 break; 1658 case UHF_C_PORT_ENABLE: 1659 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1660 break; 1661 case UHF_C_PORT_SUSPEND: 1662 /* how? */ 1663 break; 1664 case UHF_C_PORT_OVER_CURRENT: 1665 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1666 break; 1667 case UHF_C_PORT_RESET: 1668 sc->sc_isreset = 0; 1669 break; 1670 default: 1671 err = USBD_IOERROR; 1672 goto ret; 1673 } 1674 #if 0 1675 switch(value) { 1676 case UHF_C_PORT_CONNECTION: 1677 case UHF_C_PORT_ENABLE: 1678 case UHF_C_PORT_SUSPEND: 1679 case UHF_C_PORT_OVER_CURRENT: 1680 case UHF_C_PORT_RESET: 1681 /* Enable RHSC interrupt if condition is cleared. */ 1682 if ((OREAD4(sc, port) >> 16) == 0) 1683 ehci_pcd_able(sc, 1); 1684 break; 1685 default: 1686 break; 1687 } 1688 #endif 1689 break; 1690 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1691 if (value != 0) { 1692 err = USBD_IOERROR; 1693 goto ret; 1694 } 1695 hubd = ehci_hubd; 1696 hubd.bNbrPorts = sc->sc_noport; 1697 v = EOREAD4(sc, EHCI_HCSPARAMS); 1698 USETW(hubd.wHubCharacteristics, 1699 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1700 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1701 ? UHD_PORT_IND : 0); 1702 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1703 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1704 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1705 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1706 l = min(len, hubd.bDescLength); 1707 totlen = l; 1708 memcpy(buf, &hubd, l); 1709 break; 1710 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1711 if (len != 4) { 1712 err = USBD_IOERROR; 1713 goto ret; 1714 } 1715 memset(buf, 0, len); /* ? XXX */ 1716 totlen = len; 1717 break; 1718 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1719 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n", 1720 index)); 1721 if (index < 1 || index > sc->sc_noport) { 1722 err = USBD_IOERROR; 1723 goto ret; 1724 } 1725 if (len != 4) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 v = EOREAD4(sc, EHCI_PORTSC(index)); 1730 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n", 1731 v)); 1732 i = UPS_HIGH_SPEED; 1733 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1734 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1735 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1736 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1737 if (v & EHCI_PS_PR) i |= UPS_RESET; 1738 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1739 USETW(ps.wPortStatus, i); 1740 i = 0; 1741 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1742 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1743 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1744 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1745 USETW(ps.wPortChange, i); 1746 l = min(len, sizeof ps); 1747 memcpy(buf, &ps, l); 1748 totlen = l; 1749 break; 1750 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1751 err = USBD_IOERROR; 1752 goto ret; 1753 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1754 break; 1755 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1756 if (index < 1 || index > sc->sc_noport) { 1757 err = USBD_IOERROR; 1758 goto ret; 1759 } 1760 port = EHCI_PORTSC(index); 1761 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1762 switch(value) { 1763 case UHF_PORT_ENABLE: 1764 EOWRITE4(sc, port, v | EHCI_PS_PE); 1765 break; 1766 case UHF_PORT_SUSPEND: 1767 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1768 break; 1769 case UHF_PORT_RESET: 1770 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n", 1771 index)); 1772 if (EHCI_PS_IS_LOWSPEED(v)) { 1773 /* Low speed device, give up ownership. */ 1774 ehci_disown(sc, index, 1); 1775 break; 1776 } 1777 /* Start reset sequence. */ 1778 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1779 EOWRITE4(sc, port, v | EHCI_PS_PR); 1780 /* Wait for reset to complete. */ 1781 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1782 if (sc->sc_dying) { 1783 err = USBD_IOERROR; 1784 goto ret; 1785 } 1786 /* Terminate reset sequence. */ 1787 EOWRITE4(sc, port, v); 1788 /* Wait for HC to complete reset. */ 1789 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1790 if (sc->sc_dying) { 1791 err = USBD_IOERROR; 1792 goto ret; 1793 } 1794 v = EOREAD4(sc, port); 1795 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1796 if (v & EHCI_PS_PR) { 1797 printf("%s: port reset timeout\n", 1798 USBDEVNAME(sc->sc_bus.bdev)); 1799 return (USBD_TIMEOUT); 1800 } 1801 if (!(v & EHCI_PS_PE)) { 1802 /* Not a high speed device, give up ownership.*/ 1803 ehci_disown(sc, index, 0); 1804 break; 1805 } 1806 sc->sc_isreset = 1; 1807 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1808 index, v)); 1809 break; 1810 case UHF_PORT_POWER: 1811 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power " 1812 "%d\n", index)); 1813 EOWRITE4(sc, port, v | EHCI_PS_PP); 1814 break; 1815 case UHF_PORT_TEST: 1816 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test " 1817 "%d\n", index)); 1818 break; 1819 case UHF_PORT_INDICATOR: 1820 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind " 1821 "%d\n", index)); 1822 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1823 break; 1824 default: 1825 err = USBD_IOERROR; 1826 goto ret; 1827 } 1828 break; 1829 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1830 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1831 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1832 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1833 break; 1834 default: 1835 err = USBD_IOERROR; 1836 goto ret; 1837 } 1838 xfer->actlen = totlen; 1839 err = USBD_NORMAL_COMPLETION; 1840 ret: 1841 xfer->status = err; 1842 s = splusb(); 1843 usb_transfer_complete(xfer); 1844 splx(s); 1845 return (USBD_IN_PROGRESS); 1846 } 1847 1848 void 1849 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1850 { 1851 int port; 1852 u_int32_t v; 1853 1854 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 1855 #ifdef DIAGNOSTIC 1856 if (sc->sc_npcomp != 0) { 1857 int i = (index-1) / sc->sc_npcomp; 1858 if (i >= sc->sc_ncomp) 1859 printf("%s: strange port\n", 1860 USBDEVNAME(sc->sc_bus.bdev)); 1861 else 1862 printf("%s: handing over %s speed device on " 1863 "port %d to %s\n", 1864 USBDEVNAME(sc->sc_bus.bdev), 1865 lowspeed ? "low" : "full", 1866 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 1867 } else { 1868 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 1869 } 1870 #endif 1871 port = EHCI_PORTSC(index); 1872 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1873 EOWRITE4(sc, port, v | EHCI_PS_PO); 1874 } 1875 1876 /* Abort a root control request. */ 1877 Static void 1878 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 1879 { 1880 /* Nothing to do, all transfers are synchronous. */ 1881 } 1882 1883 /* Close the root pipe. */ 1884 Static void 1885 ehci_root_ctrl_close(usbd_pipe_handle pipe) 1886 { 1887 DPRINTF(("ehci_root_ctrl_close\n")); 1888 /* Nothing to do. */ 1889 } 1890 1891 void 1892 ehci_root_intr_done(usbd_xfer_handle xfer) 1893 { 1894 xfer->hcpriv = NULL; 1895 } 1896 1897 Static usbd_status 1898 ehci_root_intr_transfer(usbd_xfer_handle xfer) 1899 { 1900 usbd_status err; 1901 1902 /* Insert last in queue. */ 1903 err = usb_insert_transfer(xfer); 1904 if (err) 1905 return (err); 1906 1907 /* Pipe isn't running, start first */ 1908 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1909 } 1910 1911 Static usbd_status 1912 ehci_root_intr_start(usbd_xfer_handle xfer) 1913 { 1914 usbd_pipe_handle pipe = xfer->pipe; 1915 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1916 1917 if (sc->sc_dying) 1918 return (USBD_IOERROR); 1919 1920 sc->sc_intrxfer = xfer; 1921 1922 return (USBD_IN_PROGRESS); 1923 } 1924 1925 /* Abort a root interrupt request. */ 1926 Static void 1927 ehci_root_intr_abort(usbd_xfer_handle xfer) 1928 { 1929 int s; 1930 1931 if (xfer->pipe->intrxfer == xfer) { 1932 DPRINTF(("ehci_root_intr_abort: remove\n")); 1933 xfer->pipe->intrxfer = NULL; 1934 } 1935 xfer->status = USBD_CANCELLED; 1936 s = splusb(); 1937 usb_transfer_complete(xfer); 1938 splx(s); 1939 } 1940 1941 /* Close the root pipe. */ 1942 Static void 1943 ehci_root_intr_close(usbd_pipe_handle pipe) 1944 { 1945 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 1946 1947 DPRINTF(("ehci_root_intr_close\n")); 1948 1949 sc->sc_intrxfer = NULL; 1950 } 1951 1952 void 1953 ehci_root_ctrl_done(usbd_xfer_handle xfer) 1954 { 1955 xfer->hcpriv = NULL; 1956 } 1957 1958 /************************/ 1959 1960 ehci_soft_qh_t * 1961 ehci_alloc_sqh(ehci_softc_t *sc) 1962 { 1963 ehci_soft_qh_t *sqh; 1964 usbd_status err; 1965 int i, offs; 1966 usb_dma_t dma; 1967 1968 if (sc->sc_freeqhs == NULL) { 1969 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 1970 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 1971 EHCI_PAGE_SIZE, &dma); 1972 #ifdef EHCI_DEBUG 1973 if (err) 1974 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 1975 #endif 1976 if (err) 1977 return (NULL); 1978 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 1979 offs = i * EHCI_SQH_SIZE; 1980 sqh = KERNADDR(&dma, offs); 1981 sqh->physaddr = DMAADDR(&dma, offs); 1982 sqh->next = sc->sc_freeqhs; 1983 sc->sc_freeqhs = sqh; 1984 } 1985 } 1986 sqh = sc->sc_freeqhs; 1987 sc->sc_freeqhs = sqh->next; 1988 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 1989 sqh->next = NULL; 1990 return (sqh); 1991 } 1992 1993 void 1994 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 1995 { 1996 sqh->next = sc->sc_freeqhs; 1997 sc->sc_freeqhs = sqh; 1998 } 1999 2000 ehci_soft_qtd_t * 2001 ehci_alloc_sqtd(ehci_softc_t *sc) 2002 { 2003 ehci_soft_qtd_t *sqtd; 2004 usbd_status err; 2005 int i, offs; 2006 usb_dma_t dma; 2007 int s; 2008 2009 if (sc->sc_freeqtds == NULL) { 2010 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2011 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2012 EHCI_PAGE_SIZE, &dma); 2013 #ifdef EHCI_DEBUG 2014 if (err) 2015 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2016 #endif 2017 if (err) 2018 return (NULL); 2019 s = splusb(); 2020 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2021 offs = i * EHCI_SQTD_SIZE; 2022 sqtd = KERNADDR(&dma, offs); 2023 sqtd->physaddr = DMAADDR(&dma, offs); 2024 sqtd->nextqtd = sc->sc_freeqtds; 2025 sc->sc_freeqtds = sqtd; 2026 } 2027 splx(s); 2028 } 2029 2030 s = splusb(); 2031 sqtd = sc->sc_freeqtds; 2032 sc->sc_freeqtds = sqtd->nextqtd; 2033 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2034 sqtd->nextqtd = NULL; 2035 sqtd->xfer = NULL; 2036 splx(s); 2037 2038 return (sqtd); 2039 } 2040 2041 void 2042 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2043 { 2044 int s; 2045 2046 s = splusb(); 2047 sqtd->nextqtd = sc->sc_freeqtds; 2048 sc->sc_freeqtds = sqtd; 2049 splx(s); 2050 } 2051 2052 usbd_status 2053 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2054 int alen, int rd, usbd_xfer_handle xfer, 2055 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2056 { 2057 ehci_soft_qtd_t *next, *cur; 2058 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2059 u_int32_t qtdstatus; 2060 int len, curlen; 2061 int i; 2062 usb_dma_t *dma = &xfer->dmabuf; 2063 2064 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2065 2066 len = alen; 2067 dataphys = DMAADDR(dma, 0); 2068 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2069 qtdstatus = htole32( 2070 EHCI_QTD_ACTIVE | 2071 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2072 EHCI_QTD_SET_CERR(3) 2073 /* IOC set below */ 2074 /* BYTES set below */ 2075 /* XXX Data toggle */ 2076 ); 2077 2078 cur = ehci_alloc_sqtd(sc); 2079 *sp = cur; 2080 if (cur == NULL) 2081 goto nomem; 2082 for (;;) { 2083 dataphyspage = EHCI_PAGE(dataphys); 2084 /* The EHCI hardware can handle at most 5 pages. */ 2085 if (dataphyslastpage - dataphyspage < 2086 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2087 /* we can handle it in this QTD */ 2088 curlen = len; 2089 } else { 2090 /* must use multiple TDs, fill as much as possible. */ 2091 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2092 EHCI_PAGE_OFFSET(dataphys); 2093 #ifdef DIAGNOSTIC 2094 if (curlen > len) { 2095 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2096 "len=0x%x offs=0x%x\n", curlen, len, 2097 EHCI_PAGE_OFFSET(dataphys)); 2098 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2099 dataphyslastpage, dataphyspage, 2100 dataphys); 2101 curlen = len; 2102 } 2103 #endif 2104 2105 /* XXX true for EHCI? */ 2106 /* the length must be a multiple of the max size */ 2107 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2108 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2109 "curlen=%d\n", curlen)); 2110 #ifdef DIAGNOSTIC 2111 if (curlen == 0) 2112 panic("ehci_alloc_std: curlen == 0\n"); 2113 #endif 2114 } 2115 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2116 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2117 dataphys, dataphyslastpage, 2118 len, curlen)); 2119 len -= curlen; 2120 2121 if (len != 0) { 2122 next = ehci_alloc_sqtd(sc); 2123 if (next == NULL) 2124 goto nomem; 2125 nextphys = next->physaddr; 2126 } else { 2127 next = NULL; 2128 nextphys = EHCI_NULL; 2129 } 2130 2131 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2132 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2133 if (i != 0) /* use offset only in first buffer */ 2134 a = EHCI_PAGE(a); 2135 cur->qtd.qtd_buffer[i] = htole32(a); 2136 #ifdef DIAGNOSTIC 2137 if (i >= EHCI_QTD_NBUFFERS) { 2138 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2139 goto nomem; 2140 } 2141 #endif 2142 } 2143 cur->nextqtd = next; 2144 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys); 2145 cur->qtd.qtd_status = 2146 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen)); 2147 cur->xfer = xfer; 2148 cur->len = curlen; 2149 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2150 dataphys, dataphys + curlen)); 2151 if (len == 0) 2152 break; 2153 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2154 dataphys += curlen; 2155 cur = next; 2156 } 2157 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2158 *ep = cur; 2159 2160 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2161 *sp, *ep)); 2162 2163 return (USBD_NORMAL_COMPLETION); 2164 2165 nomem: 2166 /* XXX free chain */ 2167 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2168 return (USBD_NOMEM); 2169 } 2170 2171 Static void 2172 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2173 ehci_soft_qtd_t *sqtdend) 2174 { 2175 ehci_soft_qtd_t *p; 2176 int i; 2177 2178 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2179 sqtd, sqtdend)); 2180 2181 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2182 p = sqtd->nextqtd; 2183 ehci_free_sqtd(sc, sqtd); 2184 } 2185 } 2186 2187 /****************/ 2188 2189 /* 2190 * Close a reqular pipe. 2191 * Assumes that there are no pending transactions. 2192 */ 2193 void 2194 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2195 { 2196 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2197 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2198 ehci_soft_qh_t *sqh = epipe->sqh; 2199 int s; 2200 2201 s = splusb(); 2202 ehci_rem_qh(sc, sqh, head); 2203 splx(s); 2204 ehci_free_sqh(sc, epipe->sqh); 2205 } 2206 2207 /* 2208 * Abort a device request. 2209 * If this routine is called at splusb() it guarantees that the request 2210 * will be removed from the hardware scheduling and that the callback 2211 * for it will be called with USBD_CANCELLED status. 2212 * It's impossible to guarantee that the requested transfer will not 2213 * have happened since the hardware runs concurrently. 2214 * If the transaction has already happened we rely on the ordinary 2215 * interrupt processing to process it. 2216 * XXX This is most probably wrong. 2217 */ 2218 void 2219 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2220 { 2221 #define exfer EXFER(xfer) 2222 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2223 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2224 ehci_soft_qh_t *sqh = epipe->sqh; 2225 ehci_soft_qtd_t *sqtd; 2226 ehci_physaddr_t cur; 2227 u_int32_t qhstatus; 2228 int s; 2229 int hit; 2230 2231 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2232 2233 if (sc->sc_dying) { 2234 /* If we're dying, just do the software part. */ 2235 s = splusb(); 2236 xfer->status = status; /* make software ignore it */ 2237 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2238 usb_transfer_complete(xfer); 2239 splx(s); 2240 return; 2241 } 2242 2243 if (xfer->device->bus->intr_context || !curproc) 2244 panic("ehci_abort_xfer: not in process context\n"); 2245 2246 /* 2247 * Step 1: Make interrupt routine and hardware ignore xfer. 2248 */ 2249 s = splusb(); 2250 xfer->status = status; /* make software ignore it */ 2251 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2252 qhstatus = sqh->qh.qh_qtd.qtd_status; 2253 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2254 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2255 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2256 if (sqtd == exfer->sqtdend) 2257 break; 2258 } 2259 splx(s); 2260 2261 /* 2262 * Step 2: Wait until we know hardware has finished any possible 2263 * use of the xfer. Also make sure the soft interrupt routine 2264 * has run. 2265 */ 2266 ehci_sync_hc(sc); 2267 s = splusb(); 2268 sc->sc_softwake = 1; 2269 usb_schedsoftintr(&sc->sc_bus); 2270 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2271 splx(s); 2272 2273 /* 2274 * Step 3: Remove any vestiges of the xfer from the hardware. 2275 * The complication here is that the hardware may have executed 2276 * beyond the xfer we're trying to abort. So as we're scanning 2277 * the TDs of this xfer we check if the hardware points to 2278 * any of them. 2279 */ 2280 s = splusb(); /* XXX why? */ 2281 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2282 hit = 0; 2283 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2284 hit |= cur == sqtd->physaddr; 2285 if (sqtd == exfer->sqtdend) 2286 break; 2287 } 2288 sqtd = sqtd->nextqtd; 2289 /* Zap curqtd register if hardware pointed inside the xfer. */ 2290 if (hit && sqtd != NULL) { 2291 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2292 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2293 sqh->qh.qh_qtd.qtd_status = qhstatus; 2294 } else { 2295 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2296 } 2297 2298 /* 2299 * Step 4: Execute callback. 2300 */ 2301 #ifdef DIAGNOSTIC 2302 exfer->isdone = 1; 2303 #endif 2304 usb_transfer_complete(xfer); 2305 2306 splx(s); 2307 #undef exfer 2308 } 2309 2310 void 2311 ehci_timeout(void *addr) 2312 { 2313 struct ehci_xfer *exfer = addr; 2314 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2315 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2316 2317 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2318 #ifdef USB_DEBUG 2319 if (ehcidebug > 1) 2320 usbd_dump_pipe(exfer->xfer.pipe); 2321 #endif 2322 2323 if (sc->sc_dying) { 2324 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2325 return; 2326 } 2327 2328 /* Execute the abort in a process context. */ 2329 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2330 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2331 } 2332 2333 void 2334 ehci_timeout_task(void *addr) 2335 { 2336 usbd_xfer_handle xfer = addr; 2337 int s; 2338 2339 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2340 2341 s = splusb(); 2342 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2343 splx(s); 2344 } 2345 2346 /************************/ 2347 2348 Static usbd_status 2349 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2350 { 2351 usbd_status err; 2352 2353 /* Insert last in queue. */ 2354 err = usb_insert_transfer(xfer); 2355 if (err) 2356 return (err); 2357 2358 /* Pipe isn't running, start first */ 2359 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2360 } 2361 2362 Static usbd_status 2363 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2364 { 2365 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2366 usbd_status err; 2367 2368 if (sc->sc_dying) 2369 return (USBD_IOERROR); 2370 2371 #ifdef DIAGNOSTIC 2372 if (!(xfer->rqflags & URQ_REQUEST)) { 2373 /* XXX panic */ 2374 printf("ehci_device_ctrl_transfer: not a request\n"); 2375 return (USBD_INVAL); 2376 } 2377 #endif 2378 2379 err = ehci_device_request(xfer); 2380 if (err) 2381 return (err); 2382 2383 if (sc->sc_bus.use_polling) 2384 ehci_waitintr(sc, xfer); 2385 return (USBD_IN_PROGRESS); 2386 } 2387 2388 void 2389 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2390 { 2391 struct ehci_xfer *ex = EXFER(xfer); 2392 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2393 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2394 2395 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2396 2397 #ifdef DIAGNOSTIC 2398 if (!(xfer->rqflags & URQ_REQUEST)) { 2399 panic("ehci_ctrl_done: not a request\n"); 2400 } 2401 #endif 2402 2403 if (xfer->status != USBD_NOMEM) { 2404 ehci_del_intr_list(ex); /* remove from active list */ 2405 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2406 } 2407 2408 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2409 } 2410 2411 /* Abort a device control request. */ 2412 Static void 2413 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2414 { 2415 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2416 ehci_abort_xfer(xfer, USBD_CANCELLED); 2417 } 2418 2419 /* Close a device control pipe. */ 2420 Static void 2421 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2422 { 2423 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2424 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2425 2426 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2427 ehci_close_pipe(pipe, sc->sc_async_head); 2428 } 2429 2430 usbd_status 2431 ehci_device_request(usbd_xfer_handle xfer) 2432 { 2433 #define exfer EXFER(xfer) 2434 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2435 usb_device_request_t *req = &xfer->request; 2436 usbd_device_handle dev = epipe->pipe.device; 2437 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2438 int addr = dev->address; 2439 ehci_soft_qtd_t *setup, *stat, *next; 2440 ehci_soft_qh_t *sqh; 2441 int isread; 2442 int len; 2443 usbd_status err; 2444 int s; 2445 2446 isread = req->bmRequestType & UT_READ; 2447 len = UGETW(req->wLength); 2448 2449 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, " 2450 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2451 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2452 UGETW(req->wIndex), len, addr, 2453 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2454 2455 setup = ehci_alloc_sqtd(sc); 2456 if (setup == NULL) { 2457 err = USBD_NOMEM; 2458 goto bad1; 2459 } 2460 stat = ehci_alloc_sqtd(sc); 2461 if (stat == NULL) { 2462 err = USBD_NOMEM; 2463 goto bad2; 2464 } 2465 2466 sqh = epipe->sqh; 2467 epipe->u.ctl.length = len; 2468 2469 /* XXX 2470 * Since we're messing with the QH we must know the HC is in sync. 2471 * This needs to go away since it slows down control transfers. 2472 * Removing it entails: 2473 * - fill the QH only once with addr & wMaxPacketSize 2474 * - put the correct data toggles in the qtds and set DTC 2475 */ 2476 /* ehci_sync_hc(sc); */ 2477 /* Update device address and length since they may have changed. */ 2478 /* XXX This only needs to be done once, but it's too early in open. */ 2479 /* XXXX Should not touch ED here! */ 2480 sqh->qh.qh_endp = 2481 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) | 2482 htole32( 2483 EHCI_QH_SET_ADDR(addr) | 2484 /* EHCI_QH_DTC | */ 2485 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2486 ); 2487 /* Clear toggle */ 2488 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE); 2489 2490 /* Set up data transaction */ 2491 if (len != 0) { 2492 ehci_soft_qtd_t *end; 2493 2494 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2495 &next, &end); 2496 if (err) 2497 goto bad3; 2498 end->nextqtd = stat; 2499 end->qtd.qtd_next = 2500 end->qtd.qtd_altnext = htole32(stat->physaddr); 2501 /* Start toggle at 1. */ 2502 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/ 2503 } else { 2504 next = stat; 2505 } 2506 2507 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2508 2509 setup->qtd.qtd_status = htole32( 2510 EHCI_QTD_ACTIVE | 2511 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2512 EHCI_QTD_SET_CERR(3) | 2513 EHCI_QTD_SET_BYTES(sizeof *req) 2514 ); 2515 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2516 setup->nextqtd = next; 2517 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2518 setup->xfer = xfer; 2519 setup->len = sizeof *req; 2520 2521 stat->qtd.qtd_status = htole32( 2522 EHCI_QTD_ACTIVE | 2523 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2524 EHCI_QTD_SET_CERR(3) | 2525 EHCI_QTD_IOC 2526 ); 2527 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2528 stat->nextqtd = NULL; 2529 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2530 stat->xfer = xfer; 2531 stat->len = 0; 2532 2533 #ifdef EHCI_DEBUG 2534 if (ehcidebug > 5) { 2535 DPRINTF(("ehci_device_request:\n")); 2536 ehci_dump_sqh(sqh); 2537 ehci_dump_sqtds(setup); 2538 } 2539 #endif 2540 2541 exfer->sqtdstart = setup; 2542 exfer->sqtdend = stat; 2543 #ifdef DIAGNOSTIC 2544 if (!exfer->isdone) { 2545 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2546 } 2547 exfer->isdone = 0; 2548 #endif 2549 2550 /* Insert qTD in QH list. */ 2551 s = splusb(); 2552 ehci_set_qh_qtd(sqh, setup); 2553 if (xfer->timeout && !sc->sc_bus.use_polling) { 2554 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2555 ehci_timeout, xfer); 2556 } 2557 ehci_add_intr_list(sc, exfer); 2558 xfer->status = USBD_IN_PROGRESS; 2559 splx(s); 2560 2561 #ifdef EHCI_DEBUG 2562 if (ehcidebug > 10) { 2563 DPRINTF(("ehci_device_request: status=%x\n", 2564 EOREAD4(sc, EHCI_USBSTS))); 2565 delay(10000); 2566 ehci_dump_regs(sc); 2567 ehci_dump_sqh(sc->sc_async_head); 2568 ehci_dump_sqh(sqh); 2569 ehci_dump_sqtds(setup); 2570 } 2571 #endif 2572 2573 return (USBD_NORMAL_COMPLETION); 2574 2575 bad3: 2576 ehci_free_sqtd(sc, stat); 2577 bad2: 2578 ehci_free_sqtd(sc, setup); 2579 bad1: 2580 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2581 xfer->status = err; 2582 usb_transfer_complete(xfer); 2583 return (err); 2584 #undef exfer 2585 } 2586 2587 /************************/ 2588 2589 Static usbd_status 2590 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2591 { 2592 usbd_status err; 2593 2594 /* Insert last in queue. */ 2595 err = usb_insert_transfer(xfer); 2596 if (err) 2597 return (err); 2598 2599 /* Pipe isn't running, start first */ 2600 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2601 } 2602 2603 usbd_status 2604 ehci_device_bulk_start(usbd_xfer_handle xfer) 2605 { 2606 #define exfer EXFER(xfer) 2607 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2608 usbd_device_handle dev = epipe->pipe.device; 2609 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2610 ehci_soft_qtd_t *data, *dataend; 2611 ehci_soft_qh_t *sqh; 2612 usbd_status err; 2613 int len, isread, endpt; 2614 int s; 2615 2616 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n", 2617 xfer, xfer->length, xfer->flags)); 2618 2619 if (sc->sc_dying) 2620 return (USBD_IOERROR); 2621 2622 #ifdef DIAGNOSTIC 2623 if (xfer->rqflags & URQ_REQUEST) 2624 panic("ehci_device_bulk_transfer: a request\n"); 2625 #endif 2626 2627 len = xfer->length; 2628 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2629 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2630 sqh = epipe->sqh; 2631 2632 epipe->u.bulk.length = len; 2633 2634 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2635 &dataend); 2636 if (err) { 2637 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2638 xfer->status = err; 2639 usb_transfer_complete(xfer); 2640 return (err); 2641 } 2642 2643 #ifdef EHCI_DEBUG 2644 if (ehcidebug > 5) { 2645 DPRINTF(("ehci_device_bulk_transfer: data(1)\n")); 2646 ehci_dump_sqh(sqh); 2647 ehci_dump_sqtds(data); 2648 } 2649 #endif 2650 2651 /* Set up interrupt info. */ 2652 exfer->sqtdstart = data; 2653 exfer->sqtdend = dataend; 2654 #ifdef DIAGNOSTIC 2655 if (!exfer->isdone) { 2656 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer); 2657 } 2658 exfer->isdone = 0; 2659 #endif 2660 2661 s = splusb(); 2662 ehci_set_qh_qtd(sqh, data); 2663 if (xfer->timeout && !sc->sc_bus.use_polling) { 2664 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2665 ehci_timeout, xfer); 2666 } 2667 ehci_add_intr_list(sc, exfer); 2668 xfer->status = USBD_IN_PROGRESS; 2669 splx(s); 2670 2671 #ifdef EHCI_DEBUG 2672 if (ehcidebug > 10) { 2673 DPRINTF(("ehci_device_bulk_transfer: data(2)\n")); 2674 delay(10000); 2675 DPRINTF(("ehci_device_bulk_transfer: data(3)\n")); 2676 ehci_dump_regs(sc); 2677 #if 0 2678 printf("async_head:\n"); 2679 ehci_dump_sqh(sc->sc_async_head); 2680 #endif 2681 printf("sqh:\n"); 2682 ehci_dump_sqh(sqh); 2683 ehci_dump_sqtds(data); 2684 } 2685 #endif 2686 2687 if (sc->sc_bus.use_polling) 2688 ehci_waitintr(sc, xfer); 2689 2690 return (USBD_IN_PROGRESS); 2691 #undef exfer 2692 } 2693 2694 Static void 2695 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2696 { 2697 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2698 ehci_abort_xfer(xfer, USBD_CANCELLED); 2699 } 2700 2701 /* 2702 * Close a device bulk pipe. 2703 */ 2704 Static void 2705 ehci_device_bulk_close(usbd_pipe_handle pipe) 2706 { 2707 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2708 2709 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2710 ehci_close_pipe(pipe, sc->sc_async_head); 2711 } 2712 2713 void 2714 ehci_device_bulk_done(usbd_xfer_handle xfer) 2715 { 2716 struct ehci_xfer *ex = EXFER(xfer); 2717 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2718 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2719 2720 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2721 xfer, xfer->actlen)); 2722 2723 if (xfer->status != USBD_NOMEM) { 2724 ehci_del_intr_list(ex); /* remove from active list */ 2725 ehci_free_sqtd_chain(sc, ex->sqtdstart, 0); 2726 } 2727 2728 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2729 } 2730 2731 /************************/ 2732 2733 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2734 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2735 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { } 2736 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { } 2737 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { } 2738 2739 /************************/ 2740 2741 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2742 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 2743 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 2744 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 2745 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 2746