1 /* $NetBSD: pptable.h,v 1.3 2021/12/18 23:45:42 riastradh Exp $ */ 2 3 /* 4 * Copyright 2013 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 */ 24 25 #ifndef _PPTABLE_H 26 #define _PPTABLE_H 27 28 #pragma pack(1) 29 30 typedef struct _ATOM_PPLIB_THERMALCONTROLLER 31 32 { 33 UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_* 34 UCHAR ucI2cLine; // as interpreted by DAL I2C 35 UCHAR ucI2cAddress; 36 UCHAR ucFanParameters; // Fan Control Parameters. 37 UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only. 38 UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only. 39 UCHAR ucReserved; // ---- 40 UCHAR ucFlags; // to be defined 41 } ATOM_PPLIB_THERMALCONTROLLER; 42 43 #define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f 44 #define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller. 45 46 #define ATOM_PP_THERMALCONTROLLER_NONE 0 47 #define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib 48 #define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib 49 #define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib 50 #define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib 51 #define ATOM_PP_THERMALCONTROLLER_LM64 5 52 #define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib 53 #define ATOM_PP_THERMALCONTROLLER_RV6xx 7 54 #define ATOM_PP_THERMALCONTROLLER_RV770 8 55 #define ATOM_PP_THERMALCONTROLLER_ADT7473 9 56 #define ATOM_PP_THERMALCONTROLLER_KONG 10 57 #define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO 11 58 #define ATOM_PP_THERMALCONTROLLER_EVERGREEN 12 59 #define ATOM_PP_THERMALCONTROLLER_EMC2103 13 /* 0x0D */ // Only fan control will be implemented, do NOT show this in PPGen. 60 #define ATOM_PP_THERMALCONTROLLER_SUMO 14 /* 0x0E */ // Sumo type, used internally 61 #define ATOM_PP_THERMALCONTROLLER_NISLANDS 15 62 #define ATOM_PP_THERMALCONTROLLER_SISLANDS 16 63 #define ATOM_PP_THERMALCONTROLLER_LM96163 17 64 #define ATOM_PP_THERMALCONTROLLER_CISLANDS 18 65 #define ATOM_PP_THERMALCONTROLLER_KAVERI 19 66 67 68 // Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal. 69 // We probably should reserve the bit 0x80 for this use. 70 // To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here). 71 // The driver can pick the correct internal controller based on the ASIC. 72 73 #define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal Thermal Controller 74 #define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D // EMC2103 Fan Control + Internal Thermal Controller 75 76 typedef struct _ATOM_PPLIB_STATE 77 { 78 UCHAR ucNonClockStateIndex; 79 UCHAR ucClockStateIndices[1]; // variable-sized 80 } ATOM_PPLIB_STATE; 81 82 83 typedef struct _ATOM_PPLIB_FANTABLE 84 { 85 UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same. 86 UCHAR ucTHyst; // Temperature hysteresis. Integer. 87 USHORT usTMin; // The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. 88 USHORT usTMed; // The middle temperature where we change slopes. 89 USHORT usTHigh; // The high point above TMed for adjusting the second slope. 90 USHORT usPWMMin; // The minimum PWM value in percent (0.01% increments). 91 USHORT usPWMMed; // The PWM value (in percent) at TMed. 92 USHORT usPWMHigh; // The PWM value at THigh. 93 } ATOM_PPLIB_FANTABLE; 94 95 typedef struct _ATOM_PPLIB_FANTABLE2 96 { 97 ATOM_PPLIB_FANTABLE basicTable; 98 USHORT usTMax; // The max temperature 99 } ATOM_PPLIB_FANTABLE2; 100 101 typedef struct _ATOM_PPLIB_FANTABLE3 102 { 103 ATOM_PPLIB_FANTABLE2 basicTable2; 104 UCHAR ucFanControlMode; 105 USHORT usFanPWMMax; 106 USHORT usFanOutputSensitivity; 107 } ATOM_PPLIB_FANTABLE3; 108 109 typedef struct _ATOM_PPLIB_EXTENDEDHEADER 110 { 111 USHORT usSize; 112 ULONG ulMaxEngineClock; // For Overdrive. 113 ULONG ulMaxMemoryClock; // For Overdrive. 114 // Add extra system parameters here, always adjust size to include all fields. 115 USHORT usVCETableOffset; //points to ATOM_PPLIB_VCE_Table 116 USHORT usUVDTableOffset; //points to ATOM_PPLIB_UVD_Table 117 USHORT usSAMUTableOffset; //points to ATOM_PPLIB_SAMU_Table 118 USHORT usPPMTableOffset; //points to ATOM_PPLIB_PPM_Table 119 USHORT usACPTableOffset; //points to ATOM_PPLIB_ACP_Table 120 USHORT usPowerTuneTableOffset; //points to ATOM_PPLIB_POWERTUNE_Table 121 } ATOM_PPLIB_EXTENDEDHEADER; 122 123 //// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps 124 #define ATOM_PP_PLATFORM_CAP_BACKBIAS 1 125 #define ATOM_PP_PLATFORM_CAP_POWERPLAY 2 126 #define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4 127 #define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8 128 #define ATOM_PP_PLATFORM_CAP_ASPM_L1 16 129 #define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32 130 #define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64 131 #define ATOM_PP_PLATFORM_CAP_STEPVDDC 128 132 #define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256 133 #define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512 134 #define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024 135 #define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048 136 #define ATOM_PP_PLATFORM_CAP_MVDDCONTROL 4096 137 #define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition. 138 #define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition). 139 #define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 // Does the driver control VDDCI independently from VDDC. 140 #define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT 0x00010000 // Enable the 'regulator hot' feature. 141 #define ATOM_PP_PLATFORM_CAP_BACO 0x00020000 // Does the driver supports BACO state. 142 #define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE 0x00040000 // Does the driver supports new CAC voltage table. 143 #define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY 0x00080000 // Does the driver supports revert GPIO5 polarity. 144 #define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x00100000 // Does the driver supports thermal2GPIO17. 145 #define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE 0x00200000 // Does the driver supports VR HOT GPIO Configurable. 146 #define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x00400000 // Does the driver supports Temp Inversion feature. 147 #define ATOM_PP_PLATFORM_CAP_EVV 0x00800000 148 149 typedef struct _ATOM_PPLIB_POWERPLAYTABLE 150 { 151 ATOM_COMMON_TABLE_HEADER sHeader; 152 153 UCHAR ucDataRevision; 154 155 UCHAR ucNumStates; 156 UCHAR ucStateEntrySize; 157 UCHAR ucClockInfoSize; 158 UCHAR ucNonClockSize; 159 160 // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures 161 USHORT usStateArrayOffset; 162 163 // offset from start of this table to array of ASIC-specific structures, 164 // currently ATOM_PPLIB_CLOCK_INFO. 165 USHORT usClockInfoArrayOffset; 166 167 // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO 168 USHORT usNonClockInfoArrayOffset; 169 170 USHORT usBackbiasTime; // in microseconds 171 USHORT usVoltageTime; // in microseconds 172 USHORT usTableSize; //the size of this structure, or the extended structure 173 174 ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_* 175 176 ATOM_PPLIB_THERMALCONTROLLER sThermalController; 177 178 USHORT usBootClockInfoOffset; 179 USHORT usBootNonClockInfoOffset; 180 181 } ATOM_PPLIB_POWERPLAYTABLE; 182 183 typedef struct _ATOM_PPLIB_POWERPLAYTABLE2 184 { 185 ATOM_PPLIB_POWERPLAYTABLE basicTable; 186 UCHAR ucNumCustomThermalPolicy; 187 USHORT usCustomThermalPolicyArrayOffset; 188 }ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2; 189 190 typedef struct _ATOM_PPLIB_POWERPLAYTABLE3 191 { 192 ATOM_PPLIB_POWERPLAYTABLE2 basicTable2; 193 USHORT usFormatID; // To be used ONLY by PPGen. 194 USHORT usFanTableOffset; 195 USHORT usExtendendedHeaderOffset; 196 } ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3; 197 198 typedef struct _ATOM_PPLIB_POWERPLAYTABLE4 199 { 200 ATOM_PPLIB_POWERPLAYTABLE3 basicTable3; 201 ULONG ulGoldenPPID; // PPGen use only 202 ULONG ulGoldenRevision; // PPGen use only 203 USHORT usVddcDependencyOnSCLKOffset; 204 USHORT usVddciDependencyOnMCLKOffset; 205 USHORT usVddcDependencyOnMCLKOffset; 206 USHORT usMaxClockVoltageOnDCOffset; 207 USHORT usVddcPhaseShedLimitsTableOffset; // Points to ATOM_PPLIB_PhaseSheddingLimits_Table 208 USHORT usMvddDependencyOnMCLKOffset; 209 } ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4; 210 211 typedef struct _ATOM_PPLIB_POWERPLAYTABLE5 212 { 213 ATOM_PPLIB_POWERPLAYTABLE4 basicTable4; 214 ULONG ulTDPLimit; 215 ULONG ulNearTDPLimit; 216 ULONG ulSQRampingThreshold; 217 USHORT usCACLeakageTableOffset; // Points to ATOM_PPLIB_CAC_Leakage_Table 218 ULONG ulCACLeakage; // The iLeakage for driver calculated CAC leakage table 219 USHORT usTDPODLimit; 220 USHORT usLoadLineSlope; // in milliOhms * 100 221 } ATOM_PPLIB_POWERPLAYTABLE5, *LPATOM_PPLIB_POWERPLAYTABLE5; 222 223 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification 224 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 225 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0 226 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0 227 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1 228 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3 229 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5 230 // 2, 4, 6, 7 are reserved 231 232 #define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008 233 #define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010 234 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020 235 #define ATOM_PPLIB_CLASSIFICATION_REST 0x0040 236 #define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080 237 #define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100 238 #define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200 239 #define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400 240 #define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800 241 #define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000 242 #define ATOM_PPLIB_CLASSIFICATION_HD2STATE 0x2000 243 #define ATOM_PPLIB_CLASSIFICATION_HDSTATE 0x4000 244 #define ATOM_PPLIB_CLASSIFICATION_SDSTATE 0x8000 245 246 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification2 247 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001 248 #define ATOM_PPLIB_CLASSIFICATION2_ULV 0x0002 249 #define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D) 250 251 //// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings 252 #define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001 253 #define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002 254 255 // 0 is 2.5Gb/s, 1 is 5Gb/s 256 #define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004 257 #define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2 258 259 // lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec 260 #define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8 261 #define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3 262 263 // lookup into reduced refresh-rate table 264 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00 265 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8 266 267 #define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0 268 #define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1 269 // 2-15 TBD as needed. 270 271 #define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000 272 #define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000 273 274 #define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000 275 276 #define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000 277 278 //memory related flags 279 #define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF 0x000010000 280 281 //M3 Arb //2bits, current 3 sets of parameters in total 282 #define ATOM_PPLIB_M3ARB_MASK 0x00060000 283 #define ATOM_PPLIB_M3ARB_SHIFT 17 284 285 #define ATOM_PPLIB_ENABLE_DRR 0x00080000 286 287 // remaining 16 bits are reserved 288 typedef struct _ATOM_PPLIB_THERMAL_STATE 289 { 290 UCHAR ucMinTemperature; 291 UCHAR ucMaxTemperature; 292 UCHAR ucThermalAction; 293 }ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE; 294 295 // Contained in an array starting at the offset 296 // in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset. 297 // referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex 298 #define ATOM_PPLIB_NONCLOCKINFO_VER1 12 299 #define ATOM_PPLIB_NONCLOCKINFO_VER2 24 300 typedef struct _ATOM_PPLIB_NONCLOCK_INFO 301 { 302 USHORT usClassification; 303 UCHAR ucMinTemperature; 304 UCHAR ucMaxTemperature; 305 ULONG ulCapsAndSettings; 306 UCHAR ucRequiredPower; 307 USHORT usClassification2; 308 ULONG ulVCLK; 309 ULONG ulDCLK; 310 UCHAR ucUnused[5]; 311 } ATOM_PPLIB_NONCLOCK_INFO; 312 313 // Contained in an array starting at the offset 314 // in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset. 315 // referenced from ATOM_PPLIB_STATE::ucClockStateIndices 316 typedef struct _ATOM_PPLIB_R600_CLOCK_INFO 317 { 318 USHORT usEngineClockLow; 319 UCHAR ucEngineClockHigh; 320 321 USHORT usMemoryClockLow; 322 UCHAR ucMemoryClockHigh; 323 324 USHORT usVDDC; 325 USHORT usUnused1; 326 USHORT usUnused2; 327 328 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_* 329 330 } ATOM_PPLIB_R600_CLOCK_INFO; 331 332 // ulFlags in ATOM_PPLIB_R600_CLOCK_INFO 333 #define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1 334 #define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2 335 #define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4 336 #define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8 337 #define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16 338 #define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low power' setting (sequencer S0). 339 340 typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO 341 342 { 343 USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600). 344 UCHAR ucLowEngineClockHigh; 345 USHORT usHighEngineClockLow; // High Engine clock in MHz. 346 UCHAR ucHighEngineClockHigh; 347 USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants. 348 UCHAR ucMemoryClockHigh; // Currentyl unused. 349 UCHAR ucPadding; // For proper alignment and size. 350 USHORT usVDDC; // For the 780, use: None, Low, High, Variable 351 UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16} 352 UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could 353 USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200). 354 ULONG ulFlags; 355 } ATOM_PPLIB_RS780_CLOCK_INFO; 356 357 #define ATOM_PPLIB_RS780_VOLTAGE_NONE 0 358 #define ATOM_PPLIB_RS780_VOLTAGE_LOW 1 359 #define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2 360 #define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3 361 362 #define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is. 363 #define ATOM_PPLIB_RS780_SPMCLK_LOW 1 364 #define ATOM_PPLIB_RS780_SPMCLK_HIGH 2 365 366 #define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0 367 #define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1 368 #define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2 369 370 typedef struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO 371 { 372 USHORT usEngineClockLow; 373 UCHAR ucEngineClockHigh; 374 375 USHORT usMemoryClockLow; 376 UCHAR ucMemoryClockHigh; 377 378 USHORT usVDDC; 379 USHORT usVDDCI; 380 USHORT usUnused; 381 382 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_* 383 384 } ATOM_PPLIB_EVERGREEN_CLOCK_INFO; 385 386 typedef struct _ATOM_PPLIB_SI_CLOCK_INFO 387 { 388 USHORT usEngineClockLow; 389 UCHAR ucEngineClockHigh; 390 391 USHORT usMemoryClockLow; 392 UCHAR ucMemoryClockHigh; 393 394 USHORT usVDDC; 395 USHORT usVDDCI; 396 UCHAR ucPCIEGen; 397 UCHAR ucUnused1; 398 399 ULONG ulFlags; // ATOM_PPLIB_SI_FLAGS_*, no flag is necessary for now 400 401 } ATOM_PPLIB_SI_CLOCK_INFO; 402 403 typedef struct _ATOM_PPLIB_CI_CLOCK_INFO 404 { 405 USHORT usEngineClockLow; 406 UCHAR ucEngineClockHigh; 407 408 USHORT usMemoryClockLow; 409 UCHAR ucMemoryClockHigh; 410 411 UCHAR ucPCIEGen; 412 USHORT usPCIELane; 413 } ATOM_PPLIB_CI_CLOCK_INFO; 414 415 typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{ 416 USHORT usEngineClockLow; //clockfrequency & 0xFFFF. The unit is in 10khz 417 UCHAR ucEngineClockHigh; //clockfrequency >> 16. 418 UCHAR vddcIndex; //2-bit vddc index; 419 USHORT tdpLimit; 420 //please initalize to 0 421 USHORT rsv1; 422 //please initialize to 0s 423 ULONG rsv2[2]; 424 }ATOM_PPLIB_SUMO_CLOCK_INFO; 425 426 typedef struct _ATOM_PPLIB_STATE_V2 427 { 428 //number of valid dpm levels in this state; Driver uses it to calculate the whole 429 //size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR) 430 UCHAR ucNumDPMLevels; 431 432 //a index to the array of nonClockInfos 433 UCHAR nonClockInfoIndex; 434 /** 435 * Driver will read the first ucNumDPMLevels in this array 436 */ 437 UCHAR clockInfoIndex[1]; 438 } ATOM_PPLIB_STATE_V2; 439 440 typedef struct _StateArray{ 441 //how many states we have 442 UCHAR ucNumEntries; 443 444 ATOM_PPLIB_STATE_V2 states[1]; 445 }StateArray; 446 447 448 typedef struct _ClockInfoArray{ 449 //how many clock levels we have 450 UCHAR ucNumEntries; 451 452 //sizeof(ATOM_PPLIB_CLOCK_INFO) 453 UCHAR ucEntrySize; 454 455 UCHAR clockInfo[1]; 456 }ClockInfoArray; 457 458 typedef struct _NonClockInfoArray{ 459 460 //how many non-clock levels we have. normally should be same as number of states 461 UCHAR ucNumEntries; 462 //sizeof(ATOM_PPLIB_NONCLOCK_INFO) 463 UCHAR ucEntrySize; 464 465 ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1]; 466 }NonClockInfoArray; 467 468 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record 469 { 470 USHORT usClockLow; 471 UCHAR ucClockHigh; 472 USHORT usVoltage; 473 }ATOM_PPLIB_Clock_Voltage_Dependency_Record; 474 475 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table 476 { 477 UCHAR ucNumEntries; // Number of entries. 478 ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries. 479 }ATOM_PPLIB_Clock_Voltage_Dependency_Table; 480 481 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record 482 { 483 USHORT usSclkLow; 484 UCHAR ucSclkHigh; 485 USHORT usMclkLow; 486 UCHAR ucMclkHigh; 487 USHORT usVddc; 488 USHORT usVddci; 489 }ATOM_PPLIB_Clock_Voltage_Limit_Record; 490 491 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table 492 { 493 UCHAR ucNumEntries; // Number of entries. 494 ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries. 495 }ATOM_PPLIB_Clock_Voltage_Limit_Table; 496 497 union _ATOM_PPLIB_CAC_Leakage_Record 498 { 499 struct 500 { 501 USHORT usVddc; // We use this field for the "fake" standardized VDDC for power calculations; For CI and newer, we use this as the real VDDC value. in CI we read it as StdVoltageHiSidd 502 ULONG ulLeakageValue; // For CI and newer we use this as the "fake" standar VDDC value. in CI we read it as StdVoltageLoSidd 503 504 }; 505 struct 506 { 507 USHORT usVddc1; 508 USHORT usVddc2; 509 USHORT usVddc3; 510 }; 511 }; 512 513 typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record; 514 515 typedef struct _ATOM_PPLIB_CAC_Leakage_Table 516 { 517 UCHAR ucNumEntries; // Number of entries. 518 ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries. 519 }ATOM_PPLIB_CAC_Leakage_Table; 520 521 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record 522 { 523 USHORT usVoltage; 524 USHORT usSclkLow; 525 UCHAR ucSclkHigh; 526 USHORT usMclkLow; 527 UCHAR ucMclkHigh; 528 }ATOM_PPLIB_PhaseSheddingLimits_Record; 529 530 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table 531 { 532 UCHAR ucNumEntries; // Number of entries. 533 ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries. 534 }ATOM_PPLIB_PhaseSheddingLimits_Table; 535 536 typedef struct _VCEClockInfo{ 537 USHORT usEVClkLow; 538 UCHAR ucEVClkHigh; 539 USHORT usECClkLow; 540 UCHAR ucECClkHigh; 541 }VCEClockInfo; 542 543 typedef struct _VCEClockInfoArray{ 544 UCHAR ucNumEntries; 545 VCEClockInfo entries[1]; 546 }VCEClockInfoArray; 547 548 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record 549 { 550 USHORT usVoltage; 551 UCHAR ucVCEClockInfoIndex; 552 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record; 553 554 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table 555 { 556 UCHAR numEntries; 557 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1]; 558 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table; 559 560 typedef struct _ATOM_PPLIB_VCE_State_Record 561 { 562 UCHAR ucVCEClockInfoIndex; 563 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary 564 }ATOM_PPLIB_VCE_State_Record; 565 566 typedef struct _ATOM_PPLIB_VCE_State_Table 567 { 568 UCHAR numEntries; 569 ATOM_PPLIB_VCE_State_Record entries[1]; 570 }ATOM_PPLIB_VCE_State_Table; 571 572 573 typedef struct _ATOM_PPLIB_VCE_Table 574 { 575 UCHAR revid; 576 // VCEClockInfoArray array; 577 // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits; 578 // ATOM_PPLIB_VCE_State_Table states; 579 }ATOM_PPLIB_VCE_Table; 580 581 582 typedef struct _UVDClockInfo{ 583 USHORT usVClkLow; 584 UCHAR ucVClkHigh; 585 USHORT usDClkLow; 586 UCHAR ucDClkHigh; 587 }UVDClockInfo; 588 589 typedef struct _UVDClockInfoArray{ 590 UCHAR ucNumEntries; 591 UVDClockInfo entries[1]; 592 }UVDClockInfoArray; 593 594 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record 595 { 596 USHORT usVoltage; 597 UCHAR ucUVDClockInfoIndex; 598 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record; 599 600 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table 601 { 602 UCHAR numEntries; 603 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1]; 604 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table; 605 606 typedef struct _ATOM_PPLIB_UVD_Table 607 { 608 UCHAR revid; 609 // UVDClockInfoArray array; 610 // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits; 611 }ATOM_PPLIB_UVD_Table; 612 613 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record 614 { 615 USHORT usVoltage; 616 USHORT usSAMClockLow; 617 UCHAR ucSAMClockHigh; 618 }ATOM_PPLIB_SAMClk_Voltage_Limit_Record; 619 620 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{ 621 UCHAR numEntries; 622 ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[1]; 623 }ATOM_PPLIB_SAMClk_Voltage_Limit_Table; 624 625 typedef struct _ATOM_PPLIB_SAMU_Table 626 { 627 UCHAR revid; 628 ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits; 629 }ATOM_PPLIB_SAMU_Table; 630 631 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record 632 { 633 USHORT usVoltage; 634 USHORT usACPClockLow; 635 UCHAR ucACPClockHigh; 636 }ATOM_PPLIB_ACPClk_Voltage_Limit_Record; 637 638 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{ 639 UCHAR numEntries; 640 ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1]; 641 }ATOM_PPLIB_ACPClk_Voltage_Limit_Table; 642 643 typedef struct _ATOM_PPLIB_ACP_Table 644 { 645 UCHAR revid; 646 ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits; 647 }ATOM_PPLIB_ACP_Table; 648 649 typedef struct _ATOM_PowerTune_Table{ 650 USHORT usTDP; 651 USHORT usConfigurableTDP; 652 USHORT usTDC; 653 USHORT usBatteryPowerLimit; 654 USHORT usSmallPowerLimit; 655 USHORT usLowCACLeakage; 656 USHORT usHighCACLeakage; 657 }ATOM_PowerTune_Table; 658 659 typedef struct _ATOM_PPLIB_POWERTUNE_Table 660 { 661 UCHAR revid; 662 ATOM_PowerTune_Table power_tune_table; 663 }ATOM_PPLIB_POWERTUNE_Table; 664 665 typedef struct _ATOM_PPLIB_POWERTUNE_Table_V1 666 { 667 UCHAR revid; 668 ATOM_PowerTune_Table power_tune_table; 669 USHORT usMaximumPowerDeliveryLimit; 670 USHORT usReserve[7]; 671 } ATOM_PPLIB_POWERTUNE_Table_V1; 672 673 #define ATOM_PPM_A_A 1 674 #define ATOM_PPM_A_I 2 675 typedef struct _ATOM_PPLIB_PPM_Table 676 { 677 UCHAR ucRevId; 678 UCHAR ucPpmDesign; //A+I or A+A 679 USHORT usCpuCoreNumber; 680 ULONG ulPlatformTDP; 681 ULONG ulSmallACPlatformTDP; 682 ULONG ulPlatformTDC; 683 ULONG ulSmallACPlatformTDC; 684 ULONG ulApuTDP; 685 ULONG ulDGpuTDP; 686 ULONG ulDGpuUlvPower; 687 ULONG ulTjmax; 688 } ATOM_PPLIB_PPM_Table; 689 690 #pragma pack() 691 692 #endif 693