1add_llvm_component_group(AMDGPU)
2
3set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
4
5tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
9tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
10tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
15tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
16tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
17
18set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
19tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
20tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
21              -combiners="AMDGPUPreLegalizerCombinerHelper")
22tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
23              -combiners="AMDGPUPostLegalizerCombinerHelper")
24tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner
25              -combiners="AMDGPURegBankCombinerHelper")
26
27set(LLVM_TARGET_DEFINITIONS R600.td)
28tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
29tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
30tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
31tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
32tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
33tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
34tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
35tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
36
37add_public_tablegen_target(AMDGPUCommonTableGen)
38
39set(LLVM_TARGET_DEFINITIONS InstCombineTables.td)
40tablegen(LLVM InstCombineTables.inc -gen-searchable-tables)
41add_public_tablegen_target(InstCombineTableGen)
42
43add_llvm_target(AMDGPUCodeGen
44  AMDGPUAliasAnalysis.cpp
45  AMDGPUAlwaysInlinePass.cpp
46  AMDGPUAnnotateKernelFeatures.cpp
47  AMDGPUAnnotateUniformValues.cpp
48  AMDGPUArgumentUsageInfo.cpp
49  AMDGPUAsmPrinter.cpp
50  AMDGPUAtomicOptimizer.cpp
51  AMDGPUAttributor.cpp
52  AMDGPUCallLowering.cpp
53  AMDGPUCodeGenPrepare.cpp
54  AMDGPUCombinerHelper.cpp
55  AMDGPUCtorDtorLowering.cpp
56  AMDGPUExportClustering.cpp
57  AMDGPUFrameLowering.cpp
58  AMDGPUGlobalISelUtils.cpp
59  AMDGPUHSAMetadataStreamer.cpp
60  AMDGPUInsertDelayAlu.cpp
61  AMDGPUInstCombineIntrinsic.cpp
62  AMDGPUInstrInfo.cpp
63  AMDGPUInstructionSelector.cpp
64  AMDGPUISelDAGToDAG.cpp
65  AMDGPUISelLowering.cpp
66  AMDGPULateCodeGenPrepare.cpp
67  AMDGPULegalizerInfo.cpp
68  AMDGPULibCalls.cpp
69  AMDGPULibFunc.cpp
70  AMDGPULowerIntrinsics.cpp
71  AMDGPULowerKernelArguments.cpp
72  AMDGPULowerKernelAttributes.cpp
73  AMDGPULowerModuleLDSPass.cpp
74  AMDGPUMachineCFGStructurizer.cpp
75  AMDGPUMachineFunction.cpp
76  AMDGPUMachineModuleInfo.cpp
77  AMDGPUMacroFusion.cpp
78  AMDGPUMCInstLower.cpp
79  AMDGPUIGroupLP.cpp
80  AMDGPUMIRFormatter.cpp
81  AMDGPUOpenCLEnqueuedBlockLowering.cpp
82  AMDGPUPerfHintAnalysis.cpp
83  AMDGPUPostLegalizerCombiner.cpp
84  AMDGPUPreLegalizerCombiner.cpp
85  AMDGPUPrintfRuntimeBinding.cpp
86  AMDGPUPromoteAlloca.cpp
87  AMDGPUPropagateAttributes.cpp
88  AMDGPUPromoteKernelArguments.cpp
89  AMDGPURegBankCombiner.cpp
90  AMDGPURegisterBankInfo.cpp
91  AMDGPUReleaseVGPRs.cpp
92  AMDGPUReplaceLDSUseWithPointer.cpp
93  AMDGPUResourceUsageAnalysis.cpp
94  AMDGPURewriteOutArguments.cpp
95  AMDGPURewriteUndefForPHI.cpp
96  AMDGPUSetWavePriority.cpp
97  AMDGPUSubtarget.cpp
98  AMDGPUTargetMachine.cpp
99  AMDGPUTargetObjectFile.cpp
100  AMDGPUTargetTransformInfo.cpp
101  AMDGPUUnifyDivergentExitNodes.cpp
102  AMDGPUUnifyMetadata.cpp
103  R600MachineCFGStructurizer.cpp
104  GCNCreateVOPD.cpp
105  GCNDPPCombine.cpp
106  GCNHazardRecognizer.cpp
107  GCNILPSched.cpp
108  GCNIterativeScheduler.cpp
109  GCNMinRegStrategy.cpp
110  GCNNSAReassign.cpp
111  GCNPreRAOptimizations.cpp
112  GCNRegPressure.cpp
113  GCNSchedStrategy.cpp
114  GCNVOPDUtils.cpp
115  R600AsmPrinter.cpp
116  R600ClauseMergePass.cpp
117  R600ControlFlowFinalizer.cpp
118  R600EmitClauseMarkers.cpp
119  R600ExpandSpecialInstrs.cpp
120  R600FrameLowering.cpp
121  R600InstrInfo.cpp
122  R600ISelDAGToDAG.cpp
123  R600ISelLowering.cpp
124  R600MachineFunctionInfo.cpp
125  R600MachineScheduler.cpp
126  R600MCInstLower.cpp
127  R600OpenCLImageTypeLoweringPass.cpp
128  R600OptimizeVectorRegisters.cpp
129  R600Packetizer.cpp
130  R600RegisterInfo.cpp
131  R600Subtarget.cpp
132  R600TargetMachine.cpp
133  R600TargetTransformInfo.cpp
134  SIAnnotateControlFlow.cpp
135  SIFixSGPRCopies.cpp
136  SIFixVGPRCopies.cpp
137  SIFoldOperands.cpp
138  SIFormMemoryClauses.cpp
139  SIFrameLowering.cpp
140  SIInsertHardClauses.cpp
141  SIInsertWaitcnts.cpp
142  SIInstrInfo.cpp
143  SIISelLowering.cpp
144  SILateBranchLowering.cpp
145  SILoadStoreOptimizer.cpp
146  SILowerControlFlow.cpp
147  SILowerI1Copies.cpp
148  SILowerSGPRSpills.cpp
149  SIMachineFunctionInfo.cpp
150  SIMachineScheduler.cpp
151  SIMemoryLegalizer.cpp
152  SIModeRegister.cpp
153  SIOptimizeExecMasking.cpp
154  SIOptimizeExecMaskingPreRA.cpp
155  SIOptimizeVGPRLiveRange.cpp
156  SIPeepholeSDWA.cpp
157  SIPostRABundler.cpp
158  SIPreAllocateWWMRegs.cpp
159  SIPreEmitPeephole.cpp
160  SIProgramInfo.cpp
161  SIRegisterInfo.cpp
162  SIShrinkInstructions.cpp
163  SIWholeQuadMode.cpp
164
165  LINK_COMPONENTS
166  Analysis
167  AsmPrinter
168  CodeGen
169  Core
170  IPO
171  MC
172  Passes
173  AMDGPUDesc
174  AMDGPUInfo
175  AMDGPUUtils
176  Scalar
177  SelectionDAG
178  Support
179  Target
180  TargetParser
181  TransformUtils
182  Vectorize
183  GlobalISel
184  BinaryFormat
185  MIRParser
186
187  ADD_TO_COMPONENT
188  AMDGPU
189  )
190
191add_subdirectory(AsmParser)
192add_subdirectory(Disassembler)
193add_subdirectory(MCA)
194add_subdirectory(MCTargetDesc)
195add_subdirectory(TargetInfo)
196add_subdirectory(Utils)
197