1 /* $OpenBSD: fpu_reg.c,v 1.1 2003/07/21 18:41:30 jason Exp $ */
2
3 /*
4 * Copyright (c) 2003 Jason L. Wright (jason@thought.net)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28 #include <sys/types.h>
29 #include "fpu_reg.h"
30
31 void
__fpu_setreg32(int r,u_int32_t v)32 __fpu_setreg32(int r, u_int32_t v)
33 {
34 switch (r) {
35 case 0:
36 asm("ld [%0], %%f0" : : "r" (&v));
37 break;
38 case 1:
39 asm("ld [%0], %%f1" : : "r" (&v));
40 break;
41 case 2:
42 asm("ld [%0], %%f2" : : "r" (&v));
43 break;
44 case 3:
45 asm("ld [%0], %%f3" : : "r" (&v));
46 break;
47 case 4:
48 asm("ld [%0], %%f4" : : "r" (&v));
49 break;
50 case 5:
51 asm("ld [%0], %%f5" : : "r" (&v));
52 break;
53 case 6:
54 asm("ld [%0], %%f6" : : "r" (&v));
55 break;
56 case 7:
57 asm("ld [%0], %%f7" : : "r" (&v));
58 break;
59 case 8:
60 asm("ld [%0], %%f8" : : "r" (&v));
61 break;
62 case 9:
63 asm("ld [%0], %%f9" : : "r" (&v));
64 break;
65 case 10:
66 asm("ld [%0], %%f10" : : "r" (&v));
67 break;
68 case 11:
69 asm("ld [%0], %%f11" : : "r" (&v));
70 break;
71 case 12:
72 asm("ld [%0], %%f12" : : "r" (&v));
73 break;
74 case 13:
75 asm("ld [%0], %%f13" : : "r" (&v));
76 break;
77 case 14:
78 asm("ld [%0], %%f14" : : "r" (&v));
79 break;
80 case 15:
81 asm("ld [%0], %%f15" : : "r" (&v));
82 break;
83 case 16:
84 asm("ld [%0], %%f16" : : "r" (&v));
85 break;
86 case 17:
87 asm("ld [%0], %%f17" : : "r" (&v));
88 break;
89 case 18:
90 asm("ld [%0], %%f18" : : "r" (&v));
91 break;
92 case 19:
93 asm("ld [%0], %%f19" : : "r" (&v));
94 break;
95 case 20:
96 asm("ld [%0], %%f20" : : "r" (&v));
97 break;
98 case 21:
99 asm("ld [%0], %%f21" : : "r" (&v));
100 break;
101 case 22:
102 asm("ld [%0], %%f22" : : "r" (&v));
103 break;
104 case 23:
105 asm("ld [%0], %%f23" : : "r" (&v));
106 break;
107 case 24:
108 asm("ld [%0], %%f24" : : "r" (&v));
109 break;
110 case 25:
111 asm("ld [%0], %%f25" : : "r" (&v));
112 break;
113 case 26:
114 asm("ld [%0], %%f26" : : "r" (&v));
115 break;
116 case 27:
117 asm("ld [%0], %%f27" : : "r" (&v));
118 break;
119 case 28:
120 asm("ld [%0], %%f28" : : "r" (&v));
121 break;
122 case 29:
123 asm("ld [%0], %%f29" : : "r" (&v));
124 break;
125 case 30:
126 asm("ld [%0], %%f30" : : "r" (&v));
127 break;
128 case 31:
129 asm("ld [%0], %%f31" : : "r" (&v));
130 break;
131 case 32:
132 asm("ld [%0], %%f32" : : "r" (&v));
133 break;
134 case 33:
135 asm("ld [%0], %%f33" : : "r" (&v));
136 break;
137 case 34:
138 asm("ld [%0], %%f34" : : "r" (&v));
139 break;
140 case 35:
141 asm("ld [%0], %%f35" : : "r" (&v));
142 break;
143 case 36:
144 asm("ld [%0], %%f36" : : "r" (&v));
145 break;
146 case 37:
147 asm("ld [%0], %%f37" : : "r" (&v));
148 break;
149 case 38:
150 asm("ld [%0], %%f38" : : "r" (&v));
151 break;
152 case 39:
153 asm("ld [%0], %%f39" : : "r" (&v));
154 break;
155 case 40:
156 asm("ld [%0], %%f40" : : "r" (&v));
157 break;
158 case 41:
159 asm("ld [%0], %%f41" : : "r" (&v));
160 break;
161 case 42:
162 asm("ld [%0], %%f42" : : "r" (&v));
163 break;
164 case 43:
165 asm("ld [%0], %%f43" : : "r" (&v));
166 break;
167 case 44:
168 asm("ld [%0], %%f44" : : "r" (&v));
169 break;
170 case 45:
171 asm("ld [%0], %%f45" : : "r" (&v));
172 break;
173 case 46:
174 asm("ld [%0], %%f46" : : "r" (&v));
175 break;
176 case 47:
177 asm("ld [%0], %%f47" : : "r" (&v));
178 break;
179 case 48:
180 asm("ld [%0], %%f48" : : "r" (&v));
181 break;
182 case 49:
183 asm("ld [%0], %%f49" : : "r" (&v));
184 break;
185 case 50:
186 asm("ld [%0], %%f50" : : "r" (&v));
187 break;
188 case 51:
189 asm("ld [%0], %%f51" : : "r" (&v));
190 break;
191 case 52:
192 asm("ld [%0], %%f52" : : "r" (&v));
193 break;
194 case 53:
195 asm("ld [%0], %%f53" : : "r" (&v));
196 break;
197 case 54:
198 asm("ld [%0], %%f54" : : "r" (&v));
199 break;
200 case 55:
201 asm("ld [%0], %%f55" : : "r" (&v));
202 break;
203 case 56:
204 asm("ld [%0], %%f56" : : "r" (&v));
205 break;
206 case 57:
207 asm("ld [%0], %%f57" : : "r" (&v));
208 break;
209 case 58:
210 asm("ld [%0], %%f58" : : "r" (&v));
211 break;
212 case 59:
213 asm("ld [%0], %%f59" : : "r" (&v));
214 break;
215 case 60:
216 asm("ld [%0], %%f60" : : "r" (&v));
217 break;
218 case 61:
219 asm("ld [%0], %%f61" : : "r" (&v));
220 break;
221 case 62:
222 asm("ld [%0], %%f62" : : "r" (&v));
223 break;
224 case 63:
225 asm("ld [%0], %%f63" : : "r" (&v));
226 break;
227 }
228 }
229
230 void
__fpu_setreg64(int r,u_int64_t v)231 __fpu_setreg64(int r, u_int64_t v)
232 {
233 switch (r) {
234 case 0:
235 asm("ldd [%0], %%f0" : : "r" (&v));
236 break;
237 case 2:
238 asm("ldd [%0], %%f2" : : "r" (&v));
239 break;
240 case 4:
241 asm("ldd [%0], %%f4" : : "r" (&v));
242 break;
243 case 6:
244 asm("ldd [%0], %%f6" : : "r" (&v));
245 break;
246 case 8:
247 asm("ldd [%0], %%f8" : : "r" (&v));
248 break;
249 case 10:
250 asm("ldd [%0], %%f10" : : "r" (&v));
251 break;
252 case 12:
253 asm("ldd [%0], %%f12" : : "r" (&v));
254 break;
255 case 14:
256 asm("ldd [%0], %%f14" : : "r" (&v));
257 break;
258 case 16:
259 asm("ldd [%0], %%f16" : : "r" (&v));
260 break;
261 case 18:
262 asm("ldd [%0], %%f18" : : "r" (&v));
263 break;
264 case 20:
265 asm("ldd [%0], %%f20" : : "r" (&v));
266 break;
267 case 22:
268 asm("ldd [%0], %%f22" : : "r" (&v));
269 break;
270 case 24:
271 asm("ldd [%0], %%f24" : : "r" (&v));
272 break;
273 case 26:
274 asm("ldd [%0], %%f26" : : "r" (&v));
275 break;
276 case 28:
277 asm("ldd [%0], %%f28" : : "r" (&v));
278 break;
279 case 30:
280 asm("ldd [%0], %%f30" : : "r" (&v));
281 break;
282 case 32:
283 asm("ldd [%0], %%f32" : : "r" (&v));
284 break;
285 case 34:
286 asm("ldd [%0], %%f34" : : "r" (&v));
287 break;
288 case 36:
289 asm("ldd [%0], %%f36" : : "r" (&v));
290 break;
291 case 38:
292 asm("ldd [%0], %%f38" : : "r" (&v));
293 break;
294 case 40:
295 asm("ldd [%0], %%f40" : : "r" (&v));
296 break;
297 case 42:
298 asm("ldd [%0], %%f42" : : "r" (&v));
299 break;
300 case 44:
301 asm("ldd [%0], %%f44" : : "r" (&v));
302 break;
303 case 46:
304 asm("ldd [%0], %%f46" : : "r" (&v));
305 break;
306 case 48:
307 asm("ldd [%0], %%f48" : : "r" (&v));
308 break;
309 case 50:
310 asm("ldd [%0], %%f50" : : "r" (&v));
311 break;
312 case 52:
313 asm("ldd [%0], %%f52" : : "r" (&v));
314 break;
315 case 54:
316 asm("ldd [%0], %%f54" : : "r" (&v));
317 break;
318 case 56:
319 asm("ldd [%0], %%f56" : : "r" (&v));
320 break;
321 case 58:
322 asm("ldd [%0], %%f58" : : "r" (&v));
323 break;
324 case 60:
325 asm("ldd [%0], %%f60" : : "r" (&v));
326 break;
327 case 62:
328 asm("ldd [%0], %%f62" : : "r" (&v));
329 break;
330 }
331 }
332
333 u_int32_t
__fpu_getreg32(int r)334 __fpu_getreg32(int r)
335 {
336 u_int32_t v;
337
338 switch (r) {
339 case 0:
340 asm("st %%f0, [%0]" : : "r" (&v));
341 break;
342 case 1:
343 asm("st %%f1, [%0]" : : "r" (&v));
344 break;
345 case 2:
346 asm("st %%f2, [%0]" : : "r" (&v));
347 break;
348 case 3:
349 asm("st %%f3, [%0]" : : "r" (&v));
350 break;
351 case 4:
352 asm("st %%f4, [%0]" : : "r" (&v));
353 break;
354 case 5:
355 asm("st %%f5, [%0]" : : "r" (&v));
356 break;
357 case 6:
358 asm("st %%f6, [%0]" : : "r" (&v));
359 break;
360 case 7:
361 asm("st %%f7, [%0]" : : "r" (&v));
362 break;
363 case 8:
364 asm("st %%f8, [%0]" : : "r" (&v));
365 break;
366 case 9:
367 asm("st %%f9, [%0]" : : "r" (&v));
368 break;
369 case 10:
370 asm("st %%f10, [%0]" : : "r" (&v));
371 break;
372 case 11:
373 asm("st %%f11, [%0]" : : "r" (&v));
374 break;
375 case 12:
376 asm("st %%f12, [%0]" : : "r" (&v));
377 break;
378 case 13:
379 asm("st %%f13, [%0]" : : "r" (&v));
380 break;
381 case 14:
382 asm("st %%f14, [%0]" : : "r" (&v));
383 break;
384 case 15:
385 asm("st %%f15, [%0]" : : "r" (&v));
386 break;
387 case 16:
388 asm("st %%f16, [%0]" : : "r" (&v));
389 break;
390 case 17:
391 asm("st %%f17, [%0]" : : "r" (&v));
392 break;
393 case 18:
394 asm("st %%f18, [%0]" : : "r" (&v));
395 break;
396 case 19:
397 asm("st %%f19, [%0]" : : "r" (&v));
398 break;
399 case 20:
400 asm("st %%f20, [%0]" : : "r" (&v));
401 break;
402 case 21:
403 asm("st %%f21, [%0]" : : "r" (&v));
404 break;
405 case 22:
406 asm("st %%f22, [%0]" : : "r" (&v));
407 break;
408 case 23:
409 asm("st %%f23, [%0]" : : "r" (&v));
410 break;
411 case 24:
412 asm("st %%f24, [%0]" : : "r" (&v));
413 break;
414 case 25:
415 asm("st %%f25, [%0]" : : "r" (&v));
416 break;
417 case 26:
418 asm("st %%f26, [%0]" : : "r" (&v));
419 break;
420 case 27:
421 asm("st %%f27, [%0]" : : "r" (&v));
422 break;
423 case 28:
424 asm("st %%f28, [%0]" : : "r" (&v));
425 break;
426 case 29:
427 asm("st %%f29, [%0]" : : "r" (&v));
428 break;
429 case 30:
430 asm("st %%f30, [%0]" : : "r" (&v));
431 break;
432 case 31:
433 asm("st %%f31, [%0]" : : "r" (&v));
434 break;
435 case 32:
436 asm("st %%f32, [%0]" : : "r" (&v));
437 break;
438 case 33:
439 asm("st %%f33, [%0]" : : "r" (&v));
440 break;
441 case 34:
442 asm("st %%f34, [%0]" : : "r" (&v));
443 break;
444 case 35:
445 asm("st %%f35, [%0]" : : "r" (&v));
446 break;
447 case 36:
448 asm("st %%f36, [%0]" : : "r" (&v));
449 break;
450 case 37:
451 asm("st %%f37, [%0]" : : "r" (&v));
452 break;
453 case 38:
454 asm("st %%f38, [%0]" : : "r" (&v));
455 break;
456 case 39:
457 asm("st %%f39, [%0]" : : "r" (&v));
458 break;
459 case 40:
460 asm("st %%f40, [%0]" : : "r" (&v));
461 break;
462 case 41:
463 asm("st %%f41, [%0]" : : "r" (&v));
464 break;
465 case 42:
466 asm("st %%f42, [%0]" : : "r" (&v));
467 break;
468 case 43:
469 asm("st %%f43, [%0]" : : "r" (&v));
470 break;
471 case 44:
472 asm("st %%f44, [%0]" : : "r" (&v));
473 break;
474 case 45:
475 asm("st %%f45, [%0]" : : "r" (&v));
476 break;
477 case 46:
478 asm("st %%f46, [%0]" : : "r" (&v));
479 break;
480 case 47:
481 asm("st %%f47, [%0]" : : "r" (&v));
482 break;
483 case 48:
484 asm("st %%f48, [%0]" : : "r" (&v));
485 break;
486 case 49:
487 asm("st %%f49, [%0]" : : "r" (&v));
488 break;
489 case 50:
490 asm("st %%f50, [%0]" : : "r" (&v));
491 break;
492 case 51:
493 asm("st %%f51, [%0]" : : "r" (&v));
494 break;
495 case 52:
496 asm("st %%f52, [%0]" : : "r" (&v));
497 break;
498 case 53:
499 asm("st %%f53, [%0]" : : "r" (&v));
500 break;
501 case 54:
502 asm("st %%f54, [%0]" : : "r" (&v));
503 break;
504 case 55:
505 asm("st %%f55, [%0]" : : "r" (&v));
506 break;
507 case 56:
508 asm("st %%f56, [%0]" : : "r" (&v));
509 break;
510 case 57:
511 asm("st %%f57, [%0]" : : "r" (&v));
512 break;
513 case 58:
514 asm("st %%f58, [%0]" : : "r" (&v));
515 break;
516 case 59:
517 asm("st %%f59, [%0]" : : "r" (&v));
518 break;
519 case 60:
520 asm("st %%f60, [%0]" : : "r" (&v));
521 break;
522 case 61:
523 asm("st %%f61, [%0]" : : "r" (&v));
524 break;
525 case 62:
526 asm("st %%f62, [%0]" : : "r" (&v));
527 break;
528 case 63:
529 asm("st %%f63, [%0]" : : "r" (&v));
530 break;
531 }
532 return (v);
533 }
534
535 u_int64_t
__fpu_getreg64(int r)536 __fpu_getreg64(int r)
537 {
538 u_int64_t v;
539
540 switch (r) {
541 case 0:
542 asm("std %%f0, [%0]" : : "r" (&v));
543 break;
544 case 2:
545 asm("std %%f2, [%0]" : : "r" (&v));
546 break;
547 case 4:
548 asm("std %%f4, [%0]" : : "r" (&v));
549 break;
550 case 6:
551 asm("std %%f6, [%0]" : : "r" (&v));
552 break;
553 case 8:
554 asm("std %%f8, [%0]" : : "r" (&v));
555 break;
556 case 10:
557 asm("std %%f10, [%0]" : : "r" (&v));
558 break;
559 case 12:
560 asm("std %%f12, [%0]" : : "r" (&v));
561 break;
562 case 14:
563 asm("std %%f14, [%0]" : : "r" (&v));
564 break;
565 case 16:
566 asm("std %%f16, [%0]" : : "r" (&v));
567 break;
568 case 18:
569 asm("std %%f18, [%0]" : : "r" (&v));
570 break;
571 case 20:
572 asm("std %%f20, [%0]" : : "r" (&v));
573 break;
574 case 22:
575 asm("std %%f22, [%0]" : : "r" (&v));
576 break;
577 case 24:
578 asm("std %%f24, [%0]" : : "r" (&v));
579 break;
580 case 26:
581 asm("std %%f26, [%0]" : : "r" (&v));
582 break;
583 case 28:
584 asm("std %%f28, [%0]" : : "r" (&v));
585 break;
586 case 30:
587 asm("std %%f30, [%0]" : : "r" (&v));
588 break;
589 case 32:
590 asm("std %%f32, [%0]" : : "r" (&v));
591 break;
592 case 34:
593 asm("std %%f34, [%0]" : : "r" (&v));
594 break;
595 case 36:
596 asm("std %%f36, [%0]" : : "r" (&v));
597 break;
598 case 38:
599 asm("std %%f38, [%0]" : : "r" (&v));
600 break;
601 case 40:
602 asm("std %%f40, [%0]" : : "r" (&v));
603 break;
604 case 42:
605 asm("std %%f42, [%0]" : : "r" (&v));
606 break;
607 case 44:
608 asm("std %%f44, [%0]" : : "r" (&v));
609 break;
610 case 46:
611 asm("std %%f46, [%0]" : : "r" (&v));
612 break;
613 case 48:
614 asm("std %%f48, [%0]" : : "r" (&v));
615 break;
616 case 50:
617 asm("std %%f50, [%0]" : : "r" (&v));
618 break;
619 case 52:
620 asm("std %%f52, [%0]" : : "r" (&v));
621 break;
622 case 54:
623 asm("std %%f54, [%0]" : : "r" (&v));
624 break;
625 case 56:
626 asm("std %%f56, [%0]" : : "r" (&v));
627 break;
628 case 58:
629 asm("std %%f58, [%0]" : : "r" (&v));
630 break;
631 case 60:
632 asm("std %%f60, [%0]" : : "r" (&v));
633 break;
634 case 62:
635 asm("std %%f62, [%0]" : : "r" (&v));
636 break;
637 }
638 return (v);
639 }
640