xref: /openbsd/sys/arch/m88k/include/cmmu.h (revision c0c4242b)
1*c0c4242bSmiod /*	$OpenBSD: cmmu.h,v 1.32 2013/11/16 18:45:20 miod Exp $ */
23180e169Smiod /*
33180e169Smiod  * Mach Operating System
43180e169Smiod  * Copyright (c) 1993-1992 Carnegie Mellon University
53180e169Smiod  * All Rights Reserved.
63180e169Smiod  *
73180e169Smiod  * Permission to use, copy, modify and distribute this software and its
83180e169Smiod  * documentation is hereby granted, provided that both the copyright
93180e169Smiod  * notice and this permission notice appear in all copies of the
103180e169Smiod  * software, derivative works or modified versions, and any portions
113180e169Smiod  * thereof, and that both notices appear in supporting documentation.
123180e169Smiod  *
133180e169Smiod  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
143180e169Smiod  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
153180e169Smiod  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
163180e169Smiod  *
173180e169Smiod  * Carnegie Mellon requests users of this software to return to
183180e169Smiod  *
193180e169Smiod  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
203180e169Smiod  *  School of Computer Science
213180e169Smiod  *  Carnegie Mellon University
223180e169Smiod  *  Pittsburgh PA 15213-3890
233180e169Smiod  *
243180e169Smiod  * any improvements or extensions that they make and grant Carnegie Mellon
253180e169Smiod  * the rights to redistribute these changes.
263180e169Smiod  */
273180e169Smiod 
283367ca7dSmiod #ifndef	_M88K_CMMU_H_
293367ca7dSmiod #define	_M88K_CMMU_H_
303180e169Smiod 
313180e169Smiod /*
323180e169Smiod  * Prototypes and stuff for cmmu.c.
333180e169Smiod  */
340934804cSmiod #if defined(_KERNEL) && !defined(_LOCORE)
353180e169Smiod 
36*c0c4242bSmiod #include <machine/mmu.h>
37*c0c4242bSmiod 
383180e169Smiod /* machine dependent cmmu function pointer structure */
393180e169Smiod struct cmmu_p {
4063bae11eSmiod 	cpuid_t (*init)(void);
41b3edb888Smiod 	void (*batc_setup)(cpuid_t, apr_t);
427628c440Smiod 	void (*setup_board_config)(void);
437628c440Smiod 	void (*cpu_configuration_print)(int);
4463bae11eSmiod 	void (*shutdown)(void);
454ccfb91dSmiod 
467628c440Smiod 	cpuid_t (*cpu_number)(void);
474ccfb91dSmiod 
4805906183Smiod 	apr_t (*apr_cmode)(void);
4905906183Smiod 	apr_t (*pte_cmode)(void);
502a702c5fSmiod 	void (*set_sapr)(apr_t);
517628c440Smiod 	void (*set_uapr)(apr_t);
524ccfb91dSmiod 
534ccfb91dSmiod 	void (*tlb_inv_s)(cpuid_t, vaddr_t, pt_entry_t);
544ccfb91dSmiod 	void (*tlb_inv_u)(cpuid_t, vaddr_t, pt_entry_t);
55b1cc216fSmiod 	void (*tlb_inv_all)(cpuid_t);
564ccfb91dSmiod 
57ec85fa53Smiod 	void (*cache_wbinv)(cpuid_t, paddr_t, psize_t);
58acaa1300Smiod 	void (*dcache_wb)(cpuid_t, paddr_t, psize_t);
59ec85fa53Smiod 	void (*icache_inv)(cpuid_t, paddr_t, psize_t);
600f19f6f9Smiod 	void (*dma_cachectl)(paddr_t, psize_t, int);
614ccfb91dSmiod 
627625720eSmiod #ifdef MULTIPROCESSOR
63bee5e359Smiod 	void (*dma_cachectl_local)(paddr_t, psize_t, int);
647625720eSmiod 	void (*initialize_cpu)(cpuid_t);
657625720eSmiod #endif
663180e169Smiod };
673180e169Smiod 
68842cee7cSmiod extern const struct cmmu_p *cmmu;
693180e169Smiod 
70a50b8c3cSmiod #ifdef MULTIPROCESSOR
71a50b8c3cSmiod /*
72a50b8c3cSmiod  * On 8820x-based systems, this lock protects the CMMU SAR and SCR registers;
73a50b8c3cSmiod  * other registers may be accessed without locking it.
74a50b8c3cSmiod  * On 88410-based systems, this lock protects accesses to the BusSwitch GCSR
75a50b8c3cSmiod  * register, which masks or unmasks the 88410 control addresses.
76a50b8c3cSmiod  */
77a50b8c3cSmiod extern __cpu_simple_lock_t cmmu_cpu_lock;
78a50b8c3cSmiod #define CMMU_LOCK   __cpu_simple_lock(&cmmu_cpu_lock)
79a50b8c3cSmiod #define CMMU_UNLOCK __cpu_simple_unlock(&cmmu_cpu_lock)
80a50b8c3cSmiod #else
81a50b8c3cSmiod #define	CMMU_LOCK	do { /* nothing */ } while (0)
82a50b8c3cSmiod #define	CMMU_UNLOCK	do { /* nothing */ } while (0)
83a50b8c3cSmiod #endif	/* MULTIPROCESSOR */
84a50b8c3cSmiod 
857628c440Smiod #define cmmu_init			(cmmu->init)
86b3edb888Smiod #define cmmu_batc_setup			(cmmu->batc_setup)
877628c440Smiod #define setup_board_config		(cmmu->setup_board_config)
888c721d3fSmiod #define	cpu_configuration_print(cpu)	(cmmu->cpu_configuration_print)(cpu)
8963bae11eSmiod #define	cmmu_shutdown			(cmmu->shutdown)
907628c440Smiod #define	cmmu_cpu_number			(cmmu->cpu_number)
9105906183Smiod #define	cmmu_apr_cmode			(cmmu->apr_cmode)
9205906183Smiod #define	cmmu_pte_cmode			(cmmu->pte_cmode)
938c721d3fSmiod #define	cmmu_set_sapr(apr)		(cmmu->set_sapr)(apr)
948c721d3fSmiod #define	cmmu_set_uapr(apr)		(cmmu->set_uapr)(apr)
954ccfb91dSmiod #define	cmmu_tlbis(cpu, va, pte) 	(cmmu->tlb_inv_s)(cpu, va, pte)
964ccfb91dSmiod #define	cmmu_tlbiu(cpu, va, pte) 	(cmmu->tlb_inv_u)(cpu, va, pte)
974ccfb91dSmiod #define	cmmu_tlbia(cpu) 		(cmmu->tlb_inv_all)(cpu)
98ec85fa53Smiod #define	cmmu_cache_wbinv(cpu, pa, s)	(cmmu->cache_wbinv)(cpu, pa, s)
99acaa1300Smiod #define	cmmu_dcache_wb(cpu, pa, s)	(cmmu->dcache_wb)(cpu, pa, s)
100ec85fa53Smiod #define	cmmu_icache_inv(cpu,pa,s)	(cmmu->icache_inv)(cpu, pa, s)
1018c721d3fSmiod #define	dma_cachectl(pa, s, op)		(cmmu->dma_cachectl)(pa, s, op)
1028c721d3fSmiod #define	dma_cachectl_local(pa, s, op)	(cmmu->dma_cachectl_local)(pa, s, op)
1038c721d3fSmiod #define	cmmu_initialize_cpu(cpu)	(cmmu->initialize_cpu)(cpu)
1043180e169Smiod 
105367bd576Smiod /*
106bee5e359Smiod  * dma_cachectl{,_local}() modes
107367bd576Smiod  */
1088c721d3fSmiod #define DMA_CACHE_INV		0x00
109bee5e359Smiod #define DMA_CACHE_SYNC_INVAL	0x01
1108c721d3fSmiod #define DMA_CACHE_SYNC		0x02
111367bd576Smiod 
112*c0c4242bSmiod /*
113*c0c4242bSmiod  * Current BATC values.
114*c0c4242bSmiod  */
115*c0c4242bSmiod 
116*c0c4242bSmiod extern batc_t global_dbatc[BATC_MAX], global_ibatc[BATC_MAX];
117*c0c4242bSmiod 
1183367ca7dSmiod #endif	/* _KERNEL && !_LOCORE */
1193180e169Smiod 
1203367ca7dSmiod #endif	/* _M88K_CMMU_H_ */
121