1 /* $OpenBSD: cy82c693reg.h,v 1.2 2008/06/26 05:42:17 ray Exp $ */ 2 /* $NetBSD: cy82c693reg.h,v 1.1 2000/06/06 03:07:39 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _DEV_PCI_CY82C693REG_H_ 34 #define _DEV_PCI_CY82C693REG_H_ 35 36 /* 37 * Register definitions for the Cypress 82c693 hyperCache(tm) Stand-Alone 38 * PCI Peripheral Controller with USB. 39 */ 40 41 #define CYHC_CONFIG_ADDR 0x22 /* Chipset Configuration Address */ 42 #define CYHC_CONFIG_DATA 0x23 /* Chipset Configuration Data */ 43 44 #define CONFIG_PERIPH1 0x01 /* Peripheral Control #1 */ 45 46 #define CONFIG_PERIPH2 0x02 /* Peripheral Control #2 */ 47 48 #define CONFIG_ELCR1 0x03 /* Edge/Level Control #1 */ 49 50 #define CONFIG_ELCR2 0x04 /* Edge/Level Control #2 */ 51 52 #define CONFIG_RTC 0x05 /* RTC Configuration */ 53 54 #endif /* _DEV_PCI_CY82C693REG_H_ */ 55