1 /* $OpenBSD: if_gem_pci.c,v 1.41 2024/05/24 06:02:53 jsg Exp $ */
2 /* $NetBSD: if_gem_pci.c,v 1.1 2001/09/16 00:11:42 eeh Exp $ */
3
4 /*
5 *
6 * Copyright (C) 2001 Eduardo Horvath.
7 * All rights reserved.
8 *
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 */
32
33 /*
34 * PCI bindings for Sun GEM ethernet controllers.
35 */
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40
41 #include <net/if.h>
42 #include <net/if_media.h>
43
44 #include <netinet/in.h>
45 #include <netinet/if_ether.h>
46
47 #include <machine/bus.h>
48 #include <machine/intr.h>
49
50 #ifdef __sparc64__
51 #include <dev/ofw/openfirm.h>
52 #endif
53
54 #include <dev/mii/miivar.h>
55
56 #include <dev/ic/gemreg.h>
57 #include <dev/ic/gemvar.h>
58
59 #include <dev/pci/pcivar.h>
60 #include <dev/pci/pcireg.h>
61 #include <dev/pci/pcidevs.h>
62
63 struct gem_pci_softc {
64 struct gem_softc gsc_gem; /* GEM device */
65 bus_space_tag_t gsc_memt;
66 bus_space_handle_t gsc_memh;
67 bus_size_t gsc_memsize;
68 pci_chipset_tag_t gsc_pc;
69 };
70
71 int gem_match_pci(struct device *, void *, void *);
72 void gem_attach_pci(struct device *, struct device *, void *);
73 int gem_detach_pci(struct device *, int);
74 int gem_pci_enaddr(struct gem_softc *, struct pci_attach_args *);
75
76 const struct cfattach gem_pci_ca = {
77 sizeof(struct gem_pci_softc), gem_match_pci, gem_attach_pci,
78 gem_detach_pci
79 };
80
81 /*
82 * Attach routines need to be split out to different bus-specific files.
83 */
84
85 const struct pci_matchid gem_pci_devices[] = {
86 { PCI_VENDOR_SUN, PCI_PRODUCT_SUN_ERINETWORK },
87 { PCI_VENDOR_SUN, PCI_PRODUCT_SUN_GEMNETWORK },
88 { PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_GMAC },
89 { PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_K2_GMAC },
90 { PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_GMAC },
91 { PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_GMAC },
92 { PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTHGMAC },
93 { PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH2GMAC },
94 };
95
96 int
gem_match_pci(struct device * parent,void * cf,void * aux)97 gem_match_pci(struct device *parent, void *cf, void *aux)
98 {
99 return (pci_matchbyid((struct pci_attach_args *)aux, gem_pci_devices,
100 nitems(gem_pci_devices)));
101 }
102
103 #define PROMHDR_PTR_DATA 0x18
104 #define PROMDATA_PTR_VPD 0x08
105 #define PROMDATA_DATA2 0x0a
106
107 static const u_int8_t gem_promhdr[] = { 0x55, 0xaa };
108 static const u_int8_t gem_promdat[] = {
109 'P', 'C', 'I', 'R',
110 PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8,
111 PCI_PRODUCT_SUN_GEMNETWORK & 0xff, PCI_PRODUCT_SUN_GEMNETWORK >> 8
112 };
113
114 static const u_int8_t gem_promdat2[] = {
115 0x18, 0x00, /* structure length */
116 0x00, /* structure revision */
117 0x00, /* interface revision */
118 PCI_SUBCLASS_NETWORK_ETHERNET, /* subclass code */
119 PCI_CLASS_NETWORK /* class code */
120 };
121
122 int
gem_pci_enaddr(struct gem_softc * sc,struct pci_attach_args * pa)123 gem_pci_enaddr(struct gem_softc *sc, struct pci_attach_args *pa)
124 {
125 struct pci_vpd *vpd;
126 bus_space_handle_t romh;
127 bus_space_tag_t romt;
128 bus_size_t romsize = 0;
129 u_int8_t buf[32];
130 pcireg_t address;
131 int dataoff, vpdoff;
132 int rv = -1;
133
134 if (pci_mapreg_map(pa, PCI_ROM_REG, PCI_MAPREG_TYPE_MEM, 0,
135 &romt, &romh, 0, &romsize, 0))
136 return (-1);
137
138 address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
139 address |= PCI_ROM_ENABLE;
140 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_ROM_REG, address);
141
142 bus_space_read_region_1(romt, romh, 0, buf, sizeof(buf));
143 if (bcmp(buf, gem_promhdr, sizeof(gem_promhdr)))
144 goto fail;
145
146 dataoff = buf[PROMHDR_PTR_DATA] | (buf[PROMHDR_PTR_DATA + 1] << 8);
147 if (dataoff < 0x1c)
148 goto fail;
149
150 bus_space_read_region_1(romt, romh, dataoff, buf, sizeof(buf));
151 if (bcmp(buf, gem_promdat, sizeof(gem_promdat)) ||
152 bcmp(buf + PROMDATA_DATA2, gem_promdat2, sizeof(gem_promdat2)))
153 goto fail;
154
155 vpdoff = buf[PROMDATA_PTR_VPD] | (buf[PROMDATA_PTR_VPD + 1] << 8);
156 if (vpdoff < 0x1c)
157 goto fail;
158
159 bus_space_read_region_1(romt, romh, vpdoff, buf, sizeof(buf));
160
161 /*
162 * The VPD of gem is not in PCI 2.2 standard format. The length
163 * in the resource header is in big endian.
164 */
165 vpd = (struct pci_vpd *)(buf + 3);
166 if (!PCI_VPDRES_ISLARGE(buf[0]) ||
167 PCI_VPDRES_LARGE_NAME(buf[0]) != PCI_VPDRES_TYPE_VPD)
168 goto fail;
169 if (vpd->vpd_key0 != 'N' || vpd->vpd_key1 != 'A')
170 goto fail;
171
172 bcopy(buf + 6, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
173 rv = 0;
174
175 fail:
176 if (romsize != 0)
177 bus_space_unmap(romt, romh, romsize);
178
179 address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
180 address &= ~PCI_ROM_ENABLE;
181 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_ROM_REG, address);
182
183 return (rv);
184 }
185
186 void
gem_attach_pci(struct device * parent,struct device * self,void * aux)187 gem_attach_pci(struct device *parent, struct device *self, void *aux)
188 {
189 struct pci_attach_args *pa = aux;
190 struct gem_pci_softc *gsc = (void *)self;
191 struct gem_softc *sc = &gsc->gsc_gem;
192 pci_intr_handle_t ih;
193 #ifdef __sparc64__
194 /* XXX the following declarations should be elsewhere */
195 extern void myetheraddr(u_char *);
196 #endif
197 const char *intrstr = NULL;
198 int type, gotenaddr = 0;
199
200 gsc->gsc_pc = pa->pa_pc;
201
202 if (pa->pa_memt) {
203 type = PCI_MAPREG_TYPE_MEM;
204 sc->sc_bustag = pa->pa_memt;
205 } else {
206 type = PCI_MAPREG_TYPE_IO;
207 sc->sc_bustag = pa->pa_iot;
208 }
209
210 sc->sc_dmatag = pa->pa_dmat;
211
212 sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
213
214 switch (PCI_PRODUCT(pa->pa_id)) {
215 case PCI_PRODUCT_SUN_GEMNETWORK:
216 sc->sc_variant = GEM_SUN_GEM;
217 break;
218 case PCI_PRODUCT_SUN_ERINETWORK:
219 sc->sc_variant = GEM_SUN_ERI;
220 break;
221 case PCI_PRODUCT_APPLE_K2_GMAC:
222 sc->sc_variant = GEM_APPLE_K2_GMAC;
223 break;
224 default:
225 sc->sc_variant = GEM_APPLE_GMAC;
226 }
227
228 #define PCI_GEM_BASEADDR 0x10
229 if (pci_mapreg_map(pa, PCI_GEM_BASEADDR, type, 0,
230 &gsc->gsc_memt, &gsc->gsc_memh, NULL, &gsc->gsc_memsize, 0) != 0) {
231 printf(": can't map registers\n");
232 return;
233 }
234
235 sc->sc_bustag = gsc->gsc_memt;
236 sc->sc_h1 = gsc->gsc_memh;
237
238 if (bus_space_subregion(sc->sc_bustag, sc->sc_h1,
239 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE, &sc->sc_h2)) {
240 printf(": unable to create bank 2 subregion\n");
241 bus_space_unmap(gsc->gsc_memt, gsc->gsc_memh, gsc->gsc_memsize);
242 return;
243 }
244
245 if (gem_pci_enaddr(sc, pa) == 0)
246 gotenaddr = 1;
247
248 #ifdef __sparc64__
249 if (!gotenaddr) {
250 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address",
251 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
252 myetheraddr(sc->sc_arpcom.ac_enaddr);
253 gotenaddr = 1;
254 }
255 #endif
256 #ifdef __powerpc__
257 if (!gotenaddr) {
258 pci_ether_hw_addr(pa->pa_pc, sc->sc_arpcom.ac_enaddr);
259 gotenaddr = 1;
260 }
261 #endif
262
263 sc->sc_burst = 16; /* XXX */
264
265 if (pci_intr_map(pa, &ih) != 0) {
266 printf(": couldn't map interrupt\n");
267 bus_space_unmap(gsc->gsc_memt, gsc->gsc_memh, gsc->gsc_memsize);
268 return;
269 }
270 intrstr = pci_intr_string(pa->pa_pc, ih);
271 sc->sc_ih = pci_intr_establish(pa->pa_pc,
272 ih, IPL_NET | IPL_MPSAFE, gem_intr, sc, self->dv_xname);
273 if (sc->sc_ih == NULL) {
274 printf(": couldn't establish interrupt");
275 if (intrstr != NULL)
276 printf(" at %s", intrstr);
277 printf("\n");
278 bus_space_unmap(gsc->gsc_memt, gsc->gsc_memh, gsc->gsc_memsize);
279 return;
280 }
281
282 printf(": %s", intrstr);
283
284 /*
285 * call the main configure
286 */
287 gem_config(sc);
288 }
289
290 int
gem_detach_pci(struct device * self,int flags)291 gem_detach_pci(struct device *self, int flags)
292 {
293 struct gem_pci_softc *gsc = (void *)self;
294 struct gem_softc *sc = &gsc->gsc_gem;
295
296 timeout_del(&sc->sc_tick_ch);
297 timeout_del(&sc->sc_rx_watchdog);
298
299 gem_unconfig(sc);
300 pci_intr_disestablish(gsc->gsc_pc, sc->sc_ih);
301 bus_space_unmap(gsc->gsc_memt, gsc->gsc_memh, gsc->gsc_memsize);
302
303 return (0);
304 }
305