xref: /openbsd/sys/dev/pcmcia/pcmciavar.h (revision ba796609)
1 /*	$OpenBSD: pcmciavar.h,v 1.21 2010/09/04 12:59:27 miod Exp $	*/
2 /*	$NetBSD: pcmciavar.h,v 1.5 1998/07/19 17:28:17 christos Exp $	*/
3 
4 /*
5  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Marc Horowitz.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/types.h>
34 #include <sys/queue.h>
35 
36 #include <machine/bus.h>
37 
38 #include <dev/pcmcia/pcmciachip.h>
39 
40 extern int	pcmcia_verbose;
41 
42 /*
43  * Contains information about mapped/allocated i/o spaces.
44  */
45 struct pcmcia_io_handle {
46 	bus_space_tag_t iot;		/* bus space tag (from chipset) */
47 	bus_space_handle_t ioh;		/* mapped space handle */
48 	bus_addr_t      addr;		/* resulting address in bus space */
49 	bus_size_t      size;		/* size of i/o space */
50 	int             flags;		/* misc. information */
51 };
52 
53 #define	PCMCIA_IO_ALLOCATED	0x01	/* i/o space was allocated */
54 
55 /*
56  * Contains information about allocated memory space.
57  */
58 struct pcmcia_mem_handle {
59 	bus_space_tag_t memt;		/* bus space tag (from chipset) */
60 	bus_space_handle_t memh;	/* mapped space handle */
61 	bus_addr_t      addr;		/* resulting address in bus space */
62 	bus_size_t      size;		/* size of mem space */
63 	pcmcia_mem_handle_t mhandle;	/* opaque memory handle */
64 	bus_size_t      realsize;	/* how much we really allocated */
65 };
66 
67 /* pcmcia itself */
68 
69 #define PCMCIA_CFE_MWAIT_REQUIRED	0x0001
70 #define PCMCIA_CFE_RDYBSY_ACTIVE	0x0002
71 #define PCMCIA_CFE_WP_ACTIVE		0x0004
72 #define PCMCIA_CFE_BVD_ACTIVE		0x0008
73 #define PCMCIA_CFE_IO8			0x0010
74 #define PCMCIA_CFE_IO16			0x0020
75 #define PCMCIA_CFE_IRQSHARE		0x0040
76 #define PCMCIA_CFE_IRQPULSE		0x0080
77 #define PCMCIA_CFE_IRQLEVEL		0x0100
78 #define PCMCIA_CFE_POWERDOWN		0x0200
79 #define PCMCIA_CFE_READONLY		0x0400
80 #define PCMCIA_CFE_AUDIO		0x0800
81 
82 struct pcmcia_config_entry {
83 	int		number;
84 	u_int32_t	flags;
85 	int		iftype;
86 	int		num_iospace;
87 
88 	/*
89 	 * The card will only decode this mask in any case, so we can
90 	 * do dynamic allocation with this in mind, in case the suggestions
91 	 * below are no good.
92 	 */
93 	u_long		iomask;
94 	struct {
95 		u_long	length;
96 		u_long	start;
97 	} iospace[4];		/* XXX this could be as high as 16 */
98 	u_int16_t	irqmask;
99 	int		num_memspace;
100 	struct {
101 		u_long	length;
102 		u_long	cardaddr;
103 		u_long	hostaddr;
104 	} memspace[2];		/* XXX this could be as high as 8 */
105 	int		maxtwins;
106 	SIMPLEQ_ENTRY(pcmcia_config_entry) cfe_list;
107 };
108 
109 struct pcmcia_function {
110 	/* read off the card */
111 	int		number;
112 	int		function;
113 	int		last_config_index;
114 	u_long		ccr_base;
115 	u_long		ccr_mask;
116 	SIMPLEQ_HEAD(, pcmcia_config_entry) cfe_head;
117 	SIMPLEQ_ENTRY(pcmcia_function) pf_list;
118 	/* run-time state */
119 	struct pcmcia_softc *sc;
120 	struct device *child;
121 	struct pcmcia_config_entry *cfe;
122 	struct pcmcia_mem_handle pf_pcmh;
123 #define	pf_ccrt		pf_pcmh.memt
124 #define	pf_ccrh		pf_pcmh.memh
125 #define	pf_ccr_mhandle	pf_pcmh.mhandle
126 #define	pf_ccr_realsize	pf_pcmh.realsize
127 	bus_size_t	pf_ccr_offset;
128 	int		pf_ccr_window;
129 	bus_addr_t	pf_mfc_iobase;
130 	bus_addr_t	pf_mfc_iomax;
131 	int		(*ih_fct)(void *);
132 	void		*ih_arg;
133 	int		ih_ipl;
134 	int		pf_flags;
135 };
136 
137 /* pf_flags */
138 #define	PFF_ENABLED	0x0001		/* function is enabled */
139 #define	PFF_FAKE	0x0002		/* function is made up (no CIS) */
140 
141 struct pcmcia_card {
142 	int		cis1_major;
143 	int		cis1_minor;
144 	/* XXX waste of space? */
145 	char		cis1_info_buf[256];
146 	char		*cis1_info[4];
147 	u_int16_t	manufacturer;
148 #define	PCMCIA_VENDOR_INVALID	0xffff
149 	u_int16_t	product;
150 #define	PCMCIA_PRODUCT_INVALID	0xffff
151 	u_int16_t	error;
152 #define	PCMCIA_CIS_INVALID		{ NULL, NULL, NULL, NULL }
153 	SIMPLEQ_HEAD(, pcmcia_function) pf_head;
154 };
155 
156 struct pcmcia_softc {
157 	struct device	dev;
158 
159 	/* this stuff is for the socket */
160 	pcmcia_chipset_tag_t pct;
161 	pcmcia_chipset_handle_t pch;
162 
163 	/* this stuff is for the card */
164 	struct pcmcia_card card;
165 	void		*ih;
166 	int		sc_enabled_count;	/* how many functions are
167 						   enabled */
168 
169 	/*
170 	 * These are passed down from the PCMCIA chip, and exist only
171 	 * so that cards with Very Special address allocation needs
172 	 * know what range they should be dealing with.
173 	 */
174 	bus_addr_t iobase;		/* start i/o space allocation here */
175 	bus_size_t iosize;		/* size of the i/o space range */
176 };
177 
178 struct pcmcia_cis_quirk {
179 	u_int16_t manufacturer;
180 	u_int16_t product;
181 	char *cis1_info[4];
182 	struct pcmcia_function *pf;
183 	struct pcmcia_config_entry *cfe;
184 };
185 
186 struct pcmcia_attach_args {
187 	u_int16_t manufacturer;
188 	u_int16_t product;
189 	struct pcmcia_card *card;
190 	struct pcmcia_function *pf;
191 };
192 
193 struct pcmcia_tuple {
194 	unsigned int	code;
195 	unsigned int	length;
196 	unsigned int	addrshift;
197 	unsigned int	flags;
198 #define	PTF_INDIRECT	0x01
199 	bus_size_t	indirect_ptr;
200 	bus_size_t	ptr;
201 	bus_space_tag_t	memt;
202 	bus_space_handle_t memh;
203 };
204 
205 void	pcmcia_read_cis(struct pcmcia_softc *);
206 void	pcmcia_check_cis_quirks(struct pcmcia_softc *);
207 void	pcmcia_print_cis(struct pcmcia_softc *);
208 int	pcmcia_scan_cis(struct device * dev,
209 	    int (*) (struct pcmcia_tuple *, void *), void *);
210 uint8_t	pcmcia_cis_read_1(struct pcmcia_tuple *, bus_size_t);
211 
212 #define	pcmcia_tuple_read_1(tuple, idx1)				\
213 	(pcmcia_cis_read_1((tuple), ((tuple)->ptr+(2+(idx1)))))
214 
215 #define	pcmcia_tuple_read_2(tuple, idx2)				\
216 	(pcmcia_tuple_read_1((tuple), (idx2)) | 			\
217 	 (pcmcia_tuple_read_1((tuple), (idx2)+1)<<8))
218 
219 #define	pcmcia_tuple_read_3(tuple, idx3)				\
220 	(pcmcia_tuple_read_1((tuple), (idx3)) |				\
221 	 (pcmcia_tuple_read_1((tuple), (idx3)+1)<<8) |			\
222 	 (pcmcia_tuple_read_1((tuple), (idx3)+2)<<16))
223 
224 #define	pcmcia_tuple_read_4(tuple, idx4)				\
225 	(pcmcia_tuple_read_1((tuple), (idx4)) |				\
226 	 (pcmcia_tuple_read_1((tuple), (idx4)+1)<<8) |			\
227 	 (pcmcia_tuple_read_1((tuple), (idx4)+2)<<16) |			\
228 	 (pcmcia_tuple_read_1((tuple), (idx4)+3)<<24))
229 
230 #define	pcmcia_tuple_read_n(tuple, n, idxn)				\
231 	(((n)==1)?pcmcia_tuple_read_1((tuple), (idxn)) :		\
232 	 (((n)==2)?pcmcia_tuple_read_2((tuple), (idxn)) :		\
233 	  (((n)==3)?pcmcia_tuple_read_3((tuple), (idxn)) :		\
234 	   /* n == 4 */ pcmcia_tuple_read_4((tuple), (idxn)))))
235 
236 #define	PCMCIA_SPACE_MEMORY	1
237 #define	PCMCIA_SPACE_IO		2
238 
239 int	pcmcia_ccr_read(struct pcmcia_function *, int);
240 void	pcmcia_ccr_write(struct pcmcia_function *, int, int);
241 
242 #define	pcmcia_mfc(sc)	(SIMPLEQ_FIRST(&(sc)->card.pf_head) &&		\
243     SIMPLEQ_NEXT(SIMPLEQ_FIRST(&(sc)->card.pf_head), pf_list))
244 
245 void	pcmcia_function_init(struct pcmcia_function *,
246 	    struct pcmcia_config_entry *);
247 int	pcmcia_function_enable(struct pcmcia_function *);
248 void	pcmcia_function_disable(struct pcmcia_function *);
249 
250 #define	pcmcia_io_alloc(pf, start, size, align, pciop)			\
251 	(pcmcia_chip_io_alloc((pf)->sc->pct, pf->sc->pch, (start),	\
252 	 (size), (align), (pciop)))
253 
254 int	pcmcia_io_map(struct pcmcia_function *, int, bus_addr_t,
255 	    bus_size_t, struct pcmcia_io_handle *, int *);
256 
257 #define	pcmcia_io_unmap(pf, window)					\
258 	(pcmcia_chip_io_unmap((pf)->sc->pct, (pf)->sc->pch, (window)))
259 
260 #define pcmcia_io_free(pf, pciop)					\
261 	(pcmcia_chip_io_free((pf)->sc->pct, (pf)->sc->pch, (pciop)))
262 
263 #define pcmcia_mem_alloc(pf, size, pcmhp)				\
264 	(pcmcia_chip_mem_alloc((pf)->sc->pct, (pf)->sc->pch, (size), (pcmhp)))
265 
266 #define pcmcia_mem_free(pf, pcmhp)					\
267 	(pcmcia_chip_mem_free((pf)->sc->pct, (pf)->sc->pch, (pcmhp)))
268 
269 #define pcmcia_mem_map(pf, kind, card_addr, size, pcmhp, offsetp, windowp) \
270 	(pcmcia_chip_mem_map((pf)->sc->pct, (pf)->sc->pch, (kind),	\
271 	 (card_addr), (size), (pcmhp), (offsetp), (windowp)))
272 
273 #define	pcmcia_mem_unmap(pf, window)					\
274 	(pcmcia_chip_mem_unmap((pf)->sc->pct, (pf)->sc->pch, (window)))
275 
276 void	*pcmcia_intr_establish(struct pcmcia_function *, int,
277 	    int (*) (void *), void *, char *);
278 void 	pcmcia_intr_disestablish(struct pcmcia_function *, void *);
279 const char *pcmcia_intr_string(struct pcmcia_function *, void *);
280