147934d0aSPaolo Bonzini /* 247934d0aSPaolo Bonzini * VT82C686B south bridge support 347934d0aSPaolo Bonzini * 447934d0aSPaolo Bonzini * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 547934d0aSPaolo Bonzini * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 647934d0aSPaolo Bonzini * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 747934d0aSPaolo Bonzini * This code is licensed under the GNU GPL v2. 847934d0aSPaolo Bonzini * 947934d0aSPaolo Bonzini * Contributions after 2012-01-13 are licensed under the terms of the 1047934d0aSPaolo Bonzini * GNU GPL, version 2 or (at your option) any later version. 11f9f0c9e2SBALATON Zoltan * 12f9f0c9e2SBALATON Zoltan * VT8231 south bridge support and general clean up to allow it 13f9f0c9e2SBALATON Zoltan * Copyright (c) 2018-2020 BALATON Zoltan 1447934d0aSPaolo Bonzini */ 1547934d0aSPaolo Bonzini 160430891cSPeter Maydell #include "qemu/osdep.h" 1747934d0aSPaolo Bonzini #include "hw/isa/vt82c686.h" 1847934d0aSPaolo Bonzini #include "hw/pci/pci.h" 19a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 209eb6abbfSBernhard Beschow #include "hw/ide/pci.h" 2147934d0aSPaolo Bonzini #include "hw/isa/isa.h" 2298cf824bSPhilippe Mathieu-Daudé #include "hw/isa/superio.h" 233dc31cb8SBALATON Zoltan #include "hw/intc/i8259.h" 243dc31cb8SBALATON Zoltan #include "hw/irq.h" 253dc31cb8SBALATON Zoltan #include "hw/dma/i8257.h" 26*1a99ddbeSBernhard Beschow #include "hw/usb/hcd-uhci.h" 273dc31cb8SBALATON Zoltan #include "hw/timer/i8254.h" 283dc31cb8SBALATON Zoltan #include "hw/rtc/mc146818rtc.h" 29d6454270SMarkus Armbruster #include "migration/vmstate.h" 3047934d0aSPaolo Bonzini #include "hw/isa/apm.h" 3147934d0aSPaolo Bonzini #include "hw/acpi/acpi.h" 3247934d0aSPaolo Bonzini #include "hw/i2c/pm_smbus.h" 339307d06dSMarkus Armbruster #include "qapi/error.h" 342c4c556eSBALATON Zoltan #include "qemu/log.h" 350b8fa32fSMarkus Armbruster #include "qemu/module.h" 36911629e6SBALATON Zoltan #include "qemu/range.h" 3747934d0aSPaolo Bonzini #include "qemu/timer.h" 38ff413a1fSBALATON Zoltan #include "trace.h" 3947934d0aSPaolo Bonzini 40e1a69736SBALATON Zoltan #define TYPE_VIA_PM "via-pm" 41e1a69736SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaPMState, VIA_PM) 4247934d0aSPaolo Bonzini 43e1a69736SBALATON Zoltan struct ViaPMState { 4447934d0aSPaolo Bonzini PCIDevice dev; 4547934d0aSPaolo Bonzini MemoryRegion io; 4647934d0aSPaolo Bonzini ACPIREGS ar; 4747934d0aSPaolo Bonzini APMState apm; 4847934d0aSPaolo Bonzini PMSMBus smb; 49db1015e9SEduardo Habkost }; 5047934d0aSPaolo Bonzini 51e1a69736SBALATON Zoltan static void pm_io_space_update(ViaPMState *s) 5247934d0aSPaolo Bonzini { 533ab1eea6SBALATON Zoltan uint32_t pmbase = pci_get_long(s->dev.config + 0x48) & 0xff80UL; 5447934d0aSPaolo Bonzini 5547934d0aSPaolo Bonzini memory_region_transaction_begin(); 563ab1eea6SBALATON Zoltan memory_region_set_address(&s->io, pmbase); 573ab1eea6SBALATON Zoltan memory_region_set_enabled(&s->io, s->dev.config[0x41] & BIT(7)); 5847934d0aSPaolo Bonzini memory_region_transaction_commit(); 5947934d0aSPaolo Bonzini } 6047934d0aSPaolo Bonzini 61e1a69736SBALATON Zoltan static void smb_io_space_update(ViaPMState *s) 62911629e6SBALATON Zoltan { 63911629e6SBALATON Zoltan uint32_t smbase = pci_get_long(s->dev.config + 0x90) & 0xfff0UL; 64911629e6SBALATON Zoltan 65911629e6SBALATON Zoltan memory_region_transaction_begin(); 66911629e6SBALATON Zoltan memory_region_set_address(&s->smb.io, smbase); 67911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & BIT(0)); 68911629e6SBALATON Zoltan memory_region_transaction_commit(); 69911629e6SBALATON Zoltan } 70911629e6SBALATON Zoltan 7147934d0aSPaolo Bonzini static int vmstate_acpi_post_load(void *opaque, int version_id) 7247934d0aSPaolo Bonzini { 73e1a69736SBALATON Zoltan ViaPMState *s = opaque; 7447934d0aSPaolo Bonzini 7547934d0aSPaolo Bonzini pm_io_space_update(s); 76911629e6SBALATON Zoltan smb_io_space_update(s); 7747934d0aSPaolo Bonzini return 0; 7847934d0aSPaolo Bonzini } 7947934d0aSPaolo Bonzini 8047934d0aSPaolo Bonzini static const VMStateDescription vmstate_acpi = { 8147934d0aSPaolo Bonzini .name = "vt82c686b_pm", 8247934d0aSPaolo Bonzini .version_id = 1, 8347934d0aSPaolo Bonzini .minimum_version_id = 1, 8447934d0aSPaolo Bonzini .post_load = vmstate_acpi_post_load, 8547934d0aSPaolo Bonzini .fields = (VMStateField[]) { 86e1a69736SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaPMState), 87e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.sts, ViaPMState), 88e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.en, ViaPMState), 89e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.cnt.cnt, ViaPMState), 90e1a69736SBALATON Zoltan VMSTATE_STRUCT(apm, ViaPMState, 0, vmstate_apm, APMState), 91e1a69736SBALATON Zoltan VMSTATE_TIMER_PTR(ar.tmr.timer, ViaPMState), 92e1a69736SBALATON Zoltan VMSTATE_INT64(ar.tmr.overflow_time, ViaPMState), 9347934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 9447934d0aSPaolo Bonzini } 9547934d0aSPaolo Bonzini }; 9647934d0aSPaolo Bonzini 9794349bffSBALATON Zoltan static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) 9894349bffSBALATON Zoltan { 99e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 100911629e6SBALATON Zoltan 10194349bffSBALATON Zoltan trace_via_pm_write(addr, val, len); 10294349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 1033ab1eea6SBALATON Zoltan if (ranges_overlap(addr, len, 0x48, 4)) { 1043ab1eea6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x48); 1053ab1eea6SBALATON Zoltan pci_set_long(s->dev.config + 0x48, (v & 0xff80UL) | 1); 1063ab1eea6SBALATON Zoltan } 1073ab1eea6SBALATON Zoltan if (range_covers_byte(addr, len, 0x41)) { 1083ab1eea6SBALATON Zoltan pm_io_space_update(s); 1093ab1eea6SBALATON Zoltan } 110911629e6SBALATON Zoltan if (ranges_overlap(addr, len, 0x90, 4)) { 111911629e6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x90); 112911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, (v & 0xfff0UL) | 1); 113911629e6SBALATON Zoltan } 114911629e6SBALATON Zoltan if (range_covers_byte(addr, len, 0xd2)) { 115911629e6SBALATON Zoltan s->dev.config[0xd2] &= 0xf; 116911629e6SBALATON Zoltan smb_io_space_update(s); 117911629e6SBALATON Zoltan } 11894349bffSBALATON Zoltan } 11994349bffSBALATON Zoltan 12035e360edSBALATON Zoltan static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size) 12135e360edSBALATON Zoltan { 12235e360edSBALATON Zoltan trace_via_pm_io_write(addr, data, size); 12335e360edSBALATON Zoltan } 12435e360edSBALATON Zoltan 12535e360edSBALATON Zoltan static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size) 12635e360edSBALATON Zoltan { 12735e360edSBALATON Zoltan trace_via_pm_io_read(addr, 0, size); 12835e360edSBALATON Zoltan return 0; 12935e360edSBALATON Zoltan } 13035e360edSBALATON Zoltan 13135e360edSBALATON Zoltan static const MemoryRegionOps pm_io_ops = { 13235e360edSBALATON Zoltan .read = pm_io_read, 13335e360edSBALATON Zoltan .write = pm_io_write, 13435e360edSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 13535e360edSBALATON Zoltan .impl = { 13635e360edSBALATON Zoltan .min_access_size = 1, 13735e360edSBALATON Zoltan .max_access_size = 1, 13835e360edSBALATON Zoltan }, 13935e360edSBALATON Zoltan }; 14035e360edSBALATON Zoltan 141e1a69736SBALATON Zoltan static void pm_update_sci(ViaPMState *s) 14294349bffSBALATON Zoltan { 14394349bffSBALATON Zoltan int sci_level, pmsts; 14494349bffSBALATON Zoltan 14594349bffSBALATON Zoltan pmsts = acpi_pm1_evt_get_sts(&s->ar); 14694349bffSBALATON Zoltan sci_level = (((pmsts & s->ar.pm1.evt.en) & 14794349bffSBALATON Zoltan (ACPI_BITMASK_RT_CLOCK_ENABLE | 14894349bffSBALATON Zoltan ACPI_BITMASK_POWER_BUTTON_ENABLE | 14994349bffSBALATON Zoltan ACPI_BITMASK_GLOBAL_LOCK_ENABLE | 15094349bffSBALATON Zoltan ACPI_BITMASK_TIMER_ENABLE)) != 0); 1510fae92a3SIsaku Yamahata if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) { 1520fae92a3SIsaku Yamahata /* 1530fae92a3SIsaku Yamahata * FIXME: 1540fae92a3SIsaku Yamahata * Fix device model that realizes this PM device and remove 1550fae92a3SIsaku Yamahata * this work around. 1560fae92a3SIsaku Yamahata * The device model should wire SCI and setup 1570fae92a3SIsaku Yamahata * PCI_INTERRUPT_PIN properly. 1580fae92a3SIsaku Yamahata * If PIN# = 0(interrupt pin isn't used), don't raise SCI as 1590fae92a3SIsaku Yamahata * work around. 1600fae92a3SIsaku Yamahata */ 16194349bffSBALATON Zoltan pci_set_irq(&s->dev, sci_level); 1620fae92a3SIsaku Yamahata } 16394349bffSBALATON Zoltan /* schedule a timer interruption if needed */ 16494349bffSBALATON Zoltan acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 16594349bffSBALATON Zoltan !(pmsts & ACPI_BITMASK_TIMER_STATUS)); 16694349bffSBALATON Zoltan } 16794349bffSBALATON Zoltan 16894349bffSBALATON Zoltan static void pm_tmr_timer(ACPIREGS *ar) 16994349bffSBALATON Zoltan { 170e1a69736SBALATON Zoltan ViaPMState *s = container_of(ar, ViaPMState, ar); 17194349bffSBALATON Zoltan pm_update_sci(s); 17294349bffSBALATON Zoltan } 17394349bffSBALATON Zoltan 174e1a69736SBALATON Zoltan static void via_pm_reset(DeviceState *d) 175911629e6SBALATON Zoltan { 176e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 177911629e6SBALATON Zoltan 1789af8e529SBALATON Zoltan memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, 1799af8e529SBALATON Zoltan PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); 1809af8e529SBALATON Zoltan /* Power Management IO base */ 1819af8e529SBALATON Zoltan pci_set_long(s->dev.config + 0x48, 1); 182911629e6SBALATON Zoltan /* SMBus IO base */ 183911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, 1); 184911629e6SBALATON Zoltan 18544421c60SIsaku Yamahata acpi_pm1_evt_reset(&s->ar); 18644421c60SIsaku Yamahata acpi_pm1_cnt_reset(&s->ar); 18744421c60SIsaku Yamahata acpi_pm_tmr_reset(&s->ar); 18844421c60SIsaku Yamahata pm_update_sci(s); 18944421c60SIsaku Yamahata 1903ab1eea6SBALATON Zoltan pm_io_space_update(s); 191911629e6SBALATON Zoltan smb_io_space_update(s); 192911629e6SBALATON Zoltan } 193911629e6SBALATON Zoltan 194e1a69736SBALATON Zoltan static void via_pm_realize(PCIDevice *dev, Error **errp) 19547934d0aSPaolo Bonzini { 196e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(dev); 19747934d0aSPaolo Bonzini 1983ab1eea6SBALATON Zoltan pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | 19947934d0aSPaolo Bonzini PCI_STATUS_DEVSEL_MEDIUM); 20047934d0aSPaolo Bonzini 201a30c34d2SPhilippe Mathieu-Daudé pm_smbus_init(DEVICE(s), &s->smb, false); 202911629e6SBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); 203911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, false); 20447934d0aSPaolo Bonzini 20547934d0aSPaolo Bonzini apm_init(dev, &s->apm, NULL, s); 20647934d0aSPaolo Bonzini 207e1a69736SBALATON Zoltan memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, "via-pm", 128); 20835e360edSBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); 20947934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, false); 21047934d0aSPaolo Bonzini 21147934d0aSPaolo Bonzini acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 21247934d0aSPaolo Bonzini acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 2136be8cf56SIsaku Yamahata acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2, false); 21447934d0aSPaolo Bonzini } 21547934d0aSPaolo Bonzini 216e1a69736SBALATON Zoltan typedef struct via_pm_init_info { 217e1a69736SBALATON Zoltan uint16_t device_id; 218e1a69736SBALATON Zoltan } ViaPMInitInfo; 219e1a69736SBALATON Zoltan 22047934d0aSPaolo Bonzini static void via_pm_class_init(ObjectClass *klass, void *data) 22147934d0aSPaolo Bonzini { 22247934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 22347934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 224e1a69736SBALATON Zoltan ViaPMInitInfo *info = data; 22547934d0aSPaolo Bonzini 226e1a69736SBALATON Zoltan k->realize = via_pm_realize; 22747934d0aSPaolo Bonzini k->config_write = pm_write_config; 22847934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 229e1a69736SBALATON Zoltan k->device_id = info->device_id; 23047934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_OTHER; 23147934d0aSPaolo Bonzini k->revision = 0x40; 232e1a69736SBALATON Zoltan dc->reset = via_pm_reset; 233084bf4b4SBALATON Zoltan /* Reason: part of VIA south bridge, does not exist stand alone */ 234084bf4b4SBALATON Zoltan dc->user_creatable = false; 23547934d0aSPaolo Bonzini dc->vmsd = &vmstate_acpi; 23647934d0aSPaolo Bonzini } 23747934d0aSPaolo Bonzini 23847934d0aSPaolo Bonzini static const TypeInfo via_pm_info = { 239e1a69736SBALATON Zoltan .name = TYPE_VIA_PM, 24047934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 241e1a69736SBALATON Zoltan .instance_size = sizeof(ViaPMState), 242e1a69736SBALATON Zoltan .abstract = true, 243fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 244fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 245fd3b02c8SEduardo Habkost { }, 246fd3b02c8SEduardo Habkost }, 24747934d0aSPaolo Bonzini }; 24847934d0aSPaolo Bonzini 249e1a69736SBALATON Zoltan static const ViaPMInitInfo vt82c686b_pm_init_info = { 250e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_82C686B_PM, 251e1a69736SBALATON Zoltan }; 252e1a69736SBALATON Zoltan 253e1a69736SBALATON Zoltan static const TypeInfo vt82c686b_pm_info = { 254e1a69736SBALATON Zoltan .name = TYPE_VT82C686B_PM, 255e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 256e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 257e1a69736SBALATON Zoltan .class_data = (void *)&vt82c686b_pm_init_info, 258e1a69736SBALATON Zoltan }; 259e1a69736SBALATON Zoltan 260e1a69736SBALATON Zoltan static const ViaPMInitInfo vt8231_pm_init_info = { 261e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_8231_PM, 262e1a69736SBALATON Zoltan }; 263e1a69736SBALATON Zoltan 264e1a69736SBALATON Zoltan static const TypeInfo vt8231_pm_info = { 265e1a69736SBALATON Zoltan .name = TYPE_VT8231_PM, 266e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 267e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 268e1a69736SBALATON Zoltan .class_data = (void *)&vt8231_pm_init_info, 269e1a69736SBALATON Zoltan }; 270e1a69736SBALATON Zoltan 27194349bffSBALATON Zoltan 272f028c2deSBALATON Zoltan #define TYPE_VIA_SUPERIO "via-superio" 273f028c2deSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaSuperIOState, VIA_SUPERIO) 27494349bffSBALATON Zoltan 275f028c2deSBALATON Zoltan struct ViaSuperIOState { 276f028c2deSBALATON Zoltan ISASuperIODevice superio; 277f028c2deSBALATON Zoltan uint8_t regs[0x100]; 278f028c2deSBALATON Zoltan const MemoryRegionOps *io_ops; 279f028c2deSBALATON Zoltan MemoryRegion io; 280f028c2deSBALATON Zoltan }; 281f028c2deSBALATON Zoltan 282f028c2deSBALATON Zoltan static inline void via_superio_io_enable(ViaSuperIOState *s, bool enable) 28394349bffSBALATON Zoltan { 284f028c2deSBALATON Zoltan memory_region_set_enabled(&s->io, enable); 285f028c2deSBALATON Zoltan } 286f028c2deSBALATON Zoltan 287f028c2deSBALATON Zoltan static void via_superio_realize(DeviceState *d, Error **errp) 288f028c2deSBALATON Zoltan { 289f028c2deSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(d); 290f028c2deSBALATON Zoltan ISASuperIOClass *ic = ISA_SUPERIO_GET_CLASS(s); 291f028c2deSBALATON Zoltan Error *local_err = NULL; 292f028c2deSBALATON Zoltan 293f028c2deSBALATON Zoltan assert(s->io_ops); 294f028c2deSBALATON Zoltan ic->parent_realize(d, &local_err); 295f028c2deSBALATON Zoltan if (local_err) { 296f028c2deSBALATON Zoltan error_propagate(errp, local_err); 297f028c2deSBALATON Zoltan return; 298f028c2deSBALATON Zoltan } 299f028c2deSBALATON Zoltan memory_region_init_io(&s->io, OBJECT(d), s->io_ops, s, "via-superio", 2); 300f028c2deSBALATON Zoltan memory_region_set_enabled(&s->io, false); 301f028c2deSBALATON Zoltan /* The floppy also uses 0x3f0 and 0x3f1 but this seems to work anyway */ 302f028c2deSBALATON Zoltan memory_region_add_subregion(isa_address_space_io(ISA_DEVICE(s)), 0x3f0, 303f028c2deSBALATON Zoltan &s->io); 304f028c2deSBALATON Zoltan } 305f028c2deSBALATON Zoltan 306f028c2deSBALATON Zoltan static uint64_t via_superio_cfg_read(void *opaque, hwaddr addr, unsigned size) 307f028c2deSBALATON Zoltan { 308f028c2deSBALATON Zoltan ViaSuperIOState *sc = opaque; 309f028c2deSBALATON Zoltan uint8_t idx = sc->regs[0]; 310f028c2deSBALATON Zoltan uint8_t val = sc->regs[idx]; 311f028c2deSBALATON Zoltan 312f028c2deSBALATON Zoltan if (addr == 0) { 313f028c2deSBALATON Zoltan return idx; 314f028c2deSBALATON Zoltan } 315f028c2deSBALATON Zoltan if (addr == 1 && idx == 0) { 316f028c2deSBALATON Zoltan val = 0; /* reading reg 0 where we store index value */ 317f028c2deSBALATON Zoltan } 318f028c2deSBALATON Zoltan trace_via_superio_read(idx, val); 319f028c2deSBALATON Zoltan return val; 320f028c2deSBALATON Zoltan } 321f028c2deSBALATON Zoltan 322f028c2deSBALATON Zoltan static void via_superio_class_init(ObjectClass *klass, void *data) 323f028c2deSBALATON Zoltan { 324f028c2deSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 325f028c2deSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 326f028c2deSBALATON Zoltan 327f028c2deSBALATON Zoltan sc->parent_realize = dc->realize; 328f028c2deSBALATON Zoltan dc->realize = via_superio_realize; 329f028c2deSBALATON Zoltan } 330f028c2deSBALATON Zoltan 331f028c2deSBALATON Zoltan static const TypeInfo via_superio_info = { 332f028c2deSBALATON Zoltan .name = TYPE_VIA_SUPERIO, 333f028c2deSBALATON Zoltan .parent = TYPE_ISA_SUPERIO, 334f028c2deSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 335f028c2deSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 336f028c2deSBALATON Zoltan .class_init = via_superio_class_init, 337f028c2deSBALATON Zoltan .abstract = true, 338f028c2deSBALATON Zoltan }; 339f028c2deSBALATON Zoltan 340f028c2deSBALATON Zoltan #define TYPE_VT82C686B_SUPERIO "vt82c686b-superio" 341f028c2deSBALATON Zoltan 342f028c2deSBALATON Zoltan static void vt82c686b_superio_cfg_write(void *opaque, hwaddr addr, 343f028c2deSBALATON Zoltan uint64_t data, unsigned size) 344f028c2deSBALATON Zoltan { 345f028c2deSBALATON Zoltan ViaSuperIOState *sc = opaque; 346c953bf71SBALATON Zoltan uint8_t idx = sc->regs[0]; 34794349bffSBALATON Zoltan 348cc2b4550SBALATON Zoltan if (addr == 0) { /* config index register */ 349cc2b4550SBALATON Zoltan sc->regs[0] = data; 3502b98dca9SBALATON Zoltan return; 3512b98dca9SBALATON Zoltan } 352cc2b4550SBALATON Zoltan 353cc2b4550SBALATON Zoltan /* config data register */ 354cc2b4550SBALATON Zoltan trace_via_superio_write(idx, data); 355c953bf71SBALATON Zoltan switch (idx) { 35694349bffSBALATON Zoltan case 0x00 ... 0xdf: 35794349bffSBALATON Zoltan case 0xe4: 35894349bffSBALATON Zoltan case 0xe5: 35994349bffSBALATON Zoltan case 0xe9 ... 0xed: 36094349bffSBALATON Zoltan case 0xf3: 36194349bffSBALATON Zoltan case 0xf5: 36294349bffSBALATON Zoltan case 0xf7: 36394349bffSBALATON Zoltan case 0xf9 ... 0xfb: 36494349bffSBALATON Zoltan case 0xfd ... 0xff: 365b7741b77SBALATON Zoltan /* ignore write to read only registers */ 366b7741b77SBALATON Zoltan return; 36794349bffSBALATON Zoltan /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ 36894349bffSBALATON Zoltan default: 3692c4c556eSBALATON Zoltan qemu_log_mask(LOG_UNIMP, 3702c4c556eSBALATON Zoltan "via_superio_cfg: unimplemented register 0x%x\n", idx); 37194349bffSBALATON Zoltan break; 37294349bffSBALATON Zoltan } 373cc2b4550SBALATON Zoltan sc->regs[idx] = data; 37494349bffSBALATON Zoltan } 37594349bffSBALATON Zoltan 376f028c2deSBALATON Zoltan static const MemoryRegionOps vt82c686b_superio_cfg_ops = { 377f028c2deSBALATON Zoltan .read = via_superio_cfg_read, 378f028c2deSBALATON Zoltan .write = vt82c686b_superio_cfg_write, 37994349bffSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 38094349bffSBALATON Zoltan .impl = { 38194349bffSBALATON Zoltan .min_access_size = 1, 38294349bffSBALATON Zoltan .max_access_size = 1, 38394349bffSBALATON Zoltan }, 38494349bffSBALATON Zoltan }; 38594349bffSBALATON Zoltan 386f028c2deSBALATON Zoltan static void vt82c686b_superio_reset(DeviceState *dev) 387f028c2deSBALATON Zoltan { 388f028c2deSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(dev); 38994349bffSBALATON Zoltan 390f028c2deSBALATON Zoltan memset(s->regs, 0, sizeof(s->regs)); 391f028c2deSBALATON Zoltan /* Device ID */ 392f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe0, 1); 393f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0x3c, 1); 394f028c2deSBALATON Zoltan /* Function select - all disabled */ 395f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe2, 1); 396f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0x03, 1); 397f028c2deSBALATON Zoltan /* Floppy ctrl base addr 0x3f0-7 */ 398f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe3, 1); 399f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xfc, 1); 400f028c2deSBALATON Zoltan /* Parallel port base addr 0x378-f */ 401f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe6, 1); 402f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xde, 1); 403f028c2deSBALATON Zoltan /* Serial port 1 base addr 0x3f8-f */ 404f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe7, 1); 405f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xfe, 1); 406f028c2deSBALATON Zoltan /* Serial port 2 base addr 0x2f8-f */ 407f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe8, 1); 408f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xbe, 1); 40994349bffSBALATON Zoltan 410f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0, 1); 411f028c2deSBALATON Zoltan } 412f028c2deSBALATON Zoltan 413f028c2deSBALATON Zoltan static void vt82c686b_superio_init(Object *obj) 414f028c2deSBALATON Zoltan { 415f028c2deSBALATON Zoltan VIA_SUPERIO(obj)->io_ops = &vt82c686b_superio_cfg_ops; 416f028c2deSBALATON Zoltan } 417f028c2deSBALATON Zoltan 418f028c2deSBALATON Zoltan static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) 419f028c2deSBALATON Zoltan { 420f028c2deSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 421f028c2deSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 422f028c2deSBALATON Zoltan 423f028c2deSBALATON Zoltan dc->reset = vt82c686b_superio_reset; 424f028c2deSBALATON Zoltan sc->serial.count = 2; 425f028c2deSBALATON Zoltan sc->parallel.count = 1; 426f028c2deSBALATON Zoltan sc->ide.count = 0; /* emulated by via-ide */ 427f028c2deSBALATON Zoltan sc->floppy.count = 1; 428f028c2deSBALATON Zoltan } 429f028c2deSBALATON Zoltan 430f028c2deSBALATON Zoltan static const TypeInfo vt82c686b_superio_info = { 431f028c2deSBALATON Zoltan .name = TYPE_VT82C686B_SUPERIO, 432f028c2deSBALATON Zoltan .parent = TYPE_VIA_SUPERIO, 433f028c2deSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 434f028c2deSBALATON Zoltan .instance_init = vt82c686b_superio_init, 435f028c2deSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 436f028c2deSBALATON Zoltan .class_init = vt82c686b_superio_class_init, 437f028c2deSBALATON Zoltan }; 438f028c2deSBALATON Zoltan 43994349bffSBALATON Zoltan 440ab74864fSBALATON Zoltan #define TYPE_VT8231_SUPERIO "vt8231-superio" 441ab74864fSBALATON Zoltan 442ab74864fSBALATON Zoltan static void vt8231_superio_cfg_write(void *opaque, hwaddr addr, 443ab74864fSBALATON Zoltan uint64_t data, unsigned size) 444ab74864fSBALATON Zoltan { 445ab74864fSBALATON Zoltan ViaSuperIOState *sc = opaque; 446ab74864fSBALATON Zoltan uint8_t idx = sc->regs[0]; 447ab74864fSBALATON Zoltan 448ab74864fSBALATON Zoltan if (addr == 0) { /* config index register */ 449ab74864fSBALATON Zoltan sc->regs[0] = data; 450ab74864fSBALATON Zoltan return; 451ab74864fSBALATON Zoltan } 452ab74864fSBALATON Zoltan 453ab74864fSBALATON Zoltan /* config data register */ 454ab74864fSBALATON Zoltan trace_via_superio_write(idx, data); 455ab74864fSBALATON Zoltan switch (idx) { 456ab74864fSBALATON Zoltan case 0x00 ... 0xdf: 457ab74864fSBALATON Zoltan case 0xe7 ... 0xef: 458ab74864fSBALATON Zoltan case 0xf0 ... 0xf1: 459ab74864fSBALATON Zoltan case 0xf5: 460ab74864fSBALATON Zoltan case 0xf8: 461ab74864fSBALATON Zoltan case 0xfd: 462ab74864fSBALATON Zoltan /* ignore write to read only registers */ 463ab74864fSBALATON Zoltan return; 464ab74864fSBALATON Zoltan default: 465ab74864fSBALATON Zoltan qemu_log_mask(LOG_UNIMP, 466ab74864fSBALATON Zoltan "via_superio_cfg: unimplemented register 0x%x\n", idx); 467ab74864fSBALATON Zoltan break; 468ab74864fSBALATON Zoltan } 469ab74864fSBALATON Zoltan sc->regs[idx] = data; 470ab74864fSBALATON Zoltan } 471ab74864fSBALATON Zoltan 472ab74864fSBALATON Zoltan static const MemoryRegionOps vt8231_superio_cfg_ops = { 473ab74864fSBALATON Zoltan .read = via_superio_cfg_read, 474ab74864fSBALATON Zoltan .write = vt8231_superio_cfg_write, 475ab74864fSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 476ab74864fSBALATON Zoltan .impl = { 477ab74864fSBALATON Zoltan .min_access_size = 1, 478ab74864fSBALATON Zoltan .max_access_size = 1, 479ab74864fSBALATON Zoltan }, 480ab74864fSBALATON Zoltan }; 481ab74864fSBALATON Zoltan 482ab74864fSBALATON Zoltan static void vt8231_superio_reset(DeviceState *dev) 483ab74864fSBALATON Zoltan { 484ab74864fSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(dev); 485ab74864fSBALATON Zoltan 486ab74864fSBALATON Zoltan memset(s->regs, 0, sizeof(s->regs)); 487ab74864fSBALATON Zoltan /* Device ID */ 488ab74864fSBALATON Zoltan s->regs[0xf0] = 0x3c; 489ab74864fSBALATON Zoltan /* Device revision */ 490ab74864fSBALATON Zoltan s->regs[0xf1] = 0x01; 491ab74864fSBALATON Zoltan /* Function select - all disabled */ 492ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf2, 1); 493ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0x03, 1); 494ab74864fSBALATON Zoltan /* Serial port base addr */ 495ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf4, 1); 496ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xfe, 1); 497ab74864fSBALATON Zoltan /* Parallel port base addr */ 498ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf6, 1); 499ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xde, 1); 500ab74864fSBALATON Zoltan /* Floppy ctrl base addr */ 501ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf7, 1); 502ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xfc, 1); 503ab74864fSBALATON Zoltan 504ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0, 1); 505ab74864fSBALATON Zoltan } 506ab74864fSBALATON Zoltan 507ab74864fSBALATON Zoltan static void vt8231_superio_init(Object *obj) 508ab74864fSBALATON Zoltan { 509ab74864fSBALATON Zoltan VIA_SUPERIO(obj)->io_ops = &vt8231_superio_cfg_ops; 510ab74864fSBALATON Zoltan } 511ab74864fSBALATON Zoltan 512ab74864fSBALATON Zoltan static uint16_t vt8231_superio_serial_iobase(ISASuperIODevice *sio, 513ab74864fSBALATON Zoltan uint8_t index) 514ab74864fSBALATON Zoltan { 515ab74864fSBALATON Zoltan return 0x2f8; /* FIXME: This should be settable via registers f2-f4 */ 516ab74864fSBALATON Zoltan } 517ab74864fSBALATON Zoltan 518ab74864fSBALATON Zoltan static void vt8231_superio_class_init(ObjectClass *klass, void *data) 519ab74864fSBALATON Zoltan { 520ab74864fSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 521ab74864fSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 522ab74864fSBALATON Zoltan 523ab74864fSBALATON Zoltan dc->reset = vt8231_superio_reset; 524ab74864fSBALATON Zoltan sc->serial.count = 1; 525ab74864fSBALATON Zoltan sc->serial.get_iobase = vt8231_superio_serial_iobase; 526ab74864fSBALATON Zoltan sc->parallel.count = 1; 527ab74864fSBALATON Zoltan sc->ide.count = 0; /* emulated by via-ide */ 528ab74864fSBALATON Zoltan sc->floppy.count = 1; 529ab74864fSBALATON Zoltan } 530ab74864fSBALATON Zoltan 531ab74864fSBALATON Zoltan static const TypeInfo vt8231_superio_info = { 532ab74864fSBALATON Zoltan .name = TYPE_VT8231_SUPERIO, 533ab74864fSBALATON Zoltan .parent = TYPE_VIA_SUPERIO, 534ab74864fSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 535ab74864fSBALATON Zoltan .instance_init = vt8231_superio_init, 536ab74864fSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 537ab74864fSBALATON Zoltan .class_init = vt8231_superio_class_init, 538ab74864fSBALATON Zoltan }; 539ab74864fSBALATON Zoltan 540ab74864fSBALATON Zoltan 5412e84e107SBALATON Zoltan #define TYPE_VIA_ISA "via-isa" 5422e84e107SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaISAState, VIA_ISA) 54394349bffSBALATON Zoltan 5442e84e107SBALATON Zoltan struct ViaISAState { 54594349bffSBALATON Zoltan PCIDevice dev; 5463dc31cb8SBALATON Zoltan qemu_irq cpu_intr; 547a4d65b70SBALATON Zoltan qemu_irq *isa_irqs; 5488e4022a8SBernhard Beschow ViaSuperIOState via_sio; 5499eb6abbfSBernhard Beschow PCIIDEState ide; 550*1a99ddbeSBernhard Beschow UHCIState uhci[2]; 55194349bffSBALATON Zoltan }; 55294349bffSBALATON Zoltan 5532e84e107SBALATON Zoltan static const VMStateDescription vmstate_via = { 5542e84e107SBALATON Zoltan .name = "via-isa", 5552e84e107SBALATON Zoltan .version_id = 1, 5562e84e107SBALATON Zoltan .minimum_version_id = 1, 5572e84e107SBALATON Zoltan .fields = (VMStateField[]) { 5582e84e107SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaISAState), 5592e84e107SBALATON Zoltan VMSTATE_END_OF_LIST() 5602e84e107SBALATON Zoltan } 5612e84e107SBALATON Zoltan }; 5622e84e107SBALATON Zoltan 5639eb6abbfSBernhard Beschow static void via_isa_init(Object *obj) 5649eb6abbfSBernhard Beschow { 5659eb6abbfSBernhard Beschow ViaISAState *s = VIA_ISA(obj); 5669eb6abbfSBernhard Beschow 5679eb6abbfSBernhard Beschow object_initialize_child(obj, "ide", &s->ide, TYPE_VIA_IDE); 568*1a99ddbeSBernhard Beschow object_initialize_child(obj, "uhci1", &s->uhci[0], TYPE_VT82C686B_USB_UHCI); 569*1a99ddbeSBernhard Beschow object_initialize_child(obj, "uhci2", &s->uhci[1], TYPE_VT82C686B_USB_UHCI); 5709eb6abbfSBernhard Beschow } 5719eb6abbfSBernhard Beschow 5722e84e107SBALATON Zoltan static const TypeInfo via_isa_info = { 5732e84e107SBALATON Zoltan .name = TYPE_VIA_ISA, 5742e84e107SBALATON Zoltan .parent = TYPE_PCI_DEVICE, 5752e84e107SBALATON Zoltan .instance_size = sizeof(ViaISAState), 5769eb6abbfSBernhard Beschow .instance_init = via_isa_init, 5772e84e107SBALATON Zoltan .abstract = true, 5782e84e107SBALATON Zoltan .interfaces = (InterfaceInfo[]) { 5792e84e107SBALATON Zoltan { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 5802e84e107SBALATON Zoltan { }, 5812e84e107SBALATON Zoltan }, 58294349bffSBALATON Zoltan }; 58394349bffSBALATON Zoltan 584a4d65b70SBALATON Zoltan void via_isa_set_irq(PCIDevice *d, int n, int level) 585a4d65b70SBALATON Zoltan { 586a4d65b70SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 587a4d65b70SBALATON Zoltan qemu_set_irq(s->isa_irqs[n], level); 588a4d65b70SBALATON Zoltan } 589a4d65b70SBALATON Zoltan 5903dc31cb8SBALATON Zoltan static void via_isa_request_i8259_irq(void *opaque, int irq, int level) 5913dc31cb8SBALATON Zoltan { 5922e84e107SBALATON Zoltan ViaISAState *s = opaque; 5933dc31cb8SBALATON Zoltan qemu_set_irq(s->cpu_intr, level); 5943dc31cb8SBALATON Zoltan } 5953dc31cb8SBALATON Zoltan 5963a2f166fSBALATON Zoltan static void via_isa_realize(PCIDevice *d, Error **errp) 5973a2f166fSBALATON Zoltan { 5983a2f166fSBALATON Zoltan ViaISAState *s = VIA_ISA(d); 5993a2f166fSBALATON Zoltan DeviceState *dev = DEVICE(d); 6009eb6abbfSBernhard Beschow PCIBus *pci_bus = pci_get_bus(d); 6013a2f166fSBALATON Zoltan qemu_irq *isa_irq; 60291ba92d1SBernhard Beschow ISABus *isa_bus; 6033a2f166fSBALATON Zoltan int i; 6043a2f166fSBALATON Zoltan 6053a2f166fSBALATON Zoltan qdev_init_gpio_out(dev, &s->cpu_intr, 1); 6063a2f166fSBALATON Zoltan isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); 607dd28cc87SBernhard Beschow isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d), 608c1561d1dSBernhard Beschow errp); 609c1561d1dSBernhard Beschow 610c1561d1dSBernhard Beschow if (!isa_bus) { 611c1561d1dSBernhard Beschow return; 612c1561d1dSBernhard Beschow } 613c1561d1dSBernhard Beschow 61491ba92d1SBernhard Beschow s->isa_irqs = i8259_init(isa_bus, *isa_irq); 61591ba92d1SBernhard Beschow isa_bus_irqs(isa_bus, s->isa_irqs); 61691ba92d1SBernhard Beschow i8254_pit_init(isa_bus, 0x40, 0, NULL); 61791ba92d1SBernhard Beschow i8257_dma_init(isa_bus, 0); 61891ba92d1SBernhard Beschow mc146818_rtc_init(isa_bus, 2000, NULL); 6193a2f166fSBALATON Zoltan 6203a2f166fSBALATON Zoltan for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) { 6213a2f166fSBALATON Zoltan if (i < PCI_COMMAND || i >= PCI_REVISION_ID) { 6223a2f166fSBALATON Zoltan d->wmask[i] = 0; 6233a2f166fSBALATON Zoltan } 6243a2f166fSBALATON Zoltan } 6258e4022a8SBernhard Beschow 6268e4022a8SBernhard Beschow /* Super I/O */ 62791ba92d1SBernhard Beschow if (!qdev_realize(DEVICE(&s->via_sio), BUS(isa_bus), errp)) { 6288e4022a8SBernhard Beschow return; 6298e4022a8SBernhard Beschow } 6309eb6abbfSBernhard Beschow 6319eb6abbfSBernhard Beschow /* Function 1: IDE */ 6329eb6abbfSBernhard Beschow qdev_prop_set_int32(DEVICE(&s->ide), "addr", d->devfn + 1); 6339eb6abbfSBernhard Beschow if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) { 6349eb6abbfSBernhard Beschow return; 6359eb6abbfSBernhard Beschow } 636*1a99ddbeSBernhard Beschow 637*1a99ddbeSBernhard Beschow /* Functions 2-3: USB Ports */ 638*1a99ddbeSBernhard Beschow for (i = 0; i < ARRAY_SIZE(s->uhci); i++) { 639*1a99ddbeSBernhard Beschow qdev_prop_set_int32(DEVICE(&s->uhci[i]), "addr", d->devfn + 2 + i); 640*1a99ddbeSBernhard Beschow if (!qdev_realize(DEVICE(&s->uhci[i]), BUS(pci_bus), errp)) { 641*1a99ddbeSBernhard Beschow return; 642*1a99ddbeSBernhard Beschow } 643*1a99ddbeSBernhard Beschow } 6443a2f166fSBALATON Zoltan } 6453a2f166fSBALATON Zoltan 6462e84e107SBALATON Zoltan /* TYPE_VT82C686B_ISA */ 6472e84e107SBALATON Zoltan 64894349bffSBALATON Zoltan static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, 64994349bffSBALATON Zoltan uint32_t val, int len) 65094349bffSBALATON Zoltan { 6512e84e107SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 65294349bffSBALATON Zoltan 65394349bffSBALATON Zoltan trace_via_isa_write(addr, val, len); 65494349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 65594349bffSBALATON Zoltan if (addr == 0x85) { 65694349bffSBALATON Zoltan /* BIT(1): enable or disable superio config io ports */ 6578e4022a8SBernhard Beschow via_superio_io_enable(&s->via_sio, val & BIT(1)); 65894349bffSBALATON Zoltan } 65994349bffSBALATON Zoltan } 66094349bffSBALATON Zoltan 66194349bffSBALATON Zoltan static void vt82c686b_isa_reset(DeviceState *dev) 66294349bffSBALATON Zoltan { 6632e84e107SBALATON Zoltan ViaISAState *s = VIA_ISA(dev); 66494349bffSBALATON Zoltan uint8_t *pci_conf = s->dev.config; 66594349bffSBALATON Zoltan 66694349bffSBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 66794349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 66894349bffSBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 66994349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 67094349bffSBALATON Zoltan 67194349bffSBALATON Zoltan pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ 67294349bffSBALATON Zoltan pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ 67394349bffSBALATON Zoltan pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ 67494349bffSBALATON Zoltan pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ 67594349bffSBALATON Zoltan pci_conf[0x59] = 0x04; 67694349bffSBALATON Zoltan pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ 67794349bffSBALATON Zoltan pci_conf[0x5f] = 0x04; 67894349bffSBALATON Zoltan pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ 67994349bffSBALATON Zoltan } 68094349bffSBALATON Zoltan 6818e4022a8SBernhard Beschow static void vt82c686b_init(Object *obj) 68247934d0aSPaolo Bonzini { 6838e4022a8SBernhard Beschow ViaISAState *s = VIA_ISA(obj); 68447934d0aSPaolo Bonzini 6858e4022a8SBernhard Beschow object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT82C686B_SUPERIO); 68647934d0aSPaolo Bonzini } 68747934d0aSPaolo Bonzini 6882e84e107SBALATON Zoltan static void vt82c686b_class_init(ObjectClass *klass, void *data) 68947934d0aSPaolo Bonzini { 69047934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 69147934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 69247934d0aSPaolo Bonzini 6938e4022a8SBernhard Beschow k->realize = via_isa_realize; 69447934d0aSPaolo Bonzini k->config_write = vt82c686b_write_config; 69547934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 6962e84e107SBALATON Zoltan k->device_id = PCI_DEVICE_ID_VIA_82C686B_ISA; 69747934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_ISA; 69847934d0aSPaolo Bonzini k->revision = 0x40; 6999dc1a769SPhilippe Mathieu-Daudé dc->reset = vt82c686b_isa_reset; 70047934d0aSPaolo Bonzini dc->desc = "ISA bridge"; 70147934d0aSPaolo Bonzini dc->vmsd = &vmstate_via; 7022e84e107SBALATON Zoltan /* Reason: part of VIA VT82C686 southbridge, needs to be wired up */ 703e90f2a8cSEduardo Habkost dc->user_creatable = false; 70447934d0aSPaolo Bonzini } 70547934d0aSPaolo Bonzini 7062e84e107SBALATON Zoltan static const TypeInfo vt82c686b_isa_info = { 7070f798461SBALATON Zoltan .name = TYPE_VT82C686B_ISA, 7082e84e107SBALATON Zoltan .parent = TYPE_VIA_ISA, 7092e84e107SBALATON Zoltan .instance_size = sizeof(ViaISAState), 7108e4022a8SBernhard Beschow .instance_init = vt82c686b_init, 7112e84e107SBALATON Zoltan .class_init = vt82c686b_class_init, 71247934d0aSPaolo Bonzini }; 71347934d0aSPaolo Bonzini 714f9f0c9e2SBALATON Zoltan /* TYPE_VT8231_ISA */ 71594349bffSBALATON Zoltan 716f9f0c9e2SBALATON Zoltan static void vt8231_write_config(PCIDevice *d, uint32_t addr, 717f9f0c9e2SBALATON Zoltan uint32_t val, int len) 71898cf824bSPhilippe Mathieu-Daudé { 719f9f0c9e2SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 72098cf824bSPhilippe Mathieu-Daudé 721f9f0c9e2SBALATON Zoltan trace_via_isa_write(addr, val, len); 722f9f0c9e2SBALATON Zoltan pci_default_write_config(d, addr, val, len); 723f9f0c9e2SBALATON Zoltan if (addr == 0x50) { 724f9f0c9e2SBALATON Zoltan /* BIT(2): enable or disable superio config io ports */ 7258e4022a8SBernhard Beschow via_superio_io_enable(&s->via_sio, val & BIT(2)); 726f9f0c9e2SBALATON Zoltan } 72798cf824bSPhilippe Mathieu-Daudé } 72898cf824bSPhilippe Mathieu-Daudé 729f9f0c9e2SBALATON Zoltan static void vt8231_isa_reset(DeviceState *dev) 730f9f0c9e2SBALATON Zoltan { 731f9f0c9e2SBALATON Zoltan ViaISAState *s = VIA_ISA(dev); 732f9f0c9e2SBALATON Zoltan uint8_t *pci_conf = s->dev.config; 733f9f0c9e2SBALATON Zoltan 734f9f0c9e2SBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 735f9f0c9e2SBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 736f9f0c9e2SBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 737f9f0c9e2SBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 738f9f0c9e2SBALATON Zoltan 739f9f0c9e2SBALATON Zoltan pci_conf[0x58] = 0x40; /* Miscellaneous Control 0 */ 740f9f0c9e2SBALATON Zoltan pci_conf[0x67] = 0x08; /* Fast IR Config */ 741f9f0c9e2SBALATON Zoltan pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */ 742f9f0c9e2SBALATON Zoltan } 743f9f0c9e2SBALATON Zoltan 7448e4022a8SBernhard Beschow static void vt8231_init(Object *obj) 745f9f0c9e2SBALATON Zoltan { 7468e4022a8SBernhard Beschow ViaISAState *s = VIA_ISA(obj); 747f9f0c9e2SBALATON Zoltan 7488e4022a8SBernhard Beschow object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT8231_SUPERIO); 749f9f0c9e2SBALATON Zoltan } 750f9f0c9e2SBALATON Zoltan 751f9f0c9e2SBALATON Zoltan static void vt8231_class_init(ObjectClass *klass, void *data) 752f9f0c9e2SBALATON Zoltan { 753f9f0c9e2SBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 754f9f0c9e2SBALATON Zoltan PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 755f9f0c9e2SBALATON Zoltan 7568e4022a8SBernhard Beschow k->realize = via_isa_realize; 757f9f0c9e2SBALATON Zoltan k->config_write = vt8231_write_config; 758f9f0c9e2SBALATON Zoltan k->vendor_id = PCI_VENDOR_ID_VIA; 759f9f0c9e2SBALATON Zoltan k->device_id = PCI_DEVICE_ID_VIA_8231_ISA; 760f9f0c9e2SBALATON Zoltan k->class_id = PCI_CLASS_BRIDGE_ISA; 761f9f0c9e2SBALATON Zoltan k->revision = 0x10; 762f9f0c9e2SBALATON Zoltan dc->reset = vt8231_isa_reset; 763f9f0c9e2SBALATON Zoltan dc->desc = "ISA bridge"; 764f9f0c9e2SBALATON Zoltan dc->vmsd = &vmstate_via; 765f9f0c9e2SBALATON Zoltan /* Reason: part of VIA VT8231 southbridge, needs to be wired up */ 766f9f0c9e2SBALATON Zoltan dc->user_creatable = false; 767f9f0c9e2SBALATON Zoltan } 768f9f0c9e2SBALATON Zoltan 769f9f0c9e2SBALATON Zoltan static const TypeInfo vt8231_isa_info = { 770f9f0c9e2SBALATON Zoltan .name = TYPE_VT8231_ISA, 771f9f0c9e2SBALATON Zoltan .parent = TYPE_VIA_ISA, 772f9f0c9e2SBALATON Zoltan .instance_size = sizeof(ViaISAState), 7738e4022a8SBernhard Beschow .instance_init = vt8231_init, 774f9f0c9e2SBALATON Zoltan .class_init = vt8231_class_init, 77598cf824bSPhilippe Mathieu-Daudé }; 77698cf824bSPhilippe Mathieu-Daudé 77794349bffSBALATON Zoltan 77847934d0aSPaolo Bonzini static void vt82c686b_register_types(void) 77947934d0aSPaolo Bonzini { 78047934d0aSPaolo Bonzini type_register_static(&via_pm_info); 781e1a69736SBALATON Zoltan type_register_static(&vt82c686b_pm_info); 782e1a69736SBALATON Zoltan type_register_static(&vt8231_pm_info); 78394349bffSBALATON Zoltan type_register_static(&via_superio_info); 784f028c2deSBALATON Zoltan type_register_static(&vt82c686b_superio_info); 785ab74864fSBALATON Zoltan type_register_static(&vt8231_superio_info); 7862e84e107SBALATON Zoltan type_register_static(&via_isa_info); 7872e84e107SBALATON Zoltan type_register_static(&vt82c686b_isa_info); 788f9f0c9e2SBALATON Zoltan type_register_static(&vt8231_isa_info); 78947934d0aSPaolo Bonzini } 79047934d0aSPaolo Bonzini 79147934d0aSPaolo Bonzini type_init(vt82c686b_register_types) 792