147934d0aSPaolo Bonzini /* 247934d0aSPaolo Bonzini * VT82C686B south bridge support 347934d0aSPaolo Bonzini * 447934d0aSPaolo Bonzini * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 547934d0aSPaolo Bonzini * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 647934d0aSPaolo Bonzini * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 747934d0aSPaolo Bonzini * This code is licensed under the GNU GPL v2. 847934d0aSPaolo Bonzini * 947934d0aSPaolo Bonzini * Contributions after 2012-01-13 are licensed under the terms of the 1047934d0aSPaolo Bonzini * GNU GPL, version 2 or (at your option) any later version. 1147934d0aSPaolo Bonzini */ 1247934d0aSPaolo Bonzini 130430891cSPeter Maydell #include "qemu/osdep.h" 1447934d0aSPaolo Bonzini #include "hw/isa/vt82c686.h" 1547934d0aSPaolo Bonzini #include "hw/pci/pci.h" 16a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 1747934d0aSPaolo Bonzini #include "hw/isa/isa.h" 1898cf824bSPhilippe Mathieu-Daudé #include "hw/isa/superio.h" 19d6454270SMarkus Armbruster #include "migration/vmstate.h" 2047934d0aSPaolo Bonzini #include "hw/isa/apm.h" 2147934d0aSPaolo Bonzini #include "hw/acpi/acpi.h" 2247934d0aSPaolo Bonzini #include "hw/i2c/pm_smbus.h" 239307d06dSMarkus Armbruster #include "qapi/error.h" 240b8fa32fSMarkus Armbruster #include "qemu/module.h" 25911629e6SBALATON Zoltan #include "qemu/range.h" 2647934d0aSPaolo Bonzini #include "qemu/timer.h" 2747934d0aSPaolo Bonzini #include "exec/address-spaces.h" 28ff413a1fSBALATON Zoltan #include "trace.h" 2947934d0aSPaolo Bonzini 3094349bffSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(VT686PMState, VT82C686B_PM) 3147934d0aSPaolo Bonzini 32db1015e9SEduardo Habkost struct VT686PMState { 3347934d0aSPaolo Bonzini PCIDevice dev; 3447934d0aSPaolo Bonzini MemoryRegion io; 3547934d0aSPaolo Bonzini ACPIREGS ar; 3647934d0aSPaolo Bonzini APMState apm; 3747934d0aSPaolo Bonzini PMSMBus smb; 38db1015e9SEduardo Habkost }; 3947934d0aSPaolo Bonzini 4047934d0aSPaolo Bonzini static void pm_io_space_update(VT686PMState *s) 4147934d0aSPaolo Bonzini { 42*3ab1eea6SBALATON Zoltan uint32_t pmbase = pci_get_long(s->dev.config + 0x48) & 0xff80UL; 4347934d0aSPaolo Bonzini 4447934d0aSPaolo Bonzini memory_region_transaction_begin(); 45*3ab1eea6SBALATON Zoltan memory_region_set_address(&s->io, pmbase); 46*3ab1eea6SBALATON Zoltan memory_region_set_enabled(&s->io, s->dev.config[0x41] & BIT(7)); 4747934d0aSPaolo Bonzini memory_region_transaction_commit(); 4847934d0aSPaolo Bonzini } 4947934d0aSPaolo Bonzini 50911629e6SBALATON Zoltan static void smb_io_space_update(VT686PMState *s) 51911629e6SBALATON Zoltan { 52911629e6SBALATON Zoltan uint32_t smbase = pci_get_long(s->dev.config + 0x90) & 0xfff0UL; 53911629e6SBALATON Zoltan 54911629e6SBALATON Zoltan memory_region_transaction_begin(); 55911629e6SBALATON Zoltan memory_region_set_address(&s->smb.io, smbase); 56911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & BIT(0)); 57911629e6SBALATON Zoltan memory_region_transaction_commit(); 58911629e6SBALATON Zoltan } 59911629e6SBALATON Zoltan 6047934d0aSPaolo Bonzini static int vmstate_acpi_post_load(void *opaque, int version_id) 6147934d0aSPaolo Bonzini { 6247934d0aSPaolo Bonzini VT686PMState *s = opaque; 6347934d0aSPaolo Bonzini 6447934d0aSPaolo Bonzini pm_io_space_update(s); 65911629e6SBALATON Zoltan smb_io_space_update(s); 6647934d0aSPaolo Bonzini return 0; 6747934d0aSPaolo Bonzini } 6847934d0aSPaolo Bonzini 6947934d0aSPaolo Bonzini static const VMStateDescription vmstate_acpi = { 7047934d0aSPaolo Bonzini .name = "vt82c686b_pm", 7147934d0aSPaolo Bonzini .version_id = 1, 7247934d0aSPaolo Bonzini .minimum_version_id = 1, 7347934d0aSPaolo Bonzini .post_load = vmstate_acpi_post_load, 7447934d0aSPaolo Bonzini .fields = (VMStateField[]) { 7547934d0aSPaolo Bonzini VMSTATE_PCI_DEVICE(dev, VT686PMState), 7647934d0aSPaolo Bonzini VMSTATE_UINT16(ar.pm1.evt.sts, VT686PMState), 7747934d0aSPaolo Bonzini VMSTATE_UINT16(ar.pm1.evt.en, VT686PMState), 7847934d0aSPaolo Bonzini VMSTATE_UINT16(ar.pm1.cnt.cnt, VT686PMState), 7947934d0aSPaolo Bonzini VMSTATE_STRUCT(apm, VT686PMState, 0, vmstate_apm, APMState), 80e720677eSPaolo Bonzini VMSTATE_TIMER_PTR(ar.tmr.timer, VT686PMState), 8147934d0aSPaolo Bonzini VMSTATE_INT64(ar.tmr.overflow_time, VT686PMState), 8247934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 8347934d0aSPaolo Bonzini } 8447934d0aSPaolo Bonzini }; 8547934d0aSPaolo Bonzini 8694349bffSBALATON Zoltan static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) 8794349bffSBALATON Zoltan { 88911629e6SBALATON Zoltan VT686PMState *s = VT82C686B_PM(d); 89911629e6SBALATON Zoltan 9094349bffSBALATON Zoltan trace_via_pm_write(addr, val, len); 9194349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 92*3ab1eea6SBALATON Zoltan if (ranges_overlap(addr, len, 0x48, 4)) { 93*3ab1eea6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x48); 94*3ab1eea6SBALATON Zoltan pci_set_long(s->dev.config + 0x48, (v & 0xff80UL) | 1); 95*3ab1eea6SBALATON Zoltan } 96*3ab1eea6SBALATON Zoltan if (range_covers_byte(addr, len, 0x41)) { 97*3ab1eea6SBALATON Zoltan pm_io_space_update(s); 98*3ab1eea6SBALATON Zoltan } 99911629e6SBALATON Zoltan if (ranges_overlap(addr, len, 0x90, 4)) { 100911629e6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x90); 101911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, (v & 0xfff0UL) | 1); 102911629e6SBALATON Zoltan } 103911629e6SBALATON Zoltan if (range_covers_byte(addr, len, 0xd2)) { 104911629e6SBALATON Zoltan s->dev.config[0xd2] &= 0xf; 105911629e6SBALATON Zoltan smb_io_space_update(s); 106911629e6SBALATON Zoltan } 10794349bffSBALATON Zoltan } 10894349bffSBALATON Zoltan 10935e360edSBALATON Zoltan static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size) 11035e360edSBALATON Zoltan { 11135e360edSBALATON Zoltan trace_via_pm_io_write(addr, data, size); 11235e360edSBALATON Zoltan } 11335e360edSBALATON Zoltan 11435e360edSBALATON Zoltan static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size) 11535e360edSBALATON Zoltan { 11635e360edSBALATON Zoltan trace_via_pm_io_read(addr, 0, size); 11735e360edSBALATON Zoltan return 0; 11835e360edSBALATON Zoltan } 11935e360edSBALATON Zoltan 12035e360edSBALATON Zoltan static const MemoryRegionOps pm_io_ops = { 12135e360edSBALATON Zoltan .read = pm_io_read, 12235e360edSBALATON Zoltan .write = pm_io_write, 12335e360edSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 12435e360edSBALATON Zoltan .impl = { 12535e360edSBALATON Zoltan .min_access_size = 1, 12635e360edSBALATON Zoltan .max_access_size = 1, 12735e360edSBALATON Zoltan }, 12835e360edSBALATON Zoltan }; 12935e360edSBALATON Zoltan 13094349bffSBALATON Zoltan static void pm_update_sci(VT686PMState *s) 13194349bffSBALATON Zoltan { 13294349bffSBALATON Zoltan int sci_level, pmsts; 13394349bffSBALATON Zoltan 13494349bffSBALATON Zoltan pmsts = acpi_pm1_evt_get_sts(&s->ar); 13594349bffSBALATON Zoltan sci_level = (((pmsts & s->ar.pm1.evt.en) & 13694349bffSBALATON Zoltan (ACPI_BITMASK_RT_CLOCK_ENABLE | 13794349bffSBALATON Zoltan ACPI_BITMASK_POWER_BUTTON_ENABLE | 13894349bffSBALATON Zoltan ACPI_BITMASK_GLOBAL_LOCK_ENABLE | 13994349bffSBALATON Zoltan ACPI_BITMASK_TIMER_ENABLE)) != 0); 14094349bffSBALATON Zoltan pci_set_irq(&s->dev, sci_level); 14194349bffSBALATON Zoltan /* schedule a timer interruption if needed */ 14294349bffSBALATON Zoltan acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 14394349bffSBALATON Zoltan !(pmsts & ACPI_BITMASK_TIMER_STATUS)); 14494349bffSBALATON Zoltan } 14594349bffSBALATON Zoltan 14694349bffSBALATON Zoltan static void pm_tmr_timer(ACPIREGS *ar) 14794349bffSBALATON Zoltan { 14894349bffSBALATON Zoltan VT686PMState *s = container_of(ar, VT686PMState, ar); 14994349bffSBALATON Zoltan pm_update_sci(s); 15094349bffSBALATON Zoltan } 15194349bffSBALATON Zoltan 152911629e6SBALATON Zoltan static void vt82c686b_pm_reset(DeviceState *d) 153911629e6SBALATON Zoltan { 154911629e6SBALATON Zoltan VT686PMState *s = VT82C686B_PM(d); 155911629e6SBALATON Zoltan 1569af8e529SBALATON Zoltan memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, 1579af8e529SBALATON Zoltan PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); 1589af8e529SBALATON Zoltan /* Power Management IO base */ 1599af8e529SBALATON Zoltan pci_set_long(s->dev.config + 0x48, 1); 160911629e6SBALATON Zoltan /* SMBus IO base */ 161911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, 1); 162911629e6SBALATON Zoltan 163*3ab1eea6SBALATON Zoltan pm_io_space_update(s); 164911629e6SBALATON Zoltan smb_io_space_update(s); 165911629e6SBALATON Zoltan } 166911629e6SBALATON Zoltan 1679af21dbeSMarkus Armbruster static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp) 16847934d0aSPaolo Bonzini { 169e6340505SBALATON Zoltan VT686PMState *s = VT82C686B_PM(dev); 17047934d0aSPaolo Bonzini 171*3ab1eea6SBALATON Zoltan pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | 17247934d0aSPaolo Bonzini PCI_STATUS_DEVSEL_MEDIUM); 17347934d0aSPaolo Bonzini 174a30c34d2SPhilippe Mathieu-Daudé pm_smbus_init(DEVICE(s), &s->smb, false); 175911629e6SBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); 176911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, false); 17747934d0aSPaolo Bonzini 17847934d0aSPaolo Bonzini apm_init(dev, &s->apm, NULL, s); 17947934d0aSPaolo Bonzini 18035e360edSBALATON Zoltan memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, 18140a0bba1SBALATON Zoltan "vt82c686-pm", 128); 18235e360edSBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); 18347934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, false); 18447934d0aSPaolo Bonzini 18547934d0aSPaolo Bonzini acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 18647934d0aSPaolo Bonzini acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 1879a10bbb4SLaszlo Ersek acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2); 18847934d0aSPaolo Bonzini } 18947934d0aSPaolo Bonzini 19047934d0aSPaolo Bonzini static void via_pm_class_init(ObjectClass *klass, void *data) 19147934d0aSPaolo Bonzini { 19247934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 19347934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 19447934d0aSPaolo Bonzini 1959af21dbeSMarkus Armbruster k->realize = vt82c686b_pm_realize; 19647934d0aSPaolo Bonzini k->config_write = pm_write_config; 19747934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 19847934d0aSPaolo Bonzini k->device_id = PCI_DEVICE_ID_VIA_ACPI; 19947934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_OTHER; 20047934d0aSPaolo Bonzini k->revision = 0x40; 201911629e6SBALATON Zoltan dc->reset = vt82c686b_pm_reset; 20247934d0aSPaolo Bonzini dc->desc = "PM"; 20347934d0aSPaolo Bonzini dc->vmsd = &vmstate_acpi; 204125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 20547934d0aSPaolo Bonzini } 20647934d0aSPaolo Bonzini 20747934d0aSPaolo Bonzini static const TypeInfo via_pm_info = { 208e6340505SBALATON Zoltan .name = TYPE_VT82C686B_PM, 20947934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 21047934d0aSPaolo Bonzini .instance_size = sizeof(VT686PMState), 21147934d0aSPaolo Bonzini .class_init = via_pm_class_init, 212fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 213fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 214fd3b02c8SEduardo Habkost { }, 215fd3b02c8SEduardo Habkost }, 21647934d0aSPaolo Bonzini }; 21747934d0aSPaolo Bonzini 21894349bffSBALATON Zoltan 21994349bffSBALATON Zoltan typedef struct SuperIOConfig { 22094349bffSBALATON Zoltan uint8_t regs[0x100]; 22194349bffSBALATON Zoltan uint8_t index; 22294349bffSBALATON Zoltan MemoryRegion io; 22394349bffSBALATON Zoltan } SuperIOConfig; 22494349bffSBALATON Zoltan 22594349bffSBALATON Zoltan static void superio_cfg_write(void *opaque, hwaddr addr, uint64_t data, 22694349bffSBALATON Zoltan unsigned size) 22794349bffSBALATON Zoltan { 22894349bffSBALATON Zoltan SuperIOConfig *sc = opaque; 22994349bffSBALATON Zoltan 23094349bffSBALATON Zoltan if (addr == 0x3f0) { /* config index register */ 23194349bffSBALATON Zoltan sc->index = data & 0xff; 23294349bffSBALATON Zoltan } else { 23394349bffSBALATON Zoltan bool can_write = true; 23494349bffSBALATON Zoltan /* 0x3f1, config data register */ 23594349bffSBALATON Zoltan trace_via_superio_write(sc->index, data & 0xff); 23694349bffSBALATON Zoltan switch (sc->index) { 23794349bffSBALATON Zoltan case 0x00 ... 0xdf: 23894349bffSBALATON Zoltan case 0xe4: 23994349bffSBALATON Zoltan case 0xe5: 24094349bffSBALATON Zoltan case 0xe9 ... 0xed: 24194349bffSBALATON Zoltan case 0xf3: 24294349bffSBALATON Zoltan case 0xf5: 24394349bffSBALATON Zoltan case 0xf7: 24494349bffSBALATON Zoltan case 0xf9 ... 0xfb: 24594349bffSBALATON Zoltan case 0xfd ... 0xff: 24694349bffSBALATON Zoltan can_write = false; 24794349bffSBALATON Zoltan break; 24894349bffSBALATON Zoltan /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ 24994349bffSBALATON Zoltan default: 25094349bffSBALATON Zoltan break; 25194349bffSBALATON Zoltan 25294349bffSBALATON Zoltan } 25394349bffSBALATON Zoltan if (can_write) { 25494349bffSBALATON Zoltan sc->regs[sc->index] = data & 0xff; 25594349bffSBALATON Zoltan } 25694349bffSBALATON Zoltan } 25794349bffSBALATON Zoltan } 25894349bffSBALATON Zoltan 25994349bffSBALATON Zoltan static uint64_t superio_cfg_read(void *opaque, hwaddr addr, unsigned size) 26094349bffSBALATON Zoltan { 26194349bffSBALATON Zoltan SuperIOConfig *sc = opaque; 26294349bffSBALATON Zoltan uint8_t val = sc->regs[sc->index]; 26394349bffSBALATON Zoltan 26494349bffSBALATON Zoltan trace_via_superio_read(sc->index, val); 26594349bffSBALATON Zoltan return val; 26694349bffSBALATON Zoltan } 26794349bffSBALATON Zoltan 26894349bffSBALATON Zoltan static const MemoryRegionOps superio_cfg_ops = { 26994349bffSBALATON Zoltan .read = superio_cfg_read, 27094349bffSBALATON Zoltan .write = superio_cfg_write, 27194349bffSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 27294349bffSBALATON Zoltan .impl = { 27394349bffSBALATON Zoltan .min_access_size = 1, 27494349bffSBALATON Zoltan .max_access_size = 1, 27594349bffSBALATON Zoltan }, 27694349bffSBALATON Zoltan }; 27794349bffSBALATON Zoltan 27894349bffSBALATON Zoltan 27994349bffSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA) 28094349bffSBALATON Zoltan 28194349bffSBALATON Zoltan struct VT82C686BISAState { 28294349bffSBALATON Zoltan PCIDevice dev; 28394349bffSBALATON Zoltan SuperIOConfig superio_cfg; 28494349bffSBALATON Zoltan }; 28594349bffSBALATON Zoltan 28694349bffSBALATON Zoltan static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, 28794349bffSBALATON Zoltan uint32_t val, int len) 28894349bffSBALATON Zoltan { 28994349bffSBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(d); 29094349bffSBALATON Zoltan 29194349bffSBALATON Zoltan trace_via_isa_write(addr, val, len); 29294349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 29394349bffSBALATON Zoltan if (addr == 0x85) { 29494349bffSBALATON Zoltan /* BIT(1): enable or disable superio config io ports */ 29594349bffSBALATON Zoltan memory_region_set_enabled(&s->superio_cfg.io, val & BIT(1)); 29694349bffSBALATON Zoltan } 29794349bffSBALATON Zoltan } 29894349bffSBALATON Zoltan 29947934d0aSPaolo Bonzini static const VMStateDescription vmstate_via = { 30047934d0aSPaolo Bonzini .name = "vt82c686b", 30147934d0aSPaolo Bonzini .version_id = 1, 30247934d0aSPaolo Bonzini .minimum_version_id = 1, 30347934d0aSPaolo Bonzini .fields = (VMStateField[]) { 3040f798461SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, VT82C686BISAState), 30547934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 30647934d0aSPaolo Bonzini } 30747934d0aSPaolo Bonzini }; 30847934d0aSPaolo Bonzini 30994349bffSBALATON Zoltan static void vt82c686b_isa_reset(DeviceState *dev) 31094349bffSBALATON Zoltan { 31194349bffSBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(dev); 31294349bffSBALATON Zoltan uint8_t *pci_conf = s->dev.config; 31394349bffSBALATON Zoltan 31494349bffSBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 31594349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 31694349bffSBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 31794349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 31894349bffSBALATON Zoltan 31994349bffSBALATON Zoltan pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ 32094349bffSBALATON Zoltan pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ 32194349bffSBALATON Zoltan pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ 32294349bffSBALATON Zoltan pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ 32394349bffSBALATON Zoltan pci_conf[0x59] = 0x04; 32494349bffSBALATON Zoltan pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ 32594349bffSBALATON Zoltan pci_conf[0x5f] = 0x04; 32694349bffSBALATON Zoltan pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ 32794349bffSBALATON Zoltan 32894349bffSBALATON Zoltan s->superio_cfg.regs[0xe0] = 0x3c; /* Device ID */ 32994349bffSBALATON Zoltan s->superio_cfg.regs[0xe2] = 0x03; /* Function select */ 33094349bffSBALATON Zoltan s->superio_cfg.regs[0xe3] = 0xfc; /* Floppy ctrl base addr */ 33194349bffSBALATON Zoltan s->superio_cfg.regs[0xe6] = 0xde; /* Parallel port base addr */ 33294349bffSBALATON Zoltan s->superio_cfg.regs[0xe7] = 0xfe; /* Serial port 1 base addr */ 33394349bffSBALATON Zoltan s->superio_cfg.regs[0xe8] = 0xbe; /* Serial port 2 base addr */ 33494349bffSBALATON Zoltan } 33594349bffSBALATON Zoltan 3369af21dbeSMarkus Armbruster static void vt82c686b_realize(PCIDevice *d, Error **errp) 33747934d0aSPaolo Bonzini { 338007b3103SBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(d); 33947934d0aSPaolo Bonzini uint8_t *pci_conf; 340bcc37e24SJan Kiszka ISABus *isa_bus; 34147934d0aSPaolo Bonzini uint8_t *wmask; 34247934d0aSPaolo Bonzini int i; 34347934d0aSPaolo Bonzini 344bb2ed009SHervé Poussineau isa_bus = isa_bus_new(DEVICE(d), get_system_memory(), 345d10e5432SMarkus Armbruster pci_address_space_io(d), errp); 346d10e5432SMarkus Armbruster if (!isa_bus) { 347d10e5432SMarkus Armbruster return; 348d10e5432SMarkus Armbruster } 34947934d0aSPaolo Bonzini 35047934d0aSPaolo Bonzini pci_conf = d->config; 35147934d0aSPaolo Bonzini pci_config_set_prog_interface(pci_conf, 0x0); 35247934d0aSPaolo Bonzini 35347934d0aSPaolo Bonzini wmask = d->wmask; 35447934d0aSPaolo Bonzini for (i = 0x00; i < 0xff; i++) { 35547934d0aSPaolo Bonzini if (i <= 0x03 || (i >= 0x08 && i <= 0x3f)) { 35647934d0aSPaolo Bonzini wmask[i] = 0x00; 35747934d0aSPaolo Bonzini } 35847934d0aSPaolo Bonzini } 35947934d0aSPaolo Bonzini 3606be6e4bcSBALATON Zoltan memory_region_init_io(&s->superio_cfg.io, OBJECT(d), &superio_cfg_ops, 3616be6e4bcSBALATON Zoltan &s->superio_cfg, "superio_cfg", 2); 3626be6e4bcSBALATON Zoltan memory_region_set_enabled(&s->superio_cfg.io, false); 363f3db354cSFilip Bozuta /* 364f3db354cSFilip Bozuta * The floppy also uses 0x3f0 and 0x3f1. 365f3db354cSFilip Bozuta * But we do not emulate a floppy, so just set it here. 366f3db354cSFilip Bozuta */ 367bcc37e24SJan Kiszka memory_region_add_subregion(isa_bus->address_space_io, 0x3f0, 3686be6e4bcSBALATON Zoltan &s->superio_cfg.io); 36947934d0aSPaolo Bonzini } 37047934d0aSPaolo Bonzini 37147934d0aSPaolo Bonzini static void via_class_init(ObjectClass *klass, void *data) 37247934d0aSPaolo Bonzini { 37347934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 37447934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 37547934d0aSPaolo Bonzini 3769af21dbeSMarkus Armbruster k->realize = vt82c686b_realize; 37747934d0aSPaolo Bonzini k->config_write = vt82c686b_write_config; 37847934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 37947934d0aSPaolo Bonzini k->device_id = PCI_DEVICE_ID_VIA_ISA_BRIDGE; 38047934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_ISA; 38147934d0aSPaolo Bonzini k->revision = 0x40; 3829dc1a769SPhilippe Mathieu-Daudé dc->reset = vt82c686b_isa_reset; 38347934d0aSPaolo Bonzini dc->desc = "ISA bridge"; 38447934d0aSPaolo Bonzini dc->vmsd = &vmstate_via; 38504916ee9SMarkus Armbruster /* 38604916ee9SMarkus Armbruster * Reason: part of VIA VT82C686 southbridge, needs to be wired up, 387c3a09ff6SPhilippe Mathieu-Daudé * e.g. by mips_fuloong2e_init() 38804916ee9SMarkus Armbruster */ 389e90f2a8cSEduardo Habkost dc->user_creatable = false; 39047934d0aSPaolo Bonzini } 39147934d0aSPaolo Bonzini 39247934d0aSPaolo Bonzini static const TypeInfo via_info = { 3930f798461SBALATON Zoltan .name = TYPE_VT82C686B_ISA, 39447934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 3950f798461SBALATON Zoltan .instance_size = sizeof(VT82C686BISAState), 39647934d0aSPaolo Bonzini .class_init = via_class_init, 397fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 398fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 399fd3b02c8SEduardo Habkost { }, 400fd3b02c8SEduardo Habkost }, 40147934d0aSPaolo Bonzini }; 40247934d0aSPaolo Bonzini 40394349bffSBALATON Zoltan 40498cf824bSPhilippe Mathieu-Daudé static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) 40598cf824bSPhilippe Mathieu-Daudé { 40698cf824bSPhilippe Mathieu-Daudé ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 40798cf824bSPhilippe Mathieu-Daudé 40898cf824bSPhilippe Mathieu-Daudé sc->serial.count = 2; 40998cf824bSPhilippe Mathieu-Daudé sc->parallel.count = 1; 41098cf824bSPhilippe Mathieu-Daudé sc->ide.count = 0; 41198cf824bSPhilippe Mathieu-Daudé sc->floppy.count = 1; 41298cf824bSPhilippe Mathieu-Daudé } 41398cf824bSPhilippe Mathieu-Daudé 41498cf824bSPhilippe Mathieu-Daudé static const TypeInfo via_superio_info = { 41598cf824bSPhilippe Mathieu-Daudé .name = TYPE_VT82C686B_SUPERIO, 41698cf824bSPhilippe Mathieu-Daudé .parent = TYPE_ISA_SUPERIO, 41798cf824bSPhilippe Mathieu-Daudé .instance_size = sizeof(ISASuperIODevice), 41898cf824bSPhilippe Mathieu-Daudé .class_size = sizeof(ISASuperIOClass), 41998cf824bSPhilippe Mathieu-Daudé .class_init = vt82c686b_superio_class_init, 42098cf824bSPhilippe Mathieu-Daudé }; 42198cf824bSPhilippe Mathieu-Daudé 42294349bffSBALATON Zoltan 42347934d0aSPaolo Bonzini static void vt82c686b_register_types(void) 42447934d0aSPaolo Bonzini { 42547934d0aSPaolo Bonzini type_register_static(&via_pm_info); 42647934d0aSPaolo Bonzini type_register_static(&via_info); 42794349bffSBALATON Zoltan type_register_static(&via_superio_info); 42847934d0aSPaolo Bonzini } 42947934d0aSPaolo Bonzini 43047934d0aSPaolo Bonzini type_init(vt82c686b_register_types) 431