147934d0aSPaolo Bonzini /* 247934d0aSPaolo Bonzini * VT82C686B south bridge support 347934d0aSPaolo Bonzini * 447934d0aSPaolo Bonzini * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 547934d0aSPaolo Bonzini * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 647934d0aSPaolo Bonzini * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 747934d0aSPaolo Bonzini * This code is licensed under the GNU GPL v2. 847934d0aSPaolo Bonzini * 947934d0aSPaolo Bonzini * Contributions after 2012-01-13 are licensed under the terms of the 1047934d0aSPaolo Bonzini * GNU GPL, version 2 or (at your option) any later version. 1147934d0aSPaolo Bonzini */ 1247934d0aSPaolo Bonzini 130430891cSPeter Maydell #include "qemu/osdep.h" 1447934d0aSPaolo Bonzini #include "hw/isa/vt82c686.h" 1547934d0aSPaolo Bonzini #include "hw/pci/pci.h" 16a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 1747934d0aSPaolo Bonzini #include "hw/isa/isa.h" 1898cf824bSPhilippe Mathieu-Daudé #include "hw/isa/superio.h" 19d6454270SMarkus Armbruster #include "migration/vmstate.h" 2047934d0aSPaolo Bonzini #include "hw/isa/apm.h" 2147934d0aSPaolo Bonzini #include "hw/acpi/acpi.h" 2247934d0aSPaolo Bonzini #include "hw/i2c/pm_smbus.h" 239307d06dSMarkus Armbruster #include "qapi/error.h" 240b8fa32fSMarkus Armbruster #include "qemu/module.h" 25*911629e6SBALATON Zoltan #include "qemu/range.h" 2647934d0aSPaolo Bonzini #include "qemu/timer.h" 2747934d0aSPaolo Bonzini #include "exec/address-spaces.h" 28ff413a1fSBALATON Zoltan #include "trace.h" 2947934d0aSPaolo Bonzini 3094349bffSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(VT686PMState, VT82C686B_PM) 3147934d0aSPaolo Bonzini 32db1015e9SEduardo Habkost struct VT686PMState { 3347934d0aSPaolo Bonzini PCIDevice dev; 3447934d0aSPaolo Bonzini MemoryRegion io; 3547934d0aSPaolo Bonzini ACPIREGS ar; 3647934d0aSPaolo Bonzini APMState apm; 3747934d0aSPaolo Bonzini PMSMBus smb; 38db1015e9SEduardo Habkost }; 3947934d0aSPaolo Bonzini 4047934d0aSPaolo Bonzini static void pm_io_space_update(VT686PMState *s) 4147934d0aSPaolo Bonzini { 4247934d0aSPaolo Bonzini uint32_t pm_io_base; 4347934d0aSPaolo Bonzini 4447934d0aSPaolo Bonzini pm_io_base = pci_get_long(s->dev.config + 0x40); 4547934d0aSPaolo Bonzini pm_io_base &= 0xffc0; 4647934d0aSPaolo Bonzini 4747934d0aSPaolo Bonzini memory_region_transaction_begin(); 4847934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, s->dev.config[0x80] & 1); 4947934d0aSPaolo Bonzini memory_region_set_address(&s->io, pm_io_base); 5047934d0aSPaolo Bonzini memory_region_transaction_commit(); 5147934d0aSPaolo Bonzini } 5247934d0aSPaolo Bonzini 53*911629e6SBALATON Zoltan static void smb_io_space_update(VT686PMState *s) 54*911629e6SBALATON Zoltan { 55*911629e6SBALATON Zoltan uint32_t smbase = pci_get_long(s->dev.config + 0x90) & 0xfff0UL; 56*911629e6SBALATON Zoltan 57*911629e6SBALATON Zoltan memory_region_transaction_begin(); 58*911629e6SBALATON Zoltan memory_region_set_address(&s->smb.io, smbase); 59*911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & BIT(0)); 60*911629e6SBALATON Zoltan memory_region_transaction_commit(); 61*911629e6SBALATON Zoltan } 62*911629e6SBALATON Zoltan 6347934d0aSPaolo Bonzini static int vmstate_acpi_post_load(void *opaque, int version_id) 6447934d0aSPaolo Bonzini { 6547934d0aSPaolo Bonzini VT686PMState *s = opaque; 6647934d0aSPaolo Bonzini 6747934d0aSPaolo Bonzini pm_io_space_update(s); 68*911629e6SBALATON Zoltan smb_io_space_update(s); 6947934d0aSPaolo Bonzini return 0; 7047934d0aSPaolo Bonzini } 7147934d0aSPaolo Bonzini 7247934d0aSPaolo Bonzini static const VMStateDescription vmstate_acpi = { 7347934d0aSPaolo Bonzini .name = "vt82c686b_pm", 7447934d0aSPaolo Bonzini .version_id = 1, 7547934d0aSPaolo Bonzini .minimum_version_id = 1, 7647934d0aSPaolo Bonzini .post_load = vmstate_acpi_post_load, 7747934d0aSPaolo Bonzini .fields = (VMStateField[]) { 7847934d0aSPaolo Bonzini VMSTATE_PCI_DEVICE(dev, VT686PMState), 7947934d0aSPaolo Bonzini VMSTATE_UINT16(ar.pm1.evt.sts, VT686PMState), 8047934d0aSPaolo Bonzini VMSTATE_UINT16(ar.pm1.evt.en, VT686PMState), 8147934d0aSPaolo Bonzini VMSTATE_UINT16(ar.pm1.cnt.cnt, VT686PMState), 8247934d0aSPaolo Bonzini VMSTATE_STRUCT(apm, VT686PMState, 0, vmstate_apm, APMState), 83e720677eSPaolo Bonzini VMSTATE_TIMER_PTR(ar.tmr.timer, VT686PMState), 8447934d0aSPaolo Bonzini VMSTATE_INT64(ar.tmr.overflow_time, VT686PMState), 8547934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 8647934d0aSPaolo Bonzini } 8747934d0aSPaolo Bonzini }; 8847934d0aSPaolo Bonzini 8994349bffSBALATON Zoltan static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) 9094349bffSBALATON Zoltan { 91*911629e6SBALATON Zoltan VT686PMState *s = VT82C686B_PM(d); 92*911629e6SBALATON Zoltan 9394349bffSBALATON Zoltan trace_via_pm_write(addr, val, len); 9494349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 95*911629e6SBALATON Zoltan if (ranges_overlap(addr, len, 0x90, 4)) { 96*911629e6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x90); 97*911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, (v & 0xfff0UL) | 1); 98*911629e6SBALATON Zoltan } 99*911629e6SBALATON Zoltan if (range_covers_byte(addr, len, 0xd2)) { 100*911629e6SBALATON Zoltan s->dev.config[0xd2] &= 0xf; 101*911629e6SBALATON Zoltan smb_io_space_update(s); 102*911629e6SBALATON Zoltan } 10394349bffSBALATON Zoltan } 10494349bffSBALATON Zoltan 10594349bffSBALATON Zoltan static void pm_update_sci(VT686PMState *s) 10694349bffSBALATON Zoltan { 10794349bffSBALATON Zoltan int sci_level, pmsts; 10894349bffSBALATON Zoltan 10994349bffSBALATON Zoltan pmsts = acpi_pm1_evt_get_sts(&s->ar); 11094349bffSBALATON Zoltan sci_level = (((pmsts & s->ar.pm1.evt.en) & 11194349bffSBALATON Zoltan (ACPI_BITMASK_RT_CLOCK_ENABLE | 11294349bffSBALATON Zoltan ACPI_BITMASK_POWER_BUTTON_ENABLE | 11394349bffSBALATON Zoltan ACPI_BITMASK_GLOBAL_LOCK_ENABLE | 11494349bffSBALATON Zoltan ACPI_BITMASK_TIMER_ENABLE)) != 0); 11594349bffSBALATON Zoltan pci_set_irq(&s->dev, sci_level); 11694349bffSBALATON Zoltan /* schedule a timer interruption if needed */ 11794349bffSBALATON Zoltan acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 11894349bffSBALATON Zoltan !(pmsts & ACPI_BITMASK_TIMER_STATUS)); 11994349bffSBALATON Zoltan } 12094349bffSBALATON Zoltan 12194349bffSBALATON Zoltan static void pm_tmr_timer(ACPIREGS *ar) 12294349bffSBALATON Zoltan { 12394349bffSBALATON Zoltan VT686PMState *s = container_of(ar, VT686PMState, ar); 12494349bffSBALATON Zoltan pm_update_sci(s); 12594349bffSBALATON Zoltan } 12694349bffSBALATON Zoltan 127*911629e6SBALATON Zoltan static void vt82c686b_pm_reset(DeviceState *d) 128*911629e6SBALATON Zoltan { 129*911629e6SBALATON Zoltan VT686PMState *s = VT82C686B_PM(d); 130*911629e6SBALATON Zoltan 131*911629e6SBALATON Zoltan /* SMBus IO base */ 132*911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, 1); 133*911629e6SBALATON Zoltan s->dev.config[0xd2] = 0; 134*911629e6SBALATON Zoltan 135*911629e6SBALATON Zoltan smb_io_space_update(s); 136*911629e6SBALATON Zoltan } 137*911629e6SBALATON Zoltan 1389af21dbeSMarkus Armbruster static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp) 13947934d0aSPaolo Bonzini { 140e6340505SBALATON Zoltan VT686PMState *s = VT82C686B_PM(dev); 14147934d0aSPaolo Bonzini uint8_t *pci_conf; 14247934d0aSPaolo Bonzini 14347934d0aSPaolo Bonzini pci_conf = s->dev.config; 14447934d0aSPaolo Bonzini pci_set_word(pci_conf + PCI_COMMAND, 0); 14547934d0aSPaolo Bonzini pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK | 14647934d0aSPaolo Bonzini PCI_STATUS_DEVSEL_MEDIUM); 14747934d0aSPaolo Bonzini 14847934d0aSPaolo Bonzini /* 0x48-0x4B is Power Management I/O Base */ 14947934d0aSPaolo Bonzini pci_set_long(pci_conf + 0x48, 0x00000001); 15047934d0aSPaolo Bonzini 151a30c34d2SPhilippe Mathieu-Daudé pm_smbus_init(DEVICE(s), &s->smb, false); 152*911629e6SBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); 153*911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, false); 15447934d0aSPaolo Bonzini 15547934d0aSPaolo Bonzini apm_init(dev, &s->apm, NULL, s); 15647934d0aSPaolo Bonzini 1571437c94bSPaolo Bonzini memory_region_init(&s->io, OBJECT(dev), "vt82c686-pm", 64); 15847934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, false); 15947934d0aSPaolo Bonzini memory_region_add_subregion(get_system_io(), 0, &s->io); 16047934d0aSPaolo Bonzini 16147934d0aSPaolo Bonzini acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 16247934d0aSPaolo Bonzini acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 1639a10bbb4SLaszlo Ersek acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2); 16447934d0aSPaolo Bonzini } 16547934d0aSPaolo Bonzini 16647934d0aSPaolo Bonzini static void via_pm_class_init(ObjectClass *klass, void *data) 16747934d0aSPaolo Bonzini { 16847934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 16947934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 17047934d0aSPaolo Bonzini 1719af21dbeSMarkus Armbruster k->realize = vt82c686b_pm_realize; 17247934d0aSPaolo Bonzini k->config_write = pm_write_config; 17347934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 17447934d0aSPaolo Bonzini k->device_id = PCI_DEVICE_ID_VIA_ACPI; 17547934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_OTHER; 17647934d0aSPaolo Bonzini k->revision = 0x40; 177*911629e6SBALATON Zoltan dc->reset = vt82c686b_pm_reset; 17847934d0aSPaolo Bonzini dc->desc = "PM"; 17947934d0aSPaolo Bonzini dc->vmsd = &vmstate_acpi; 180125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 18147934d0aSPaolo Bonzini } 18247934d0aSPaolo Bonzini 18347934d0aSPaolo Bonzini static const TypeInfo via_pm_info = { 184e6340505SBALATON Zoltan .name = TYPE_VT82C686B_PM, 18547934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 18647934d0aSPaolo Bonzini .instance_size = sizeof(VT686PMState), 18747934d0aSPaolo Bonzini .class_init = via_pm_class_init, 188fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 189fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 190fd3b02c8SEduardo Habkost { }, 191fd3b02c8SEduardo Habkost }, 19247934d0aSPaolo Bonzini }; 19347934d0aSPaolo Bonzini 19494349bffSBALATON Zoltan 19594349bffSBALATON Zoltan typedef struct SuperIOConfig { 19694349bffSBALATON Zoltan uint8_t regs[0x100]; 19794349bffSBALATON Zoltan uint8_t index; 19894349bffSBALATON Zoltan MemoryRegion io; 19994349bffSBALATON Zoltan } SuperIOConfig; 20094349bffSBALATON Zoltan 20194349bffSBALATON Zoltan static void superio_cfg_write(void *opaque, hwaddr addr, uint64_t data, 20294349bffSBALATON Zoltan unsigned size) 20394349bffSBALATON Zoltan { 20494349bffSBALATON Zoltan SuperIOConfig *sc = opaque; 20594349bffSBALATON Zoltan 20694349bffSBALATON Zoltan if (addr == 0x3f0) { /* config index register */ 20794349bffSBALATON Zoltan sc->index = data & 0xff; 20894349bffSBALATON Zoltan } else { 20994349bffSBALATON Zoltan bool can_write = true; 21094349bffSBALATON Zoltan /* 0x3f1, config data register */ 21194349bffSBALATON Zoltan trace_via_superio_write(sc->index, data & 0xff); 21294349bffSBALATON Zoltan switch (sc->index) { 21394349bffSBALATON Zoltan case 0x00 ... 0xdf: 21494349bffSBALATON Zoltan case 0xe4: 21594349bffSBALATON Zoltan case 0xe5: 21694349bffSBALATON Zoltan case 0xe9 ... 0xed: 21794349bffSBALATON Zoltan case 0xf3: 21894349bffSBALATON Zoltan case 0xf5: 21994349bffSBALATON Zoltan case 0xf7: 22094349bffSBALATON Zoltan case 0xf9 ... 0xfb: 22194349bffSBALATON Zoltan case 0xfd ... 0xff: 22294349bffSBALATON Zoltan can_write = false; 22394349bffSBALATON Zoltan break; 22494349bffSBALATON Zoltan /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ 22594349bffSBALATON Zoltan default: 22694349bffSBALATON Zoltan break; 22794349bffSBALATON Zoltan 22894349bffSBALATON Zoltan } 22994349bffSBALATON Zoltan if (can_write) { 23094349bffSBALATON Zoltan sc->regs[sc->index] = data & 0xff; 23194349bffSBALATON Zoltan } 23294349bffSBALATON Zoltan } 23394349bffSBALATON Zoltan } 23494349bffSBALATON Zoltan 23594349bffSBALATON Zoltan static uint64_t superio_cfg_read(void *opaque, hwaddr addr, unsigned size) 23694349bffSBALATON Zoltan { 23794349bffSBALATON Zoltan SuperIOConfig *sc = opaque; 23894349bffSBALATON Zoltan uint8_t val = sc->regs[sc->index]; 23994349bffSBALATON Zoltan 24094349bffSBALATON Zoltan trace_via_superio_read(sc->index, val); 24194349bffSBALATON Zoltan return val; 24294349bffSBALATON Zoltan } 24394349bffSBALATON Zoltan 24494349bffSBALATON Zoltan static const MemoryRegionOps superio_cfg_ops = { 24594349bffSBALATON Zoltan .read = superio_cfg_read, 24694349bffSBALATON Zoltan .write = superio_cfg_write, 24794349bffSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 24894349bffSBALATON Zoltan .impl = { 24994349bffSBALATON Zoltan .min_access_size = 1, 25094349bffSBALATON Zoltan .max_access_size = 1, 25194349bffSBALATON Zoltan }, 25294349bffSBALATON Zoltan }; 25394349bffSBALATON Zoltan 25494349bffSBALATON Zoltan 25594349bffSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA) 25694349bffSBALATON Zoltan 25794349bffSBALATON Zoltan struct VT82C686BISAState { 25894349bffSBALATON Zoltan PCIDevice dev; 25994349bffSBALATON Zoltan SuperIOConfig superio_cfg; 26094349bffSBALATON Zoltan }; 26194349bffSBALATON Zoltan 26294349bffSBALATON Zoltan static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, 26394349bffSBALATON Zoltan uint32_t val, int len) 26494349bffSBALATON Zoltan { 26594349bffSBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(d); 26694349bffSBALATON Zoltan 26794349bffSBALATON Zoltan trace_via_isa_write(addr, val, len); 26894349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 26994349bffSBALATON Zoltan if (addr == 0x85) { 27094349bffSBALATON Zoltan /* BIT(1): enable or disable superio config io ports */ 27194349bffSBALATON Zoltan memory_region_set_enabled(&s->superio_cfg.io, val & BIT(1)); 27294349bffSBALATON Zoltan } 27394349bffSBALATON Zoltan } 27494349bffSBALATON Zoltan 27547934d0aSPaolo Bonzini static const VMStateDescription vmstate_via = { 27647934d0aSPaolo Bonzini .name = "vt82c686b", 27747934d0aSPaolo Bonzini .version_id = 1, 27847934d0aSPaolo Bonzini .minimum_version_id = 1, 27947934d0aSPaolo Bonzini .fields = (VMStateField[]) { 2800f798461SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, VT82C686BISAState), 28147934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 28247934d0aSPaolo Bonzini } 28347934d0aSPaolo Bonzini }; 28447934d0aSPaolo Bonzini 28594349bffSBALATON Zoltan static void vt82c686b_isa_reset(DeviceState *dev) 28694349bffSBALATON Zoltan { 28794349bffSBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(dev); 28894349bffSBALATON Zoltan uint8_t *pci_conf = s->dev.config; 28994349bffSBALATON Zoltan 29094349bffSBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 29194349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 29294349bffSBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 29394349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 29494349bffSBALATON Zoltan 29594349bffSBALATON Zoltan pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ 29694349bffSBALATON Zoltan pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ 29794349bffSBALATON Zoltan pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ 29894349bffSBALATON Zoltan pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ 29994349bffSBALATON Zoltan pci_conf[0x59] = 0x04; 30094349bffSBALATON Zoltan pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ 30194349bffSBALATON Zoltan pci_conf[0x5f] = 0x04; 30294349bffSBALATON Zoltan pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ 30394349bffSBALATON Zoltan 30494349bffSBALATON Zoltan s->superio_cfg.regs[0xe0] = 0x3c; /* Device ID */ 30594349bffSBALATON Zoltan s->superio_cfg.regs[0xe2] = 0x03; /* Function select */ 30694349bffSBALATON Zoltan s->superio_cfg.regs[0xe3] = 0xfc; /* Floppy ctrl base addr */ 30794349bffSBALATON Zoltan s->superio_cfg.regs[0xe6] = 0xde; /* Parallel port base addr */ 30894349bffSBALATON Zoltan s->superio_cfg.regs[0xe7] = 0xfe; /* Serial port 1 base addr */ 30994349bffSBALATON Zoltan s->superio_cfg.regs[0xe8] = 0xbe; /* Serial port 2 base addr */ 31094349bffSBALATON Zoltan } 31194349bffSBALATON Zoltan 3129af21dbeSMarkus Armbruster static void vt82c686b_realize(PCIDevice *d, Error **errp) 31347934d0aSPaolo Bonzini { 314007b3103SBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(d); 31547934d0aSPaolo Bonzini uint8_t *pci_conf; 316bcc37e24SJan Kiszka ISABus *isa_bus; 31747934d0aSPaolo Bonzini uint8_t *wmask; 31847934d0aSPaolo Bonzini int i; 31947934d0aSPaolo Bonzini 320bb2ed009SHervé Poussineau isa_bus = isa_bus_new(DEVICE(d), get_system_memory(), 321d10e5432SMarkus Armbruster pci_address_space_io(d), errp); 322d10e5432SMarkus Armbruster if (!isa_bus) { 323d10e5432SMarkus Armbruster return; 324d10e5432SMarkus Armbruster } 32547934d0aSPaolo Bonzini 32647934d0aSPaolo Bonzini pci_conf = d->config; 32747934d0aSPaolo Bonzini pci_config_set_prog_interface(pci_conf, 0x0); 32847934d0aSPaolo Bonzini 32947934d0aSPaolo Bonzini wmask = d->wmask; 33047934d0aSPaolo Bonzini for (i = 0x00; i < 0xff; i++) { 33147934d0aSPaolo Bonzini if (i <= 0x03 || (i >= 0x08 && i <= 0x3f)) { 33247934d0aSPaolo Bonzini wmask[i] = 0x00; 33347934d0aSPaolo Bonzini } 33447934d0aSPaolo Bonzini } 33547934d0aSPaolo Bonzini 3366be6e4bcSBALATON Zoltan memory_region_init_io(&s->superio_cfg.io, OBJECT(d), &superio_cfg_ops, 3376be6e4bcSBALATON Zoltan &s->superio_cfg, "superio_cfg", 2); 3386be6e4bcSBALATON Zoltan memory_region_set_enabled(&s->superio_cfg.io, false); 339f3db354cSFilip Bozuta /* 340f3db354cSFilip Bozuta * The floppy also uses 0x3f0 and 0x3f1. 341f3db354cSFilip Bozuta * But we do not emulate a floppy, so just set it here. 342f3db354cSFilip Bozuta */ 343bcc37e24SJan Kiszka memory_region_add_subregion(isa_bus->address_space_io, 0x3f0, 3446be6e4bcSBALATON Zoltan &s->superio_cfg.io); 34547934d0aSPaolo Bonzini } 34647934d0aSPaolo Bonzini 34747934d0aSPaolo Bonzini static void via_class_init(ObjectClass *klass, void *data) 34847934d0aSPaolo Bonzini { 34947934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 35047934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 35147934d0aSPaolo Bonzini 3529af21dbeSMarkus Armbruster k->realize = vt82c686b_realize; 35347934d0aSPaolo Bonzini k->config_write = vt82c686b_write_config; 35447934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 35547934d0aSPaolo Bonzini k->device_id = PCI_DEVICE_ID_VIA_ISA_BRIDGE; 35647934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_ISA; 35747934d0aSPaolo Bonzini k->revision = 0x40; 3589dc1a769SPhilippe Mathieu-Daudé dc->reset = vt82c686b_isa_reset; 35947934d0aSPaolo Bonzini dc->desc = "ISA bridge"; 36047934d0aSPaolo Bonzini dc->vmsd = &vmstate_via; 36104916ee9SMarkus Armbruster /* 36204916ee9SMarkus Armbruster * Reason: part of VIA VT82C686 southbridge, needs to be wired up, 363c3a09ff6SPhilippe Mathieu-Daudé * e.g. by mips_fuloong2e_init() 36404916ee9SMarkus Armbruster */ 365e90f2a8cSEduardo Habkost dc->user_creatable = false; 36647934d0aSPaolo Bonzini } 36747934d0aSPaolo Bonzini 36847934d0aSPaolo Bonzini static const TypeInfo via_info = { 3690f798461SBALATON Zoltan .name = TYPE_VT82C686B_ISA, 37047934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 3710f798461SBALATON Zoltan .instance_size = sizeof(VT82C686BISAState), 37247934d0aSPaolo Bonzini .class_init = via_class_init, 373fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 374fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 375fd3b02c8SEduardo Habkost { }, 376fd3b02c8SEduardo Habkost }, 37747934d0aSPaolo Bonzini }; 37847934d0aSPaolo Bonzini 37994349bffSBALATON Zoltan 38098cf824bSPhilippe Mathieu-Daudé static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) 38198cf824bSPhilippe Mathieu-Daudé { 38298cf824bSPhilippe Mathieu-Daudé ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 38398cf824bSPhilippe Mathieu-Daudé 38498cf824bSPhilippe Mathieu-Daudé sc->serial.count = 2; 38598cf824bSPhilippe Mathieu-Daudé sc->parallel.count = 1; 38698cf824bSPhilippe Mathieu-Daudé sc->ide.count = 0; 38798cf824bSPhilippe Mathieu-Daudé sc->floppy.count = 1; 38898cf824bSPhilippe Mathieu-Daudé } 38998cf824bSPhilippe Mathieu-Daudé 39098cf824bSPhilippe Mathieu-Daudé static const TypeInfo via_superio_info = { 39198cf824bSPhilippe Mathieu-Daudé .name = TYPE_VT82C686B_SUPERIO, 39298cf824bSPhilippe Mathieu-Daudé .parent = TYPE_ISA_SUPERIO, 39398cf824bSPhilippe Mathieu-Daudé .instance_size = sizeof(ISASuperIODevice), 39498cf824bSPhilippe Mathieu-Daudé .class_size = sizeof(ISASuperIOClass), 39598cf824bSPhilippe Mathieu-Daudé .class_init = vt82c686b_superio_class_init, 39698cf824bSPhilippe Mathieu-Daudé }; 39798cf824bSPhilippe Mathieu-Daudé 39894349bffSBALATON Zoltan 39947934d0aSPaolo Bonzini static void vt82c686b_register_types(void) 40047934d0aSPaolo Bonzini { 40147934d0aSPaolo Bonzini type_register_static(&via_pm_info); 40247934d0aSPaolo Bonzini type_register_static(&via_info); 40394349bffSBALATON Zoltan type_register_static(&via_superio_info); 40447934d0aSPaolo Bonzini } 40547934d0aSPaolo Bonzini 40647934d0aSPaolo Bonzini type_init(vt82c686b_register_types) 407