147934d0aSPaolo Bonzini /* 247934d0aSPaolo Bonzini * VT82C686B south bridge support 347934d0aSPaolo Bonzini * 447934d0aSPaolo Bonzini * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 547934d0aSPaolo Bonzini * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 647934d0aSPaolo Bonzini * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 747934d0aSPaolo Bonzini * This code is licensed under the GNU GPL v2. 847934d0aSPaolo Bonzini * 947934d0aSPaolo Bonzini * Contributions after 2012-01-13 are licensed under the terms of the 1047934d0aSPaolo Bonzini * GNU GPL, version 2 or (at your option) any later version. 11f9f0c9e2SBALATON Zoltan * 12f9f0c9e2SBALATON Zoltan * VT8231 south bridge support and general clean up to allow it 13f9f0c9e2SBALATON Zoltan * Copyright (c) 2018-2020 BALATON Zoltan 1447934d0aSPaolo Bonzini */ 1547934d0aSPaolo Bonzini 160430891cSPeter Maydell #include "qemu/osdep.h" 1747934d0aSPaolo Bonzini #include "hw/isa/vt82c686.h" 1847934d0aSPaolo Bonzini #include "hw/pci/pci.h" 19a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 2047934d0aSPaolo Bonzini #include "hw/isa/isa.h" 2198cf824bSPhilippe Mathieu-Daudé #include "hw/isa/superio.h" 223dc31cb8SBALATON Zoltan #include "hw/intc/i8259.h" 233dc31cb8SBALATON Zoltan #include "hw/irq.h" 243dc31cb8SBALATON Zoltan #include "hw/dma/i8257.h" 253dc31cb8SBALATON Zoltan #include "hw/timer/i8254.h" 263dc31cb8SBALATON Zoltan #include "hw/rtc/mc146818rtc.h" 27d6454270SMarkus Armbruster #include "migration/vmstate.h" 2847934d0aSPaolo Bonzini #include "hw/isa/apm.h" 2947934d0aSPaolo Bonzini #include "hw/acpi/acpi.h" 3047934d0aSPaolo Bonzini #include "hw/i2c/pm_smbus.h" 319307d06dSMarkus Armbruster #include "qapi/error.h" 322c4c556eSBALATON Zoltan #include "qemu/log.h" 330b8fa32fSMarkus Armbruster #include "qemu/module.h" 34911629e6SBALATON Zoltan #include "qemu/range.h" 3547934d0aSPaolo Bonzini #include "qemu/timer.h" 36ff413a1fSBALATON Zoltan #include "trace.h" 3747934d0aSPaolo Bonzini 38e1a69736SBALATON Zoltan #define TYPE_VIA_PM "via-pm" 39e1a69736SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaPMState, VIA_PM) 4047934d0aSPaolo Bonzini 41e1a69736SBALATON Zoltan struct ViaPMState { 4247934d0aSPaolo Bonzini PCIDevice dev; 4347934d0aSPaolo Bonzini MemoryRegion io; 4447934d0aSPaolo Bonzini ACPIREGS ar; 4547934d0aSPaolo Bonzini APMState apm; 4647934d0aSPaolo Bonzini PMSMBus smb; 47db1015e9SEduardo Habkost }; 4847934d0aSPaolo Bonzini 49e1a69736SBALATON Zoltan static void pm_io_space_update(ViaPMState *s) 5047934d0aSPaolo Bonzini { 513ab1eea6SBALATON Zoltan uint32_t pmbase = pci_get_long(s->dev.config + 0x48) & 0xff80UL; 5247934d0aSPaolo Bonzini 5347934d0aSPaolo Bonzini memory_region_transaction_begin(); 543ab1eea6SBALATON Zoltan memory_region_set_address(&s->io, pmbase); 553ab1eea6SBALATON Zoltan memory_region_set_enabled(&s->io, s->dev.config[0x41] & BIT(7)); 5647934d0aSPaolo Bonzini memory_region_transaction_commit(); 5747934d0aSPaolo Bonzini } 5847934d0aSPaolo Bonzini 59e1a69736SBALATON Zoltan static void smb_io_space_update(ViaPMState *s) 60911629e6SBALATON Zoltan { 61911629e6SBALATON Zoltan uint32_t smbase = pci_get_long(s->dev.config + 0x90) & 0xfff0UL; 62911629e6SBALATON Zoltan 63911629e6SBALATON Zoltan memory_region_transaction_begin(); 64911629e6SBALATON Zoltan memory_region_set_address(&s->smb.io, smbase); 65911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & BIT(0)); 66911629e6SBALATON Zoltan memory_region_transaction_commit(); 67911629e6SBALATON Zoltan } 68911629e6SBALATON Zoltan 6947934d0aSPaolo Bonzini static int vmstate_acpi_post_load(void *opaque, int version_id) 7047934d0aSPaolo Bonzini { 71e1a69736SBALATON Zoltan ViaPMState *s = opaque; 7247934d0aSPaolo Bonzini 7347934d0aSPaolo Bonzini pm_io_space_update(s); 74911629e6SBALATON Zoltan smb_io_space_update(s); 7547934d0aSPaolo Bonzini return 0; 7647934d0aSPaolo Bonzini } 7747934d0aSPaolo Bonzini 7847934d0aSPaolo Bonzini static const VMStateDescription vmstate_acpi = { 7947934d0aSPaolo Bonzini .name = "vt82c686b_pm", 8047934d0aSPaolo Bonzini .version_id = 1, 8147934d0aSPaolo Bonzini .minimum_version_id = 1, 8247934d0aSPaolo Bonzini .post_load = vmstate_acpi_post_load, 8347934d0aSPaolo Bonzini .fields = (VMStateField[]) { 84e1a69736SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaPMState), 85e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.sts, ViaPMState), 86e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.en, ViaPMState), 87e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.cnt.cnt, ViaPMState), 88e1a69736SBALATON Zoltan VMSTATE_STRUCT(apm, ViaPMState, 0, vmstate_apm, APMState), 89e1a69736SBALATON Zoltan VMSTATE_TIMER_PTR(ar.tmr.timer, ViaPMState), 90e1a69736SBALATON Zoltan VMSTATE_INT64(ar.tmr.overflow_time, ViaPMState), 9147934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 9247934d0aSPaolo Bonzini } 9347934d0aSPaolo Bonzini }; 9447934d0aSPaolo Bonzini 9594349bffSBALATON Zoltan static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) 9694349bffSBALATON Zoltan { 97e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 98911629e6SBALATON Zoltan 9994349bffSBALATON Zoltan trace_via_pm_write(addr, val, len); 10094349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 1013ab1eea6SBALATON Zoltan if (ranges_overlap(addr, len, 0x48, 4)) { 1023ab1eea6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x48); 1033ab1eea6SBALATON Zoltan pci_set_long(s->dev.config + 0x48, (v & 0xff80UL) | 1); 1043ab1eea6SBALATON Zoltan } 1053ab1eea6SBALATON Zoltan if (range_covers_byte(addr, len, 0x41)) { 1063ab1eea6SBALATON Zoltan pm_io_space_update(s); 1073ab1eea6SBALATON Zoltan } 108911629e6SBALATON Zoltan if (ranges_overlap(addr, len, 0x90, 4)) { 109911629e6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x90); 110911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, (v & 0xfff0UL) | 1); 111911629e6SBALATON Zoltan } 112911629e6SBALATON Zoltan if (range_covers_byte(addr, len, 0xd2)) { 113911629e6SBALATON Zoltan s->dev.config[0xd2] &= 0xf; 114911629e6SBALATON Zoltan smb_io_space_update(s); 115911629e6SBALATON Zoltan } 11694349bffSBALATON Zoltan } 11794349bffSBALATON Zoltan 11835e360edSBALATON Zoltan static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size) 11935e360edSBALATON Zoltan { 12035e360edSBALATON Zoltan trace_via_pm_io_write(addr, data, size); 12135e360edSBALATON Zoltan } 12235e360edSBALATON Zoltan 12335e360edSBALATON Zoltan static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size) 12435e360edSBALATON Zoltan { 12535e360edSBALATON Zoltan trace_via_pm_io_read(addr, 0, size); 12635e360edSBALATON Zoltan return 0; 12735e360edSBALATON Zoltan } 12835e360edSBALATON Zoltan 12935e360edSBALATON Zoltan static const MemoryRegionOps pm_io_ops = { 13035e360edSBALATON Zoltan .read = pm_io_read, 13135e360edSBALATON Zoltan .write = pm_io_write, 13235e360edSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 13335e360edSBALATON Zoltan .impl = { 13435e360edSBALATON Zoltan .min_access_size = 1, 13535e360edSBALATON Zoltan .max_access_size = 1, 13635e360edSBALATON Zoltan }, 13735e360edSBALATON Zoltan }; 13835e360edSBALATON Zoltan 139e1a69736SBALATON Zoltan static void pm_update_sci(ViaPMState *s) 14094349bffSBALATON Zoltan { 14194349bffSBALATON Zoltan int sci_level, pmsts; 14294349bffSBALATON Zoltan 14394349bffSBALATON Zoltan pmsts = acpi_pm1_evt_get_sts(&s->ar); 14494349bffSBALATON Zoltan sci_level = (((pmsts & s->ar.pm1.evt.en) & 14594349bffSBALATON Zoltan (ACPI_BITMASK_RT_CLOCK_ENABLE | 14694349bffSBALATON Zoltan ACPI_BITMASK_POWER_BUTTON_ENABLE | 14794349bffSBALATON Zoltan ACPI_BITMASK_GLOBAL_LOCK_ENABLE | 14894349bffSBALATON Zoltan ACPI_BITMASK_TIMER_ENABLE)) != 0); 1490fae92a3SIsaku Yamahata if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) { 1500fae92a3SIsaku Yamahata /* 1510fae92a3SIsaku Yamahata * FIXME: 1520fae92a3SIsaku Yamahata * Fix device model that realizes this PM device and remove 1530fae92a3SIsaku Yamahata * this work around. 1540fae92a3SIsaku Yamahata * The device model should wire SCI and setup 1550fae92a3SIsaku Yamahata * PCI_INTERRUPT_PIN properly. 1560fae92a3SIsaku Yamahata * If PIN# = 0(interrupt pin isn't used), don't raise SCI as 1570fae92a3SIsaku Yamahata * work around. 1580fae92a3SIsaku Yamahata */ 15994349bffSBALATON Zoltan pci_set_irq(&s->dev, sci_level); 1600fae92a3SIsaku Yamahata } 16194349bffSBALATON Zoltan /* schedule a timer interruption if needed */ 16294349bffSBALATON Zoltan acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 16394349bffSBALATON Zoltan !(pmsts & ACPI_BITMASK_TIMER_STATUS)); 16494349bffSBALATON Zoltan } 16594349bffSBALATON Zoltan 16694349bffSBALATON Zoltan static void pm_tmr_timer(ACPIREGS *ar) 16794349bffSBALATON Zoltan { 168e1a69736SBALATON Zoltan ViaPMState *s = container_of(ar, ViaPMState, ar); 16994349bffSBALATON Zoltan pm_update_sci(s); 17094349bffSBALATON Zoltan } 17194349bffSBALATON Zoltan 172e1a69736SBALATON Zoltan static void via_pm_reset(DeviceState *d) 173911629e6SBALATON Zoltan { 174e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 175911629e6SBALATON Zoltan 1769af8e529SBALATON Zoltan memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, 1779af8e529SBALATON Zoltan PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); 1789af8e529SBALATON Zoltan /* Power Management IO base */ 1799af8e529SBALATON Zoltan pci_set_long(s->dev.config + 0x48, 1); 180911629e6SBALATON Zoltan /* SMBus IO base */ 181911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, 1); 182911629e6SBALATON Zoltan 18344421c60SIsaku Yamahata acpi_pm1_evt_reset(&s->ar); 18444421c60SIsaku Yamahata acpi_pm1_cnt_reset(&s->ar); 18544421c60SIsaku Yamahata acpi_pm_tmr_reset(&s->ar); 18644421c60SIsaku Yamahata pm_update_sci(s); 18744421c60SIsaku Yamahata 1883ab1eea6SBALATON Zoltan pm_io_space_update(s); 189911629e6SBALATON Zoltan smb_io_space_update(s); 190911629e6SBALATON Zoltan } 191911629e6SBALATON Zoltan 192e1a69736SBALATON Zoltan static void via_pm_realize(PCIDevice *dev, Error **errp) 19347934d0aSPaolo Bonzini { 194e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(dev); 19547934d0aSPaolo Bonzini 1963ab1eea6SBALATON Zoltan pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | 19747934d0aSPaolo Bonzini PCI_STATUS_DEVSEL_MEDIUM); 19847934d0aSPaolo Bonzini 199a30c34d2SPhilippe Mathieu-Daudé pm_smbus_init(DEVICE(s), &s->smb, false); 200911629e6SBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); 201911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, false); 20247934d0aSPaolo Bonzini 20347934d0aSPaolo Bonzini apm_init(dev, &s->apm, NULL, s); 20447934d0aSPaolo Bonzini 205e1a69736SBALATON Zoltan memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, "via-pm", 128); 20635e360edSBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); 20747934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, false); 20847934d0aSPaolo Bonzini 20947934d0aSPaolo Bonzini acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 21047934d0aSPaolo Bonzini acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 2116be8cf56SIsaku Yamahata acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2, false); 21247934d0aSPaolo Bonzini } 21347934d0aSPaolo Bonzini 214e1a69736SBALATON Zoltan typedef struct via_pm_init_info { 215e1a69736SBALATON Zoltan uint16_t device_id; 216e1a69736SBALATON Zoltan } ViaPMInitInfo; 217e1a69736SBALATON Zoltan 21847934d0aSPaolo Bonzini static void via_pm_class_init(ObjectClass *klass, void *data) 21947934d0aSPaolo Bonzini { 22047934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 22147934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 222e1a69736SBALATON Zoltan ViaPMInitInfo *info = data; 22347934d0aSPaolo Bonzini 224e1a69736SBALATON Zoltan k->realize = via_pm_realize; 22547934d0aSPaolo Bonzini k->config_write = pm_write_config; 22647934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 227e1a69736SBALATON Zoltan k->device_id = info->device_id; 22847934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_OTHER; 22947934d0aSPaolo Bonzini k->revision = 0x40; 230e1a69736SBALATON Zoltan dc->reset = via_pm_reset; 231084bf4b4SBALATON Zoltan /* Reason: part of VIA south bridge, does not exist stand alone */ 232084bf4b4SBALATON Zoltan dc->user_creatable = false; 23347934d0aSPaolo Bonzini dc->vmsd = &vmstate_acpi; 23447934d0aSPaolo Bonzini } 23547934d0aSPaolo Bonzini 23647934d0aSPaolo Bonzini static const TypeInfo via_pm_info = { 237e1a69736SBALATON Zoltan .name = TYPE_VIA_PM, 23847934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 239e1a69736SBALATON Zoltan .instance_size = sizeof(ViaPMState), 240e1a69736SBALATON Zoltan .abstract = true, 241fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 242fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 243fd3b02c8SEduardo Habkost { }, 244fd3b02c8SEduardo Habkost }, 24547934d0aSPaolo Bonzini }; 24647934d0aSPaolo Bonzini 247e1a69736SBALATON Zoltan static const ViaPMInitInfo vt82c686b_pm_init_info = { 248e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_82C686B_PM, 249e1a69736SBALATON Zoltan }; 250e1a69736SBALATON Zoltan 251e1a69736SBALATON Zoltan static const TypeInfo vt82c686b_pm_info = { 252e1a69736SBALATON Zoltan .name = TYPE_VT82C686B_PM, 253e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 254e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 255e1a69736SBALATON Zoltan .class_data = (void *)&vt82c686b_pm_init_info, 256e1a69736SBALATON Zoltan }; 257e1a69736SBALATON Zoltan 258e1a69736SBALATON Zoltan static const ViaPMInitInfo vt8231_pm_init_info = { 259e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_8231_PM, 260e1a69736SBALATON Zoltan }; 261e1a69736SBALATON Zoltan 262e1a69736SBALATON Zoltan static const TypeInfo vt8231_pm_info = { 263e1a69736SBALATON Zoltan .name = TYPE_VT8231_PM, 264e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 265e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 266e1a69736SBALATON Zoltan .class_data = (void *)&vt8231_pm_init_info, 267e1a69736SBALATON Zoltan }; 268e1a69736SBALATON Zoltan 26994349bffSBALATON Zoltan 270f028c2deSBALATON Zoltan #define TYPE_VIA_SUPERIO "via-superio" 271f028c2deSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaSuperIOState, VIA_SUPERIO) 27294349bffSBALATON Zoltan 273f028c2deSBALATON Zoltan struct ViaSuperIOState { 274f028c2deSBALATON Zoltan ISASuperIODevice superio; 275f028c2deSBALATON Zoltan uint8_t regs[0x100]; 276f028c2deSBALATON Zoltan const MemoryRegionOps *io_ops; 277f028c2deSBALATON Zoltan MemoryRegion io; 278f028c2deSBALATON Zoltan }; 279f028c2deSBALATON Zoltan 280f028c2deSBALATON Zoltan static inline void via_superio_io_enable(ViaSuperIOState *s, bool enable) 28194349bffSBALATON Zoltan { 282f028c2deSBALATON Zoltan memory_region_set_enabled(&s->io, enable); 283f028c2deSBALATON Zoltan } 284f028c2deSBALATON Zoltan 285f028c2deSBALATON Zoltan static void via_superio_realize(DeviceState *d, Error **errp) 286f028c2deSBALATON Zoltan { 287f028c2deSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(d); 288f028c2deSBALATON Zoltan ISASuperIOClass *ic = ISA_SUPERIO_GET_CLASS(s); 289f028c2deSBALATON Zoltan Error *local_err = NULL; 290f028c2deSBALATON Zoltan 291f028c2deSBALATON Zoltan assert(s->io_ops); 292f028c2deSBALATON Zoltan ic->parent_realize(d, &local_err); 293f028c2deSBALATON Zoltan if (local_err) { 294f028c2deSBALATON Zoltan error_propagate(errp, local_err); 295f028c2deSBALATON Zoltan return; 296f028c2deSBALATON Zoltan } 297f028c2deSBALATON Zoltan memory_region_init_io(&s->io, OBJECT(d), s->io_ops, s, "via-superio", 2); 298f028c2deSBALATON Zoltan memory_region_set_enabled(&s->io, false); 299f028c2deSBALATON Zoltan /* The floppy also uses 0x3f0 and 0x3f1 but this seems to work anyway */ 300f028c2deSBALATON Zoltan memory_region_add_subregion(isa_address_space_io(ISA_DEVICE(s)), 0x3f0, 301f028c2deSBALATON Zoltan &s->io); 302f028c2deSBALATON Zoltan } 303f028c2deSBALATON Zoltan 304f028c2deSBALATON Zoltan static uint64_t via_superio_cfg_read(void *opaque, hwaddr addr, unsigned size) 305f028c2deSBALATON Zoltan { 306f028c2deSBALATON Zoltan ViaSuperIOState *sc = opaque; 307f028c2deSBALATON Zoltan uint8_t idx = sc->regs[0]; 308f028c2deSBALATON Zoltan uint8_t val = sc->regs[idx]; 309f028c2deSBALATON Zoltan 310f028c2deSBALATON Zoltan if (addr == 0) { 311f028c2deSBALATON Zoltan return idx; 312f028c2deSBALATON Zoltan } 313f028c2deSBALATON Zoltan if (addr == 1 && idx == 0) { 314f028c2deSBALATON Zoltan val = 0; /* reading reg 0 where we store index value */ 315f028c2deSBALATON Zoltan } 316f028c2deSBALATON Zoltan trace_via_superio_read(idx, val); 317f028c2deSBALATON Zoltan return val; 318f028c2deSBALATON Zoltan } 319f028c2deSBALATON Zoltan 320f028c2deSBALATON Zoltan static void via_superio_class_init(ObjectClass *klass, void *data) 321f028c2deSBALATON Zoltan { 322f028c2deSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 323f028c2deSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 324f028c2deSBALATON Zoltan 325f028c2deSBALATON Zoltan sc->parent_realize = dc->realize; 326f028c2deSBALATON Zoltan dc->realize = via_superio_realize; 327f028c2deSBALATON Zoltan } 328f028c2deSBALATON Zoltan 329f028c2deSBALATON Zoltan static const TypeInfo via_superio_info = { 330f028c2deSBALATON Zoltan .name = TYPE_VIA_SUPERIO, 331f028c2deSBALATON Zoltan .parent = TYPE_ISA_SUPERIO, 332f028c2deSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 333f028c2deSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 334f028c2deSBALATON Zoltan .class_init = via_superio_class_init, 335f028c2deSBALATON Zoltan .abstract = true, 336f028c2deSBALATON Zoltan }; 337f028c2deSBALATON Zoltan 338f028c2deSBALATON Zoltan #define TYPE_VT82C686B_SUPERIO "vt82c686b-superio" 339f028c2deSBALATON Zoltan 340f028c2deSBALATON Zoltan static void vt82c686b_superio_cfg_write(void *opaque, hwaddr addr, 341f028c2deSBALATON Zoltan uint64_t data, unsigned size) 342f028c2deSBALATON Zoltan { 343f028c2deSBALATON Zoltan ViaSuperIOState *sc = opaque; 344c953bf71SBALATON Zoltan uint8_t idx = sc->regs[0]; 34594349bffSBALATON Zoltan 346cc2b4550SBALATON Zoltan if (addr == 0) { /* config index register */ 347cc2b4550SBALATON Zoltan sc->regs[0] = data; 3482b98dca9SBALATON Zoltan return; 3492b98dca9SBALATON Zoltan } 350cc2b4550SBALATON Zoltan 351cc2b4550SBALATON Zoltan /* config data register */ 352cc2b4550SBALATON Zoltan trace_via_superio_write(idx, data); 353c953bf71SBALATON Zoltan switch (idx) { 35494349bffSBALATON Zoltan case 0x00 ... 0xdf: 35594349bffSBALATON Zoltan case 0xe4: 35694349bffSBALATON Zoltan case 0xe5: 35794349bffSBALATON Zoltan case 0xe9 ... 0xed: 35894349bffSBALATON Zoltan case 0xf3: 35994349bffSBALATON Zoltan case 0xf5: 36094349bffSBALATON Zoltan case 0xf7: 36194349bffSBALATON Zoltan case 0xf9 ... 0xfb: 36294349bffSBALATON Zoltan case 0xfd ... 0xff: 363b7741b77SBALATON Zoltan /* ignore write to read only registers */ 364b7741b77SBALATON Zoltan return; 36594349bffSBALATON Zoltan /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ 36694349bffSBALATON Zoltan default: 3672c4c556eSBALATON Zoltan qemu_log_mask(LOG_UNIMP, 3682c4c556eSBALATON Zoltan "via_superio_cfg: unimplemented register 0x%x\n", idx); 36994349bffSBALATON Zoltan break; 37094349bffSBALATON Zoltan } 371cc2b4550SBALATON Zoltan sc->regs[idx] = data; 37294349bffSBALATON Zoltan } 37394349bffSBALATON Zoltan 374f028c2deSBALATON Zoltan static const MemoryRegionOps vt82c686b_superio_cfg_ops = { 375f028c2deSBALATON Zoltan .read = via_superio_cfg_read, 376f028c2deSBALATON Zoltan .write = vt82c686b_superio_cfg_write, 37794349bffSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 37894349bffSBALATON Zoltan .impl = { 37994349bffSBALATON Zoltan .min_access_size = 1, 38094349bffSBALATON Zoltan .max_access_size = 1, 38194349bffSBALATON Zoltan }, 38294349bffSBALATON Zoltan }; 38394349bffSBALATON Zoltan 384f028c2deSBALATON Zoltan static void vt82c686b_superio_reset(DeviceState *dev) 385f028c2deSBALATON Zoltan { 386f028c2deSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(dev); 38794349bffSBALATON Zoltan 388f028c2deSBALATON Zoltan memset(s->regs, 0, sizeof(s->regs)); 389f028c2deSBALATON Zoltan /* Device ID */ 390f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe0, 1); 391f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0x3c, 1); 392f028c2deSBALATON Zoltan /* Function select - all disabled */ 393f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe2, 1); 394f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0x03, 1); 395f028c2deSBALATON Zoltan /* Floppy ctrl base addr 0x3f0-7 */ 396f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe3, 1); 397f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xfc, 1); 398f028c2deSBALATON Zoltan /* Parallel port base addr 0x378-f */ 399f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe6, 1); 400f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xde, 1); 401f028c2deSBALATON Zoltan /* Serial port 1 base addr 0x3f8-f */ 402f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe7, 1); 403f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xfe, 1); 404f028c2deSBALATON Zoltan /* Serial port 2 base addr 0x2f8-f */ 405f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe8, 1); 406f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xbe, 1); 40794349bffSBALATON Zoltan 408f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0, 1); 409f028c2deSBALATON Zoltan } 410f028c2deSBALATON Zoltan 411f028c2deSBALATON Zoltan static void vt82c686b_superio_init(Object *obj) 412f028c2deSBALATON Zoltan { 413f028c2deSBALATON Zoltan VIA_SUPERIO(obj)->io_ops = &vt82c686b_superio_cfg_ops; 414f028c2deSBALATON Zoltan } 415f028c2deSBALATON Zoltan 416f028c2deSBALATON Zoltan static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) 417f028c2deSBALATON Zoltan { 418f028c2deSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 419f028c2deSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 420f028c2deSBALATON Zoltan 421f028c2deSBALATON Zoltan dc->reset = vt82c686b_superio_reset; 422f028c2deSBALATON Zoltan sc->serial.count = 2; 423f028c2deSBALATON Zoltan sc->parallel.count = 1; 424f028c2deSBALATON Zoltan sc->ide.count = 0; /* emulated by via-ide */ 425f028c2deSBALATON Zoltan sc->floppy.count = 1; 426f028c2deSBALATON Zoltan } 427f028c2deSBALATON Zoltan 428f028c2deSBALATON Zoltan static const TypeInfo vt82c686b_superio_info = { 429f028c2deSBALATON Zoltan .name = TYPE_VT82C686B_SUPERIO, 430f028c2deSBALATON Zoltan .parent = TYPE_VIA_SUPERIO, 431f028c2deSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 432f028c2deSBALATON Zoltan .instance_init = vt82c686b_superio_init, 433f028c2deSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 434f028c2deSBALATON Zoltan .class_init = vt82c686b_superio_class_init, 435f028c2deSBALATON Zoltan }; 436f028c2deSBALATON Zoltan 43794349bffSBALATON Zoltan 438ab74864fSBALATON Zoltan #define TYPE_VT8231_SUPERIO "vt8231-superio" 439ab74864fSBALATON Zoltan 440ab74864fSBALATON Zoltan static void vt8231_superio_cfg_write(void *opaque, hwaddr addr, 441ab74864fSBALATON Zoltan uint64_t data, unsigned size) 442ab74864fSBALATON Zoltan { 443ab74864fSBALATON Zoltan ViaSuperIOState *sc = opaque; 444ab74864fSBALATON Zoltan uint8_t idx = sc->regs[0]; 445ab74864fSBALATON Zoltan 446ab74864fSBALATON Zoltan if (addr == 0) { /* config index register */ 447ab74864fSBALATON Zoltan sc->regs[0] = data; 448ab74864fSBALATON Zoltan return; 449ab74864fSBALATON Zoltan } 450ab74864fSBALATON Zoltan 451ab74864fSBALATON Zoltan /* config data register */ 452ab74864fSBALATON Zoltan trace_via_superio_write(idx, data); 453ab74864fSBALATON Zoltan switch (idx) { 454ab74864fSBALATON Zoltan case 0x00 ... 0xdf: 455ab74864fSBALATON Zoltan case 0xe7 ... 0xef: 456ab74864fSBALATON Zoltan case 0xf0 ... 0xf1: 457ab74864fSBALATON Zoltan case 0xf5: 458ab74864fSBALATON Zoltan case 0xf8: 459ab74864fSBALATON Zoltan case 0xfd: 460ab74864fSBALATON Zoltan /* ignore write to read only registers */ 461ab74864fSBALATON Zoltan return; 462ab74864fSBALATON Zoltan default: 463ab74864fSBALATON Zoltan qemu_log_mask(LOG_UNIMP, 464ab74864fSBALATON Zoltan "via_superio_cfg: unimplemented register 0x%x\n", idx); 465ab74864fSBALATON Zoltan break; 466ab74864fSBALATON Zoltan } 467ab74864fSBALATON Zoltan sc->regs[idx] = data; 468ab74864fSBALATON Zoltan } 469ab74864fSBALATON Zoltan 470ab74864fSBALATON Zoltan static const MemoryRegionOps vt8231_superio_cfg_ops = { 471ab74864fSBALATON Zoltan .read = via_superio_cfg_read, 472ab74864fSBALATON Zoltan .write = vt8231_superio_cfg_write, 473ab74864fSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 474ab74864fSBALATON Zoltan .impl = { 475ab74864fSBALATON Zoltan .min_access_size = 1, 476ab74864fSBALATON Zoltan .max_access_size = 1, 477ab74864fSBALATON Zoltan }, 478ab74864fSBALATON Zoltan }; 479ab74864fSBALATON Zoltan 480ab74864fSBALATON Zoltan static void vt8231_superio_reset(DeviceState *dev) 481ab74864fSBALATON Zoltan { 482ab74864fSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(dev); 483ab74864fSBALATON Zoltan 484ab74864fSBALATON Zoltan memset(s->regs, 0, sizeof(s->regs)); 485ab74864fSBALATON Zoltan /* Device ID */ 486ab74864fSBALATON Zoltan s->regs[0xf0] = 0x3c; 487ab74864fSBALATON Zoltan /* Device revision */ 488ab74864fSBALATON Zoltan s->regs[0xf1] = 0x01; 489ab74864fSBALATON Zoltan /* Function select - all disabled */ 490ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf2, 1); 491ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0x03, 1); 492ab74864fSBALATON Zoltan /* Serial port base addr */ 493ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf4, 1); 494ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xfe, 1); 495ab74864fSBALATON Zoltan /* Parallel port base addr */ 496ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf6, 1); 497ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xde, 1); 498ab74864fSBALATON Zoltan /* Floppy ctrl base addr */ 499ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf7, 1); 500ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xfc, 1); 501ab74864fSBALATON Zoltan 502ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0, 1); 503ab74864fSBALATON Zoltan } 504ab74864fSBALATON Zoltan 505ab74864fSBALATON Zoltan static void vt8231_superio_init(Object *obj) 506ab74864fSBALATON Zoltan { 507ab74864fSBALATON Zoltan VIA_SUPERIO(obj)->io_ops = &vt8231_superio_cfg_ops; 508ab74864fSBALATON Zoltan } 509ab74864fSBALATON Zoltan 510ab74864fSBALATON Zoltan static uint16_t vt8231_superio_serial_iobase(ISASuperIODevice *sio, 511ab74864fSBALATON Zoltan uint8_t index) 512ab74864fSBALATON Zoltan { 513ab74864fSBALATON Zoltan return 0x2f8; /* FIXME: This should be settable via registers f2-f4 */ 514ab74864fSBALATON Zoltan } 515ab74864fSBALATON Zoltan 516ab74864fSBALATON Zoltan static void vt8231_superio_class_init(ObjectClass *klass, void *data) 517ab74864fSBALATON Zoltan { 518ab74864fSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 519ab74864fSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 520ab74864fSBALATON Zoltan 521ab74864fSBALATON Zoltan dc->reset = vt8231_superio_reset; 522ab74864fSBALATON Zoltan sc->serial.count = 1; 523ab74864fSBALATON Zoltan sc->serial.get_iobase = vt8231_superio_serial_iobase; 524ab74864fSBALATON Zoltan sc->parallel.count = 1; 525ab74864fSBALATON Zoltan sc->ide.count = 0; /* emulated by via-ide */ 526ab74864fSBALATON Zoltan sc->floppy.count = 1; 527ab74864fSBALATON Zoltan } 528ab74864fSBALATON Zoltan 529ab74864fSBALATON Zoltan static const TypeInfo vt8231_superio_info = { 530ab74864fSBALATON Zoltan .name = TYPE_VT8231_SUPERIO, 531ab74864fSBALATON Zoltan .parent = TYPE_VIA_SUPERIO, 532ab74864fSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 533ab74864fSBALATON Zoltan .instance_init = vt8231_superio_init, 534ab74864fSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 535ab74864fSBALATON Zoltan .class_init = vt8231_superio_class_init, 536ab74864fSBALATON Zoltan }; 537ab74864fSBALATON Zoltan 538ab74864fSBALATON Zoltan 5392e84e107SBALATON Zoltan #define TYPE_VIA_ISA "via-isa" 5402e84e107SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaISAState, VIA_ISA) 54194349bffSBALATON Zoltan 5422e84e107SBALATON Zoltan struct ViaISAState { 54394349bffSBALATON Zoltan PCIDevice dev; 5443dc31cb8SBALATON Zoltan qemu_irq cpu_intr; 545a4d65b70SBALATON Zoltan qemu_irq *isa_irqs; 5468e4022a8SBernhard Beschow ViaSuperIOState via_sio; 54794349bffSBALATON Zoltan }; 54894349bffSBALATON Zoltan 5492e84e107SBALATON Zoltan static const VMStateDescription vmstate_via = { 5502e84e107SBALATON Zoltan .name = "via-isa", 5512e84e107SBALATON Zoltan .version_id = 1, 5522e84e107SBALATON Zoltan .minimum_version_id = 1, 5532e84e107SBALATON Zoltan .fields = (VMStateField[]) { 5542e84e107SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaISAState), 5552e84e107SBALATON Zoltan VMSTATE_END_OF_LIST() 5562e84e107SBALATON Zoltan } 5572e84e107SBALATON Zoltan }; 5582e84e107SBALATON Zoltan 5592e84e107SBALATON Zoltan static const TypeInfo via_isa_info = { 5602e84e107SBALATON Zoltan .name = TYPE_VIA_ISA, 5612e84e107SBALATON Zoltan .parent = TYPE_PCI_DEVICE, 5622e84e107SBALATON Zoltan .instance_size = sizeof(ViaISAState), 5632e84e107SBALATON Zoltan .abstract = true, 5642e84e107SBALATON Zoltan .interfaces = (InterfaceInfo[]) { 5652e84e107SBALATON Zoltan { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 5662e84e107SBALATON Zoltan { }, 5672e84e107SBALATON Zoltan }, 56894349bffSBALATON Zoltan }; 56994349bffSBALATON Zoltan 570a4d65b70SBALATON Zoltan void via_isa_set_irq(PCIDevice *d, int n, int level) 571a4d65b70SBALATON Zoltan { 572a4d65b70SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 573a4d65b70SBALATON Zoltan qemu_set_irq(s->isa_irqs[n], level); 574a4d65b70SBALATON Zoltan } 575a4d65b70SBALATON Zoltan 5763dc31cb8SBALATON Zoltan static void via_isa_request_i8259_irq(void *opaque, int irq, int level) 5773dc31cb8SBALATON Zoltan { 5782e84e107SBALATON Zoltan ViaISAState *s = opaque; 5793dc31cb8SBALATON Zoltan qemu_set_irq(s->cpu_intr, level); 5803dc31cb8SBALATON Zoltan } 5813dc31cb8SBALATON Zoltan 5823a2f166fSBALATON Zoltan static void via_isa_realize(PCIDevice *d, Error **errp) 5833a2f166fSBALATON Zoltan { 5843a2f166fSBALATON Zoltan ViaISAState *s = VIA_ISA(d); 5853a2f166fSBALATON Zoltan DeviceState *dev = DEVICE(d); 5863a2f166fSBALATON Zoltan qemu_irq *isa_irq; 587*91ba92d1SBernhard Beschow ISABus *isa_bus; 5883a2f166fSBALATON Zoltan int i; 5893a2f166fSBALATON Zoltan 5903a2f166fSBALATON Zoltan qdev_init_gpio_out(dev, &s->cpu_intr, 1); 5913a2f166fSBALATON Zoltan isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); 592*91ba92d1SBernhard Beschow isa_bus = isa_bus_new(dev, get_system_memory(), pci_address_space_io(d), 5933a2f166fSBALATON Zoltan &error_fatal); 594*91ba92d1SBernhard Beschow s->isa_irqs = i8259_init(isa_bus, *isa_irq); 595*91ba92d1SBernhard Beschow isa_bus_irqs(isa_bus, s->isa_irqs); 596*91ba92d1SBernhard Beschow i8254_pit_init(isa_bus, 0x40, 0, NULL); 597*91ba92d1SBernhard Beschow i8257_dma_init(isa_bus, 0); 598*91ba92d1SBernhard Beschow mc146818_rtc_init(isa_bus, 2000, NULL); 5993a2f166fSBALATON Zoltan 6003a2f166fSBALATON Zoltan for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) { 6013a2f166fSBALATON Zoltan if (i < PCI_COMMAND || i >= PCI_REVISION_ID) { 6023a2f166fSBALATON Zoltan d->wmask[i] = 0; 6033a2f166fSBALATON Zoltan } 6043a2f166fSBALATON Zoltan } 6058e4022a8SBernhard Beschow 6068e4022a8SBernhard Beschow /* Super I/O */ 607*91ba92d1SBernhard Beschow if (!qdev_realize(DEVICE(&s->via_sio), BUS(isa_bus), errp)) { 6088e4022a8SBernhard Beschow return; 6098e4022a8SBernhard Beschow } 6103a2f166fSBALATON Zoltan } 6113a2f166fSBALATON Zoltan 6122e84e107SBALATON Zoltan /* TYPE_VT82C686B_ISA */ 6132e84e107SBALATON Zoltan 61494349bffSBALATON Zoltan static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, 61594349bffSBALATON Zoltan uint32_t val, int len) 61694349bffSBALATON Zoltan { 6172e84e107SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 61894349bffSBALATON Zoltan 61994349bffSBALATON Zoltan trace_via_isa_write(addr, val, len); 62094349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 62194349bffSBALATON Zoltan if (addr == 0x85) { 62294349bffSBALATON Zoltan /* BIT(1): enable or disable superio config io ports */ 6238e4022a8SBernhard Beschow via_superio_io_enable(&s->via_sio, val & BIT(1)); 62494349bffSBALATON Zoltan } 62594349bffSBALATON Zoltan } 62694349bffSBALATON Zoltan 62794349bffSBALATON Zoltan static void vt82c686b_isa_reset(DeviceState *dev) 62894349bffSBALATON Zoltan { 6292e84e107SBALATON Zoltan ViaISAState *s = VIA_ISA(dev); 63094349bffSBALATON Zoltan uint8_t *pci_conf = s->dev.config; 63194349bffSBALATON Zoltan 63294349bffSBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 63394349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 63494349bffSBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 63594349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 63694349bffSBALATON Zoltan 63794349bffSBALATON Zoltan pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ 63894349bffSBALATON Zoltan pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ 63994349bffSBALATON Zoltan pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ 64094349bffSBALATON Zoltan pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ 64194349bffSBALATON Zoltan pci_conf[0x59] = 0x04; 64294349bffSBALATON Zoltan pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ 64394349bffSBALATON Zoltan pci_conf[0x5f] = 0x04; 64494349bffSBALATON Zoltan pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ 64594349bffSBALATON Zoltan } 64694349bffSBALATON Zoltan 6478e4022a8SBernhard Beschow static void vt82c686b_init(Object *obj) 64847934d0aSPaolo Bonzini { 6498e4022a8SBernhard Beschow ViaISAState *s = VIA_ISA(obj); 65047934d0aSPaolo Bonzini 6518e4022a8SBernhard Beschow object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT82C686B_SUPERIO); 65247934d0aSPaolo Bonzini } 65347934d0aSPaolo Bonzini 6542e84e107SBALATON Zoltan static void vt82c686b_class_init(ObjectClass *klass, void *data) 65547934d0aSPaolo Bonzini { 65647934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 65747934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 65847934d0aSPaolo Bonzini 6598e4022a8SBernhard Beschow k->realize = via_isa_realize; 66047934d0aSPaolo Bonzini k->config_write = vt82c686b_write_config; 66147934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 6622e84e107SBALATON Zoltan k->device_id = PCI_DEVICE_ID_VIA_82C686B_ISA; 66347934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_ISA; 66447934d0aSPaolo Bonzini k->revision = 0x40; 6659dc1a769SPhilippe Mathieu-Daudé dc->reset = vt82c686b_isa_reset; 66647934d0aSPaolo Bonzini dc->desc = "ISA bridge"; 66747934d0aSPaolo Bonzini dc->vmsd = &vmstate_via; 6682e84e107SBALATON Zoltan /* Reason: part of VIA VT82C686 southbridge, needs to be wired up */ 669e90f2a8cSEduardo Habkost dc->user_creatable = false; 67047934d0aSPaolo Bonzini } 67147934d0aSPaolo Bonzini 6722e84e107SBALATON Zoltan static const TypeInfo vt82c686b_isa_info = { 6730f798461SBALATON Zoltan .name = TYPE_VT82C686B_ISA, 6742e84e107SBALATON Zoltan .parent = TYPE_VIA_ISA, 6752e84e107SBALATON Zoltan .instance_size = sizeof(ViaISAState), 6768e4022a8SBernhard Beschow .instance_init = vt82c686b_init, 6772e84e107SBALATON Zoltan .class_init = vt82c686b_class_init, 67847934d0aSPaolo Bonzini }; 67947934d0aSPaolo Bonzini 680f9f0c9e2SBALATON Zoltan /* TYPE_VT8231_ISA */ 68194349bffSBALATON Zoltan 682f9f0c9e2SBALATON Zoltan static void vt8231_write_config(PCIDevice *d, uint32_t addr, 683f9f0c9e2SBALATON Zoltan uint32_t val, int len) 68498cf824bSPhilippe Mathieu-Daudé { 685f9f0c9e2SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 68698cf824bSPhilippe Mathieu-Daudé 687f9f0c9e2SBALATON Zoltan trace_via_isa_write(addr, val, len); 688f9f0c9e2SBALATON Zoltan pci_default_write_config(d, addr, val, len); 689f9f0c9e2SBALATON Zoltan if (addr == 0x50) { 690f9f0c9e2SBALATON Zoltan /* BIT(2): enable or disable superio config io ports */ 6918e4022a8SBernhard Beschow via_superio_io_enable(&s->via_sio, val & BIT(2)); 692f9f0c9e2SBALATON Zoltan } 69398cf824bSPhilippe Mathieu-Daudé } 69498cf824bSPhilippe Mathieu-Daudé 695f9f0c9e2SBALATON Zoltan static void vt8231_isa_reset(DeviceState *dev) 696f9f0c9e2SBALATON Zoltan { 697f9f0c9e2SBALATON Zoltan ViaISAState *s = VIA_ISA(dev); 698f9f0c9e2SBALATON Zoltan uint8_t *pci_conf = s->dev.config; 699f9f0c9e2SBALATON Zoltan 700f9f0c9e2SBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 701f9f0c9e2SBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 702f9f0c9e2SBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 703f9f0c9e2SBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 704f9f0c9e2SBALATON Zoltan 705f9f0c9e2SBALATON Zoltan pci_conf[0x58] = 0x40; /* Miscellaneous Control 0 */ 706f9f0c9e2SBALATON Zoltan pci_conf[0x67] = 0x08; /* Fast IR Config */ 707f9f0c9e2SBALATON Zoltan pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */ 708f9f0c9e2SBALATON Zoltan } 709f9f0c9e2SBALATON Zoltan 7108e4022a8SBernhard Beschow static void vt8231_init(Object *obj) 711f9f0c9e2SBALATON Zoltan { 7128e4022a8SBernhard Beschow ViaISAState *s = VIA_ISA(obj); 713f9f0c9e2SBALATON Zoltan 7148e4022a8SBernhard Beschow object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT8231_SUPERIO); 715f9f0c9e2SBALATON Zoltan } 716f9f0c9e2SBALATON Zoltan 717f9f0c9e2SBALATON Zoltan static void vt8231_class_init(ObjectClass *klass, void *data) 718f9f0c9e2SBALATON Zoltan { 719f9f0c9e2SBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 720f9f0c9e2SBALATON Zoltan PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 721f9f0c9e2SBALATON Zoltan 7228e4022a8SBernhard Beschow k->realize = via_isa_realize; 723f9f0c9e2SBALATON Zoltan k->config_write = vt8231_write_config; 724f9f0c9e2SBALATON Zoltan k->vendor_id = PCI_VENDOR_ID_VIA; 725f9f0c9e2SBALATON Zoltan k->device_id = PCI_DEVICE_ID_VIA_8231_ISA; 726f9f0c9e2SBALATON Zoltan k->class_id = PCI_CLASS_BRIDGE_ISA; 727f9f0c9e2SBALATON Zoltan k->revision = 0x10; 728f9f0c9e2SBALATON Zoltan dc->reset = vt8231_isa_reset; 729f9f0c9e2SBALATON Zoltan dc->desc = "ISA bridge"; 730f9f0c9e2SBALATON Zoltan dc->vmsd = &vmstate_via; 731f9f0c9e2SBALATON Zoltan /* Reason: part of VIA VT8231 southbridge, needs to be wired up */ 732f9f0c9e2SBALATON Zoltan dc->user_creatable = false; 733f9f0c9e2SBALATON Zoltan } 734f9f0c9e2SBALATON Zoltan 735f9f0c9e2SBALATON Zoltan static const TypeInfo vt8231_isa_info = { 736f9f0c9e2SBALATON Zoltan .name = TYPE_VT8231_ISA, 737f9f0c9e2SBALATON Zoltan .parent = TYPE_VIA_ISA, 738f9f0c9e2SBALATON Zoltan .instance_size = sizeof(ViaISAState), 7398e4022a8SBernhard Beschow .instance_init = vt8231_init, 740f9f0c9e2SBALATON Zoltan .class_init = vt8231_class_init, 74198cf824bSPhilippe Mathieu-Daudé }; 74298cf824bSPhilippe Mathieu-Daudé 74394349bffSBALATON Zoltan 74447934d0aSPaolo Bonzini static void vt82c686b_register_types(void) 74547934d0aSPaolo Bonzini { 74647934d0aSPaolo Bonzini type_register_static(&via_pm_info); 747e1a69736SBALATON Zoltan type_register_static(&vt82c686b_pm_info); 748e1a69736SBALATON Zoltan type_register_static(&vt8231_pm_info); 74994349bffSBALATON Zoltan type_register_static(&via_superio_info); 750f028c2deSBALATON Zoltan type_register_static(&vt82c686b_superio_info); 751ab74864fSBALATON Zoltan type_register_static(&vt8231_superio_info); 7522e84e107SBALATON Zoltan type_register_static(&via_isa_info); 7532e84e107SBALATON Zoltan type_register_static(&vt82c686b_isa_info); 754f9f0c9e2SBALATON Zoltan type_register_static(&vt8231_isa_info); 75547934d0aSPaolo Bonzini } 75647934d0aSPaolo Bonzini 75747934d0aSPaolo Bonzini type_init(vt82c686b_register_types) 758