147934d0aSPaolo Bonzini /* 247934d0aSPaolo Bonzini * VT82C686B south bridge support 347934d0aSPaolo Bonzini * 447934d0aSPaolo Bonzini * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 547934d0aSPaolo Bonzini * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 647934d0aSPaolo Bonzini * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 747934d0aSPaolo Bonzini * This code is licensed under the GNU GPL v2. 847934d0aSPaolo Bonzini * 947934d0aSPaolo Bonzini * Contributions after 2012-01-13 are licensed under the terms of the 1047934d0aSPaolo Bonzini * GNU GPL, version 2 or (at your option) any later version. 11f9f0c9e2SBALATON Zoltan * 12f9f0c9e2SBALATON Zoltan * VT8231 south bridge support and general clean up to allow it 13f9f0c9e2SBALATON Zoltan * Copyright (c) 2018-2020 BALATON Zoltan 1447934d0aSPaolo Bonzini */ 1547934d0aSPaolo Bonzini 160430891cSPeter Maydell #include "qemu/osdep.h" 1747934d0aSPaolo Bonzini #include "hw/isa/vt82c686.h" 1847934d0aSPaolo Bonzini #include "hw/pci/pci.h" 19a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 20*9eb6abbfSBernhard Beschow #include "hw/ide/pci.h" 2147934d0aSPaolo Bonzini #include "hw/isa/isa.h" 2298cf824bSPhilippe Mathieu-Daudé #include "hw/isa/superio.h" 233dc31cb8SBALATON Zoltan #include "hw/intc/i8259.h" 243dc31cb8SBALATON Zoltan #include "hw/irq.h" 253dc31cb8SBALATON Zoltan #include "hw/dma/i8257.h" 263dc31cb8SBALATON Zoltan #include "hw/timer/i8254.h" 273dc31cb8SBALATON Zoltan #include "hw/rtc/mc146818rtc.h" 28d6454270SMarkus Armbruster #include "migration/vmstate.h" 2947934d0aSPaolo Bonzini #include "hw/isa/apm.h" 3047934d0aSPaolo Bonzini #include "hw/acpi/acpi.h" 3147934d0aSPaolo Bonzini #include "hw/i2c/pm_smbus.h" 329307d06dSMarkus Armbruster #include "qapi/error.h" 332c4c556eSBALATON Zoltan #include "qemu/log.h" 340b8fa32fSMarkus Armbruster #include "qemu/module.h" 35911629e6SBALATON Zoltan #include "qemu/range.h" 3647934d0aSPaolo Bonzini #include "qemu/timer.h" 37ff413a1fSBALATON Zoltan #include "trace.h" 3847934d0aSPaolo Bonzini 39e1a69736SBALATON Zoltan #define TYPE_VIA_PM "via-pm" 40e1a69736SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaPMState, VIA_PM) 4147934d0aSPaolo Bonzini 42e1a69736SBALATON Zoltan struct ViaPMState { 4347934d0aSPaolo Bonzini PCIDevice dev; 4447934d0aSPaolo Bonzini MemoryRegion io; 4547934d0aSPaolo Bonzini ACPIREGS ar; 4647934d0aSPaolo Bonzini APMState apm; 4747934d0aSPaolo Bonzini PMSMBus smb; 48db1015e9SEduardo Habkost }; 4947934d0aSPaolo Bonzini 50e1a69736SBALATON Zoltan static void pm_io_space_update(ViaPMState *s) 5147934d0aSPaolo Bonzini { 523ab1eea6SBALATON Zoltan uint32_t pmbase = pci_get_long(s->dev.config + 0x48) & 0xff80UL; 5347934d0aSPaolo Bonzini 5447934d0aSPaolo Bonzini memory_region_transaction_begin(); 553ab1eea6SBALATON Zoltan memory_region_set_address(&s->io, pmbase); 563ab1eea6SBALATON Zoltan memory_region_set_enabled(&s->io, s->dev.config[0x41] & BIT(7)); 5747934d0aSPaolo Bonzini memory_region_transaction_commit(); 5847934d0aSPaolo Bonzini } 5947934d0aSPaolo Bonzini 60e1a69736SBALATON Zoltan static void smb_io_space_update(ViaPMState *s) 61911629e6SBALATON Zoltan { 62911629e6SBALATON Zoltan uint32_t smbase = pci_get_long(s->dev.config + 0x90) & 0xfff0UL; 63911629e6SBALATON Zoltan 64911629e6SBALATON Zoltan memory_region_transaction_begin(); 65911629e6SBALATON Zoltan memory_region_set_address(&s->smb.io, smbase); 66911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & BIT(0)); 67911629e6SBALATON Zoltan memory_region_transaction_commit(); 68911629e6SBALATON Zoltan } 69911629e6SBALATON Zoltan 7047934d0aSPaolo Bonzini static int vmstate_acpi_post_load(void *opaque, int version_id) 7147934d0aSPaolo Bonzini { 72e1a69736SBALATON Zoltan ViaPMState *s = opaque; 7347934d0aSPaolo Bonzini 7447934d0aSPaolo Bonzini pm_io_space_update(s); 75911629e6SBALATON Zoltan smb_io_space_update(s); 7647934d0aSPaolo Bonzini return 0; 7747934d0aSPaolo Bonzini } 7847934d0aSPaolo Bonzini 7947934d0aSPaolo Bonzini static const VMStateDescription vmstate_acpi = { 8047934d0aSPaolo Bonzini .name = "vt82c686b_pm", 8147934d0aSPaolo Bonzini .version_id = 1, 8247934d0aSPaolo Bonzini .minimum_version_id = 1, 8347934d0aSPaolo Bonzini .post_load = vmstate_acpi_post_load, 8447934d0aSPaolo Bonzini .fields = (VMStateField[]) { 85e1a69736SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaPMState), 86e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.sts, ViaPMState), 87e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.en, ViaPMState), 88e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.cnt.cnt, ViaPMState), 89e1a69736SBALATON Zoltan VMSTATE_STRUCT(apm, ViaPMState, 0, vmstate_apm, APMState), 90e1a69736SBALATON Zoltan VMSTATE_TIMER_PTR(ar.tmr.timer, ViaPMState), 91e1a69736SBALATON Zoltan VMSTATE_INT64(ar.tmr.overflow_time, ViaPMState), 9247934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 9347934d0aSPaolo Bonzini } 9447934d0aSPaolo Bonzini }; 9547934d0aSPaolo Bonzini 9694349bffSBALATON Zoltan static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) 9794349bffSBALATON Zoltan { 98e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 99911629e6SBALATON Zoltan 10094349bffSBALATON Zoltan trace_via_pm_write(addr, val, len); 10194349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 1023ab1eea6SBALATON Zoltan if (ranges_overlap(addr, len, 0x48, 4)) { 1033ab1eea6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x48); 1043ab1eea6SBALATON Zoltan pci_set_long(s->dev.config + 0x48, (v & 0xff80UL) | 1); 1053ab1eea6SBALATON Zoltan } 1063ab1eea6SBALATON Zoltan if (range_covers_byte(addr, len, 0x41)) { 1073ab1eea6SBALATON Zoltan pm_io_space_update(s); 1083ab1eea6SBALATON Zoltan } 109911629e6SBALATON Zoltan if (ranges_overlap(addr, len, 0x90, 4)) { 110911629e6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x90); 111911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, (v & 0xfff0UL) | 1); 112911629e6SBALATON Zoltan } 113911629e6SBALATON Zoltan if (range_covers_byte(addr, len, 0xd2)) { 114911629e6SBALATON Zoltan s->dev.config[0xd2] &= 0xf; 115911629e6SBALATON Zoltan smb_io_space_update(s); 116911629e6SBALATON Zoltan } 11794349bffSBALATON Zoltan } 11894349bffSBALATON Zoltan 11935e360edSBALATON Zoltan static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size) 12035e360edSBALATON Zoltan { 12135e360edSBALATON Zoltan trace_via_pm_io_write(addr, data, size); 12235e360edSBALATON Zoltan } 12335e360edSBALATON Zoltan 12435e360edSBALATON Zoltan static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size) 12535e360edSBALATON Zoltan { 12635e360edSBALATON Zoltan trace_via_pm_io_read(addr, 0, size); 12735e360edSBALATON Zoltan return 0; 12835e360edSBALATON Zoltan } 12935e360edSBALATON Zoltan 13035e360edSBALATON Zoltan static const MemoryRegionOps pm_io_ops = { 13135e360edSBALATON Zoltan .read = pm_io_read, 13235e360edSBALATON Zoltan .write = pm_io_write, 13335e360edSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 13435e360edSBALATON Zoltan .impl = { 13535e360edSBALATON Zoltan .min_access_size = 1, 13635e360edSBALATON Zoltan .max_access_size = 1, 13735e360edSBALATON Zoltan }, 13835e360edSBALATON Zoltan }; 13935e360edSBALATON Zoltan 140e1a69736SBALATON Zoltan static void pm_update_sci(ViaPMState *s) 14194349bffSBALATON Zoltan { 14294349bffSBALATON Zoltan int sci_level, pmsts; 14394349bffSBALATON Zoltan 14494349bffSBALATON Zoltan pmsts = acpi_pm1_evt_get_sts(&s->ar); 14594349bffSBALATON Zoltan sci_level = (((pmsts & s->ar.pm1.evt.en) & 14694349bffSBALATON Zoltan (ACPI_BITMASK_RT_CLOCK_ENABLE | 14794349bffSBALATON Zoltan ACPI_BITMASK_POWER_BUTTON_ENABLE | 14894349bffSBALATON Zoltan ACPI_BITMASK_GLOBAL_LOCK_ENABLE | 14994349bffSBALATON Zoltan ACPI_BITMASK_TIMER_ENABLE)) != 0); 1500fae92a3SIsaku Yamahata if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) { 1510fae92a3SIsaku Yamahata /* 1520fae92a3SIsaku Yamahata * FIXME: 1530fae92a3SIsaku Yamahata * Fix device model that realizes this PM device and remove 1540fae92a3SIsaku Yamahata * this work around. 1550fae92a3SIsaku Yamahata * The device model should wire SCI and setup 1560fae92a3SIsaku Yamahata * PCI_INTERRUPT_PIN properly. 1570fae92a3SIsaku Yamahata * If PIN# = 0(interrupt pin isn't used), don't raise SCI as 1580fae92a3SIsaku Yamahata * work around. 1590fae92a3SIsaku Yamahata */ 16094349bffSBALATON Zoltan pci_set_irq(&s->dev, sci_level); 1610fae92a3SIsaku Yamahata } 16294349bffSBALATON Zoltan /* schedule a timer interruption if needed */ 16394349bffSBALATON Zoltan acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 16494349bffSBALATON Zoltan !(pmsts & ACPI_BITMASK_TIMER_STATUS)); 16594349bffSBALATON Zoltan } 16694349bffSBALATON Zoltan 16794349bffSBALATON Zoltan static void pm_tmr_timer(ACPIREGS *ar) 16894349bffSBALATON Zoltan { 169e1a69736SBALATON Zoltan ViaPMState *s = container_of(ar, ViaPMState, ar); 17094349bffSBALATON Zoltan pm_update_sci(s); 17194349bffSBALATON Zoltan } 17294349bffSBALATON Zoltan 173e1a69736SBALATON Zoltan static void via_pm_reset(DeviceState *d) 174911629e6SBALATON Zoltan { 175e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 176911629e6SBALATON Zoltan 1779af8e529SBALATON Zoltan memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, 1789af8e529SBALATON Zoltan PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); 1799af8e529SBALATON Zoltan /* Power Management IO base */ 1809af8e529SBALATON Zoltan pci_set_long(s->dev.config + 0x48, 1); 181911629e6SBALATON Zoltan /* SMBus IO base */ 182911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, 1); 183911629e6SBALATON Zoltan 18444421c60SIsaku Yamahata acpi_pm1_evt_reset(&s->ar); 18544421c60SIsaku Yamahata acpi_pm1_cnt_reset(&s->ar); 18644421c60SIsaku Yamahata acpi_pm_tmr_reset(&s->ar); 18744421c60SIsaku Yamahata pm_update_sci(s); 18844421c60SIsaku Yamahata 1893ab1eea6SBALATON Zoltan pm_io_space_update(s); 190911629e6SBALATON Zoltan smb_io_space_update(s); 191911629e6SBALATON Zoltan } 192911629e6SBALATON Zoltan 193e1a69736SBALATON Zoltan static void via_pm_realize(PCIDevice *dev, Error **errp) 19447934d0aSPaolo Bonzini { 195e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(dev); 19647934d0aSPaolo Bonzini 1973ab1eea6SBALATON Zoltan pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | 19847934d0aSPaolo Bonzini PCI_STATUS_DEVSEL_MEDIUM); 19947934d0aSPaolo Bonzini 200a30c34d2SPhilippe Mathieu-Daudé pm_smbus_init(DEVICE(s), &s->smb, false); 201911629e6SBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); 202911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, false); 20347934d0aSPaolo Bonzini 20447934d0aSPaolo Bonzini apm_init(dev, &s->apm, NULL, s); 20547934d0aSPaolo Bonzini 206e1a69736SBALATON Zoltan memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, "via-pm", 128); 20735e360edSBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); 20847934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, false); 20947934d0aSPaolo Bonzini 21047934d0aSPaolo Bonzini acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 21147934d0aSPaolo Bonzini acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 2126be8cf56SIsaku Yamahata acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2, false); 21347934d0aSPaolo Bonzini } 21447934d0aSPaolo Bonzini 215e1a69736SBALATON Zoltan typedef struct via_pm_init_info { 216e1a69736SBALATON Zoltan uint16_t device_id; 217e1a69736SBALATON Zoltan } ViaPMInitInfo; 218e1a69736SBALATON Zoltan 21947934d0aSPaolo Bonzini static void via_pm_class_init(ObjectClass *klass, void *data) 22047934d0aSPaolo Bonzini { 22147934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 22247934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 223e1a69736SBALATON Zoltan ViaPMInitInfo *info = data; 22447934d0aSPaolo Bonzini 225e1a69736SBALATON Zoltan k->realize = via_pm_realize; 22647934d0aSPaolo Bonzini k->config_write = pm_write_config; 22747934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 228e1a69736SBALATON Zoltan k->device_id = info->device_id; 22947934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_OTHER; 23047934d0aSPaolo Bonzini k->revision = 0x40; 231e1a69736SBALATON Zoltan dc->reset = via_pm_reset; 232084bf4b4SBALATON Zoltan /* Reason: part of VIA south bridge, does not exist stand alone */ 233084bf4b4SBALATON Zoltan dc->user_creatable = false; 23447934d0aSPaolo Bonzini dc->vmsd = &vmstate_acpi; 23547934d0aSPaolo Bonzini } 23647934d0aSPaolo Bonzini 23747934d0aSPaolo Bonzini static const TypeInfo via_pm_info = { 238e1a69736SBALATON Zoltan .name = TYPE_VIA_PM, 23947934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 240e1a69736SBALATON Zoltan .instance_size = sizeof(ViaPMState), 241e1a69736SBALATON Zoltan .abstract = true, 242fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 243fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 244fd3b02c8SEduardo Habkost { }, 245fd3b02c8SEduardo Habkost }, 24647934d0aSPaolo Bonzini }; 24747934d0aSPaolo Bonzini 248e1a69736SBALATON Zoltan static const ViaPMInitInfo vt82c686b_pm_init_info = { 249e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_82C686B_PM, 250e1a69736SBALATON Zoltan }; 251e1a69736SBALATON Zoltan 252e1a69736SBALATON Zoltan static const TypeInfo vt82c686b_pm_info = { 253e1a69736SBALATON Zoltan .name = TYPE_VT82C686B_PM, 254e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 255e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 256e1a69736SBALATON Zoltan .class_data = (void *)&vt82c686b_pm_init_info, 257e1a69736SBALATON Zoltan }; 258e1a69736SBALATON Zoltan 259e1a69736SBALATON Zoltan static const ViaPMInitInfo vt8231_pm_init_info = { 260e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_8231_PM, 261e1a69736SBALATON Zoltan }; 262e1a69736SBALATON Zoltan 263e1a69736SBALATON Zoltan static const TypeInfo vt8231_pm_info = { 264e1a69736SBALATON Zoltan .name = TYPE_VT8231_PM, 265e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 266e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 267e1a69736SBALATON Zoltan .class_data = (void *)&vt8231_pm_init_info, 268e1a69736SBALATON Zoltan }; 269e1a69736SBALATON Zoltan 27094349bffSBALATON Zoltan 271f028c2deSBALATON Zoltan #define TYPE_VIA_SUPERIO "via-superio" 272f028c2deSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaSuperIOState, VIA_SUPERIO) 27394349bffSBALATON Zoltan 274f028c2deSBALATON Zoltan struct ViaSuperIOState { 275f028c2deSBALATON Zoltan ISASuperIODevice superio; 276f028c2deSBALATON Zoltan uint8_t regs[0x100]; 277f028c2deSBALATON Zoltan const MemoryRegionOps *io_ops; 278f028c2deSBALATON Zoltan MemoryRegion io; 279f028c2deSBALATON Zoltan }; 280f028c2deSBALATON Zoltan 281f028c2deSBALATON Zoltan static inline void via_superio_io_enable(ViaSuperIOState *s, bool enable) 28294349bffSBALATON Zoltan { 283f028c2deSBALATON Zoltan memory_region_set_enabled(&s->io, enable); 284f028c2deSBALATON Zoltan } 285f028c2deSBALATON Zoltan 286f028c2deSBALATON Zoltan static void via_superio_realize(DeviceState *d, Error **errp) 287f028c2deSBALATON Zoltan { 288f028c2deSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(d); 289f028c2deSBALATON Zoltan ISASuperIOClass *ic = ISA_SUPERIO_GET_CLASS(s); 290f028c2deSBALATON Zoltan Error *local_err = NULL; 291f028c2deSBALATON Zoltan 292f028c2deSBALATON Zoltan assert(s->io_ops); 293f028c2deSBALATON Zoltan ic->parent_realize(d, &local_err); 294f028c2deSBALATON Zoltan if (local_err) { 295f028c2deSBALATON Zoltan error_propagate(errp, local_err); 296f028c2deSBALATON Zoltan return; 297f028c2deSBALATON Zoltan } 298f028c2deSBALATON Zoltan memory_region_init_io(&s->io, OBJECT(d), s->io_ops, s, "via-superio", 2); 299f028c2deSBALATON Zoltan memory_region_set_enabled(&s->io, false); 300f028c2deSBALATON Zoltan /* The floppy also uses 0x3f0 and 0x3f1 but this seems to work anyway */ 301f028c2deSBALATON Zoltan memory_region_add_subregion(isa_address_space_io(ISA_DEVICE(s)), 0x3f0, 302f028c2deSBALATON Zoltan &s->io); 303f028c2deSBALATON Zoltan } 304f028c2deSBALATON Zoltan 305f028c2deSBALATON Zoltan static uint64_t via_superio_cfg_read(void *opaque, hwaddr addr, unsigned size) 306f028c2deSBALATON Zoltan { 307f028c2deSBALATON Zoltan ViaSuperIOState *sc = opaque; 308f028c2deSBALATON Zoltan uint8_t idx = sc->regs[0]; 309f028c2deSBALATON Zoltan uint8_t val = sc->regs[idx]; 310f028c2deSBALATON Zoltan 311f028c2deSBALATON Zoltan if (addr == 0) { 312f028c2deSBALATON Zoltan return idx; 313f028c2deSBALATON Zoltan } 314f028c2deSBALATON Zoltan if (addr == 1 && idx == 0) { 315f028c2deSBALATON Zoltan val = 0; /* reading reg 0 where we store index value */ 316f028c2deSBALATON Zoltan } 317f028c2deSBALATON Zoltan trace_via_superio_read(idx, val); 318f028c2deSBALATON Zoltan return val; 319f028c2deSBALATON Zoltan } 320f028c2deSBALATON Zoltan 321f028c2deSBALATON Zoltan static void via_superio_class_init(ObjectClass *klass, void *data) 322f028c2deSBALATON Zoltan { 323f028c2deSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 324f028c2deSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 325f028c2deSBALATON Zoltan 326f028c2deSBALATON Zoltan sc->parent_realize = dc->realize; 327f028c2deSBALATON Zoltan dc->realize = via_superio_realize; 328f028c2deSBALATON Zoltan } 329f028c2deSBALATON Zoltan 330f028c2deSBALATON Zoltan static const TypeInfo via_superio_info = { 331f028c2deSBALATON Zoltan .name = TYPE_VIA_SUPERIO, 332f028c2deSBALATON Zoltan .parent = TYPE_ISA_SUPERIO, 333f028c2deSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 334f028c2deSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 335f028c2deSBALATON Zoltan .class_init = via_superio_class_init, 336f028c2deSBALATON Zoltan .abstract = true, 337f028c2deSBALATON Zoltan }; 338f028c2deSBALATON Zoltan 339f028c2deSBALATON Zoltan #define TYPE_VT82C686B_SUPERIO "vt82c686b-superio" 340f028c2deSBALATON Zoltan 341f028c2deSBALATON Zoltan static void vt82c686b_superio_cfg_write(void *opaque, hwaddr addr, 342f028c2deSBALATON Zoltan uint64_t data, unsigned size) 343f028c2deSBALATON Zoltan { 344f028c2deSBALATON Zoltan ViaSuperIOState *sc = opaque; 345c953bf71SBALATON Zoltan uint8_t idx = sc->regs[0]; 34694349bffSBALATON Zoltan 347cc2b4550SBALATON Zoltan if (addr == 0) { /* config index register */ 348cc2b4550SBALATON Zoltan sc->regs[0] = data; 3492b98dca9SBALATON Zoltan return; 3502b98dca9SBALATON Zoltan } 351cc2b4550SBALATON Zoltan 352cc2b4550SBALATON Zoltan /* config data register */ 353cc2b4550SBALATON Zoltan trace_via_superio_write(idx, data); 354c953bf71SBALATON Zoltan switch (idx) { 35594349bffSBALATON Zoltan case 0x00 ... 0xdf: 35694349bffSBALATON Zoltan case 0xe4: 35794349bffSBALATON Zoltan case 0xe5: 35894349bffSBALATON Zoltan case 0xe9 ... 0xed: 35994349bffSBALATON Zoltan case 0xf3: 36094349bffSBALATON Zoltan case 0xf5: 36194349bffSBALATON Zoltan case 0xf7: 36294349bffSBALATON Zoltan case 0xf9 ... 0xfb: 36394349bffSBALATON Zoltan case 0xfd ... 0xff: 364b7741b77SBALATON Zoltan /* ignore write to read only registers */ 365b7741b77SBALATON Zoltan return; 36694349bffSBALATON Zoltan /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ 36794349bffSBALATON Zoltan default: 3682c4c556eSBALATON Zoltan qemu_log_mask(LOG_UNIMP, 3692c4c556eSBALATON Zoltan "via_superio_cfg: unimplemented register 0x%x\n", idx); 37094349bffSBALATON Zoltan break; 37194349bffSBALATON Zoltan } 372cc2b4550SBALATON Zoltan sc->regs[idx] = data; 37394349bffSBALATON Zoltan } 37494349bffSBALATON Zoltan 375f028c2deSBALATON Zoltan static const MemoryRegionOps vt82c686b_superio_cfg_ops = { 376f028c2deSBALATON Zoltan .read = via_superio_cfg_read, 377f028c2deSBALATON Zoltan .write = vt82c686b_superio_cfg_write, 37894349bffSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 37994349bffSBALATON Zoltan .impl = { 38094349bffSBALATON Zoltan .min_access_size = 1, 38194349bffSBALATON Zoltan .max_access_size = 1, 38294349bffSBALATON Zoltan }, 38394349bffSBALATON Zoltan }; 38494349bffSBALATON Zoltan 385f028c2deSBALATON Zoltan static void vt82c686b_superio_reset(DeviceState *dev) 386f028c2deSBALATON Zoltan { 387f028c2deSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(dev); 38894349bffSBALATON Zoltan 389f028c2deSBALATON Zoltan memset(s->regs, 0, sizeof(s->regs)); 390f028c2deSBALATON Zoltan /* Device ID */ 391f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe0, 1); 392f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0x3c, 1); 393f028c2deSBALATON Zoltan /* Function select - all disabled */ 394f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe2, 1); 395f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0x03, 1); 396f028c2deSBALATON Zoltan /* Floppy ctrl base addr 0x3f0-7 */ 397f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe3, 1); 398f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xfc, 1); 399f028c2deSBALATON Zoltan /* Parallel port base addr 0x378-f */ 400f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe6, 1); 401f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xde, 1); 402f028c2deSBALATON Zoltan /* Serial port 1 base addr 0x3f8-f */ 403f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe7, 1); 404f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xfe, 1); 405f028c2deSBALATON Zoltan /* Serial port 2 base addr 0x2f8-f */ 406f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0xe8, 1); 407f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 1, 0xbe, 1); 40894349bffSBALATON Zoltan 409f028c2deSBALATON Zoltan vt82c686b_superio_cfg_write(s, 0, 0, 1); 410f028c2deSBALATON Zoltan } 411f028c2deSBALATON Zoltan 412f028c2deSBALATON Zoltan static void vt82c686b_superio_init(Object *obj) 413f028c2deSBALATON Zoltan { 414f028c2deSBALATON Zoltan VIA_SUPERIO(obj)->io_ops = &vt82c686b_superio_cfg_ops; 415f028c2deSBALATON Zoltan } 416f028c2deSBALATON Zoltan 417f028c2deSBALATON Zoltan static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) 418f028c2deSBALATON Zoltan { 419f028c2deSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 420f028c2deSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 421f028c2deSBALATON Zoltan 422f028c2deSBALATON Zoltan dc->reset = vt82c686b_superio_reset; 423f028c2deSBALATON Zoltan sc->serial.count = 2; 424f028c2deSBALATON Zoltan sc->parallel.count = 1; 425f028c2deSBALATON Zoltan sc->ide.count = 0; /* emulated by via-ide */ 426f028c2deSBALATON Zoltan sc->floppy.count = 1; 427f028c2deSBALATON Zoltan } 428f028c2deSBALATON Zoltan 429f028c2deSBALATON Zoltan static const TypeInfo vt82c686b_superio_info = { 430f028c2deSBALATON Zoltan .name = TYPE_VT82C686B_SUPERIO, 431f028c2deSBALATON Zoltan .parent = TYPE_VIA_SUPERIO, 432f028c2deSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 433f028c2deSBALATON Zoltan .instance_init = vt82c686b_superio_init, 434f028c2deSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 435f028c2deSBALATON Zoltan .class_init = vt82c686b_superio_class_init, 436f028c2deSBALATON Zoltan }; 437f028c2deSBALATON Zoltan 43894349bffSBALATON Zoltan 439ab74864fSBALATON Zoltan #define TYPE_VT8231_SUPERIO "vt8231-superio" 440ab74864fSBALATON Zoltan 441ab74864fSBALATON Zoltan static void vt8231_superio_cfg_write(void *opaque, hwaddr addr, 442ab74864fSBALATON Zoltan uint64_t data, unsigned size) 443ab74864fSBALATON Zoltan { 444ab74864fSBALATON Zoltan ViaSuperIOState *sc = opaque; 445ab74864fSBALATON Zoltan uint8_t idx = sc->regs[0]; 446ab74864fSBALATON Zoltan 447ab74864fSBALATON Zoltan if (addr == 0) { /* config index register */ 448ab74864fSBALATON Zoltan sc->regs[0] = data; 449ab74864fSBALATON Zoltan return; 450ab74864fSBALATON Zoltan } 451ab74864fSBALATON Zoltan 452ab74864fSBALATON Zoltan /* config data register */ 453ab74864fSBALATON Zoltan trace_via_superio_write(idx, data); 454ab74864fSBALATON Zoltan switch (idx) { 455ab74864fSBALATON Zoltan case 0x00 ... 0xdf: 456ab74864fSBALATON Zoltan case 0xe7 ... 0xef: 457ab74864fSBALATON Zoltan case 0xf0 ... 0xf1: 458ab74864fSBALATON Zoltan case 0xf5: 459ab74864fSBALATON Zoltan case 0xf8: 460ab74864fSBALATON Zoltan case 0xfd: 461ab74864fSBALATON Zoltan /* ignore write to read only registers */ 462ab74864fSBALATON Zoltan return; 463ab74864fSBALATON Zoltan default: 464ab74864fSBALATON Zoltan qemu_log_mask(LOG_UNIMP, 465ab74864fSBALATON Zoltan "via_superio_cfg: unimplemented register 0x%x\n", idx); 466ab74864fSBALATON Zoltan break; 467ab74864fSBALATON Zoltan } 468ab74864fSBALATON Zoltan sc->regs[idx] = data; 469ab74864fSBALATON Zoltan } 470ab74864fSBALATON Zoltan 471ab74864fSBALATON Zoltan static const MemoryRegionOps vt8231_superio_cfg_ops = { 472ab74864fSBALATON Zoltan .read = via_superio_cfg_read, 473ab74864fSBALATON Zoltan .write = vt8231_superio_cfg_write, 474ab74864fSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 475ab74864fSBALATON Zoltan .impl = { 476ab74864fSBALATON Zoltan .min_access_size = 1, 477ab74864fSBALATON Zoltan .max_access_size = 1, 478ab74864fSBALATON Zoltan }, 479ab74864fSBALATON Zoltan }; 480ab74864fSBALATON Zoltan 481ab74864fSBALATON Zoltan static void vt8231_superio_reset(DeviceState *dev) 482ab74864fSBALATON Zoltan { 483ab74864fSBALATON Zoltan ViaSuperIOState *s = VIA_SUPERIO(dev); 484ab74864fSBALATON Zoltan 485ab74864fSBALATON Zoltan memset(s->regs, 0, sizeof(s->regs)); 486ab74864fSBALATON Zoltan /* Device ID */ 487ab74864fSBALATON Zoltan s->regs[0xf0] = 0x3c; 488ab74864fSBALATON Zoltan /* Device revision */ 489ab74864fSBALATON Zoltan s->regs[0xf1] = 0x01; 490ab74864fSBALATON Zoltan /* Function select - all disabled */ 491ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf2, 1); 492ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0x03, 1); 493ab74864fSBALATON Zoltan /* Serial port base addr */ 494ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf4, 1); 495ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xfe, 1); 496ab74864fSBALATON Zoltan /* Parallel port base addr */ 497ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf6, 1); 498ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xde, 1); 499ab74864fSBALATON Zoltan /* Floppy ctrl base addr */ 500ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0xf7, 1); 501ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 1, 0xfc, 1); 502ab74864fSBALATON Zoltan 503ab74864fSBALATON Zoltan vt8231_superio_cfg_write(s, 0, 0, 1); 504ab74864fSBALATON Zoltan } 505ab74864fSBALATON Zoltan 506ab74864fSBALATON Zoltan static void vt8231_superio_init(Object *obj) 507ab74864fSBALATON Zoltan { 508ab74864fSBALATON Zoltan VIA_SUPERIO(obj)->io_ops = &vt8231_superio_cfg_ops; 509ab74864fSBALATON Zoltan } 510ab74864fSBALATON Zoltan 511ab74864fSBALATON Zoltan static uint16_t vt8231_superio_serial_iobase(ISASuperIODevice *sio, 512ab74864fSBALATON Zoltan uint8_t index) 513ab74864fSBALATON Zoltan { 514ab74864fSBALATON Zoltan return 0x2f8; /* FIXME: This should be settable via registers f2-f4 */ 515ab74864fSBALATON Zoltan } 516ab74864fSBALATON Zoltan 517ab74864fSBALATON Zoltan static void vt8231_superio_class_init(ObjectClass *klass, void *data) 518ab74864fSBALATON Zoltan { 519ab74864fSBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 520ab74864fSBALATON Zoltan ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 521ab74864fSBALATON Zoltan 522ab74864fSBALATON Zoltan dc->reset = vt8231_superio_reset; 523ab74864fSBALATON Zoltan sc->serial.count = 1; 524ab74864fSBALATON Zoltan sc->serial.get_iobase = vt8231_superio_serial_iobase; 525ab74864fSBALATON Zoltan sc->parallel.count = 1; 526ab74864fSBALATON Zoltan sc->ide.count = 0; /* emulated by via-ide */ 527ab74864fSBALATON Zoltan sc->floppy.count = 1; 528ab74864fSBALATON Zoltan } 529ab74864fSBALATON Zoltan 530ab74864fSBALATON Zoltan static const TypeInfo vt8231_superio_info = { 531ab74864fSBALATON Zoltan .name = TYPE_VT8231_SUPERIO, 532ab74864fSBALATON Zoltan .parent = TYPE_VIA_SUPERIO, 533ab74864fSBALATON Zoltan .instance_size = sizeof(ViaSuperIOState), 534ab74864fSBALATON Zoltan .instance_init = vt8231_superio_init, 535ab74864fSBALATON Zoltan .class_size = sizeof(ISASuperIOClass), 536ab74864fSBALATON Zoltan .class_init = vt8231_superio_class_init, 537ab74864fSBALATON Zoltan }; 538ab74864fSBALATON Zoltan 539ab74864fSBALATON Zoltan 5402e84e107SBALATON Zoltan #define TYPE_VIA_ISA "via-isa" 5412e84e107SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaISAState, VIA_ISA) 54294349bffSBALATON Zoltan 5432e84e107SBALATON Zoltan struct ViaISAState { 54494349bffSBALATON Zoltan PCIDevice dev; 5453dc31cb8SBALATON Zoltan qemu_irq cpu_intr; 546a4d65b70SBALATON Zoltan qemu_irq *isa_irqs; 5478e4022a8SBernhard Beschow ViaSuperIOState via_sio; 548*9eb6abbfSBernhard Beschow PCIIDEState ide; 54994349bffSBALATON Zoltan }; 55094349bffSBALATON Zoltan 5512e84e107SBALATON Zoltan static const VMStateDescription vmstate_via = { 5522e84e107SBALATON Zoltan .name = "via-isa", 5532e84e107SBALATON Zoltan .version_id = 1, 5542e84e107SBALATON Zoltan .minimum_version_id = 1, 5552e84e107SBALATON Zoltan .fields = (VMStateField[]) { 5562e84e107SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaISAState), 5572e84e107SBALATON Zoltan VMSTATE_END_OF_LIST() 5582e84e107SBALATON Zoltan } 5592e84e107SBALATON Zoltan }; 5602e84e107SBALATON Zoltan 561*9eb6abbfSBernhard Beschow static void via_isa_init(Object *obj) 562*9eb6abbfSBernhard Beschow { 563*9eb6abbfSBernhard Beschow ViaISAState *s = VIA_ISA(obj); 564*9eb6abbfSBernhard Beschow 565*9eb6abbfSBernhard Beschow object_initialize_child(obj, "ide", &s->ide, TYPE_VIA_IDE); 566*9eb6abbfSBernhard Beschow } 567*9eb6abbfSBernhard Beschow 5682e84e107SBALATON Zoltan static const TypeInfo via_isa_info = { 5692e84e107SBALATON Zoltan .name = TYPE_VIA_ISA, 5702e84e107SBALATON Zoltan .parent = TYPE_PCI_DEVICE, 5712e84e107SBALATON Zoltan .instance_size = sizeof(ViaISAState), 572*9eb6abbfSBernhard Beschow .instance_init = via_isa_init, 5732e84e107SBALATON Zoltan .abstract = true, 5742e84e107SBALATON Zoltan .interfaces = (InterfaceInfo[]) { 5752e84e107SBALATON Zoltan { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 5762e84e107SBALATON Zoltan { }, 5772e84e107SBALATON Zoltan }, 57894349bffSBALATON Zoltan }; 57994349bffSBALATON Zoltan 580a4d65b70SBALATON Zoltan void via_isa_set_irq(PCIDevice *d, int n, int level) 581a4d65b70SBALATON Zoltan { 582a4d65b70SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 583a4d65b70SBALATON Zoltan qemu_set_irq(s->isa_irqs[n], level); 584a4d65b70SBALATON Zoltan } 585a4d65b70SBALATON Zoltan 5863dc31cb8SBALATON Zoltan static void via_isa_request_i8259_irq(void *opaque, int irq, int level) 5873dc31cb8SBALATON Zoltan { 5882e84e107SBALATON Zoltan ViaISAState *s = opaque; 5893dc31cb8SBALATON Zoltan qemu_set_irq(s->cpu_intr, level); 5903dc31cb8SBALATON Zoltan } 5913dc31cb8SBALATON Zoltan 5923a2f166fSBALATON Zoltan static void via_isa_realize(PCIDevice *d, Error **errp) 5933a2f166fSBALATON Zoltan { 5943a2f166fSBALATON Zoltan ViaISAState *s = VIA_ISA(d); 5953a2f166fSBALATON Zoltan DeviceState *dev = DEVICE(d); 596*9eb6abbfSBernhard Beschow PCIBus *pci_bus = pci_get_bus(d); 5973a2f166fSBALATON Zoltan qemu_irq *isa_irq; 59891ba92d1SBernhard Beschow ISABus *isa_bus; 5993a2f166fSBALATON Zoltan int i; 6003a2f166fSBALATON Zoltan 6013a2f166fSBALATON Zoltan qdev_init_gpio_out(dev, &s->cpu_intr, 1); 6023a2f166fSBALATON Zoltan isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); 603dd28cc87SBernhard Beschow isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d), 604c1561d1dSBernhard Beschow errp); 605c1561d1dSBernhard Beschow 606c1561d1dSBernhard Beschow if (!isa_bus) { 607c1561d1dSBernhard Beschow return; 608c1561d1dSBernhard Beschow } 609c1561d1dSBernhard Beschow 61091ba92d1SBernhard Beschow s->isa_irqs = i8259_init(isa_bus, *isa_irq); 61191ba92d1SBernhard Beschow isa_bus_irqs(isa_bus, s->isa_irqs); 61291ba92d1SBernhard Beschow i8254_pit_init(isa_bus, 0x40, 0, NULL); 61391ba92d1SBernhard Beschow i8257_dma_init(isa_bus, 0); 61491ba92d1SBernhard Beschow mc146818_rtc_init(isa_bus, 2000, NULL); 6153a2f166fSBALATON Zoltan 6163a2f166fSBALATON Zoltan for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) { 6173a2f166fSBALATON Zoltan if (i < PCI_COMMAND || i >= PCI_REVISION_ID) { 6183a2f166fSBALATON Zoltan d->wmask[i] = 0; 6193a2f166fSBALATON Zoltan } 6203a2f166fSBALATON Zoltan } 6218e4022a8SBernhard Beschow 6228e4022a8SBernhard Beschow /* Super I/O */ 62391ba92d1SBernhard Beschow if (!qdev_realize(DEVICE(&s->via_sio), BUS(isa_bus), errp)) { 6248e4022a8SBernhard Beschow return; 6258e4022a8SBernhard Beschow } 626*9eb6abbfSBernhard Beschow 627*9eb6abbfSBernhard Beschow /* Function 1: IDE */ 628*9eb6abbfSBernhard Beschow qdev_prop_set_int32(DEVICE(&s->ide), "addr", d->devfn + 1); 629*9eb6abbfSBernhard Beschow if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) { 630*9eb6abbfSBernhard Beschow return; 631*9eb6abbfSBernhard Beschow } 6323a2f166fSBALATON Zoltan } 6333a2f166fSBALATON Zoltan 6342e84e107SBALATON Zoltan /* TYPE_VT82C686B_ISA */ 6352e84e107SBALATON Zoltan 63694349bffSBALATON Zoltan static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, 63794349bffSBALATON Zoltan uint32_t val, int len) 63894349bffSBALATON Zoltan { 6392e84e107SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 64094349bffSBALATON Zoltan 64194349bffSBALATON Zoltan trace_via_isa_write(addr, val, len); 64294349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 64394349bffSBALATON Zoltan if (addr == 0x85) { 64494349bffSBALATON Zoltan /* BIT(1): enable or disable superio config io ports */ 6458e4022a8SBernhard Beschow via_superio_io_enable(&s->via_sio, val & BIT(1)); 64694349bffSBALATON Zoltan } 64794349bffSBALATON Zoltan } 64894349bffSBALATON Zoltan 64994349bffSBALATON Zoltan static void vt82c686b_isa_reset(DeviceState *dev) 65094349bffSBALATON Zoltan { 6512e84e107SBALATON Zoltan ViaISAState *s = VIA_ISA(dev); 65294349bffSBALATON Zoltan uint8_t *pci_conf = s->dev.config; 65394349bffSBALATON Zoltan 65494349bffSBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 65594349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 65694349bffSBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 65794349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 65894349bffSBALATON Zoltan 65994349bffSBALATON Zoltan pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ 66094349bffSBALATON Zoltan pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ 66194349bffSBALATON Zoltan pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ 66294349bffSBALATON Zoltan pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ 66394349bffSBALATON Zoltan pci_conf[0x59] = 0x04; 66494349bffSBALATON Zoltan pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ 66594349bffSBALATON Zoltan pci_conf[0x5f] = 0x04; 66694349bffSBALATON Zoltan pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ 66794349bffSBALATON Zoltan } 66894349bffSBALATON Zoltan 6698e4022a8SBernhard Beschow static void vt82c686b_init(Object *obj) 67047934d0aSPaolo Bonzini { 6718e4022a8SBernhard Beschow ViaISAState *s = VIA_ISA(obj); 67247934d0aSPaolo Bonzini 6738e4022a8SBernhard Beschow object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT82C686B_SUPERIO); 67447934d0aSPaolo Bonzini } 67547934d0aSPaolo Bonzini 6762e84e107SBALATON Zoltan static void vt82c686b_class_init(ObjectClass *klass, void *data) 67747934d0aSPaolo Bonzini { 67847934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 67947934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 68047934d0aSPaolo Bonzini 6818e4022a8SBernhard Beschow k->realize = via_isa_realize; 68247934d0aSPaolo Bonzini k->config_write = vt82c686b_write_config; 68347934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 6842e84e107SBALATON Zoltan k->device_id = PCI_DEVICE_ID_VIA_82C686B_ISA; 68547934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_ISA; 68647934d0aSPaolo Bonzini k->revision = 0x40; 6879dc1a769SPhilippe Mathieu-Daudé dc->reset = vt82c686b_isa_reset; 68847934d0aSPaolo Bonzini dc->desc = "ISA bridge"; 68947934d0aSPaolo Bonzini dc->vmsd = &vmstate_via; 6902e84e107SBALATON Zoltan /* Reason: part of VIA VT82C686 southbridge, needs to be wired up */ 691e90f2a8cSEduardo Habkost dc->user_creatable = false; 69247934d0aSPaolo Bonzini } 69347934d0aSPaolo Bonzini 6942e84e107SBALATON Zoltan static const TypeInfo vt82c686b_isa_info = { 6950f798461SBALATON Zoltan .name = TYPE_VT82C686B_ISA, 6962e84e107SBALATON Zoltan .parent = TYPE_VIA_ISA, 6972e84e107SBALATON Zoltan .instance_size = sizeof(ViaISAState), 6988e4022a8SBernhard Beschow .instance_init = vt82c686b_init, 6992e84e107SBALATON Zoltan .class_init = vt82c686b_class_init, 70047934d0aSPaolo Bonzini }; 70147934d0aSPaolo Bonzini 702f9f0c9e2SBALATON Zoltan /* TYPE_VT8231_ISA */ 70394349bffSBALATON Zoltan 704f9f0c9e2SBALATON Zoltan static void vt8231_write_config(PCIDevice *d, uint32_t addr, 705f9f0c9e2SBALATON Zoltan uint32_t val, int len) 70698cf824bSPhilippe Mathieu-Daudé { 707f9f0c9e2SBALATON Zoltan ViaISAState *s = VIA_ISA(d); 70898cf824bSPhilippe Mathieu-Daudé 709f9f0c9e2SBALATON Zoltan trace_via_isa_write(addr, val, len); 710f9f0c9e2SBALATON Zoltan pci_default_write_config(d, addr, val, len); 711f9f0c9e2SBALATON Zoltan if (addr == 0x50) { 712f9f0c9e2SBALATON Zoltan /* BIT(2): enable or disable superio config io ports */ 7138e4022a8SBernhard Beschow via_superio_io_enable(&s->via_sio, val & BIT(2)); 714f9f0c9e2SBALATON Zoltan } 71598cf824bSPhilippe Mathieu-Daudé } 71698cf824bSPhilippe Mathieu-Daudé 717f9f0c9e2SBALATON Zoltan static void vt8231_isa_reset(DeviceState *dev) 718f9f0c9e2SBALATON Zoltan { 719f9f0c9e2SBALATON Zoltan ViaISAState *s = VIA_ISA(dev); 720f9f0c9e2SBALATON Zoltan uint8_t *pci_conf = s->dev.config; 721f9f0c9e2SBALATON Zoltan 722f9f0c9e2SBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 723f9f0c9e2SBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 724f9f0c9e2SBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 725f9f0c9e2SBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 726f9f0c9e2SBALATON Zoltan 727f9f0c9e2SBALATON Zoltan pci_conf[0x58] = 0x40; /* Miscellaneous Control 0 */ 728f9f0c9e2SBALATON Zoltan pci_conf[0x67] = 0x08; /* Fast IR Config */ 729f9f0c9e2SBALATON Zoltan pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */ 730f9f0c9e2SBALATON Zoltan } 731f9f0c9e2SBALATON Zoltan 7328e4022a8SBernhard Beschow static void vt8231_init(Object *obj) 733f9f0c9e2SBALATON Zoltan { 7348e4022a8SBernhard Beschow ViaISAState *s = VIA_ISA(obj); 735f9f0c9e2SBALATON Zoltan 7368e4022a8SBernhard Beschow object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT8231_SUPERIO); 737f9f0c9e2SBALATON Zoltan } 738f9f0c9e2SBALATON Zoltan 739f9f0c9e2SBALATON Zoltan static void vt8231_class_init(ObjectClass *klass, void *data) 740f9f0c9e2SBALATON Zoltan { 741f9f0c9e2SBALATON Zoltan DeviceClass *dc = DEVICE_CLASS(klass); 742f9f0c9e2SBALATON Zoltan PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 743f9f0c9e2SBALATON Zoltan 7448e4022a8SBernhard Beschow k->realize = via_isa_realize; 745f9f0c9e2SBALATON Zoltan k->config_write = vt8231_write_config; 746f9f0c9e2SBALATON Zoltan k->vendor_id = PCI_VENDOR_ID_VIA; 747f9f0c9e2SBALATON Zoltan k->device_id = PCI_DEVICE_ID_VIA_8231_ISA; 748f9f0c9e2SBALATON Zoltan k->class_id = PCI_CLASS_BRIDGE_ISA; 749f9f0c9e2SBALATON Zoltan k->revision = 0x10; 750f9f0c9e2SBALATON Zoltan dc->reset = vt8231_isa_reset; 751f9f0c9e2SBALATON Zoltan dc->desc = "ISA bridge"; 752f9f0c9e2SBALATON Zoltan dc->vmsd = &vmstate_via; 753f9f0c9e2SBALATON Zoltan /* Reason: part of VIA VT8231 southbridge, needs to be wired up */ 754f9f0c9e2SBALATON Zoltan dc->user_creatable = false; 755f9f0c9e2SBALATON Zoltan } 756f9f0c9e2SBALATON Zoltan 757f9f0c9e2SBALATON Zoltan static const TypeInfo vt8231_isa_info = { 758f9f0c9e2SBALATON Zoltan .name = TYPE_VT8231_ISA, 759f9f0c9e2SBALATON Zoltan .parent = TYPE_VIA_ISA, 760f9f0c9e2SBALATON Zoltan .instance_size = sizeof(ViaISAState), 7618e4022a8SBernhard Beschow .instance_init = vt8231_init, 762f9f0c9e2SBALATON Zoltan .class_init = vt8231_class_init, 76398cf824bSPhilippe Mathieu-Daudé }; 76498cf824bSPhilippe Mathieu-Daudé 76594349bffSBALATON Zoltan 76647934d0aSPaolo Bonzini static void vt82c686b_register_types(void) 76747934d0aSPaolo Bonzini { 76847934d0aSPaolo Bonzini type_register_static(&via_pm_info); 769e1a69736SBALATON Zoltan type_register_static(&vt82c686b_pm_info); 770e1a69736SBALATON Zoltan type_register_static(&vt8231_pm_info); 77194349bffSBALATON Zoltan type_register_static(&via_superio_info); 772f028c2deSBALATON Zoltan type_register_static(&vt82c686b_superio_info); 773ab74864fSBALATON Zoltan type_register_static(&vt8231_superio_info); 7742e84e107SBALATON Zoltan type_register_static(&via_isa_info); 7752e84e107SBALATON Zoltan type_register_static(&vt82c686b_isa_info); 776f9f0c9e2SBALATON Zoltan type_register_static(&vt8231_isa_info); 77747934d0aSPaolo Bonzini } 77847934d0aSPaolo Bonzini 77947934d0aSPaolo Bonzini type_init(vt82c686b_register_types) 780