147934d0aSPaolo Bonzini /* 247934d0aSPaolo Bonzini * VT82C686B south bridge support 347934d0aSPaolo Bonzini * 447934d0aSPaolo Bonzini * Copyright (c) 2008 yajin (yajin@vm-kernel.org) 547934d0aSPaolo Bonzini * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) 647934d0aSPaolo Bonzini * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) 747934d0aSPaolo Bonzini * This code is licensed under the GNU GPL v2. 847934d0aSPaolo Bonzini * 947934d0aSPaolo Bonzini * Contributions after 2012-01-13 are licensed under the terms of the 1047934d0aSPaolo Bonzini * GNU GPL, version 2 or (at your option) any later version. 1147934d0aSPaolo Bonzini */ 1247934d0aSPaolo Bonzini 130430891cSPeter Maydell #include "qemu/osdep.h" 1447934d0aSPaolo Bonzini #include "hw/isa/vt82c686.h" 1547934d0aSPaolo Bonzini #include "hw/pci/pci.h" 16a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 1747934d0aSPaolo Bonzini #include "hw/isa/isa.h" 1898cf824bSPhilippe Mathieu-Daudé #include "hw/isa/superio.h" 193dc31cb8SBALATON Zoltan #include "hw/intc/i8259.h" 203dc31cb8SBALATON Zoltan #include "hw/irq.h" 213dc31cb8SBALATON Zoltan #include "hw/dma/i8257.h" 223dc31cb8SBALATON Zoltan #include "hw/timer/i8254.h" 233dc31cb8SBALATON Zoltan #include "hw/rtc/mc146818rtc.h" 24d6454270SMarkus Armbruster #include "migration/vmstate.h" 2547934d0aSPaolo Bonzini #include "hw/isa/apm.h" 2647934d0aSPaolo Bonzini #include "hw/acpi/acpi.h" 2747934d0aSPaolo Bonzini #include "hw/i2c/pm_smbus.h" 289307d06dSMarkus Armbruster #include "qapi/error.h" 290b8fa32fSMarkus Armbruster #include "qemu/module.h" 30911629e6SBALATON Zoltan #include "qemu/range.h" 3147934d0aSPaolo Bonzini #include "qemu/timer.h" 3247934d0aSPaolo Bonzini #include "exec/address-spaces.h" 33ff413a1fSBALATON Zoltan #include "trace.h" 3447934d0aSPaolo Bonzini 35e1a69736SBALATON Zoltan #define TYPE_VIA_PM "via-pm" 36e1a69736SBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(ViaPMState, VIA_PM) 3747934d0aSPaolo Bonzini 38e1a69736SBALATON Zoltan struct ViaPMState { 3947934d0aSPaolo Bonzini PCIDevice dev; 4047934d0aSPaolo Bonzini MemoryRegion io; 4147934d0aSPaolo Bonzini ACPIREGS ar; 4247934d0aSPaolo Bonzini APMState apm; 4347934d0aSPaolo Bonzini PMSMBus smb; 44db1015e9SEduardo Habkost }; 4547934d0aSPaolo Bonzini 46e1a69736SBALATON Zoltan static void pm_io_space_update(ViaPMState *s) 4747934d0aSPaolo Bonzini { 483ab1eea6SBALATON Zoltan uint32_t pmbase = pci_get_long(s->dev.config + 0x48) & 0xff80UL; 4947934d0aSPaolo Bonzini 5047934d0aSPaolo Bonzini memory_region_transaction_begin(); 513ab1eea6SBALATON Zoltan memory_region_set_address(&s->io, pmbase); 523ab1eea6SBALATON Zoltan memory_region_set_enabled(&s->io, s->dev.config[0x41] & BIT(7)); 5347934d0aSPaolo Bonzini memory_region_transaction_commit(); 5447934d0aSPaolo Bonzini } 5547934d0aSPaolo Bonzini 56e1a69736SBALATON Zoltan static void smb_io_space_update(ViaPMState *s) 57911629e6SBALATON Zoltan { 58911629e6SBALATON Zoltan uint32_t smbase = pci_get_long(s->dev.config + 0x90) & 0xfff0UL; 59911629e6SBALATON Zoltan 60911629e6SBALATON Zoltan memory_region_transaction_begin(); 61911629e6SBALATON Zoltan memory_region_set_address(&s->smb.io, smbase); 62911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & BIT(0)); 63911629e6SBALATON Zoltan memory_region_transaction_commit(); 64911629e6SBALATON Zoltan } 65911629e6SBALATON Zoltan 6647934d0aSPaolo Bonzini static int vmstate_acpi_post_load(void *opaque, int version_id) 6747934d0aSPaolo Bonzini { 68e1a69736SBALATON Zoltan ViaPMState *s = opaque; 6947934d0aSPaolo Bonzini 7047934d0aSPaolo Bonzini pm_io_space_update(s); 71911629e6SBALATON Zoltan smb_io_space_update(s); 7247934d0aSPaolo Bonzini return 0; 7347934d0aSPaolo Bonzini } 7447934d0aSPaolo Bonzini 7547934d0aSPaolo Bonzini static const VMStateDescription vmstate_acpi = { 7647934d0aSPaolo Bonzini .name = "vt82c686b_pm", 7747934d0aSPaolo Bonzini .version_id = 1, 7847934d0aSPaolo Bonzini .minimum_version_id = 1, 7947934d0aSPaolo Bonzini .post_load = vmstate_acpi_post_load, 8047934d0aSPaolo Bonzini .fields = (VMStateField[]) { 81e1a69736SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, ViaPMState), 82e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.sts, ViaPMState), 83e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.evt.en, ViaPMState), 84e1a69736SBALATON Zoltan VMSTATE_UINT16(ar.pm1.cnt.cnt, ViaPMState), 85e1a69736SBALATON Zoltan VMSTATE_STRUCT(apm, ViaPMState, 0, vmstate_apm, APMState), 86e1a69736SBALATON Zoltan VMSTATE_TIMER_PTR(ar.tmr.timer, ViaPMState), 87e1a69736SBALATON Zoltan VMSTATE_INT64(ar.tmr.overflow_time, ViaPMState), 8847934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 8947934d0aSPaolo Bonzini } 9047934d0aSPaolo Bonzini }; 9147934d0aSPaolo Bonzini 9294349bffSBALATON Zoltan static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) 9394349bffSBALATON Zoltan { 94e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 95911629e6SBALATON Zoltan 9694349bffSBALATON Zoltan trace_via_pm_write(addr, val, len); 9794349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 983ab1eea6SBALATON Zoltan if (ranges_overlap(addr, len, 0x48, 4)) { 993ab1eea6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x48); 1003ab1eea6SBALATON Zoltan pci_set_long(s->dev.config + 0x48, (v & 0xff80UL) | 1); 1013ab1eea6SBALATON Zoltan } 1023ab1eea6SBALATON Zoltan if (range_covers_byte(addr, len, 0x41)) { 1033ab1eea6SBALATON Zoltan pm_io_space_update(s); 1043ab1eea6SBALATON Zoltan } 105911629e6SBALATON Zoltan if (ranges_overlap(addr, len, 0x90, 4)) { 106911629e6SBALATON Zoltan uint32_t v = pci_get_long(s->dev.config + 0x90); 107911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, (v & 0xfff0UL) | 1); 108911629e6SBALATON Zoltan } 109911629e6SBALATON Zoltan if (range_covers_byte(addr, len, 0xd2)) { 110911629e6SBALATON Zoltan s->dev.config[0xd2] &= 0xf; 111911629e6SBALATON Zoltan smb_io_space_update(s); 112911629e6SBALATON Zoltan } 11394349bffSBALATON Zoltan } 11494349bffSBALATON Zoltan 11535e360edSBALATON Zoltan static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size) 11635e360edSBALATON Zoltan { 11735e360edSBALATON Zoltan trace_via_pm_io_write(addr, data, size); 11835e360edSBALATON Zoltan } 11935e360edSBALATON Zoltan 12035e360edSBALATON Zoltan static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size) 12135e360edSBALATON Zoltan { 12235e360edSBALATON Zoltan trace_via_pm_io_read(addr, 0, size); 12335e360edSBALATON Zoltan return 0; 12435e360edSBALATON Zoltan } 12535e360edSBALATON Zoltan 12635e360edSBALATON Zoltan static const MemoryRegionOps pm_io_ops = { 12735e360edSBALATON Zoltan .read = pm_io_read, 12835e360edSBALATON Zoltan .write = pm_io_write, 12935e360edSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 13035e360edSBALATON Zoltan .impl = { 13135e360edSBALATON Zoltan .min_access_size = 1, 13235e360edSBALATON Zoltan .max_access_size = 1, 13335e360edSBALATON Zoltan }, 13435e360edSBALATON Zoltan }; 13535e360edSBALATON Zoltan 136e1a69736SBALATON Zoltan static void pm_update_sci(ViaPMState *s) 13794349bffSBALATON Zoltan { 13894349bffSBALATON Zoltan int sci_level, pmsts; 13994349bffSBALATON Zoltan 14094349bffSBALATON Zoltan pmsts = acpi_pm1_evt_get_sts(&s->ar); 14194349bffSBALATON Zoltan sci_level = (((pmsts & s->ar.pm1.evt.en) & 14294349bffSBALATON Zoltan (ACPI_BITMASK_RT_CLOCK_ENABLE | 14394349bffSBALATON Zoltan ACPI_BITMASK_POWER_BUTTON_ENABLE | 14494349bffSBALATON Zoltan ACPI_BITMASK_GLOBAL_LOCK_ENABLE | 14594349bffSBALATON Zoltan ACPI_BITMASK_TIMER_ENABLE)) != 0); 14694349bffSBALATON Zoltan pci_set_irq(&s->dev, sci_level); 14794349bffSBALATON Zoltan /* schedule a timer interruption if needed */ 14894349bffSBALATON Zoltan acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && 14994349bffSBALATON Zoltan !(pmsts & ACPI_BITMASK_TIMER_STATUS)); 15094349bffSBALATON Zoltan } 15194349bffSBALATON Zoltan 15294349bffSBALATON Zoltan static void pm_tmr_timer(ACPIREGS *ar) 15394349bffSBALATON Zoltan { 154e1a69736SBALATON Zoltan ViaPMState *s = container_of(ar, ViaPMState, ar); 15594349bffSBALATON Zoltan pm_update_sci(s); 15694349bffSBALATON Zoltan } 15794349bffSBALATON Zoltan 158e1a69736SBALATON Zoltan static void via_pm_reset(DeviceState *d) 159911629e6SBALATON Zoltan { 160e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(d); 161911629e6SBALATON Zoltan 1629af8e529SBALATON Zoltan memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, 1639af8e529SBALATON Zoltan PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); 1649af8e529SBALATON Zoltan /* Power Management IO base */ 1659af8e529SBALATON Zoltan pci_set_long(s->dev.config + 0x48, 1); 166911629e6SBALATON Zoltan /* SMBus IO base */ 167911629e6SBALATON Zoltan pci_set_long(s->dev.config + 0x90, 1); 168911629e6SBALATON Zoltan 1693ab1eea6SBALATON Zoltan pm_io_space_update(s); 170911629e6SBALATON Zoltan smb_io_space_update(s); 171911629e6SBALATON Zoltan } 172911629e6SBALATON Zoltan 173e1a69736SBALATON Zoltan static void via_pm_realize(PCIDevice *dev, Error **errp) 17447934d0aSPaolo Bonzini { 175e1a69736SBALATON Zoltan ViaPMState *s = VIA_PM(dev); 17647934d0aSPaolo Bonzini 1773ab1eea6SBALATON Zoltan pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | 17847934d0aSPaolo Bonzini PCI_STATUS_DEVSEL_MEDIUM); 17947934d0aSPaolo Bonzini 180a30c34d2SPhilippe Mathieu-Daudé pm_smbus_init(DEVICE(s), &s->smb, false); 181911629e6SBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io); 182911629e6SBALATON Zoltan memory_region_set_enabled(&s->smb.io, false); 18347934d0aSPaolo Bonzini 18447934d0aSPaolo Bonzini apm_init(dev, &s->apm, NULL, s); 18547934d0aSPaolo Bonzini 186e1a69736SBALATON Zoltan memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, "via-pm", 128); 18735e360edSBALATON Zoltan memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); 18847934d0aSPaolo Bonzini memory_region_set_enabled(&s->io, false); 18947934d0aSPaolo Bonzini 19047934d0aSPaolo Bonzini acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 19147934d0aSPaolo Bonzini acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 1929a10bbb4SLaszlo Ersek acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2); 19347934d0aSPaolo Bonzini } 19447934d0aSPaolo Bonzini 195e1a69736SBALATON Zoltan typedef struct via_pm_init_info { 196e1a69736SBALATON Zoltan uint16_t device_id; 197e1a69736SBALATON Zoltan } ViaPMInitInfo; 198e1a69736SBALATON Zoltan 19947934d0aSPaolo Bonzini static void via_pm_class_init(ObjectClass *klass, void *data) 20047934d0aSPaolo Bonzini { 20147934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 20247934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 203e1a69736SBALATON Zoltan ViaPMInitInfo *info = data; 20447934d0aSPaolo Bonzini 205e1a69736SBALATON Zoltan k->realize = via_pm_realize; 20647934d0aSPaolo Bonzini k->config_write = pm_write_config; 20747934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 208e1a69736SBALATON Zoltan k->device_id = info->device_id; 20947934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_OTHER; 21047934d0aSPaolo Bonzini k->revision = 0x40; 211e1a69736SBALATON Zoltan dc->reset = via_pm_reset; 212084bf4b4SBALATON Zoltan /* Reason: part of VIA south bridge, does not exist stand alone */ 213084bf4b4SBALATON Zoltan dc->user_creatable = false; 21447934d0aSPaolo Bonzini dc->vmsd = &vmstate_acpi; 21547934d0aSPaolo Bonzini } 21647934d0aSPaolo Bonzini 21747934d0aSPaolo Bonzini static const TypeInfo via_pm_info = { 218e1a69736SBALATON Zoltan .name = TYPE_VIA_PM, 21947934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 220e1a69736SBALATON Zoltan .instance_size = sizeof(ViaPMState), 221e1a69736SBALATON Zoltan .abstract = true, 222fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 223fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 224fd3b02c8SEduardo Habkost { }, 225fd3b02c8SEduardo Habkost }, 22647934d0aSPaolo Bonzini }; 22747934d0aSPaolo Bonzini 228e1a69736SBALATON Zoltan static const ViaPMInitInfo vt82c686b_pm_init_info = { 229e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_82C686B_PM, 230e1a69736SBALATON Zoltan }; 231e1a69736SBALATON Zoltan 232e1a69736SBALATON Zoltan static const TypeInfo vt82c686b_pm_info = { 233e1a69736SBALATON Zoltan .name = TYPE_VT82C686B_PM, 234e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 235e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 236e1a69736SBALATON Zoltan .class_data = (void *)&vt82c686b_pm_init_info, 237e1a69736SBALATON Zoltan }; 238e1a69736SBALATON Zoltan 239e1a69736SBALATON Zoltan static const ViaPMInitInfo vt8231_pm_init_info = { 240e1a69736SBALATON Zoltan .device_id = PCI_DEVICE_ID_VIA_8231_PM, 241e1a69736SBALATON Zoltan }; 242e1a69736SBALATON Zoltan 243e1a69736SBALATON Zoltan static const TypeInfo vt8231_pm_info = { 244e1a69736SBALATON Zoltan .name = TYPE_VT8231_PM, 245e1a69736SBALATON Zoltan .parent = TYPE_VIA_PM, 246e1a69736SBALATON Zoltan .class_init = via_pm_class_init, 247e1a69736SBALATON Zoltan .class_data = (void *)&vt8231_pm_init_info, 248e1a69736SBALATON Zoltan }; 249e1a69736SBALATON Zoltan 25094349bffSBALATON Zoltan 25194349bffSBALATON Zoltan typedef struct SuperIOConfig { 25294349bffSBALATON Zoltan uint8_t regs[0x100]; 25394349bffSBALATON Zoltan MemoryRegion io; 25494349bffSBALATON Zoltan } SuperIOConfig; 25594349bffSBALATON Zoltan 25694349bffSBALATON Zoltan static void superio_cfg_write(void *opaque, hwaddr addr, uint64_t data, 25794349bffSBALATON Zoltan unsigned size) 25894349bffSBALATON Zoltan { 25994349bffSBALATON Zoltan SuperIOConfig *sc = opaque; 260*c953bf71SBALATON Zoltan uint8_t idx = sc->regs[0]; 26194349bffSBALATON Zoltan 26294349bffSBALATON Zoltan if (addr == 0x3f0) { /* config index register */ 263*c953bf71SBALATON Zoltan idx = data & 0xff; 26494349bffSBALATON Zoltan } else { 26594349bffSBALATON Zoltan bool can_write = true; 26694349bffSBALATON Zoltan /* 0x3f1, config data register */ 267*c953bf71SBALATON Zoltan trace_via_superio_write(idx, data & 0xff); 268*c953bf71SBALATON Zoltan switch (idx) { 26994349bffSBALATON Zoltan case 0x00 ... 0xdf: 27094349bffSBALATON Zoltan case 0xe4: 27194349bffSBALATON Zoltan case 0xe5: 27294349bffSBALATON Zoltan case 0xe9 ... 0xed: 27394349bffSBALATON Zoltan case 0xf3: 27494349bffSBALATON Zoltan case 0xf5: 27594349bffSBALATON Zoltan case 0xf7: 27694349bffSBALATON Zoltan case 0xf9 ... 0xfb: 27794349bffSBALATON Zoltan case 0xfd ... 0xff: 27894349bffSBALATON Zoltan can_write = false; 27994349bffSBALATON Zoltan break; 28094349bffSBALATON Zoltan /* case 0xe6 ... 0xe8: Should set base port of parallel and serial */ 28194349bffSBALATON Zoltan default: 28294349bffSBALATON Zoltan break; 28394349bffSBALATON Zoltan 28494349bffSBALATON Zoltan } 28594349bffSBALATON Zoltan if (can_write) { 286*c953bf71SBALATON Zoltan sc->regs[idx] = data & 0xff; 28794349bffSBALATON Zoltan } 28894349bffSBALATON Zoltan } 28994349bffSBALATON Zoltan } 29094349bffSBALATON Zoltan 29194349bffSBALATON Zoltan static uint64_t superio_cfg_read(void *opaque, hwaddr addr, unsigned size) 29294349bffSBALATON Zoltan { 29394349bffSBALATON Zoltan SuperIOConfig *sc = opaque; 294*c953bf71SBALATON Zoltan uint8_t idx = sc->regs[0]; 295*c953bf71SBALATON Zoltan uint8_t val = sc->regs[idx]; 29694349bffSBALATON Zoltan 297*c953bf71SBALATON Zoltan if (addr == 0) { 298*c953bf71SBALATON Zoltan return idx; 299*c953bf71SBALATON Zoltan } 300*c953bf71SBALATON Zoltan if (addr == 1 && idx == 0) { 301*c953bf71SBALATON Zoltan val = 0; /* reading reg 0 where we store index value */ 302*c953bf71SBALATON Zoltan } 303*c953bf71SBALATON Zoltan trace_via_superio_read(idx, val); 30494349bffSBALATON Zoltan return val; 30594349bffSBALATON Zoltan } 30694349bffSBALATON Zoltan 30794349bffSBALATON Zoltan static const MemoryRegionOps superio_cfg_ops = { 30894349bffSBALATON Zoltan .read = superio_cfg_read, 30994349bffSBALATON Zoltan .write = superio_cfg_write, 31094349bffSBALATON Zoltan .endianness = DEVICE_NATIVE_ENDIAN, 31194349bffSBALATON Zoltan .impl = { 31294349bffSBALATON Zoltan .min_access_size = 1, 31394349bffSBALATON Zoltan .max_access_size = 1, 31494349bffSBALATON Zoltan }, 31594349bffSBALATON Zoltan }; 31694349bffSBALATON Zoltan 31794349bffSBALATON Zoltan 31894349bffSBALATON Zoltan OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA) 31994349bffSBALATON Zoltan 32094349bffSBALATON Zoltan struct VT82C686BISAState { 32194349bffSBALATON Zoltan PCIDevice dev; 3223dc31cb8SBALATON Zoltan qemu_irq cpu_intr; 32394349bffSBALATON Zoltan SuperIOConfig superio_cfg; 32494349bffSBALATON Zoltan }; 32594349bffSBALATON Zoltan 3263dc31cb8SBALATON Zoltan static void via_isa_request_i8259_irq(void *opaque, int irq, int level) 3273dc31cb8SBALATON Zoltan { 3283dc31cb8SBALATON Zoltan VT82C686BISAState *s = opaque; 3293dc31cb8SBALATON Zoltan qemu_set_irq(s->cpu_intr, level); 3303dc31cb8SBALATON Zoltan } 3313dc31cb8SBALATON Zoltan 33294349bffSBALATON Zoltan static void vt82c686b_write_config(PCIDevice *d, uint32_t addr, 33394349bffSBALATON Zoltan uint32_t val, int len) 33494349bffSBALATON Zoltan { 33594349bffSBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(d); 33694349bffSBALATON Zoltan 33794349bffSBALATON Zoltan trace_via_isa_write(addr, val, len); 33894349bffSBALATON Zoltan pci_default_write_config(d, addr, val, len); 33994349bffSBALATON Zoltan if (addr == 0x85) { 34094349bffSBALATON Zoltan /* BIT(1): enable or disable superio config io ports */ 34194349bffSBALATON Zoltan memory_region_set_enabled(&s->superio_cfg.io, val & BIT(1)); 34294349bffSBALATON Zoltan } 34394349bffSBALATON Zoltan } 34494349bffSBALATON Zoltan 34547934d0aSPaolo Bonzini static const VMStateDescription vmstate_via = { 34647934d0aSPaolo Bonzini .name = "vt82c686b", 34747934d0aSPaolo Bonzini .version_id = 1, 34847934d0aSPaolo Bonzini .minimum_version_id = 1, 34947934d0aSPaolo Bonzini .fields = (VMStateField[]) { 3500f798461SBALATON Zoltan VMSTATE_PCI_DEVICE(dev, VT82C686BISAState), 35147934d0aSPaolo Bonzini VMSTATE_END_OF_LIST() 35247934d0aSPaolo Bonzini } 35347934d0aSPaolo Bonzini }; 35447934d0aSPaolo Bonzini 35594349bffSBALATON Zoltan static void vt82c686b_isa_reset(DeviceState *dev) 35694349bffSBALATON Zoltan { 35794349bffSBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(dev); 35894349bffSBALATON Zoltan uint8_t *pci_conf = s->dev.config; 35994349bffSBALATON Zoltan 36094349bffSBALATON Zoltan pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); 36194349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 36294349bffSBALATON Zoltan PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); 36394349bffSBALATON Zoltan pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); 36494349bffSBALATON Zoltan 36594349bffSBALATON Zoltan pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ 36694349bffSBALATON Zoltan pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ 36794349bffSBALATON Zoltan pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ 36894349bffSBALATON Zoltan pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ 36994349bffSBALATON Zoltan pci_conf[0x59] = 0x04; 37094349bffSBALATON Zoltan pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ 37194349bffSBALATON Zoltan pci_conf[0x5f] = 0x04; 37294349bffSBALATON Zoltan pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ 37394349bffSBALATON Zoltan 37494349bffSBALATON Zoltan s->superio_cfg.regs[0xe0] = 0x3c; /* Device ID */ 37594349bffSBALATON Zoltan s->superio_cfg.regs[0xe2] = 0x03; /* Function select */ 37694349bffSBALATON Zoltan s->superio_cfg.regs[0xe3] = 0xfc; /* Floppy ctrl base addr */ 37794349bffSBALATON Zoltan s->superio_cfg.regs[0xe6] = 0xde; /* Parallel port base addr */ 37894349bffSBALATON Zoltan s->superio_cfg.regs[0xe7] = 0xfe; /* Serial port 1 base addr */ 37994349bffSBALATON Zoltan s->superio_cfg.regs[0xe8] = 0xbe; /* Serial port 2 base addr */ 38094349bffSBALATON Zoltan } 38194349bffSBALATON Zoltan 3829af21dbeSMarkus Armbruster static void vt82c686b_realize(PCIDevice *d, Error **errp) 38347934d0aSPaolo Bonzini { 384007b3103SBALATON Zoltan VT82C686BISAState *s = VT82C686B_ISA(d); 3859859ad1cSBALATON Zoltan DeviceState *dev = DEVICE(d); 386bcc37e24SJan Kiszka ISABus *isa_bus; 3873dc31cb8SBALATON Zoltan qemu_irq *isa_irq; 38847934d0aSPaolo Bonzini int i; 38947934d0aSPaolo Bonzini 3903dc31cb8SBALATON Zoltan qdev_init_gpio_out(dev, &s->cpu_intr, 1); 3913dc31cb8SBALATON Zoltan isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); 3929859ad1cSBALATON Zoltan isa_bus = isa_bus_new(dev, get_system_memory(), pci_address_space_io(d), 3939859ad1cSBALATON Zoltan &error_fatal); 3943dc31cb8SBALATON Zoltan isa_bus_irqs(isa_bus, i8259_init(isa_bus, *isa_irq)); 3953dc31cb8SBALATON Zoltan i8254_pit_init(isa_bus, 0x40, 0, NULL); 3963dc31cb8SBALATON Zoltan i8257_dma_init(isa_bus, 0); 3973dc31cb8SBALATON Zoltan isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO); 3983dc31cb8SBALATON Zoltan mc146818_rtc_init(isa_bus, 2000, NULL); 39947934d0aSPaolo Bonzini 4009859ad1cSBALATON Zoltan for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) { 4019859ad1cSBALATON Zoltan if (i < PCI_COMMAND || i >= PCI_REVISION_ID) { 4029859ad1cSBALATON Zoltan d->wmask[i] = 0; 40347934d0aSPaolo Bonzini } 40447934d0aSPaolo Bonzini } 40547934d0aSPaolo Bonzini 4066be6e4bcSBALATON Zoltan memory_region_init_io(&s->superio_cfg.io, OBJECT(d), &superio_cfg_ops, 4076be6e4bcSBALATON Zoltan &s->superio_cfg, "superio_cfg", 2); 4086be6e4bcSBALATON Zoltan memory_region_set_enabled(&s->superio_cfg.io, false); 409f3db354cSFilip Bozuta /* 410f3db354cSFilip Bozuta * The floppy also uses 0x3f0 and 0x3f1. 411f3db354cSFilip Bozuta * But we do not emulate a floppy, so just set it here. 412f3db354cSFilip Bozuta */ 413bcc37e24SJan Kiszka memory_region_add_subregion(isa_bus->address_space_io, 0x3f0, 4146be6e4bcSBALATON Zoltan &s->superio_cfg.io); 41547934d0aSPaolo Bonzini } 41647934d0aSPaolo Bonzini 41747934d0aSPaolo Bonzini static void via_class_init(ObjectClass *klass, void *data) 41847934d0aSPaolo Bonzini { 41947934d0aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 42047934d0aSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 42147934d0aSPaolo Bonzini 4229af21dbeSMarkus Armbruster k->realize = vt82c686b_realize; 42347934d0aSPaolo Bonzini k->config_write = vt82c686b_write_config; 42447934d0aSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_VIA; 42547934d0aSPaolo Bonzini k->device_id = PCI_DEVICE_ID_VIA_ISA_BRIDGE; 42647934d0aSPaolo Bonzini k->class_id = PCI_CLASS_BRIDGE_ISA; 42747934d0aSPaolo Bonzini k->revision = 0x40; 4289dc1a769SPhilippe Mathieu-Daudé dc->reset = vt82c686b_isa_reset; 42947934d0aSPaolo Bonzini dc->desc = "ISA bridge"; 43047934d0aSPaolo Bonzini dc->vmsd = &vmstate_via; 43104916ee9SMarkus Armbruster /* 43204916ee9SMarkus Armbruster * Reason: part of VIA VT82C686 southbridge, needs to be wired up, 433c3a09ff6SPhilippe Mathieu-Daudé * e.g. by mips_fuloong2e_init() 43404916ee9SMarkus Armbruster */ 435e90f2a8cSEduardo Habkost dc->user_creatable = false; 43647934d0aSPaolo Bonzini } 43747934d0aSPaolo Bonzini 43847934d0aSPaolo Bonzini static const TypeInfo via_info = { 4390f798461SBALATON Zoltan .name = TYPE_VT82C686B_ISA, 44047934d0aSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 4410f798461SBALATON Zoltan .instance_size = sizeof(VT82C686BISAState), 44247934d0aSPaolo Bonzini .class_init = via_class_init, 443fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 444fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 445fd3b02c8SEduardo Habkost { }, 446fd3b02c8SEduardo Habkost }, 44747934d0aSPaolo Bonzini }; 44847934d0aSPaolo Bonzini 44994349bffSBALATON Zoltan 45098cf824bSPhilippe Mathieu-Daudé static void vt82c686b_superio_class_init(ObjectClass *klass, void *data) 45198cf824bSPhilippe Mathieu-Daudé { 45298cf824bSPhilippe Mathieu-Daudé ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass); 45398cf824bSPhilippe Mathieu-Daudé 45498cf824bSPhilippe Mathieu-Daudé sc->serial.count = 2; 45598cf824bSPhilippe Mathieu-Daudé sc->parallel.count = 1; 45698cf824bSPhilippe Mathieu-Daudé sc->ide.count = 0; 45798cf824bSPhilippe Mathieu-Daudé sc->floppy.count = 1; 45898cf824bSPhilippe Mathieu-Daudé } 45998cf824bSPhilippe Mathieu-Daudé 46098cf824bSPhilippe Mathieu-Daudé static const TypeInfo via_superio_info = { 46198cf824bSPhilippe Mathieu-Daudé .name = TYPE_VT82C686B_SUPERIO, 46298cf824bSPhilippe Mathieu-Daudé .parent = TYPE_ISA_SUPERIO, 46398cf824bSPhilippe Mathieu-Daudé .instance_size = sizeof(ISASuperIODevice), 46498cf824bSPhilippe Mathieu-Daudé .class_size = sizeof(ISASuperIOClass), 46598cf824bSPhilippe Mathieu-Daudé .class_init = vt82c686b_superio_class_init, 46698cf824bSPhilippe Mathieu-Daudé }; 46798cf824bSPhilippe Mathieu-Daudé 46894349bffSBALATON Zoltan 46947934d0aSPaolo Bonzini static void vt82c686b_register_types(void) 47047934d0aSPaolo Bonzini { 47147934d0aSPaolo Bonzini type_register_static(&via_pm_info); 472e1a69736SBALATON Zoltan type_register_static(&vt82c686b_pm_info); 473e1a69736SBALATON Zoltan type_register_static(&vt8231_pm_info); 47447934d0aSPaolo Bonzini type_register_static(&via_info); 47594349bffSBALATON Zoltan type_register_static(&via_superio_info); 47647934d0aSPaolo Bonzini } 47747934d0aSPaolo Bonzini 47847934d0aSPaolo Bonzini type_init(vt82c686b_register_types) 479