xref: /qemu/include/hw/arm/allwinner-h3.h (revision a80beb16)
1 /*
2  * Allwinner H3 System on Chip emulation
3  *
4  * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
5  *
6  * This program is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation, either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 /*
21  * The Allwinner H3 is a System on Chip containing four ARM Cortex A7
22  * processor cores. Features and specifications include DDR2/DDR3 memory,
23  * SD/MMC storage cards, 10/100/1000Mbit Ethernet, USB 2.0, HDMI and
24  * various I/O modules.
25  *
26  * This implementation is based on the following datasheet:
27  *
28  *   https://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf
29  *
30  * The latest datasheet and more info can be found on the Linux Sunxi wiki:
31  *
32  *   https://linux-sunxi.org/H3
33  */
34 
35 #ifndef HW_ARM_ALLWINNER_H3_H
36 #define HW_ARM_ALLWINNER_H3_H
37 
38 #include "qom/object.h"
39 #include "hw/arm/boot.h"
40 #include "hw/timer/allwinner-a10-pit.h"
41 #include "hw/intc/arm_gic.h"
42 #include "hw/misc/allwinner-h3-ccu.h"
43 #include "hw/misc/allwinner-cpucfg.h"
44 #include "hw/misc/allwinner-h3-sysctrl.h"
45 #include "hw/misc/allwinner-sid.h"
46 #include "hw/sd/allwinner-sdhost.h"
47 #include "hw/net/allwinner-sun8i-emac.h"
48 #include "target/arm/cpu.h"
49 #include "sysemu/block-backend.h"
50 
51 /**
52  * Allwinner H3 device list
53  *
54  * This enumeration is can be used refer to a particular device in the
55  * Allwinner H3 SoC. For example, the physical memory base address for
56  * each device can be found in the AwH3State object in the memmap member
57  * using the device enum value as index.
58  *
59  * @see AwH3State
60  */
61 enum {
62     AW_H3_SRAM_A1,
63     AW_H3_SRAM_A2,
64     AW_H3_SRAM_C,
65     AW_H3_SYSCTRL,
66     AW_H3_MMC0,
67     AW_H3_SID,
68     AW_H3_EHCI0,
69     AW_H3_OHCI0,
70     AW_H3_EHCI1,
71     AW_H3_OHCI1,
72     AW_H3_EHCI2,
73     AW_H3_OHCI2,
74     AW_H3_EHCI3,
75     AW_H3_OHCI3,
76     AW_H3_CCU,
77     AW_H3_PIT,
78     AW_H3_UART0,
79     AW_H3_UART1,
80     AW_H3_UART2,
81     AW_H3_UART3,
82     AW_H3_EMAC,
83     AW_H3_GIC_DIST,
84     AW_H3_GIC_CPU,
85     AW_H3_GIC_HYP,
86     AW_H3_GIC_VCPU,
87     AW_H3_CPUCFG,
88     AW_H3_SDRAM
89 };
90 
91 /** Total number of CPU cores in the H3 SoC */
92 #define AW_H3_NUM_CPUS      (4)
93 
94 /**
95  * Allwinner H3 object model
96  * @{
97  */
98 
99 /** Object type for the Allwinner H3 SoC */
100 #define TYPE_AW_H3 "allwinner-h3"
101 
102 /** Convert input object to Allwinner H3 state object */
103 #define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3)
104 
105 /** @} */
106 
107 /**
108  * Allwinner H3 object
109  *
110  * This struct contains the state of all the devices
111  * which are currently emulated by the H3 SoC code.
112  */
113 typedef struct AwH3State {
114     /*< private >*/
115     DeviceState parent_obj;
116     /*< public >*/
117 
118     ARMCPU cpus[AW_H3_NUM_CPUS];
119     const hwaddr *memmap;
120     AwA10PITState timer;
121     AwH3ClockCtlState ccu;
122     AwCpuCfgState cpucfg;
123     AwH3SysCtrlState sysctrl;
124     AwSidState sid;
125     AwSdHostState mmc0;
126     AwSun8iEmacState emac;
127     GICState gic;
128     MemoryRegion sram_a1;
129     MemoryRegion sram_a2;
130     MemoryRegion sram_c;
131 } AwH3State;
132 
133 /**
134  * Emulate Boot ROM firmware setup functionality.
135  *
136  * A real Allwinner H3 SoC contains a Boot ROM
137  * which is the first code that runs right after
138  * the SoC is powered on. The Boot ROM is responsible
139  * for loading user code (e.g. a bootloader) from any
140  * of the supported external devices and writing the
141  * downloaded code to internal SRAM. After loading the SoC
142  * begins executing the code written to SRAM.
143  *
144  * This function emulates the Boot ROM by copying 32 KiB
145  * of data from the given block device and writes it to
146  * the start of the first internal SRAM memory.
147  *
148  * @s: Allwinner H3 state object pointer
149  * @blk: Block backend device object pointer
150  */
151 void allwinner_h3_bootrom_setup(AwH3State *s, BlockBackend *blk);
152 
153 #endif /* HW_ARM_ALLWINNER_H3_H */
154