#
0e246c62 |
| 25-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/arm/allwinner-h3: Remove 'hw/arm/boot.h' from header
"hw/arm/boot.h" is only required on the source file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson
hw/arm/allwinner-h3: Remove 'hw/arm/boot.h' from header
"hw/arm/boot.h" is only required on the source file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20231025065316.56817-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
0e246c62 |
| 25-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/arm/allwinner-h3: Remove 'hw/arm/boot.h' from header
"hw/arm/boot.h" is only required on the source file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson
hw/arm/allwinner-h3: Remove 'hw/arm/boot.h' from header
"hw/arm/boot.h" is only required on the source file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@amd.com> Message-id: 20231025065316.56817-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2 |
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#
c663fc9f |
| 20-Apr-2023 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <s
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2 |
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#
c663fc9f |
| 20-Apr-2023 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <s
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2 |
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#
c663fc9f |
| 20-Apr-2023 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <s
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2 |
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#
c663fc9f |
| 20-Apr-2023 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <s
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5, v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2 |
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#
c663fc9f |
| 20-Apr-2023 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <s
hw/arm: Add WDT to Allwinner-H3 and Orangepi-PC
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
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#
2ddc4595 |
| 20-Feb-2023 |
qianfan Zhao <qianfanguijin@163.com> |
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear con
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear control register's INT_FLAG bit.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
|
#
2ddc4595 |
| 20-Feb-2023 |
qianfan Zhao <qianfanguijin@163.com> |
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear con
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear control register's INT_FLAG bit.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
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#
2ddc4595 |
| 20-Feb-2023 |
qianfan Zhao <qianfanguijin@163.com> |
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear con
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear control register's INT_FLAG bit.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1, v8.0.0-rc0 |
|
#
2ddc4595 |
| 20-Feb-2023 |
qianfan Zhao <qianfanguijin@163.com> |
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear con
hw: arm: allwinner-h3: Fix and complete H3 i2c devices
Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear control register's INT_FLAG bit.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
9be8a82c |
| 26-Dec-2022 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
{hw/i2c,docs/system/arm}: Allwinner TWI/I2C Emulation
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented.
The SPL boot for Cubieboard expect
{hw/i2c,docs/system/arm}: Allwinner TWI/I2C Emulation
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented.
The SPL boot for Cubieboard expects AXP209 PMIC on TWI0/I2C0 bus, so this is first part enabling the TWI/I2C bus operation.
Since both Allwinner A10 and H3 use the same module, it is added for both boards.
Docs are also updated for Cubieboard and Orangepi-PC board to indicate I2C availability.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20221226220303.14420-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v7.2.0, v7.2.0-rc4, v7.2.0-rc3, v7.2.0-rc2, v7.2.0-rc1, v7.2.0-rc0, v7.1.0, v7.1.0-rc4, v7.1.0-rc3, v7.1.0-rc2, v7.1.0-rc1, v7.1.0-rc0, v7.0.0, v7.0.0-rc4, v7.0.0-rc3, v7.0.0-rc2, v7.0.0-rc1, v7.0.0-rc0, v6.1.1, v6.2.0, v6.2.0-rc4, v6.2.0-rc3, v6.2.0-rc2, v6.2.0-rc1, v6.2.0-rc0, v6.0.1, v6.1.0, v6.1.0-rc4, v6.1.0-rc3, v6.1.0-rc2, v6.1.0-rc1, v6.1.0-rc0 |
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#
f548f201 |
| 27-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
arm: Consistently use "Cortex-Axx", not "Cortex Axx"
The official punctuation for Arm CPU names uses a hyphen, like "Cortex-A9". We mostly follow this, but in a few places usage without the hyphen h
arm: Consistently use "Cortex-Axx", not "Cortex Axx"
The official punctuation for Arm CPU names uses a hyphen, like "Cortex-A9". We mostly follow this, but in a few places usage without the hyphen has crept in. Fix those so we consistently use the same way of writing the CPU name.
This commit was created with: git grep -z -l 'Cortex ' | xargs -0 sed -i 's/Cortex /Cortex-/'
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210527095152.10968-1-peter.maydell@linaro.org
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Revision tags: v6.0.0, v6.0.0-rc5, v6.0.0-rc4, v6.0.0-rc3, v6.0.0-rc2, v6.0.0-rc1, v6.0.0-rc0, v5.2.0, v5.2.0-rc4, v5.2.0-rc3, v5.2.0-rc2, v5.2.0-rc1, v5.2.0-rc0 |
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#
8063396b |
| 16-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible.
$ ./scripts/codeconverter/converter.py -i \ --patte
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible.
$ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]')
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Revision tags: v5.0.1 |
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#
8110fa1d |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redha
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
db1015e9 |
| 03-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TY
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName" declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]')
which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
4af44e1e |
| 25-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
allwinner-h3: Rename memmap enum constants
Some of the enum constant names conflict with the QOM type check macros (AW_H3_CCU, AW_H3_SYSCTRL). This needs to be addressed to allow us to transform th
allwinner-h3: Rename memmap enum constants
Some of the enum constant names conflict with the QOM type check macros (AW_H3_CCU, AW_H3_SYSCTRL). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE().
Rename all the constants to AW_H3_DEV_*, to avoid conflicts.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Tested-By: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200825192110.3528606-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Revision tags: v5.1.0, v5.1.0-rc3, v5.1.0-rc2, v5.1.0-rc1, v5.1.0-rc0, v4.2.1, v5.0.0, v5.0.0-rc4, v5.0.0-rc3, v5.0.0-rc2, v5.0.0-rc1, v5.0.0-rc0 |
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#
a9ad9e73 |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner: add RTC device support
Allwinner System-on-Chips usually contain a Real Time Clock (RTC) for non-volatile system date and time keeping. This commit adds a generic Allwinner RTC dev
hw/arm/allwinner: add RTC device support
Allwinner System-on-Chips usually contain a Real Time Clock (RTC) for non-volatile system date and time keeping. This commit adds a generic Allwinner RTC device that supports the RTC devices found in Allwinner SoC family sun4i (A10), sun7i (A20) and sun6i and newer (A31, H2+, H3, etc). The following RTC functionality and features are implemented:
* Year-Month-Day read/write * Hour-Minute-Second read/write * General Purpose storage
The following boards are extended with the RTC device:
* Cubieboard (hw/arm/cubieboard.c) * Orange Pi PC (hw/arm/orangepi.c)
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-13-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
b71d0385 |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner-h3: add SDRAM controller device
In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types
hw/arm/allwinner-h3: add SDRAM controller device
In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner H3 SDRAM controller.
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
a80beb16 |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner-h3: add Boot ROM support
A real Allwinner H3 SoC contains a Boot ROM which is the first code that runs right after the SoC is powered on. The Boot ROM is responsible for loading use
hw/arm/allwinner-h3: add Boot ROM support
A real Allwinner H3 SoC contains a Boot ROM which is the first code that runs right after the SoC is powered on. The Boot ROM is responsible for loading user code (e.g. a bootloader) from any of the supported external devices and writing the downloaded code to internal SRAM. After loading the SoC begins executing the code written to SRAM.
This commits adds emulation of the Boot ROM firmware setup functionality by loading user code from SD card in the A1 SRAM. While the A1 SRAM is 64KiB, we limit the size to 32KiB because the real H3 Boot ROM also rejects sizes larger than 32KiB. For reference, this behaviour is documented by the Linux Sunxi project wiki at:
https://linux-sunxi.org/BROM#U-Boot_SPL_limitations
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-11-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
29d08975 |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner-h3: add EMAC ethernet device
The Allwinner Sun8i System on Chip family includes an Ethernet MAC (EMAC) which provides 10M/100M/1000M Ethernet connectivity. This commit adds support
hw/arm/allwinner-h3: add EMAC ethernet device
The Allwinner Sun8i System on Chip family includes an Ethernet MAC (EMAC) which provides 10M/100M/1000M Ethernet connectivity. This commit adds support for the Allwinner EMAC from the Sun8i family (H2+, H3, A33, etc), including emulation for the following functionality:
* DMA transfers * MII interface * Transmit CRC calculation
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-10-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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82e48382 |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner: add SD/MMC host controller
The Allwinner System on Chip families sun4i and above contain an integrated storage controller for Secure Digital (SD) and Multi Media Card (MMC) interfa
hw/arm/allwinner: add SD/MMC host controller
The Allwinner System on Chip families sun4i and above contain an integrated storage controller for Secure Digital (SD) and Multi Media Card (MMC) interfaces. This commit adds support for the Allwinner SD/MMC storage controller with the following emulated features:
* DMA transfers * Direct FIFO I/O * Short/Long format command responses * Auto-Stop command (CMD12) * Insert & remove card detection
The following boards are extended with the SD host controller:
* Cubieboard (hw/arm/cubieboard.c) * Orange Pi PC (hw/arm/orangepi.c)
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-9-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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6556617c |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner: add Security Identifier device
The Security Identifier device found in various Allwinner System on Chip designs gives applications a per-board unique identifier. This commit adds s
hw/arm/allwinner: add Security Identifier device
The Security Identifier device found in various Allwinner System on Chip designs gives applications a per-board unique identifier. This commit adds support for the Allwinner Security Identifier using a 128-bit UUID value as input.
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-8-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d26af5de |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner: add CPU Configuration module
Various Allwinner System on Chip designs contain multiple processors that can be configured and reset using the generic CPU Configuration module interf
hw/arm/allwinner: add CPU Configuration module
Various Allwinner System on Chip designs contain multiple processors that can be configured and reset using the generic CPU Configuration module interface. This commit adds support for the Allwinner CPU configuration interface which emulates the following features:
* CPU reset * CPU status
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-7-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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7e83c9dd |
| 11-Mar-2020 |
Niek Linnenbank <nieklinnenbank@gmail.com> |
hw/arm/allwinner-h3: add System Control module
The Allwinner H3 System on Chip has an System Control module that provides system wide generic controls and device information. This commit adds suppor
hw/arm/allwinner-h3: add System Control module
The Allwinner H3 System on Chip has an System Control module that provides system wide generic controls and device information. This commit adds support for the Allwinner H3 System Control module.
Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-6-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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