100442402SCédric Le Goater /* 2ff90606fSCédric Le Goater * ASPEED SoC family 300442402SCédric Le Goater * 400442402SCédric Le Goater * Andrew Jeffery <andrew@aj.id.au> 500442402SCédric Le Goater * 600442402SCédric Le Goater * Copyright 2016 IBM Corp. 700442402SCédric Le Goater * 800442402SCédric Le Goater * This code is licensed under the GPL version 2 or later. See 900442402SCédric Le Goater * the COPYING file in the top-level directory. 1000442402SCédric Le Goater */ 1100442402SCédric Le Goater 12ff90606fSCédric Le Goater #ifndef ASPEED_SOC_H 13ff90606fSCédric Le Goater #define ASPEED_SOC_H 1400442402SCédric Le Goater 15f25c0ae1SCédric Le Goater #include "hw/cpu/a15mpcore.h" 16356b230eSSteven Lee #include "hw/arm/armv7m.h" 1700442402SCédric Le Goater #include "hw/intc/aspeed_vic.h" 1800442402SCédric Le Goater #include "hw/misc/aspeed_scu.h" 19199fd623SAndrew Jeffery #include "hw/adc/aspeed_adc.h" 2000442402SCédric Le Goater #include "hw/misc/aspeed_sdmc.h" 21118c82e7SEddie James #include "hw/misc/aspeed_xdma.h" 2200442402SCédric Le Goater #include "hw/timer/aspeed_timer.h" 23ea5dcf4eSPhilippe Mathieu-Daudé #include "hw/rtc/aspeed_rtc.h" 2400442402SCédric Le Goater #include "hw/i2c/aspeed_i2c.h" 253222165dSTroy Lee #include "hw/misc/aspeed_i3c.h" 2600442402SCédric Le Goater #include "hw/ssi/aspeed_smc.h" 27a3888d75SJoel Stanley #include "hw/misc/aspeed_hace.h" 28e1acf581SJoel Stanley #include "hw/misc/aspeed_sbc.h" 29013befe1SCédric Le Goater #include "hw/watchdog/wdt_aspeed.h" 30ea337c65SCédric Le Goater #include "hw/net/ftgmac100.h" 31ec150c7eSMarkus Armbruster #include "target/arm/cpu.h" 32fdcc7c06SRashmica Gupta #include "hw/gpio/aspeed_gpio.h" 332bea128cSEddie James #include "hw/sd/aspeed_sdhci.h" 34bfdd34f1SGuenter Roeck #include "hw/usb/hcd-ehci.h" 35db1015e9SEduardo Habkost #include "qom/object.h" 362ecf1726SCédric Le Goater #include "hw/misc/aspeed_lpc.h" 3780beb085SPeter Delevoryas #include "hw/misc/unimp.h" 3855c57023SPeter Delevoryas #include "hw/misc/aspeed_peci.h" 393fd941f3SNinad Palsule #include "hw/fsi/aspeed_apb2opb.h" 40d2b3eaefSPeter Delevoryas #include "hw/char/serial.h" 4100442402SCédric Le Goater 42dbcabeebSCédric Le Goater #define ASPEED_SPIS_NUM 2 43bfdd34f1SGuenter Roeck #define ASPEED_EHCIS_NUM 2 446b2b2a70SJoel Stanley #define ASPEED_WDTS_NUM 4 45ece09beeSCédric Le Goater #define ASPEED_CPUS_NUM 2 46d300db02SJoel Stanley #define ASPEED_MACS_NUM 4 47d2b3eaefSPeter Delevoryas #define ASPEED_UARTS_NUM 13 4872006c61SPhilippe Mathieu-Daudé #define ASPEED_JTAG_NUM 2 49dbcabeebSCédric Le Goater 50db1015e9SEduardo Habkost struct AspeedSoCState { 5100442402SCédric Le Goater DeviceState parent; 5200442402SCédric Le Goater 534dd9d554SPeter Delevoryas MemoryRegion *memory; 5495b56e17SCédric Le Goater MemoryRegion *dram_mr; 55346160cbSCédric Le Goater MemoryRegion dram_container; 5674af4eecSCédric Le Goater MemoryRegion sram; 575aa281d7SCédric Le Goater MemoryRegion spi_boot_container; 585aa281d7SCédric Le Goater MemoryRegion spi_boot; 5975fb4577SJoel Stanley AspeedRtcState rtc; 6000442402SCédric Le Goater AspeedTimerCtrlState timerctrl; 6100442402SCédric Le Goater AspeedI2CState i2c; 623222165dSTroy Lee AspeedI3CState i3c; 6300442402SCédric Le Goater AspeedSCUState scu; 64a3888d75SJoel Stanley AspeedHACEState hace; 65118c82e7SEddie James AspeedXDMAState xdma; 66199fd623SAndrew Jeffery AspeedADCState adc; 670e5803dfSCédric Le Goater AspeedSMCState fmc; 68dbcabeebSCédric Le Goater AspeedSMCState spi[ASPEED_SPIS_NUM]; 69bfdd34f1SGuenter Roeck EHCISysBusState ehci[ASPEED_EHCIS_NUM]; 70e1acf581SJoel Stanley AspeedSBCState sbc; 716ba3dc25SPhilippe Mathieu-Daudé MemoryRegion secsram; 7280beb085SPeter Delevoryas UnimplementedDeviceState sbc_unimplemented; 7300442402SCédric Le Goater AspeedSDMCState sdmc; 74f986ee1dSJoel Stanley AspeedWDTState wdt[ASPEED_WDTS_NUM]; 7567340990SCédric Le Goater FTGMAC100State ftgmac100[ASPEED_MACS_NUM]; 76289251b0SCédric Le Goater AspeedMiiState mii[ASPEED_MACS_NUM]; 77fdcc7c06SRashmica Gupta AspeedGPIOState gpio; 78f25c0ae1SCédric Le Goater AspeedGPIOState gpio_1_8v; 792bea128cSEddie James AspeedSDHCIState sdhci; 80a29e3e12SAndrew Jeffery AspeedSDHCIState emmc; 812ecf1726SCédric Le Goater AspeedLPCState lpc; 8255c57023SPeter Delevoryas AspeedPECIState peci; 83d2b3eaefSPeter Delevoryas SerialMM uart[ASPEED_UARTS_NUM]; 84356b230eSSteven Lee Clock *sysclk; 8580beb085SPeter Delevoryas UnimplementedDeviceState iomem; 8680beb085SPeter Delevoryas UnimplementedDeviceState video; 8780beb085SPeter Delevoryas UnimplementedDeviceState emmc_boot_controller; 8880beb085SPeter Delevoryas UnimplementedDeviceState dpmcu; 8972006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState pwm; 9072006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState espi; 9172006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState udc; 9272006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState sgpiom; 9372006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState jtag[ASPEED_JTAG_NUM]; 943fd941f3SNinad Palsule AspeedAPB2OPBState fsi[2]; 95db1015e9SEduardo Habkost }; 9600442402SCédric Le Goater 97ff90606fSCédric Le Goater #define TYPE_ASPEED_SOC "aspeed-soc" 98a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(AspeedSoCState, AspeedSoCClass, ASPEED_SOC) 9900442402SCédric Le Goater 1001a94fae4SPhilippe Mathieu-Daudé struct Aspeed2400SoCState { 1011a94fae4SPhilippe Mathieu-Daudé AspeedSoCState parent; 102dd41ce7aSPhilippe Mathieu-Daudé 103dd41ce7aSPhilippe Mathieu-Daudé ARMCPU cpu[ASPEED_CPUS_NUM]; 104dd41ce7aSPhilippe Mathieu-Daudé AspeedVICState vic; 1051a94fae4SPhilippe Mathieu-Daudé }; 1061a94fae4SPhilippe Mathieu-Daudé 1071a94fae4SPhilippe Mathieu-Daudé #define TYPE_ASPEED2400_SOC "aspeed2400-soc" 1081a94fae4SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(Aspeed2400SoCState, ASPEED2400_SOC) 1091a94fae4SPhilippe Mathieu-Daudé 1104fc5e806SPhilippe Mathieu-Daudé struct Aspeed2600SoCState { 1114fc5e806SPhilippe Mathieu-Daudé AspeedSoCState parent; 112c17fc025SPhilippe Mathieu-Daudé 113c17fc025SPhilippe Mathieu-Daudé A15MPPrivState a7mpcore; 114c17fc025SPhilippe Mathieu-Daudé ARMCPU cpu[ASPEED_CPUS_NUM]; /* XXX belong to a7mpcore */ 1154fc5e806SPhilippe Mathieu-Daudé }; 1164fc5e806SPhilippe Mathieu-Daudé 1174fc5e806SPhilippe Mathieu-Daudé #define TYPE_ASPEED2600_SOC "aspeed2600-soc" 1184fc5e806SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(Aspeed2600SoCState, ASPEED2600_SOC) 1194fc5e806SPhilippe Mathieu-Daudé 120df4ab076SPhilippe Mathieu-Daudé struct Aspeed10x0SoCState { 121df4ab076SPhilippe Mathieu-Daudé AspeedSoCState parent; 122a0c21030SPhilippe Mathieu-Daudé 123a0c21030SPhilippe Mathieu-Daudé ARMv7MState armv7m; 124df4ab076SPhilippe Mathieu-Daudé }; 125df4ab076SPhilippe Mathieu-Daudé 126df4ab076SPhilippe Mathieu-Daudé #define TYPE_ASPEED10X0_SOC "aspeed10x0-soc" 127df4ab076SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(Aspeed10x0SoCState, ASPEED10X0_SOC) 128df4ab076SPhilippe Mathieu-Daudé 129db1015e9SEduardo Habkost struct AspeedSoCClass { 13054ecafb7SCédric Le Goater DeviceClass parent_class; 13154ecafb7SCédric Le Goater 132b033271fSCédric Le Goater const char *name; 133dc13909eSPhilippe Mathieu-Daudé /** valid_cpu_types: NULL terminated array of a single CPU type. */ 134dc13909eSPhilippe Mathieu-Daudé const char * const *valid_cpu_types; 135b033271fSCédric Le Goater uint32_t silicon_rev; 13674af4eecSCédric Le Goater uint64_t sram_size; 1376ba3dc25SPhilippe Mathieu-Daudé uint64_t secsram_size; 138dbcabeebSCédric Le Goater int spis_num; 139bfdd34f1SGuenter Roeck int ehcis_num; 140f986ee1dSJoel Stanley int wdts_num; 141d300db02SJoel Stanley int macs_num; 142c5e1bdb9SPeter Delevoryas int uarts_num; 143*944128eeSJamin Lin int uarts_base; 144b456b113SCédric Le Goater const int *irqmap; 145d783d1feSCédric Le Goater const hwaddr *memmap; 146ece09beeSCédric Le Goater uint32_t num_cpus; 147699db715SCédric Le Goater qemu_irq (*get_irq)(AspeedSoCState *s, int dev); 148db1015e9SEduardo Habkost }; 149b033271fSCédric Le Goater 150d815649cSPhilippe Mathieu-Daudé const char *aspeed_soc_cpu_type(AspeedSoCClass *sc); 15100442402SCédric Le Goater 152b456b113SCédric Le Goater enum { 1535aa281d7SCédric Le Goater ASPEED_DEV_SPI_BOOT, 154347df6f8SEduardo Habkost ASPEED_DEV_IOMEM, 155*944128eeSJamin Lin ASPEED_DEV_UART0, 156347df6f8SEduardo Habkost ASPEED_DEV_UART1, 157347df6f8SEduardo Habkost ASPEED_DEV_UART2, 158347df6f8SEduardo Habkost ASPEED_DEV_UART3, 159347df6f8SEduardo Habkost ASPEED_DEV_UART4, 160347df6f8SEduardo Habkost ASPEED_DEV_UART5, 161ab5e8605SPeter Delevoryas ASPEED_DEV_UART6, 162ab5e8605SPeter Delevoryas ASPEED_DEV_UART7, 163ab5e8605SPeter Delevoryas ASPEED_DEV_UART8, 164ab5e8605SPeter Delevoryas ASPEED_DEV_UART9, 165ab5e8605SPeter Delevoryas ASPEED_DEV_UART10, 166ab5e8605SPeter Delevoryas ASPEED_DEV_UART11, 167ab5e8605SPeter Delevoryas ASPEED_DEV_UART12, 168ab5e8605SPeter Delevoryas ASPEED_DEV_UART13, 169347df6f8SEduardo Habkost ASPEED_DEV_VUART, 170347df6f8SEduardo Habkost ASPEED_DEV_FMC, 171347df6f8SEduardo Habkost ASPEED_DEV_SPI1, 172347df6f8SEduardo Habkost ASPEED_DEV_SPI2, 173347df6f8SEduardo Habkost ASPEED_DEV_EHCI1, 174347df6f8SEduardo Habkost ASPEED_DEV_EHCI2, 175347df6f8SEduardo Habkost ASPEED_DEV_VIC, 176347df6f8SEduardo Habkost ASPEED_DEV_SDMC, 177347df6f8SEduardo Habkost ASPEED_DEV_SCU, 178347df6f8SEduardo Habkost ASPEED_DEV_ADC, 179e1acf581SJoel Stanley ASPEED_DEV_SBC, 1806ba3dc25SPhilippe Mathieu-Daudé ASPEED_DEV_SECSRAM, 181fe31a2ecSJoel Stanley ASPEED_DEV_EMMC_BC, 182347df6f8SEduardo Habkost ASPEED_DEV_VIDEO, 183347df6f8SEduardo Habkost ASPEED_DEV_SRAM, 184347df6f8SEduardo Habkost ASPEED_DEV_SDHCI, 185347df6f8SEduardo Habkost ASPEED_DEV_GPIO, 186347df6f8SEduardo Habkost ASPEED_DEV_GPIO_1_8V, 187347df6f8SEduardo Habkost ASPEED_DEV_RTC, 188347df6f8SEduardo Habkost ASPEED_DEV_TIMER1, 189347df6f8SEduardo Habkost ASPEED_DEV_TIMER2, 190347df6f8SEduardo Habkost ASPEED_DEV_TIMER3, 191347df6f8SEduardo Habkost ASPEED_DEV_TIMER4, 192347df6f8SEduardo Habkost ASPEED_DEV_TIMER5, 193347df6f8SEduardo Habkost ASPEED_DEV_TIMER6, 194347df6f8SEduardo Habkost ASPEED_DEV_TIMER7, 195347df6f8SEduardo Habkost ASPEED_DEV_TIMER8, 196347df6f8SEduardo Habkost ASPEED_DEV_WDT, 197347df6f8SEduardo Habkost ASPEED_DEV_PWM, 198347df6f8SEduardo Habkost ASPEED_DEV_LPC, 199347df6f8SEduardo Habkost ASPEED_DEV_IBT, 200347df6f8SEduardo Habkost ASPEED_DEV_I2C, 20155c57023SPeter Delevoryas ASPEED_DEV_PECI, 202347df6f8SEduardo Habkost ASPEED_DEV_ETH1, 203347df6f8SEduardo Habkost ASPEED_DEV_ETH2, 204347df6f8SEduardo Habkost ASPEED_DEV_ETH3, 205347df6f8SEduardo Habkost ASPEED_DEV_ETH4, 206347df6f8SEduardo Habkost ASPEED_DEV_MII1, 207347df6f8SEduardo Habkost ASPEED_DEV_MII2, 208347df6f8SEduardo Habkost ASPEED_DEV_MII3, 209347df6f8SEduardo Habkost ASPEED_DEV_MII4, 210347df6f8SEduardo Habkost ASPEED_DEV_SDRAM, 211347df6f8SEduardo Habkost ASPEED_DEV_XDMA, 212347df6f8SEduardo Habkost ASPEED_DEV_EMMC, 213c59f781eSAndrew Jeffery ASPEED_DEV_KCS, 214a3888d75SJoel Stanley ASPEED_DEV_HACE, 215d9e9cd59STroy Lee ASPEED_DEV_DPMCU, 216d9e9cd59STroy Lee ASPEED_DEV_DP, 2173222165dSTroy Lee ASPEED_DEV_I3C, 21872006c61SPhilippe Mathieu-Daudé ASPEED_DEV_ESPI, 21972006c61SPhilippe Mathieu-Daudé ASPEED_DEV_UDC, 22072006c61SPhilippe Mathieu-Daudé ASPEED_DEV_SGPIOM, 22172006c61SPhilippe Mathieu-Daudé ASPEED_DEV_JTAG0, 22272006c61SPhilippe Mathieu-Daudé ASPEED_DEV_JTAG1, 2233fd941f3SNinad Palsule ASPEED_DEV_FSI1, 2243fd941f3SNinad Palsule ASPEED_DEV_FSI2, 225b456b113SCédric Le Goater }; 226b456b113SCédric Le Goater 2275aa281d7SCédric Le Goater #define ASPEED_SOC_SPI_BOOT_ADDR 0x0 2285aa281d7SCédric Le Goater 229699db715SCédric Le Goater qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev); 230d2b3eaefSPeter Delevoryas bool aspeed_soc_uart_realize(AspeedSoCState *s, Error **errp); 231d2b3eaefSPeter Delevoryas void aspeed_soc_uart_set_chr(AspeedSoCState *s, int dev, Chardev *chr); 232346160cbSCédric Le Goater bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp); 2335bfcbda7SPeter Delevoryas void aspeed_mmio_map(AspeedSoCState *s, SysBusDevice *dev, int n, hwaddr addr); 23480beb085SPeter Delevoryas void aspeed_mmio_map_unimplemented(AspeedSoCState *s, SysBusDevice *dev, 23580beb085SPeter Delevoryas const char *name, hwaddr addr, 23680beb085SPeter Delevoryas uint64_t size); 2371099ad10SPeter Delevoryas void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, 2381099ad10SPeter Delevoryas unsigned int count, int unit0); 239699db715SCédric Le Goater 240*944128eeSJamin Lin static inline int aspeed_uart_index(int uart_dev) 241*944128eeSJamin Lin { 242*944128eeSJamin Lin return uart_dev - ASPEED_DEV_UART0; 243*944128eeSJamin Lin } 244*944128eeSJamin Lin 245*944128eeSJamin Lin static inline int aspeed_uart_first(AspeedSoCClass *sc) 246*944128eeSJamin Lin { 247*944128eeSJamin Lin return aspeed_uart_index(sc->uarts_base); 248*944128eeSJamin Lin } 249*944128eeSJamin Lin 250*944128eeSJamin Lin static inline int aspeed_uart_last(AspeedSoCClass *sc) 251*944128eeSJamin Lin { 252*944128eeSJamin Lin return aspeed_uart_first(sc) + sc->uarts_num - 1; 253*944128eeSJamin Lin } 254*944128eeSJamin Lin 255ff90606fSCédric Le Goater #endif /* ASPEED_SOC_H */ 256