100442402SCédric Le Goater /* 2ff90606fSCédric Le Goater * ASPEED SoC family 300442402SCédric Le Goater * 400442402SCédric Le Goater * Andrew Jeffery <andrew@aj.id.au> 500442402SCédric Le Goater * 600442402SCédric Le Goater * Copyright 2016 IBM Corp. 700442402SCédric Le Goater * 800442402SCédric Le Goater * This code is licensed under the GPL version 2 or later. See 900442402SCédric Le Goater * the COPYING file in the top-level directory. 1000442402SCédric Le Goater */ 1100442402SCédric Le Goater 12ff90606fSCédric Le Goater #ifndef ASPEED_SOC_H 13ff90606fSCédric Le Goater #define ASPEED_SOC_H 1400442402SCédric Le Goater 15f25c0ae1SCédric Le Goater #include "hw/cpu/a15mpcore.h" 16356b230eSSteven Lee #include "hw/arm/armv7m.h" 1700442402SCédric Le Goater #include "hw/intc/aspeed_vic.h" 1800442402SCédric Le Goater #include "hw/misc/aspeed_scu.h" 19199fd623SAndrew Jeffery #include "hw/adc/aspeed_adc.h" 2000442402SCédric Le Goater #include "hw/misc/aspeed_sdmc.h" 21118c82e7SEddie James #include "hw/misc/aspeed_xdma.h" 2200442402SCédric Le Goater #include "hw/timer/aspeed_timer.h" 23ea5dcf4eSPhilippe Mathieu-Daudé #include "hw/rtc/aspeed_rtc.h" 2400442402SCédric Le Goater #include "hw/i2c/aspeed_i2c.h" 253222165dSTroy Lee #include "hw/misc/aspeed_i3c.h" 2600442402SCédric Le Goater #include "hw/ssi/aspeed_smc.h" 27a3888d75SJoel Stanley #include "hw/misc/aspeed_hace.h" 28e1acf581SJoel Stanley #include "hw/misc/aspeed_sbc.h" 29013befe1SCédric Le Goater #include "hw/watchdog/wdt_aspeed.h" 30ea337c65SCédric Le Goater #include "hw/net/ftgmac100.h" 31ec150c7eSMarkus Armbruster #include "target/arm/cpu.h" 32fdcc7c06SRashmica Gupta #include "hw/gpio/aspeed_gpio.h" 332bea128cSEddie James #include "hw/sd/aspeed_sdhci.h" 34bfdd34f1SGuenter Roeck #include "hw/usb/hcd-ehci.h" 35db1015e9SEduardo Habkost #include "qom/object.h" 362ecf1726SCédric Le Goater #include "hw/misc/aspeed_lpc.h" 3780beb085SPeter Delevoryas #include "hw/misc/unimp.h" 3855c57023SPeter Delevoryas #include "hw/misc/aspeed_peci.h" 39d2b3eaefSPeter Delevoryas #include "hw/char/serial.h" 4000442402SCédric Le Goater 41dbcabeebSCédric Le Goater #define ASPEED_SPIS_NUM 2 42bfdd34f1SGuenter Roeck #define ASPEED_EHCIS_NUM 2 436b2b2a70SJoel Stanley #define ASPEED_WDTS_NUM 4 44ece09beeSCédric Le Goater #define ASPEED_CPUS_NUM 2 45d300db02SJoel Stanley #define ASPEED_MACS_NUM 4 46d2b3eaefSPeter Delevoryas #define ASPEED_UARTS_NUM 13 4772006c61SPhilippe Mathieu-Daudé #define ASPEED_JTAG_NUM 2 48dbcabeebSCédric Le Goater 49db1015e9SEduardo Habkost struct AspeedSoCState { 5000442402SCédric Le Goater DeviceState parent; 5100442402SCédric Le Goater 524dd9d554SPeter Delevoryas MemoryRegion *memory; 5395b56e17SCédric Le Goater MemoryRegion *dram_mr; 54346160cbSCédric Le Goater MemoryRegion dram_container; 5574af4eecSCédric Le Goater MemoryRegion sram; 565aa281d7SCédric Le Goater MemoryRegion spi_boot_container; 575aa281d7SCédric Le Goater MemoryRegion spi_boot; 5875fb4577SJoel Stanley AspeedRtcState rtc; 5900442402SCédric Le Goater AspeedTimerCtrlState timerctrl; 6000442402SCédric Le Goater AspeedI2CState i2c; 613222165dSTroy Lee AspeedI3CState i3c; 6200442402SCédric Le Goater AspeedSCUState scu; 63a3888d75SJoel Stanley AspeedHACEState hace; 64118c82e7SEddie James AspeedXDMAState xdma; 65199fd623SAndrew Jeffery AspeedADCState adc; 660e5803dfSCédric Le Goater AspeedSMCState fmc; 67dbcabeebSCédric Le Goater AspeedSMCState spi[ASPEED_SPIS_NUM]; 68bfdd34f1SGuenter Roeck EHCISysBusState ehci[ASPEED_EHCIS_NUM]; 69e1acf581SJoel Stanley AspeedSBCState sbc; 706ba3dc25SPhilippe Mathieu-Daudé MemoryRegion secsram; 7180beb085SPeter Delevoryas UnimplementedDeviceState sbc_unimplemented; 7200442402SCédric Le Goater AspeedSDMCState sdmc; 73f986ee1dSJoel Stanley AspeedWDTState wdt[ASPEED_WDTS_NUM]; 7467340990SCédric Le Goater FTGMAC100State ftgmac100[ASPEED_MACS_NUM]; 75289251b0SCédric Le Goater AspeedMiiState mii[ASPEED_MACS_NUM]; 76fdcc7c06SRashmica Gupta AspeedGPIOState gpio; 77f25c0ae1SCédric Le Goater AspeedGPIOState gpio_1_8v; 782bea128cSEddie James AspeedSDHCIState sdhci; 79a29e3e12SAndrew Jeffery AspeedSDHCIState emmc; 802ecf1726SCédric Le Goater AspeedLPCState lpc; 8155c57023SPeter Delevoryas AspeedPECIState peci; 82d2b3eaefSPeter Delevoryas SerialMM uart[ASPEED_UARTS_NUM]; 83356b230eSSteven Lee Clock *sysclk; 8480beb085SPeter Delevoryas UnimplementedDeviceState iomem; 8580beb085SPeter Delevoryas UnimplementedDeviceState video; 8680beb085SPeter Delevoryas UnimplementedDeviceState emmc_boot_controller; 8780beb085SPeter Delevoryas UnimplementedDeviceState dpmcu; 8872006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState pwm; 8972006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState espi; 9072006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState udc; 9172006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState sgpiom; 9272006c61SPhilippe Mathieu-Daudé UnimplementedDeviceState jtag[ASPEED_JTAG_NUM]; 93db1015e9SEduardo Habkost }; 9400442402SCédric Le Goater 95ff90606fSCédric Le Goater #define TYPE_ASPEED_SOC "aspeed-soc" 96a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(AspeedSoCState, AspeedSoCClass, ASPEED_SOC) 9700442402SCédric Le Goater 981a94fae4SPhilippe Mathieu-Daudé struct Aspeed2400SoCState { 991a94fae4SPhilippe Mathieu-Daudé AspeedSoCState parent; 100dd41ce7aSPhilippe Mathieu-Daudé 101dd41ce7aSPhilippe Mathieu-Daudé ARMCPU cpu[ASPEED_CPUS_NUM]; 102dd41ce7aSPhilippe Mathieu-Daudé AspeedVICState vic; 1031a94fae4SPhilippe Mathieu-Daudé }; 1041a94fae4SPhilippe Mathieu-Daudé 1051a94fae4SPhilippe Mathieu-Daudé #define TYPE_ASPEED2400_SOC "aspeed2400-soc" 1061a94fae4SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(Aspeed2400SoCState, ASPEED2400_SOC) 1071a94fae4SPhilippe Mathieu-Daudé 1084fc5e806SPhilippe Mathieu-Daudé struct Aspeed2600SoCState { 1094fc5e806SPhilippe Mathieu-Daudé AspeedSoCState parent; 110c17fc025SPhilippe Mathieu-Daudé 111c17fc025SPhilippe Mathieu-Daudé A15MPPrivState a7mpcore; 112c17fc025SPhilippe Mathieu-Daudé ARMCPU cpu[ASPEED_CPUS_NUM]; /* XXX belong to a7mpcore */ 1134fc5e806SPhilippe Mathieu-Daudé }; 1144fc5e806SPhilippe Mathieu-Daudé 1154fc5e806SPhilippe Mathieu-Daudé #define TYPE_ASPEED2600_SOC "aspeed2600-soc" 1164fc5e806SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(Aspeed2600SoCState, ASPEED2600_SOC) 1174fc5e806SPhilippe Mathieu-Daudé 118df4ab076SPhilippe Mathieu-Daudé struct Aspeed10x0SoCState { 119df4ab076SPhilippe Mathieu-Daudé AspeedSoCState parent; 120a0c21030SPhilippe Mathieu-Daudé 121a0c21030SPhilippe Mathieu-Daudé ARMv7MState armv7m; 122df4ab076SPhilippe Mathieu-Daudé }; 123df4ab076SPhilippe Mathieu-Daudé 124df4ab076SPhilippe Mathieu-Daudé #define TYPE_ASPEED10X0_SOC "aspeed10x0-soc" 125df4ab076SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(Aspeed10x0SoCState, ASPEED10X0_SOC) 126df4ab076SPhilippe Mathieu-Daudé 127db1015e9SEduardo Habkost struct AspeedSoCClass { 12854ecafb7SCédric Le Goater DeviceClass parent_class; 12954ecafb7SCédric Le Goater 130b033271fSCédric Le Goater const char *name; 131ba1ba5ccSIgor Mammedov const char *cpu_type; 132b033271fSCédric Le Goater uint32_t silicon_rev; 13374af4eecSCédric Le Goater uint64_t sram_size; 1346ba3dc25SPhilippe Mathieu-Daudé uint64_t secsram_size; 135dbcabeebSCédric Le Goater int spis_num; 136bfdd34f1SGuenter Roeck int ehcis_num; 137f986ee1dSJoel Stanley int wdts_num; 138d300db02SJoel Stanley int macs_num; 139c5e1bdb9SPeter Delevoryas int uarts_num; 140b456b113SCédric Le Goater const int *irqmap; 141d783d1feSCédric Le Goater const hwaddr *memmap; 142ece09beeSCédric Le Goater uint32_t num_cpus; 143699db715SCédric Le Goater qemu_irq (*get_irq)(AspeedSoCState *s, int dev); 144db1015e9SEduardo Habkost }; 145b033271fSCédric Le Goater 146*d815649cSPhilippe Mathieu-Daudé const char *aspeed_soc_cpu_type(AspeedSoCClass *sc); 14700442402SCédric Le Goater 148b456b113SCédric Le Goater enum { 1495aa281d7SCédric Le Goater ASPEED_DEV_SPI_BOOT, 150347df6f8SEduardo Habkost ASPEED_DEV_IOMEM, 151347df6f8SEduardo Habkost ASPEED_DEV_UART1, 152347df6f8SEduardo Habkost ASPEED_DEV_UART2, 153347df6f8SEduardo Habkost ASPEED_DEV_UART3, 154347df6f8SEduardo Habkost ASPEED_DEV_UART4, 155347df6f8SEduardo Habkost ASPEED_DEV_UART5, 156ab5e8605SPeter Delevoryas ASPEED_DEV_UART6, 157ab5e8605SPeter Delevoryas ASPEED_DEV_UART7, 158ab5e8605SPeter Delevoryas ASPEED_DEV_UART8, 159ab5e8605SPeter Delevoryas ASPEED_DEV_UART9, 160ab5e8605SPeter Delevoryas ASPEED_DEV_UART10, 161ab5e8605SPeter Delevoryas ASPEED_DEV_UART11, 162ab5e8605SPeter Delevoryas ASPEED_DEV_UART12, 163ab5e8605SPeter Delevoryas ASPEED_DEV_UART13, 164347df6f8SEduardo Habkost ASPEED_DEV_VUART, 165347df6f8SEduardo Habkost ASPEED_DEV_FMC, 166347df6f8SEduardo Habkost ASPEED_DEV_SPI1, 167347df6f8SEduardo Habkost ASPEED_DEV_SPI2, 168347df6f8SEduardo Habkost ASPEED_DEV_EHCI1, 169347df6f8SEduardo Habkost ASPEED_DEV_EHCI2, 170347df6f8SEduardo Habkost ASPEED_DEV_VIC, 171347df6f8SEduardo Habkost ASPEED_DEV_SDMC, 172347df6f8SEduardo Habkost ASPEED_DEV_SCU, 173347df6f8SEduardo Habkost ASPEED_DEV_ADC, 174e1acf581SJoel Stanley ASPEED_DEV_SBC, 1756ba3dc25SPhilippe Mathieu-Daudé ASPEED_DEV_SECSRAM, 176fe31a2ecSJoel Stanley ASPEED_DEV_EMMC_BC, 177347df6f8SEduardo Habkost ASPEED_DEV_VIDEO, 178347df6f8SEduardo Habkost ASPEED_DEV_SRAM, 179347df6f8SEduardo Habkost ASPEED_DEV_SDHCI, 180347df6f8SEduardo Habkost ASPEED_DEV_GPIO, 181347df6f8SEduardo Habkost ASPEED_DEV_GPIO_1_8V, 182347df6f8SEduardo Habkost ASPEED_DEV_RTC, 183347df6f8SEduardo Habkost ASPEED_DEV_TIMER1, 184347df6f8SEduardo Habkost ASPEED_DEV_TIMER2, 185347df6f8SEduardo Habkost ASPEED_DEV_TIMER3, 186347df6f8SEduardo Habkost ASPEED_DEV_TIMER4, 187347df6f8SEduardo Habkost ASPEED_DEV_TIMER5, 188347df6f8SEduardo Habkost ASPEED_DEV_TIMER6, 189347df6f8SEduardo Habkost ASPEED_DEV_TIMER7, 190347df6f8SEduardo Habkost ASPEED_DEV_TIMER8, 191347df6f8SEduardo Habkost ASPEED_DEV_WDT, 192347df6f8SEduardo Habkost ASPEED_DEV_PWM, 193347df6f8SEduardo Habkost ASPEED_DEV_LPC, 194347df6f8SEduardo Habkost ASPEED_DEV_IBT, 195347df6f8SEduardo Habkost ASPEED_DEV_I2C, 19655c57023SPeter Delevoryas ASPEED_DEV_PECI, 197347df6f8SEduardo Habkost ASPEED_DEV_ETH1, 198347df6f8SEduardo Habkost ASPEED_DEV_ETH2, 199347df6f8SEduardo Habkost ASPEED_DEV_ETH3, 200347df6f8SEduardo Habkost ASPEED_DEV_ETH4, 201347df6f8SEduardo Habkost ASPEED_DEV_MII1, 202347df6f8SEduardo Habkost ASPEED_DEV_MII2, 203347df6f8SEduardo Habkost ASPEED_DEV_MII3, 204347df6f8SEduardo Habkost ASPEED_DEV_MII4, 205347df6f8SEduardo Habkost ASPEED_DEV_SDRAM, 206347df6f8SEduardo Habkost ASPEED_DEV_XDMA, 207347df6f8SEduardo Habkost ASPEED_DEV_EMMC, 208c59f781eSAndrew Jeffery ASPEED_DEV_KCS, 209a3888d75SJoel Stanley ASPEED_DEV_HACE, 210d9e9cd59STroy Lee ASPEED_DEV_DPMCU, 211d9e9cd59STroy Lee ASPEED_DEV_DP, 2123222165dSTroy Lee ASPEED_DEV_I3C, 21372006c61SPhilippe Mathieu-Daudé ASPEED_DEV_ESPI, 21472006c61SPhilippe Mathieu-Daudé ASPEED_DEV_UDC, 21572006c61SPhilippe Mathieu-Daudé ASPEED_DEV_SGPIOM, 21672006c61SPhilippe Mathieu-Daudé ASPEED_DEV_JTAG0, 21772006c61SPhilippe Mathieu-Daudé ASPEED_DEV_JTAG1, 218b456b113SCédric Le Goater }; 219b456b113SCédric Le Goater 2205aa281d7SCédric Le Goater #define ASPEED_SOC_SPI_BOOT_ADDR 0x0 2215aa281d7SCédric Le Goater 222699db715SCédric Le Goater qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev); 223d2b3eaefSPeter Delevoryas bool aspeed_soc_uart_realize(AspeedSoCState *s, Error **errp); 224d2b3eaefSPeter Delevoryas void aspeed_soc_uart_set_chr(AspeedSoCState *s, int dev, Chardev *chr); 225346160cbSCédric Le Goater bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp); 2265bfcbda7SPeter Delevoryas void aspeed_mmio_map(AspeedSoCState *s, SysBusDevice *dev, int n, hwaddr addr); 22780beb085SPeter Delevoryas void aspeed_mmio_map_unimplemented(AspeedSoCState *s, SysBusDevice *dev, 22880beb085SPeter Delevoryas const char *name, hwaddr addr, 22980beb085SPeter Delevoryas uint64_t size); 2301099ad10SPeter Delevoryas void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, 2311099ad10SPeter Delevoryas unsigned int count, int unit0); 232699db715SCédric Le Goater 233ff90606fSCédric Le Goater #endif /* ASPEED_SOC_H */ 234