xref: /qemu/target/riscv/machine.c (revision 24beb03e)
1f7697f0eSYifei Jiang /*
2f7697f0eSYifei Jiang  * RISC-V VMState Description
3f7697f0eSYifei Jiang  *
4f7697f0eSYifei Jiang  * Copyright (c) 2020 Huawei Technologies Co., Ltd
5f7697f0eSYifei Jiang  *
6f7697f0eSYifei Jiang  * This program is free software; you can redistribute it and/or modify it
7f7697f0eSYifei Jiang  * under the terms and conditions of the GNU General Public License,
8f7697f0eSYifei Jiang  * version 2 or later, as published by the Free Software Foundation.
9f7697f0eSYifei Jiang  *
10f7697f0eSYifei Jiang  * This program is distributed in the hope it will be useful, but WITHOUT
11f7697f0eSYifei Jiang  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12f7697f0eSYifei Jiang  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13f7697f0eSYifei Jiang  * more details.
14f7697f0eSYifei Jiang  *
15f7697f0eSYifei Jiang  * You should have received a copy of the GNU General Public License along with
16f7697f0eSYifei Jiang  * this program.  If not, see <http://www.gnu.org/licenses/>.
17f7697f0eSYifei Jiang  */
18f7697f0eSYifei Jiang 
19f7697f0eSYifei Jiang #include "qemu/osdep.h"
20f7697f0eSYifei Jiang #include "cpu.h"
21f7697f0eSYifei Jiang #include "qemu/error-report.h"
22f7697f0eSYifei Jiang #include "sysemu/kvm.h"
23f7697f0eSYifei Jiang #include "migration/cpu.h"
24f7697f0eSYifei Jiang 
25*24beb03eSYifei Jiang static bool pmp_needed(void *opaque)
26*24beb03eSYifei Jiang {
27*24beb03eSYifei Jiang     RISCVCPU *cpu = opaque;
28*24beb03eSYifei Jiang     CPURISCVState *env = &cpu->env;
29*24beb03eSYifei Jiang 
30*24beb03eSYifei Jiang     return riscv_feature(env, RISCV_FEATURE_PMP);
31*24beb03eSYifei Jiang }
32*24beb03eSYifei Jiang 
33*24beb03eSYifei Jiang static int pmp_post_load(void *opaque, int version_id)
34*24beb03eSYifei Jiang {
35*24beb03eSYifei Jiang     RISCVCPU *cpu = opaque;
36*24beb03eSYifei Jiang     CPURISCVState *env = &cpu->env;
37*24beb03eSYifei Jiang     int i;
38*24beb03eSYifei Jiang 
39*24beb03eSYifei Jiang     for (i = 0; i < MAX_RISCV_PMPS; i++) {
40*24beb03eSYifei Jiang         pmp_update_rule_addr(env, i);
41*24beb03eSYifei Jiang     }
42*24beb03eSYifei Jiang     pmp_update_rule_nums(env);
43*24beb03eSYifei Jiang 
44*24beb03eSYifei Jiang     return 0;
45*24beb03eSYifei Jiang }
46*24beb03eSYifei Jiang 
47*24beb03eSYifei Jiang static const VMStateDescription vmstate_pmp_entry = {
48*24beb03eSYifei Jiang     .name = "cpu/pmp/entry",
49*24beb03eSYifei Jiang     .version_id = 1,
50*24beb03eSYifei Jiang     .minimum_version_id = 1,
51*24beb03eSYifei Jiang     .fields = (VMStateField[]) {
52*24beb03eSYifei Jiang         VMSTATE_UINTTL(addr_reg, pmp_entry_t),
53*24beb03eSYifei Jiang         VMSTATE_UINT8(cfg_reg, pmp_entry_t),
54*24beb03eSYifei Jiang         VMSTATE_END_OF_LIST()
55*24beb03eSYifei Jiang     }
56*24beb03eSYifei Jiang };
57*24beb03eSYifei Jiang 
58*24beb03eSYifei Jiang static const VMStateDescription vmstate_pmp = {
59*24beb03eSYifei Jiang     .name = "cpu/pmp",
60*24beb03eSYifei Jiang     .version_id = 1,
61*24beb03eSYifei Jiang     .minimum_version_id = 1,
62*24beb03eSYifei Jiang     .needed = pmp_needed,
63*24beb03eSYifei Jiang     .post_load = pmp_post_load,
64*24beb03eSYifei Jiang     .fields = (VMStateField[]) {
65*24beb03eSYifei Jiang         VMSTATE_STRUCT_ARRAY(env.pmp_state.pmp, RISCVCPU, MAX_RISCV_PMPS,
66*24beb03eSYifei Jiang                              0, vmstate_pmp_entry, pmp_entry_t),
67*24beb03eSYifei Jiang         VMSTATE_END_OF_LIST()
68*24beb03eSYifei Jiang     }
69*24beb03eSYifei Jiang };
70*24beb03eSYifei Jiang 
71f7697f0eSYifei Jiang const VMStateDescription vmstate_riscv_cpu = {
72f7697f0eSYifei Jiang     .name = "cpu",
73f7697f0eSYifei Jiang     .version_id = 1,
74f7697f0eSYifei Jiang     .minimum_version_id = 1,
75f7697f0eSYifei Jiang     .fields = (VMStateField[]) {
76f7697f0eSYifei Jiang         VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32),
77f7697f0eSYifei Jiang         VMSTATE_UINT64_ARRAY(env.fpr, RISCVCPU, 32),
78f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.pc, RISCVCPU),
79f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.load_res, RISCVCPU),
80f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.load_val, RISCVCPU),
81f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.frm, RISCVCPU),
82f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.badaddr, RISCVCPU),
83f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU),
84f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.priv_ver, RISCVCPU),
85f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.vext_ver, RISCVCPU),
86f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.misa, RISCVCPU),
87f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.misa_mask, RISCVCPU),
88f7697f0eSYifei Jiang         VMSTATE_UINT32(env.features, RISCVCPU),
89f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.priv, RISCVCPU),
90f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.virt, RISCVCPU),
91f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.resetvec, RISCVCPU),
92f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mhartid, RISCVCPU),
93f7697f0eSYifei Jiang         VMSTATE_UINT64(env.mstatus, RISCVCPU),
94f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mip, RISCVCPU),
95f7697f0eSYifei Jiang         VMSTATE_UINT32(env.miclaim, RISCVCPU),
96f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mie, RISCVCPU),
97f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mideleg, RISCVCPU),
98f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.sptbr, RISCVCPU),
99f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.satp, RISCVCPU),
100f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.sbadaddr, RISCVCPU),
101f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mbadaddr, RISCVCPU),
102f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.medeleg, RISCVCPU),
103f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.stvec, RISCVCPU),
104f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.sepc, RISCVCPU),
105f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.scause, RISCVCPU),
106f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mtvec, RISCVCPU),
107f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mepc, RISCVCPU),
108f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mcause, RISCVCPU),
109f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mtval, RISCVCPU),
110f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.scounteren, RISCVCPU),
111f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mcounteren, RISCVCPU),
112f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.sscratch, RISCVCPU),
113f7697f0eSYifei Jiang         VMSTATE_UINTTL(env.mscratch, RISCVCPU),
114f7697f0eSYifei Jiang         VMSTATE_UINT64(env.mfromhost, RISCVCPU),
115f7697f0eSYifei Jiang         VMSTATE_UINT64(env.mtohost, RISCVCPU),
116f7697f0eSYifei Jiang         VMSTATE_UINT64(env.timecmp, RISCVCPU),
117f7697f0eSYifei Jiang 
118f7697f0eSYifei Jiang         VMSTATE_END_OF_LIST()
119*24beb03eSYifei Jiang     },
120*24beb03eSYifei Jiang     .subsections = (const VMStateDescription * []) {
121*24beb03eSYifei Jiang         &vmstate_pmp,
122*24beb03eSYifei Jiang         NULL
123f7697f0eSYifei Jiang     }
124f7697f0eSYifei Jiang };
125