1f7697f0eSYifei Jiang /* 2f7697f0eSYifei Jiang * RISC-V VMState Description 3f7697f0eSYifei Jiang * 4f7697f0eSYifei Jiang * Copyright (c) 2020 Huawei Technologies Co., Ltd 5f7697f0eSYifei Jiang * 6f7697f0eSYifei Jiang * This program is free software; you can redistribute it and/or modify it 7f7697f0eSYifei Jiang * under the terms and conditions of the GNU General Public License, 8f7697f0eSYifei Jiang * version 2 or later, as published by the Free Software Foundation. 9f7697f0eSYifei Jiang * 10f7697f0eSYifei Jiang * This program is distributed in the hope it will be useful, but WITHOUT 11f7697f0eSYifei Jiang * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12f7697f0eSYifei Jiang * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13f7697f0eSYifei Jiang * more details. 14f7697f0eSYifei Jiang * 15f7697f0eSYifei Jiang * You should have received a copy of the GNU General Public License along with 16f7697f0eSYifei Jiang * this program. If not, see <http://www.gnu.org/licenses/>. 17f7697f0eSYifei Jiang */ 18f7697f0eSYifei Jiang 19f7697f0eSYifei Jiang #include "qemu/osdep.h" 20f7697f0eSYifei Jiang #include "cpu.h" 21f7697f0eSYifei Jiang #include "qemu/error-report.h" 22f7697f0eSYifei Jiang #include "sysemu/kvm.h" 23f7697f0eSYifei Jiang #include "migration/cpu.h" 24577f0286SLIU Zhiwei #include "sysemu/cpu-timers.h" 25577f0286SLIU Zhiwei #include "debug.h" 26f7697f0eSYifei Jiang 2724beb03eSYifei Jiang static bool pmp_needed(void *opaque) 2824beb03eSYifei Jiang { 2924beb03eSYifei Jiang RISCVCPU *cpu = opaque; 3024beb03eSYifei Jiang 313fe40ef5SDaniel Henrique Barboza return cpu->cfg.pmp; 3224beb03eSYifei Jiang } 3324beb03eSYifei Jiang 3424beb03eSYifei Jiang static int pmp_post_load(void *opaque, int version_id) 3524beb03eSYifei Jiang { 3624beb03eSYifei Jiang RISCVCPU *cpu = opaque; 3724beb03eSYifei Jiang CPURISCVState *env = &cpu->env; 3824beb03eSYifei Jiang int i; 3924beb03eSYifei Jiang 4024beb03eSYifei Jiang for (i = 0; i < MAX_RISCV_PMPS; i++) { 4124beb03eSYifei Jiang pmp_update_rule_addr(env, i); 4224beb03eSYifei Jiang } 4324beb03eSYifei Jiang pmp_update_rule_nums(env); 4424beb03eSYifei Jiang 4524beb03eSYifei Jiang return 0; 4624beb03eSYifei Jiang } 4724beb03eSYifei Jiang 4824beb03eSYifei Jiang static const VMStateDescription vmstate_pmp_entry = { 4924beb03eSYifei Jiang .name = "cpu/pmp/entry", 5024beb03eSYifei Jiang .version_id = 1, 5124beb03eSYifei Jiang .minimum_version_id = 1, 5224beb03eSYifei Jiang .fields = (VMStateField[]) { 5324beb03eSYifei Jiang VMSTATE_UINTTL(addr_reg, pmp_entry_t), 5424beb03eSYifei Jiang VMSTATE_UINT8(cfg_reg, pmp_entry_t), 5524beb03eSYifei Jiang VMSTATE_END_OF_LIST() 5624beb03eSYifei Jiang } 5724beb03eSYifei Jiang }; 5824beb03eSYifei Jiang 5924beb03eSYifei Jiang static const VMStateDescription vmstate_pmp = { 6024beb03eSYifei Jiang .name = "cpu/pmp", 6124beb03eSYifei Jiang .version_id = 1, 6224beb03eSYifei Jiang .minimum_version_id = 1, 6324beb03eSYifei Jiang .needed = pmp_needed, 6424beb03eSYifei Jiang .post_load = pmp_post_load, 6524beb03eSYifei Jiang .fields = (VMStateField[]) { 6624beb03eSYifei Jiang VMSTATE_STRUCT_ARRAY(env.pmp_state.pmp, RISCVCPU, MAX_RISCV_PMPS, 6724beb03eSYifei Jiang 0, vmstate_pmp_entry, pmp_entry_t), 6824beb03eSYifei Jiang VMSTATE_END_OF_LIST() 6924beb03eSYifei Jiang } 7024beb03eSYifei Jiang }; 7124beb03eSYifei Jiang 7235e07821SYifei Jiang static bool hyper_needed(void *opaque) 7335e07821SYifei Jiang { 7435e07821SYifei Jiang RISCVCPU *cpu = opaque; 7535e07821SYifei Jiang CPURISCVState *env = &cpu->env; 7635e07821SYifei Jiang 7735e07821SYifei Jiang return riscv_has_ext(env, RVH); 7835e07821SYifei Jiang } 7935e07821SYifei Jiang 8035e07821SYifei Jiang static const VMStateDescription vmstate_hyper = { 8135e07821SYifei Jiang .name = "cpu/hyper", 82cd032fe7SAnup Patel .version_id = 2, 83cd032fe7SAnup Patel .minimum_version_id = 2, 8435e07821SYifei Jiang .needed = hyper_needed, 8535e07821SYifei Jiang .fields = (VMStateField[]) { 8635e07821SYifei Jiang VMSTATE_UINTTL(env.hstatus, RISCVCPU), 8735e07821SYifei Jiang VMSTATE_UINTTL(env.hedeleg, RISCVCPU), 88d028ac75SAnup Patel VMSTATE_UINT64(env.hideleg, RISCVCPU), 8935e07821SYifei Jiang VMSTATE_UINTTL(env.hcounteren, RISCVCPU), 9035e07821SYifei Jiang VMSTATE_UINTTL(env.htval, RISCVCPU), 9135e07821SYifei Jiang VMSTATE_UINTTL(env.htinst, RISCVCPU), 9235e07821SYifei Jiang VMSTATE_UINTTL(env.hgatp, RISCVCPU), 93cd032fe7SAnup Patel VMSTATE_UINTTL(env.hgeie, RISCVCPU), 94cd032fe7SAnup Patel VMSTATE_UINTTL(env.hgeip, RISCVCPU), 9535e07821SYifei Jiang VMSTATE_UINT64(env.htimedelta, RISCVCPU), 963ec0fe18SAtish Patra VMSTATE_UINT64(env.vstimecmp, RISCVCPU), 972b602398SAnup Patel 982b602398SAnup Patel VMSTATE_UINTTL(env.hvictl, RISCVCPU), 9943dc93afSAnup Patel VMSTATE_UINT8_ARRAY(env.hviprio, RISCVCPU, 64), 10035e07821SYifei Jiang 10135e07821SYifei Jiang VMSTATE_UINT64(env.vsstatus, RISCVCPU), 10235e07821SYifei Jiang VMSTATE_UINTTL(env.vstvec, RISCVCPU), 10335e07821SYifei Jiang VMSTATE_UINTTL(env.vsscratch, RISCVCPU), 10435e07821SYifei Jiang VMSTATE_UINTTL(env.vsepc, RISCVCPU), 10535e07821SYifei Jiang VMSTATE_UINTTL(env.vscause, RISCVCPU), 10635e07821SYifei Jiang VMSTATE_UINTTL(env.vstval, RISCVCPU), 10735e07821SYifei Jiang VMSTATE_UINTTL(env.vsatp, RISCVCPU), 108d1ceff40SAnup Patel VMSTATE_UINTTL(env.vsiselect, RISCVCPU), 10935e07821SYifei Jiang 11035e07821SYifei Jiang VMSTATE_UINTTL(env.mtval2, RISCVCPU), 11135e07821SYifei Jiang VMSTATE_UINTTL(env.mtinst, RISCVCPU), 11235e07821SYifei Jiang 11335e07821SYifei Jiang VMSTATE_UINTTL(env.stvec_hs, RISCVCPU), 11435e07821SYifei Jiang VMSTATE_UINTTL(env.sscratch_hs, RISCVCPU), 11535e07821SYifei Jiang VMSTATE_UINTTL(env.sepc_hs, RISCVCPU), 11635e07821SYifei Jiang VMSTATE_UINTTL(env.scause_hs, RISCVCPU), 11735e07821SYifei Jiang VMSTATE_UINTTL(env.stval_hs, RISCVCPU), 11835e07821SYifei Jiang VMSTATE_UINTTL(env.satp_hs, RISCVCPU), 11935e07821SYifei Jiang VMSTATE_UINT64(env.mstatus_hs, RISCVCPU), 12035e07821SYifei Jiang 12135e07821SYifei Jiang VMSTATE_END_OF_LIST() 12235e07821SYifei Jiang } 12335e07821SYifei Jiang }; 12435e07821SYifei Jiang 125edcc4e40SBin Meng static bool vector_needed(void *opaque) 126edcc4e40SBin Meng { 127edcc4e40SBin Meng RISCVCPU *cpu = opaque; 128edcc4e40SBin Meng CPURISCVState *env = &cpu->env; 129edcc4e40SBin Meng 130edcc4e40SBin Meng return riscv_has_ext(env, RVV); 131edcc4e40SBin Meng } 132edcc4e40SBin Meng 133edcc4e40SBin Meng static const VMStateDescription vmstate_vector = { 134edcc4e40SBin Meng .name = "cpu/vector", 135d96a271aSLIU Zhiwei .version_id = 2, 136d96a271aSLIU Zhiwei .minimum_version_id = 2, 137edcc4e40SBin Meng .needed = vector_needed, 138edcc4e40SBin Meng .fields = (VMStateField[]) { 139edcc4e40SBin Meng VMSTATE_UINT64_ARRAY(env.vreg, RISCVCPU, 32 * RV_VLEN_MAX / 64), 140edcc4e40SBin Meng VMSTATE_UINTTL(env.vxrm, RISCVCPU), 141edcc4e40SBin Meng VMSTATE_UINTTL(env.vxsat, RISCVCPU), 142edcc4e40SBin Meng VMSTATE_UINTTL(env.vl, RISCVCPU), 143edcc4e40SBin Meng VMSTATE_UINTTL(env.vstart, RISCVCPU), 144edcc4e40SBin Meng VMSTATE_UINTTL(env.vtype, RISCVCPU), 145d96a271aSLIU Zhiwei VMSTATE_BOOL(env.vill, RISCVCPU), 146edcc4e40SBin Meng VMSTATE_END_OF_LIST() 147edcc4e40SBin Meng } 148edcc4e40SBin Meng }; 149edcc4e40SBin Meng 150edcc4e40SBin Meng static bool pointermasking_needed(void *opaque) 151edcc4e40SBin Meng { 152edcc4e40SBin Meng RISCVCPU *cpu = opaque; 153edcc4e40SBin Meng CPURISCVState *env = &cpu->env; 154edcc4e40SBin Meng 155edcc4e40SBin Meng return riscv_has_ext(env, RVJ); 156edcc4e40SBin Meng } 157edcc4e40SBin Meng 158edcc4e40SBin Meng static const VMStateDescription vmstate_pointermasking = { 159edcc4e40SBin Meng .name = "cpu/pointer_masking", 160edcc4e40SBin Meng .version_id = 1, 161edcc4e40SBin Meng .minimum_version_id = 1, 162edcc4e40SBin Meng .needed = pointermasking_needed, 163edcc4e40SBin Meng .fields = (VMStateField[]) { 164edcc4e40SBin Meng VMSTATE_UINTTL(env.mmte, RISCVCPU), 165edcc4e40SBin Meng VMSTATE_UINTTL(env.mpmmask, RISCVCPU), 166edcc4e40SBin Meng VMSTATE_UINTTL(env.mpmbase, RISCVCPU), 167edcc4e40SBin Meng VMSTATE_UINTTL(env.spmmask, RISCVCPU), 168edcc4e40SBin Meng VMSTATE_UINTTL(env.spmbase, RISCVCPU), 169edcc4e40SBin Meng VMSTATE_UINTTL(env.upmmask, RISCVCPU), 170edcc4e40SBin Meng VMSTATE_UINTTL(env.upmbase, RISCVCPU), 171edcc4e40SBin Meng 172edcc4e40SBin Meng VMSTATE_END_OF_LIST() 173edcc4e40SBin Meng } 174edcc4e40SBin Meng }; 175edcc4e40SBin Meng 1762b547084SFrédéric Pétrot static bool rv128_needed(void *opaque) 1772b547084SFrédéric Pétrot { 1782b547084SFrédéric Pétrot RISCVCPU *cpu = opaque; 1792b547084SFrédéric Pétrot CPURISCVState *env = &cpu->env; 1802b547084SFrédéric Pétrot 1812b547084SFrédéric Pétrot return env->misa_mxl_max == MXL_RV128; 1822b547084SFrédéric Pétrot } 1832b547084SFrédéric Pétrot 1842b547084SFrédéric Pétrot static const VMStateDescription vmstate_rv128 = { 1852b547084SFrédéric Pétrot .name = "cpu/rv128", 1862b547084SFrédéric Pétrot .version_id = 1, 1872b547084SFrédéric Pétrot .minimum_version_id = 1, 1882b547084SFrédéric Pétrot .needed = rv128_needed, 1892b547084SFrédéric Pétrot .fields = (VMStateField[]) { 1902b547084SFrédéric Pétrot VMSTATE_UINTTL_ARRAY(env.gprh, RISCVCPU, 32), 1912c64ab66SFrédéric Pétrot VMSTATE_UINT64(env.mscratchh, RISCVCPU), 1922c64ab66SFrédéric Pétrot VMSTATE_UINT64(env.sscratchh, RISCVCPU), 1932b547084SFrédéric Pétrot VMSTATE_END_OF_LIST() 1942b547084SFrédéric Pétrot } 1952b547084SFrédéric Pétrot }; 1962b547084SFrédéric Pétrot 1971eb9a5daSYifei Jiang static bool kvmtimer_needed(void *opaque) 1981eb9a5daSYifei Jiang { 1991eb9a5daSYifei Jiang return kvm_enabled(); 2001eb9a5daSYifei Jiang } 2011eb9a5daSYifei Jiang 2021eb9a5daSYifei Jiang static int cpu_post_load(void *opaque, int version_id) 2031eb9a5daSYifei Jiang { 2041eb9a5daSYifei Jiang RISCVCPU *cpu = opaque; 2051eb9a5daSYifei Jiang CPURISCVState *env = &cpu->env; 2061eb9a5daSYifei Jiang 2071eb9a5daSYifei Jiang env->kvm_timer_dirty = true; 2081eb9a5daSYifei Jiang return 0; 2091eb9a5daSYifei Jiang } 2101eb9a5daSYifei Jiang 2111eb9a5daSYifei Jiang static const VMStateDescription vmstate_kvmtimer = { 2121eb9a5daSYifei Jiang .name = "cpu/kvmtimer", 2131eb9a5daSYifei Jiang .version_id = 1, 2141eb9a5daSYifei Jiang .minimum_version_id = 1, 2151eb9a5daSYifei Jiang .needed = kvmtimer_needed, 2161eb9a5daSYifei Jiang .post_load = cpu_post_load, 2171eb9a5daSYifei Jiang .fields = (VMStateField[]) { 2181eb9a5daSYifei Jiang VMSTATE_UINT64(env.kvm_timer_time, RISCVCPU), 2191eb9a5daSYifei Jiang VMSTATE_UINT64(env.kvm_timer_compare, RISCVCPU), 2201eb9a5daSYifei Jiang VMSTATE_UINT64(env.kvm_timer_state, RISCVCPU), 22138b4e781SBin Meng VMSTATE_END_OF_LIST() 22238b4e781SBin Meng } 22338b4e781SBin Meng }; 2241eb9a5daSYifei Jiang 22538b4e781SBin Meng static bool debug_needed(void *opaque) 22638b4e781SBin Meng { 22738b4e781SBin Meng RISCVCPU *cpu = opaque; 22838b4e781SBin Meng 229cdfb2905SDaniel Henrique Barboza return cpu->cfg.debug; 23038b4e781SBin Meng } 23138b4e781SBin Meng 232577f0286SLIU Zhiwei static int debug_post_load(void *opaque, int version_id) 233577f0286SLIU Zhiwei { 234577f0286SLIU Zhiwei RISCVCPU *cpu = opaque; 235577f0286SLIU Zhiwei CPURISCVState *env = &cpu->env; 236577f0286SLIU Zhiwei 237577f0286SLIU Zhiwei if (icount_enabled()) { 238577f0286SLIU Zhiwei env->itrigger_enabled = riscv_itrigger_enabled(env); 239577f0286SLIU Zhiwei } 240577f0286SLIU Zhiwei 241577f0286SLIU Zhiwei return 0; 242577f0286SLIU Zhiwei } 243577f0286SLIU Zhiwei 24438b4e781SBin Meng static const VMStateDescription vmstate_debug = { 24538b4e781SBin Meng .name = "cpu/debug", 2469495c488SFrank Chang .version_id = 2, 2479495c488SFrank Chang .minimum_version_id = 2, 24838b4e781SBin Meng .needed = debug_needed, 249577f0286SLIU Zhiwei .post_load = debug_post_load, 25038b4e781SBin Meng .fields = (VMStateField[]) { 25138b4e781SBin Meng VMSTATE_UINTTL(env.trigger_cur, RISCVCPU), 2529495c488SFrank Chang VMSTATE_UINTTL_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS), 2539495c488SFrank Chang VMSTATE_UINTTL_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS), 2549495c488SFrank Chang VMSTATE_UINTTL_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS), 2551eb9a5daSYifei Jiang VMSTATE_END_OF_LIST() 2561eb9a5daSYifei Jiang } 2571eb9a5daSYifei Jiang }; 2581eb9a5daSYifei Jiang 259440544e1SLIU Zhiwei static int riscv_cpu_post_load(void *opaque, int version_id) 260440544e1SLIU Zhiwei { 261440544e1SLIU Zhiwei RISCVCPU *cpu = opaque; 262440544e1SLIU Zhiwei CPURISCVState *env = &cpu->env; 263440544e1SLIU Zhiwei 264440544e1SLIU Zhiwei env->xl = cpu_recompute_xl(env); 26540bfa5f6SLIU Zhiwei riscv_cpu_update_mask(env); 266440544e1SLIU Zhiwei return 0; 267440544e1SLIU Zhiwei } 268440544e1SLIU Zhiwei 2693bee0e40SMayuresh Chitale static bool smstateen_needed(void *opaque) 2703bee0e40SMayuresh Chitale { 2713bee0e40SMayuresh Chitale RISCVCPU *cpu = opaque; 2723bee0e40SMayuresh Chitale 2733bee0e40SMayuresh Chitale return cpu->cfg.ext_smstateen; 2743bee0e40SMayuresh Chitale } 2753bee0e40SMayuresh Chitale 2763bee0e40SMayuresh Chitale static const VMStateDescription vmstate_smstateen = { 2773bee0e40SMayuresh Chitale .name = "cpu/smtateen", 2783bee0e40SMayuresh Chitale .version_id = 1, 2793bee0e40SMayuresh Chitale .minimum_version_id = 1, 2803bee0e40SMayuresh Chitale .needed = smstateen_needed, 2813bee0e40SMayuresh Chitale .fields = (VMStateField[]) { 2823bee0e40SMayuresh Chitale VMSTATE_UINT64_ARRAY(env.mstateen, RISCVCPU, 4), 2833bee0e40SMayuresh Chitale VMSTATE_UINT64_ARRAY(env.hstateen, RISCVCPU, 4), 2843bee0e40SMayuresh Chitale VMSTATE_UINT64_ARRAY(env.sstateen, RISCVCPU, 4), 2853bee0e40SMayuresh Chitale VMSTATE_END_OF_LIST() 2863bee0e40SMayuresh Chitale } 2873bee0e40SMayuresh Chitale }; 2883bee0e40SMayuresh Chitale 28929a9ec9bSAtish Patra static bool envcfg_needed(void *opaque) 29029a9ec9bSAtish Patra { 29129a9ec9bSAtish Patra RISCVCPU *cpu = opaque; 29229a9ec9bSAtish Patra CPURISCVState *env = &cpu->env; 29329a9ec9bSAtish Patra 29429a9ec9bSAtish Patra return (env->priv_ver >= PRIV_VERSION_1_12_0 ? 1 : 0); 29529a9ec9bSAtish Patra } 29629a9ec9bSAtish Patra 29729a9ec9bSAtish Patra static const VMStateDescription vmstate_envcfg = { 29829a9ec9bSAtish Patra .name = "cpu/envcfg", 29929a9ec9bSAtish Patra .version_id = 1, 30029a9ec9bSAtish Patra .minimum_version_id = 1, 30129a9ec9bSAtish Patra .needed = envcfg_needed, 30229a9ec9bSAtish Patra .fields = (VMStateField[]) { 30329a9ec9bSAtish Patra VMSTATE_UINT64(env.menvcfg, RISCVCPU), 30429a9ec9bSAtish Patra VMSTATE_UINTTL(env.senvcfg, RISCVCPU), 30529a9ec9bSAtish Patra VMSTATE_UINT64(env.henvcfg, RISCVCPU), 3063780e337SAtish Patra VMSTATE_END_OF_LIST() 3073780e337SAtish Patra } 3083780e337SAtish Patra }; 30929a9ec9bSAtish Patra 3103780e337SAtish Patra static bool pmu_needed(void *opaque) 3113780e337SAtish Patra { 3123780e337SAtish Patra RISCVCPU *cpu = opaque; 3133780e337SAtish Patra 3143780e337SAtish Patra return cpu->cfg.pmu_num; 3153780e337SAtish Patra } 3163780e337SAtish Patra 3173780e337SAtish Patra static const VMStateDescription vmstate_pmu_ctr_state = { 3183780e337SAtish Patra .name = "cpu/pmu", 3193780e337SAtish Patra .version_id = 1, 3203780e337SAtish Patra .minimum_version_id = 1, 3213780e337SAtish Patra .needed = pmu_needed, 3223780e337SAtish Patra .fields = (VMStateField[]) { 3233780e337SAtish Patra VMSTATE_UINTTL(mhpmcounter_val, PMUCTRState), 3243780e337SAtish Patra VMSTATE_UINTTL(mhpmcounterh_val, PMUCTRState), 3253780e337SAtish Patra VMSTATE_UINTTL(mhpmcounter_prev, PMUCTRState), 3263780e337SAtish Patra VMSTATE_UINTTL(mhpmcounterh_prev, PMUCTRState), 3273780e337SAtish Patra VMSTATE_BOOL(started, PMUCTRState), 32829a9ec9bSAtish Patra VMSTATE_END_OF_LIST() 32929a9ec9bSAtish Patra } 33029a9ec9bSAtish Patra }; 33129a9ec9bSAtish Patra 332f7697f0eSYifei Jiang const VMStateDescription vmstate_riscv_cpu = { 333f7697f0eSYifei Jiang .name = "cpu", 3341237c2d6SBin Meng .version_id = 6, 3351237c2d6SBin Meng .minimum_version_id = 6, 336440544e1SLIU Zhiwei .post_load = riscv_cpu_post_load, 337f7697f0eSYifei Jiang .fields = (VMStateField[]) { 338f7697f0eSYifei Jiang VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32), 339f7697f0eSYifei Jiang VMSTATE_UINT64_ARRAY(env.fpr, RISCVCPU, 32), 34043dc93afSAnup Patel VMSTATE_UINT8_ARRAY(env.miprio, RISCVCPU, 64), 34143dc93afSAnup Patel VMSTATE_UINT8_ARRAY(env.siprio, RISCVCPU, 64), 342f7697f0eSYifei Jiang VMSTATE_UINTTL(env.pc, RISCVCPU), 343f7697f0eSYifei Jiang VMSTATE_UINTTL(env.load_res, RISCVCPU), 344f7697f0eSYifei Jiang VMSTATE_UINTTL(env.load_val, RISCVCPU), 345f7697f0eSYifei Jiang VMSTATE_UINTTL(env.frm, RISCVCPU), 346f7697f0eSYifei Jiang VMSTATE_UINTTL(env.badaddr, RISCVCPU), 347f7697f0eSYifei Jiang VMSTATE_UINTTL(env.guest_phys_fault_addr, RISCVCPU), 348f7697f0eSYifei Jiang VMSTATE_UINTTL(env.priv_ver, RISCVCPU), 349f7697f0eSYifei Jiang VMSTATE_UINTTL(env.vext_ver, RISCVCPU), 350e91a7227SRichard Henderson VMSTATE_UINT32(env.misa_mxl, RISCVCPU), 351e91a7227SRichard Henderson VMSTATE_UINT32(env.misa_ext, RISCVCPU), 352e91a7227SRichard Henderson VMSTATE_UINT32(env.misa_mxl_max, RISCVCPU), 353e91a7227SRichard Henderson VMSTATE_UINT32(env.misa_ext_mask, RISCVCPU), 354f7697f0eSYifei Jiang VMSTATE_UINT32(env.features, RISCVCPU), 355f7697f0eSYifei Jiang VMSTATE_UINTTL(env.priv, RISCVCPU), 356f7697f0eSYifei Jiang VMSTATE_UINTTL(env.virt, RISCVCPU), 357277b210dSAlistair Francis VMSTATE_UINT64(env.resetvec, RISCVCPU), 358f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mhartid, RISCVCPU), 359f7697f0eSYifei Jiang VMSTATE_UINT64(env.mstatus, RISCVCPU), 360d028ac75SAnup Patel VMSTATE_UINT64(env.mip, RISCVCPU), 361d028ac75SAnup Patel VMSTATE_UINT64(env.miclaim, RISCVCPU), 362d028ac75SAnup Patel VMSTATE_UINT64(env.mie, RISCVCPU), 363d028ac75SAnup Patel VMSTATE_UINT64(env.mideleg, RISCVCPU), 364f7697f0eSYifei Jiang VMSTATE_UINTTL(env.satp, RISCVCPU), 365ac12b601SAtish Patra VMSTATE_UINTTL(env.stval, RISCVCPU), 366f7697f0eSYifei Jiang VMSTATE_UINTTL(env.medeleg, RISCVCPU), 367f7697f0eSYifei Jiang VMSTATE_UINTTL(env.stvec, RISCVCPU), 368f7697f0eSYifei Jiang VMSTATE_UINTTL(env.sepc, RISCVCPU), 369f7697f0eSYifei Jiang VMSTATE_UINTTL(env.scause, RISCVCPU), 370f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mtvec, RISCVCPU), 371f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mepc, RISCVCPU), 372f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mcause, RISCVCPU), 373f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mtval, RISCVCPU), 374d1ceff40SAnup Patel VMSTATE_UINTTL(env.miselect, RISCVCPU), 375d1ceff40SAnup Patel VMSTATE_UINTTL(env.siselect, RISCVCPU), 376f7697f0eSYifei Jiang VMSTATE_UINTTL(env.scounteren, RISCVCPU), 377f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mcounteren, RISCVCPU), 378b1675eebSAtish Patra VMSTATE_UINTTL(env.mcountinhibit, RISCVCPU), 3793780e337SAtish Patra VMSTATE_STRUCT_ARRAY(env.pmu_ctrs, RISCVCPU, RV_MAX_MHPMCOUNTERS, 0, 3803780e337SAtish Patra vmstate_pmu_ctr_state, PMUCTRState), 381621f35bbSAtish Patra VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS), 38214664483SAtish Patra VMSTATE_UINTTL_ARRAY(env.mhpmeventh_val, RISCVCPU, RV_MAX_MHPMEVENTS), 383f7697f0eSYifei Jiang VMSTATE_UINTTL(env.sscratch, RISCVCPU), 384f7697f0eSYifei Jiang VMSTATE_UINTTL(env.mscratch, RISCVCPU), 38543888c2fSAtish Patra VMSTATE_UINT64(env.stimecmp, RISCVCPU), 386f7697f0eSYifei Jiang 387f7697f0eSYifei Jiang VMSTATE_END_OF_LIST() 38824beb03eSYifei Jiang }, 38924beb03eSYifei Jiang .subsections = (const VMStateDescription * []) { 39024beb03eSYifei Jiang &vmstate_pmp, 39135e07821SYifei Jiang &vmstate_hyper, 392bb02edcdSYifei Jiang &vmstate_vector, 393b1c279e1SAlexey Baturo &vmstate_pointermasking, 3942b547084SFrédéric Pétrot &vmstate_rv128, 3951eb9a5daSYifei Jiang &vmstate_kvmtimer, 39629a9ec9bSAtish Patra &vmstate_envcfg, 39738b4e781SBin Meng &vmstate_debug, 3983bee0e40SMayuresh Chitale &vmstate_smstateen, 39924beb03eSYifei Jiang NULL 400f7697f0eSYifei Jiang } 401f7697f0eSYifei Jiang }; 402