xref: /qemu/target/riscv/meson.build (revision 5ac034b1) 
1# FIXME extra_args should accept files()
2gen = [
3  decodetree.process('insn16.decode', extra_args: ['--static-decode=decode_insn16', '--insnwidth=16']),
4  decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
5  decodetree.process('xthead.decode', extra_args: '--static-decode=decode_xthead'),
6  decodetree.process('XVentanaCondOps.decode', extra_args: '--static-decode=decode_XVentanaCodeOps'),
7]
8
9riscv_ss = ss.source_set()
10riscv_ss.add(gen)
11riscv_ss.add(files(
12  'cpu.c',
13  'cpu_helper.c',
14  'csr.c',
15  'fpu_helper.c',
16  'gdbstub.c',
17  'op_helper.c',
18  'vector_helper.c',
19  'bitmanip_helper.c',
20  'translate.c',
21  'm128_helper.c',
22  'crypto_helper.c'
23))
24riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
25
26riscv_softmmu_ss = ss.source_set()
27riscv_softmmu_ss.add(files(
28  'arch_dump.c',
29  'pmp.c',
30  'debug.c',
31  'monitor.c',
32  'machine.c',
33  'pmu.c',
34  'time_helper.c'
35))
36
37target_arch += {'riscv': riscv_ss}
38target_softmmu_arch += {'riscv': riscv_softmmu_ss}
39