xref: /qemu/target/riscv/meson.build (revision a976a99a) 
1# FIXME extra_args should accept files()
2gen = [
3  decodetree.process('insn16.decode', extra_args: ['--static-decode=decode_insn16', '--insnwidth=16']),
4  decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
5  decodetree.process('XVentanaCondOps.decode', extra_args: '--static-decode=decode_XVentanaCodeOps'),
6]
7
8riscv_ss = ss.source_set()
9riscv_ss.add(gen)
10riscv_ss.add(files(
11  'cpu.c',
12  'cpu_helper.c',
13  'csr.c',
14  'fpu_helper.c',
15  'gdbstub.c',
16  'op_helper.c',
17  'vector_helper.c',
18  'bitmanip_helper.c',
19  'translate.c',
20  'm128_helper.c',
21  'crypto_helper.c'
22))
23riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
24
25riscv_softmmu_ss = ss.source_set()
26riscv_softmmu_ss.add(files(
27  'arch_dump.c',
28  'pmp.c',
29  'debug.c',
30  'monitor.c',
31  'machine.c',
32  'pmu.c',
33  'time_helper.c'
34))
35
36target_arch += {'riscv': riscv_ss}
37target_softmmu_arch += {'riscv': riscv_softmmu_ss}
38