Revision tags: v8.2.2, v7.2.10, v8.2.1, v8.1.5, v7.2.9, v8.1.4, v7.2.8, v8.2.0, v8.2.0-rc4, v8.2.0-rc3, v8.2.0-rc2, v8.2.0-rc1, v7.2.7, v8.1.3, v8.2.0-rc0 |
|
#
8cef839c |
| 23-Oct-2023 |
David Woodhouse <dwmw@amazon.co.uk> |
hw/arm/fsl: use qemu_configure_nic_device()
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
|
#
b0d1021e |
| 20-Jan-2024 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add various missing unimplemented devices
Add MMDC, OCOTP, SQPI, CAAM, and USBMISC as unimplemented devices.
This allows operating systems such as Linux to run emulations such as mcimx6
fsl-imx6ul: Add various missing unimplemented devices
Add MMDC, OCOTP, SQPI, CAAM, and USBMISC as unimplemented devices.
This allows operating systems such as Linux to run emulations such as mcimx6ul-evk.
Before commit 0cd4926b85 ("Refactor i.MX6UL processor code"), the affected memory ranges were covered by the unimplemented DAP device. The commit reduced the DAP address range from 0x100000 to 4kB, and the emulation thus no longer covered the various unimplemented devices in the affected address range.
Fixes: 0cd4926b85 ("Refactor i.MX6UL processor code") Cc: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240120005356.2599547-1-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
d780d056 |
| 18-Jan-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handle
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handler. To allow non-ARM code to raise interrupt on ARM cores, move they to 'target/arm/cpu-qom.h' which is non-ARM specific and can be included by any hw/ file.
File list to include the new header generated using:
$ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-18-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
b0d1021e |
| 20-Jan-2024 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add various missing unimplemented devices
Add MMDC, OCOTP, SQPI, CAAM, and USBMISC as unimplemented devices.
This allows operating systems such as Linux to run emulations such as mcimx6
fsl-imx6ul: Add various missing unimplemented devices
Add MMDC, OCOTP, SQPI, CAAM, and USBMISC as unimplemented devices.
This allows operating systems such as Linux to run emulations such as mcimx6ul-evk.
Before commit 0cd4926b85 ("Refactor i.MX6UL processor code"), the affected memory ranges were covered by the unimplemented DAP device. The commit reduced the DAP address range from 0x100000 to 4kB, and the emulation thus no longer covered the various unimplemented devices in the affected address range.
Fixes: 0cd4926b85 ("Refactor i.MX6UL processor code") Cc: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240120005356.2599547-1-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
d780d056 |
| 18-Jan-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handle
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handler. To allow non-ARM code to raise interrupt on ARM cores, move they to 'target/arm/cpu-qom.h' which is non-ARM specific and can be included by any hw/ file.
File list to include the new header generated using:
$ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-18-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5 |
|
#
f6020845 |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal appli
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add 4 missing PWM devices
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 59e4dc56e14eccfefd379275ec19048dff9c10b3.1692964892.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
0cd4926b |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Refactor i.MX6UL processor code
* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we
Refactor i.MX6UL processor code
* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: d579043fbd4e4b490370783fda43fc02c8e9be75.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
6f97cfd8 |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Remove i.MX7 IOMUX GPR device from i.MX6UL
i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device. In particular, register 22 is not present on i.MX6UL and this is actualy The only re
Remove i.MX7 IOMUX GPR device from i.MX6UL
i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device. In particular, register 22 is not present on i.MX6UL and this is actualy The only register that is really emulated in the i.MX7 IOMUX GPR device.
Note: The i.MX6UL code is actually also implementing the IOMUX GPR device as an unimplemented device at the same bus adress and the 2 instantiations were actualy colliding. So we go back to the unimplemented device for now.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 48681bf51ee97646479bb261bee19abebbc8074e.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5 |
|
#
f6020845 |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal appli
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add 4 missing PWM devices
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 59e4dc56e14eccfefd379275ec19048dff9c10b3.1692964892.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
0cd4926b |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Refactor i.MX6UL processor code
* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we
Refactor i.MX6UL processor code
* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: d579043fbd4e4b490370783fda43fc02c8e9be75.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
6f97cfd8 |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Remove i.MX7 IOMUX GPR device from i.MX6UL
i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device. In particular, register 22 is not present on i.MX6UL and this is actualy The only re
Remove i.MX7 IOMUX GPR device from i.MX6UL
i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device. In particular, register 22 is not present on i.MX6UL and this is actualy The only register that is really emulated in the i.MX7 IOMUX GPR device.
Note: The i.MX6UL code is actually also implementing the IOMUX GPR device as an unimplemented device at the same bus adress and the 2 instantiations were actualy colliding. So we go back to the unimplemented device for now.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 48681bf51ee97646479bb261bee19abebbc8074e.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.2, v8.1.1, v7.2.6, v8.0.5 |
|
#
f6020845 |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal appli
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add 4 missing PWM devices
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 59e4dc56e14eccfefd379275ec19048dff9c10b3.1692964892.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
0cd4926b |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Refactor i.MX6UL processor code
* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we
Refactor i.MX6UL processor code
* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: d579043fbd4e4b490370783fda43fc02c8e9be75.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
6f97cfd8 |
| 31-Aug-2023 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
Remove i.MX7 IOMUX GPR device from i.MX6UL
i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device. In particular, register 22 is not present on i.MX6UL and this is actualy The only re
Remove i.MX7 IOMUX GPR device from i.MX6UL
i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device. In particular, register 22 is not present on i.MX6UL and this is actualy The only register that is really emulated in the i.MX7 IOMUX GPR device.
Note: The i.MX6UL code is actually also implementing the IOMUX GPR device as an unimplemented device at the same bus adress and the 2 instantiations were actualy colliding. So we go back to the unimplemented device for now.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 48681bf51ee97646479bb261bee19abebbc8074e.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1 |
|
#
bc14018c |
| 15-Mar-2023 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@ro
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1 |
|
#
bc14018c |
| 15-Mar-2023 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@ro
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1 |
|
#
bc14018c |
| 15-Mar-2023 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@ro
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1 |
|
#
bc14018c |
| 15-Mar-2023 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@ro
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.1.0, v8.1.0-rc4, v8.1.0-rc3, v7.2.5, v8.0.4, v8.1.0-rc2, v8.1.0-rc1, v8.1.0-rc0, v8.0.3, v7.2.4, v8.0.2, v8.0.1, v7.2.3, v7.2.2, v8.0.0, v8.0.0-rc4, v8.0.0-rc3, v7.2.1, v8.0.0-rc2, v8.0.0-rc1 |
|
#
bc14018c |
| 15-Mar-2023 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@ro
fsl-imx6ul: Add fec[12]-phy-connected properties
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec.
Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.0.0-rc0 |
|
#
a1e03956 |
| 20-Dec-2022 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.0.0-rc0 |
|
#
a1e03956 |
| 20-Dec-2022 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v8.0.0-rc0 |
|
#
a1e03956 |
| 20-Dec-2022 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v7.2.0, v7.2.0-rc4, v7.2.0-rc3, v7.2.0-rc2, v7.2.0-rc1, v7.2.0-rc0, v7.1.0, v7.1.0-rc4, v7.1.0-rc3, v7.1.0-rc2, v7.1.0-rc1, v7.1.0-rc0, v7.0.0, v7.0.0-rc4, v7.0.0-rc3, v7.0.0-rc2, v7.0.0-rc1, v7.0.0-rc0 |
|
#
ae2474f1 |
| 27-Jan-2022 |
Peter Maydell <peter.maydell@linaro.org> |
hw/arm: imx: Don't enable PSCI conduit when booting guest in EL3
Change the iMX-SoC based boards to use the new boot.c functionality to allow us to enable psci-conduit only if the guest is being boo
hw/arm: imx: Don't enable PSCI conduit when booting guest in EL3
Change the iMX-SoC based boards to use the new boot.c functionality to allow us to enable psci-conduit only if the guest is being booted in EL1 or EL2, so that if the user runs guest EL3 firmware code our PSCI emulation doesn't get in its way.
To do this we stop setting the psci-conduit property on the CPU objects in the SoC code, and instead set the psci_conduit field in the arm_boot_info struct to tell the common boot loader code that we'd like PSCI if the guest is starting at an EL that it makes sense with.
This affects the mcimx6ul-evk and mcimx7d-sabre boards.
Note that for the mcimx7d board, this means that when running guest code at EL3 there is currently no way to power on the secondary CPUs, because we do not currently have a model of the system reset controller module which should be used to do that for the imx7 SoC, only for the imx6 SoC. (Previously EL3 code which knew it was running on QEMU could use a PSCI call to do this.) This doesn't affect the imx6ul-evk board because it is uniprocessor.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Cédric Le Goater <clg@kaod.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220127154639.2090164-5-peter.maydell@linaro.org
show more ...
|
Revision tags: v6.1.1, v6.2.0, v6.2.0-rc4, v6.2.0-rc3, v6.2.0-rc2, v6.2.0-rc1, v6.2.0-rc0, v6.0.1, v6.1.0, v6.1.0-rc4, v6.1.0-rc3 |
|
#
ff31cca7 |
| 10-Aug-2021 |
Guenter Roeck <linux@roeck-us.net> |
fsl-imx6ul: Instantiate SAI1/2/3 and ASRC as unimplemented devices
Instantiate SAI1/2/3 and ASRC as unimplemented devices to avoid random Linux kernel crashes, such as
Unhandled fault: external abo
fsl-imx6ul: Instantiate SAI1/2/3 and ASRC as unimplemented devices
Instantiate SAI1/2/3 and ASRC as unimplemented devices to avoid random Linux kernel crashes, such as
Unhandled fault: external abort on non-linefetch (0x808) at 0xd1580010 pgd = (ptrval) [d1580010] *pgd=8231b811, *pte=02034653, *ppte=02034453 Internal error: : 808 [#1] SMP ARM ... [<c095e974>] (regmap_mmio_write32le) from [<c095eb48>] (regmap_mmio_write+0x3c/0x54) [<c095eb48>] (regmap_mmio_write) from [<c09580f4>] (_regmap_write+0x4c/0x1f0) [<c09580f4>] (_regmap_write) from [<c095837c>] (_regmap_update_bits+0xe4/0xec) [<c095837c>] (_regmap_update_bits) from [<c09599b4>] (regmap_update_bits_base+0x50/0x74) [<c09599b4>] (regmap_update_bits_base) from [<c0d3e9e4>] (fsl_asrc_runtime_resume+0x1e4/0x21c) [<c0d3e9e4>] (fsl_asrc_runtime_resume) from [<c0942464>] (__rpm_callback+0x3c/0x108) [<c0942464>] (__rpm_callback) from [<c0942590>] (rpm_callback+0x60/0x64) [<c0942590>] (rpm_callback) from [<c0942b60>] (rpm_resume+0x5cc/0x808) [<c0942b60>] (rpm_resume) from [<c0942dfc>] (__pm_runtime_resume+0x60/0xa0) [<c0942dfc>] (__pm_runtime_resume) from [<c0d3ecc4>] (fsl_asrc_probe+0x2a8/0x708) [<c0d3ecc4>] (fsl_asrc_probe) from [<c0935b08>] (platform_probe+0x58/0xb8) [<c0935b08>] (platform_probe) from [<c0933264>] (really_probe.part.0+0x9c/0x334) [<c0933264>] (really_probe.part.0) from [<c093359c>] (__driver_probe_device+0xa0/0x138) [<c093359c>] (__driver_probe_device) from [<c0933664>] (driver_probe_device+0x30/0xc8) [<c0933664>] (driver_probe_device) from [<c0933c88>] (__driver_attach+0x90/0x130) [<c0933c88>] (__driver_attach) from [<c0931060>] (bus_for_each_dev+0x78/0xb8) [<c0931060>] (bus_for_each_dev) from [<c093254c>] (bus_add_driver+0xf0/0x1d8) [<c093254c>] (bus_add_driver) from [<c0934a30>] (driver_register+0x88/0x118) [<c0934a30>] (driver_register) from [<c01022c0>] (do_one_initcall+0x7c/0x3a4) [<c01022c0>] (do_one_initcall) from [<c1601204>] (kernel_init_freeable+0x198/0x22c) [<c1601204>] (kernel_init_freeable) from [<c0f5ff2c>] (kernel_init+0x10/0x128) [<c0f5ff2c>] (kernel_init) from [<c010013c>] (ret_from_fork+0x14/0x38)
or
Unhandled fault: external abort on non-linefetch (0x808) at 0xd19b0000 pgd = (ptrval) [d19b0000] *pgd=82711811, *pte=308a0653, *ppte=308a0453 Internal error: : 808 [#1] SMP ARM ... [<c095e974>] (regmap_mmio_write32le) from [<c095eb48>] (regmap_mmio_write+0x3c/0x54) [<c095eb48>] (regmap_mmio_write) from [<c09580f4>] (_regmap_write+0x4c/0x1f0) [<c09580f4>] (_regmap_write) from [<c0959b28>] (regmap_write+0x3c/0x60) [<c0959b28>] (regmap_write) from [<c0d41130>] (fsl_sai_runtime_resume+0x9c/0x1ec) [<c0d41130>] (fsl_sai_runtime_resume) from [<c0942464>] (__rpm_callback+0x3c/0x108) [<c0942464>] (__rpm_callback) from [<c0942590>] (rpm_callback+0x60/0x64) [<c0942590>] (rpm_callback) from [<c0942b60>] (rpm_resume+0x5cc/0x808) [<c0942b60>] (rpm_resume) from [<c0942dfc>] (__pm_runtime_resume+0x60/0xa0) [<c0942dfc>] (__pm_runtime_resume) from [<c0d4231c>] (fsl_sai_probe+0x2b8/0x65c) [<c0d4231c>] (fsl_sai_probe) from [<c0935b08>] (platform_probe+0x58/0xb8) [<c0935b08>] (platform_probe) from [<c0933264>] (really_probe.part.0+0x9c/0x334) [<c0933264>] (really_probe.part.0) from [<c093359c>] (__driver_probe_device+0xa0/0x138) [<c093359c>] (__driver_probe_device) from [<c0933664>] (driver_probe_device+0x30/0xc8) [<c0933664>] (driver_probe_device) from [<c0933c88>] (__driver_attach+0x90/0x130) [<c0933c88>] (__driver_attach) from [<c0931060>] (bus_for_each_dev+0x78/0xb8) [<c0931060>] (bus_for_each_dev) from [<c093254c>] (bus_add_driver+0xf0/0x1d8) [<c093254c>] (bus_add_driver) from [<c0934a30>] (driver_register+0x88/0x118) [<c0934a30>] (driver_register) from [<c01022c0>] (do_one_initcall+0x7c/0x3a4) [<c01022c0>] (do_one_initcall) from [<c1601204>] (kernel_init_freeable+0x198/0x22c) [<c1601204>] (kernel_init_freeable) from [<c0f5ff2c>] (kernel_init+0x10/0x128) [<c0f5ff2c>] (kernel_init) from [<c010013c>] (ret_from_fork+0x14/0x38)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20210810160318.87376-1-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v6.1.0-rc2, v6.1.0-rc1, v6.1.0-rc0, v6.0.0, v6.0.0-rc5, v6.0.0-rc4, v6.0.0-rc3, v6.0.0-rc2, v6.0.0-rc1, v6.0.0-rc0, v5.2.0, v5.2.0-rc4, v5.2.0-rc3, v5.2.0-rc2, v5.2.0-rc1, v5.2.0-rc0, v5.0.1, v5.1.0, v5.1.0-rc3, v5.1.0-rc2, v5.1.0-rc1, v5.1.0-rc0 |
|
#
5325cc34 |
| 07-Jul-2020 |
Markus Armbruster <armbru@redhat.com> |
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in an unusual order:
void object_property_set_FOO(Object *obj, FOO_TY
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value, const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and object_property_parse().
Convert callers with this Coccinelle script:
@@ identifier fun = { object_property_get, object_property_parse, object_property_set_str, object_property_set_link, object_property_set_bool, object_property_set_int, object_property_set_uint, object_property_set, object_property_set_qobject }; expression obj, v, name, errp; @@ - fun(obj, v, name, errp) + fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by ARMSSE being used both as typedef and function-like macro there. Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused by RXCPU being used both as typedef and function-like macro there. Convert manually. The other files using RXCPU that way don't need conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20200707160613.848843-27-armbru@redhat.com> [Straightforwad conflict with commit 2336172d9b "audio: set default value for pcspk.iobase property" resolved]
show more ...
|