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Searched defs:v_add_u32_dpp (Results 1 – 25 of 45) sorted by relevance

12

/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14445 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14472 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14481 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14496 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s93 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
H A Dgfx7_unsupported.s838 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14439 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14451 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14454 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14490 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s92 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
H A Dgfx7_unsupported.s838 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14439 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14451 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14454 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14490 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s93 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
H A Dgfx7_unsupported.s838 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14439 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14451 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14454 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14490 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s92 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14439 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14451 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14454 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14490 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s93 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14439 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14451 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14454 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14490 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s93 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s8160 v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
8172 v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
8175 v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
8178 v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
8181 v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
8184 v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
8187 v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
8190 v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
8196 v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
8211 v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s14439 v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
14451 v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
14454 v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
14457 v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
14460 v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
14463 v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
14466 v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
14469 v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
14475 v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
14490 v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s93 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AMDGPU/
H A Dgfx10_unsupported.s92 v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label

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