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H A D | cadence_gem.c | 71a082a3 Tue Oct 17 19:44:21 GMT 2023 Luc Michel <luc.michel@amd.com> hw/net/cadence_gem: perform PHY access on write only
The MDIO access is done only on a write to the PHYMNTNC register. A subsequent read is used to retrieve the result but does not trigger an MDIO access by itself.
Refactor the PHY access logic to perform all accesses (MDIO reads and writes) at PHYMNTNC write time.
Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: sai.pavan.boddu@amd.com Message-id: 20231017194422.4124691-11-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 71a082a3 Tue Oct 17 19:44:21 GMT 2023 Luc Michel <luc.michel@amd.com> hw/net/cadence_gem: perform PHY access on write only
The MDIO access is done only on a write to the PHYMNTNC register. A subsequent read is used to retrieve the result but does not trigger an MDIO access by itself.
Refactor the PHY access logic to perform all accesses (MDIO reads and writes) at PHYMNTNC write time.
Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: sai.pavan.boddu@amd.com Message-id: 20231017194422.4124691-11-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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