| /dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 610 unsigned SrcReg, SrcReg2; in optimizeCmpInstr() local
612 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
614 (SrcReg2 != 0 && TargetRegisterInfo::isPhysicalRegister(SrcReg2))) in optimizeCmpInstr()
618 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 610 unsigned SrcReg, SrcReg2; in optimizeCmpInstr() local
612 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
614 (SrcReg2 != 0 && TargetRegisterInfo::isPhysicalRegister(SrcReg2))) in optimizeCmpInstr()
618 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2540 SrcReg2 = 0; in analyzeCompare()
2547 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2554 SrcReg2 = 0; in analyzeCompare()
2628 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2629 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2646 OI->getOperand(1).getReg() == SrcReg2) in isRedundantFlagInstr()
2755 if (SrcReg2 != 0) in optimizeCompareInstr()
2903 if (!IsSub || (SrcReg2 != 0 && SubAdd->getOperand(1).getReg() == SrcReg2 && in optimizeCompareInstr()
2980 unsigned SrcReg, SrcReg2; in shouldSink() local
2983 analyzeCompare(*Next, SrcReg, SrcReg2, CmpMask, CmpValue) && in shouldSink()
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2525 SrcReg2 = 0;
2532 SrcReg2 = MI.getOperand(1).getReg();
2539 SrcReg2 = 0;
2613 OI->getOperand(2).getReg() == SrcReg2) ||
2614 (OI->getOperand(1).getReg() == SrcReg2 &&
2631 OI->getOperand(1).getReg() == SrcReg2)
2740 if (SrcReg2 != 0)
2888 if (!IsSub || (SrcReg2 != 0 && SubAdd->getOperand(1).getReg() == SrcReg2 &&
2963 unsigned SrcReg, SrcReg2;
2966 analyzeCompare(*Next, SrcReg, SrcReg2, CmpMask, CmpValue) &&
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2732 SrcReg2 = 0; in analyzeCompare()
2740 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2747 SrcReg2 = 0; in analyzeCompare()
2801 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2802 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2811 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2838 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2847 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
2970 if (SrcReg2 != 0) in optimizeCompareInstr()
3141 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2743 SrcReg2 = 0; in analyzeCompare()
2751 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2758 SrcReg2 = 0; in analyzeCompare()
2812 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2813 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2822 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2849 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2858 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
2981 if (SrcReg2 != 0) in optimizeCompareInstr()
3152 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2743 SrcReg2 = 0; in analyzeCompare()
2751 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2758 SrcReg2 = 0; in analyzeCompare()
2812 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2813 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2822 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2849 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2858 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
2981 if (SrcReg2 != 0) in optimizeCompareInstr()
3152 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 481 Register &SrcReg2, int &Mask, int &Value) const override;
484 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 485 Register &SrcReg2, int &Mask, int &Value) const override;
488 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 485 Register &SrcReg2, int &Mask, int &Value) const override;
488 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 287 unsigned &SrcReg2, int &CmpMask,
295 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1596 unsigned &SrcReg2, int &Mask, in analyzeCompare() argument
1607 SrcReg2 = 0; in analyzeCompare()
1618 SrcReg2 = MI.getOperand(2).getReg(); in analyzeCompare()
1626 unsigned SrcReg2, int Mask, int Value, in optimizeCompareInstr() argument
1726 if (SrcReg2 != 0) in optimizeCompareInstr()
1804 Instr.getOperand(2).getReg() == SrcReg2) || in optimizeCompareInstr()
1805 (Instr.getOperand(1).getReg() == SrcReg2 && in optimizeCompareInstr()
1850 ShouldSwap = SrcReg2 != 0 && Sub->getOperand(1).getReg() == SrcReg2 && in optimizeCompareInstr()
3380 unsigned SrcReg2 = MI.getOperand(2).getReg(); in isSignOrZeroExtended() local
3383 !TargetRegisterInfo::isVirtualRegister(SrcReg2)) in isSignOrZeroExtended()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 527 Register &SrcReg2, int &Mask, int &Value) const override;
530 Register SrcReg2, int Mask, int Value,
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 527 Register &SrcReg2, int &Mask, int &Value) const override;
530 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 522 Register &SrcReg2, int &Mask, int &Value) const override;
525 Register SrcReg2, int Mask, int Value,
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 527 Register &SrcReg2, int &Mask, int &Value) const override;
530 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 527 Register &SrcReg2, int64_t &Mask,
531 Register SrcReg2, int64_t Mask, int64_t Value,
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 527 Register &SrcReg2, int &Mask, int &Value) const override;
530 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 522 Register &SrcReg2, int &Mask, int &Value) const override;
525 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 527 Register &SrcReg2, int &Mask, int &Value) const override;
530 Register SrcReg2, int Mask, int Value,
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 210 unsigned &SrcReg2, int &Mask, int &Value) const override;
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2771 SrcReg2 = 0; in analyzeCompare()
2779 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2786 SrcReg2 = 0; in analyzeCompare()
2840 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2841 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2850 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2877 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2886 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
3009 if (SrcReg2 != 0) in optimizeCompareInstr()
3180 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2771 SrcReg2 = 0; in analyzeCompare()
2779 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2786 SrcReg2 = 0; in analyzeCompare()
2840 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2841 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2850 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2877 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2886 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
3009 if (SrcReg2 != 0) in optimizeCompareInstr()
3180 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2781 SrcReg2 = 0; in analyzeCompare()
2789 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2796 SrcReg2 = 0; in analyzeCompare()
2850 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2851 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2860 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2887 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2896 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
3019 if (SrcReg2 != 0) in optimizeCompareInstr()
3190 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2771 SrcReg2 = 0; in analyzeCompare()
2779 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
2786 SrcReg2 = 0; in analyzeCompare()
2840 OI->getOperand(2).getReg() == SrcReg2) || in isRedundantFlagInstr()
2841 (OI->getOperand(1).getReg() == SrcReg2 && in isRedundantFlagInstr()
2850 (OI->getOperand(2).getReg() == SrcReg2 && in isRedundantFlagInstr()
2877 OI->getOperand(1).getReg() == SrcReg2) { in isRedundantFlagInstr()
2886 OI->getOperand(2).getReg() == SrcReg2) { in isRedundantFlagInstr()
3009 if (SrcReg2 != 0) in optimizeCompareInstr()
3180 (SrcReg2 != 0 && SubAdd->getOperand(OpI).getReg() == SrcReg2 && in optimizeCompareInstr()
[all …]
|