| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_clocks.c | 44 (clk_dce->regs->reg)
715 const struct dccg_registers *regs, in dce_dccg_construct() argument
724 clk_dce->regs = regs; in dce_dccg_construct()
743 const struct dccg_registers *regs, in dce_dccg_create() argument
759 clk_dce, ctx, regs, clk_shift, clk_mask); in dce_dccg_create()
766 const struct dccg_registers *regs, in dce110_dccg_create() argument
782 clk_dce, ctx, regs, clk_shift, clk_mask); in dce110_dccg_create()
791 const struct dccg_registers *regs, in dce112_dccg_create() argument
807 clk_dce, ctx, regs, clk_shift, clk_mask); in dce112_dccg_create()
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| H A D | dce_dmcu.c | 38 (dmcu_dce->regs->reg)
763 const struct dce_dmcu_registers *regs, in dce_dmcu_construct() argument
773 dmcu_dce->regs = regs; in dce_dmcu_construct()
780 const struct dce_dmcu_registers *regs, in dce_dmcu_create() argument
792 dmcu_dce, ctx, regs, dmcu_shift, dmcu_mask); in dce_dmcu_create()
802 const struct dce_dmcu_registers *regs, in dcn10_dmcu_create() argument
814 dmcu_dce, ctx, regs, dmcu_shift, dmcu_mask); in dcn10_dmcu_create()
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| H A D | dce_mem_input.c | 33 dce_mi->regs->reg
772 const struct dce_mem_input_registers *regs, in dce_mem_input_construct() argument
781 dce_mi->regs = regs; in dce_mem_input_construct()
790 const struct dce_mem_input_registers *regs, in dce112_mem_input_construct() argument
794 dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask); in dce112_mem_input_construct()
802 const struct dce_mem_input_registers *regs, in dce120_mem_input_construct() argument
806 dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask); in dce120_mem_input_construct()
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| H A D | dce_opp.c | 34 (opp110->regs->reg)
545 const struct dce_opp_registers *regs, in dce110_opp_construct() argument
555 opp110->regs = regs; in dce110_opp_construct()
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| H A D | dce_dmcu.h | 182 const struct dce_dmcu_registers *regs; member
254 const struct dce_dmcu_registers *regs,
260 const struct dce_dmcu_registers *regs,
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| /dragonfly/sys/sys/ |
| H A D | reg.h | 56 int fill_regs (struct lwp *lp, struct reg *regs);
59 int set_regs (struct lwp *lp, struct reg *regs);
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| /dragonfly/contrib/gcc-8.0/gcc/ |
| H A D | lra-remat.c | 307 for (reg = id->regs; reg != NULL; reg = reg->next) in operand_to_remat()
343 for (reg = id->regs; reg != NULL; reg = reg->next) in operand_to_remat()
358 for (struct lra_insn_reg *reg2 = id->regs; in operand_to_remat()
624 for (reg = id->regs; reg != NULL; reg = reg->next) in set_bb_regs()
675 for (reg2 = (iter == 0 ? id->regs : static_id->hard_regs); in reg_overlap_for_remat_p()
708 for (reg = (iter == 0 ? id->regs : static_id->hard_regs); in call_used_input_regno_present_p()
733 for (reg = id->regs; reg != NULL; reg = reg->next) in calculate_livein_cands()
861 for (reg = id->regs; reg != NULL; reg = reg->next) in cand_trans_fun()
1140 for (reg = cand_id->regs; reg != NULL; reg = reg->next) in do_remat()
1256 for (reg = id->regs; reg != NULL; reg = reg->next) in do_remat()
[all …]
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| H A D | resource.h | 26 CLEAR_HARD_REG_SET ((RES)->regs); } while (0)
34 HARD_REG_SET regs; /* Which registers are set or needed. */ member
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| H A D | target-globals.c | 69 g->regs = XCNEW (struct target_regs); in save_target_globals()
127 XDELETE (regs); in ~target_globals()
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| H A D | target-globals.h | 46 struct target_regs *GTY((skip)) regs;
73 this_target_regs = g->regs; in restore_target_globals()
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| /dragonfly/sys/dev/powermng/perfbias/ |
| H A D | perfbias.c | 94 u_int regs[4]; in perfbias_identify() local
102 do_cpuid(6, regs); in perfbias_identify()
103 if ((regs[2] & CPUID_THERMAL2_SETBH) == 0) in perfbias_identify()
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| /dragonfly/contrib/gcc-4.7/gcc/ |
| H A D | resource.h | 30 CLEAR_HARD_REG_SET ((RES)->regs); } while (0)
39 HARD_REG_SET regs; /* Which registers are set or needed. */ member
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| H A D | target-globals.h | 41 struct target_regs *GTY((skip)) regs;
64 this_target_regs = g->regs; in restore_target_globals()
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| /dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_opp.c | 31 (oppn10->regs->reg)
402 const struct dcn10_opp_registers *regs, in dcn10_opp_construct() argument
411 oppn10->regs = regs; in dcn10_opp_construct()
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| /dragonfly/sys/dev/misc/aperf/ |
| H A D | aperf.c | 80 uint32_t regs[4]; in aperf_identify() local
88 do_cpuid(0x00000006, regs); in aperf_identify()
89 if ((regs[2] & 1) == 0) in aperf_identify()
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| /dragonfly/contrib/binutils-2.34/gas/config/ |
| H A D | tc-i386.c | 279 const reg_entry *regs; member
4021 i.op[1].regs -= j; in optimize_encoding()
4046 && i.op[0].regs == i.op[1].regs in optimize_encoding()
4094 && i.op[0].regs == i.op[1].regs in optimize_encoding()
4115 && i.op[0].regs == i.op[1].regs in optimize_encoding()
4587 i.op[x].regs = i.op[x].regs + 8; in md_assemble()
6688 i.op[op].regs->reg_name, in check_long_reg()
6759 i.op[op].regs->reg_name, in check_qword_reg()
6809 i.op[op].regs->reg_name, in check_word_reg()
6984 i.op[0].regs in process_operands()
[all …]
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| /dragonfly/contrib/grep/src/ |
| H A D | dfasearch.c | 40 struct re_registers regs; member
477 ptr - beg, end - ptr - 1, &dc->regs); in EGexecute()
482 len = dc->regs.end[0] - start; in EGexecute()
516 &dc->regs); in EGexecute()
531 &dc->regs); in EGexecute()
538 len = dc->regs.end[0] - start; in EGexecute()
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| /dragonfly/contrib/binutils-2.27/gas/config/ |
| H A D | tc-i386.c | 257 const reg_entry *regs; member
3807 i.op[x].regs = i.op[x].regs + 8; in md_assemble()
5540 && i.op[op].regs->reg_num < 4 in check_byte_reg()
5553 i.op[op].regs->reg_name, in check_byte_reg()
5576 i.op[op].regs->reg_name, in check_byte_reg()
5600 i.op[op].regs->reg_name, in check_long_reg()
5665 i.op[op].regs->reg_name, in check_qword_reg()
5710 i.op[op].regs->reg_name, in check_word_reg()
5898 i.op[0].regs in process_operands()
5969 i.op[first_reg_op + 1].regs = i.op[first_reg_op].regs; in process_operands()
[all …]
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| /dragonfly/sys/dev/drm/amd/display/dc/gpio/ |
| H A D | hw_gpio.c | 35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
40 (gpio->regs->reg)
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5416/ |
| H A D | ar5416_misc.c | 615 ar5416CompareDbgHang(struct ath_hal *ah, const mac_dbg_regs_t *regs, in ar5416CompareDbgHang() argument
625 if (((regs->dma_dbg_4 >> (5*i)) & 0x1f) == in ar5416CompareDbgHang()
630 if (((regs->dma_dbg_5 >> (5*i)) & 0x1f) == in ar5416CompareDbgHang()
636 if ((regs->dma_dbg_6 & 0x3) == check->dcu_complete_state) in ar5416CompareDbgHang()
640 if (((regs->dma_dbg_3 >> 18) & 0xf) == check->qcu_stitch_state) in ar5416CompareDbgHang()
644 if (((regs->dma_dbg_3 >> 22) & 0xf) == check->qcu_fetch_state) in ar5416CompareDbgHang()
648 if (((regs->dma_dbg_3 >> 26) & 0x7) == check->qcu_complete_state) in ar5416CompareDbgHang()
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| /dragonfly/sys/dev/drm/amd/display/dc/bios/ |
| H A D | bios_parser_helper.c | 51 (bios->regs->reg)
86 if (bios->regs->BIOS_SCRATCH_3) /*follow up with other asic, todo*/ in bios_get_vga_enabled_displays()
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| /dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce110/ |
| H A D | aux_engine_dce110.h | 56 const struct dce110_aux_registers *regs; member
72 const struct dce110_aux_registers *regs; member
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| /dragonfly/tools/tools/ath/athdecode/ |
| H A D | main.c | 48 struct dumpreg *regs[MAXREGS]; member
296 struct dumpreg *r = state.regs[j]; in register_regs()
326 state.regs[state.nregs++] = nr; in register_regs()
330 qsort(state.regs, state.nregs, sizeof(struct dumpreg *), regcompar); in register_regs()
354 const struct dumpreg *dr = state.regs[i]; in findreg()
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| /dragonfly/sys/ddb/ |
| H A D | db_watch.c | 63 db_regs_t *regs);
243 db_find_watchpoint(vm_map_t map, db_addr_t addr, db_regs_t *regs) in db_find_watchpoint() argument
268 db_single_step(regs); in db_find_watchpoint()
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| /dragonfly/contrib/gdb-7/gdb/ |
| H A D | amd64-tdep.h | 77 struct regcache *regs);
81 struct regcache *regs);
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