/qemu/hw/intc/ |
H A D | apic.c | 375 s->log_dest = ((s->initial_apic_id & 0xffff0) << 16) | in apic_set_base() 653 cpu_x86_load_seg_cache_sipi(s->cpu, s->sipi_vector); in apic_sipi() 730 if (!s) in apic_get_interrupt() 762 if (!s) in apic_accept_pic_intr() 777 timer_mod(s->timer, s->next_time); in apic_timer_update() 788 apic_timer_update(s, s->next_time); in apic_timer() 1011 (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), in apic_register_write() 1036 apic_timer_update(s, s->initial_count_load_time); in apic_register_write() 1122 timer_mod(s->timer, s->timer_expiry); in apic_post_load() 1147 memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi", in apic_realize() [all …]
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H A D | pl190.c | 52 return (s->level | s->soft_level) & s->irq_enable & ~s->fiq_select; in pl190_irq_level() 61 set = (level & s->prio_mask[s->priority]) != 0; in pl190_update() 63 set = ((s->level | s->soft_level) & s->fiq_select) != 0; in pl190_update() 75 pl190_update(s); in pl190_set_irq() 95 pl190_update(s); in pl190_update_vectors() 117 return (s->level | s->soft_level) & s->fiq_select; in pl190_read() 119 return s->level | s->soft_level; in pl190_read() 137 if ((s->level | s->soft_level) & s->prio_mask[i + 1]) { in pl190_read() 148 s->prev_prio[i] = s->priority; in pl190_read() 152 return s->vect_addr[s->priority]; in pl190_read() [all …]
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/qemu/hw/ppc/ |
H A D | ppc4xx_sdram.c | 371 s->addr = 0; in ppc4xx_sdram_ddr_reset() 372 s->bear = 0; in ppc4xx_sdram_ddr_reset() 375 s->cfg = 0; in ppc4xx_sdram_ddr_reset() 395 if (s->nbanks < 1 || s->nbanks > 4) { in ppc4xx_sdram_ddr_realize() 403 if (!ppc4xx_sdram_banks(s->dram_mr, s->nbanks, s->bank, in ppc4xx_sdram_ddr_realize() 409 s->bank[i].bcr = sdram_ddr_bcr(s->bank[i].base, s->bank[i].size); in ppc4xx_sdram_ddr_realize() 410 sdram_bank_set_bcr(&s->bank[i], s->bank[i].bcr, in ppc4xx_sdram_ddr_realize() 662 if (s->nbanks < 1 || s->nbanks > 4) { in ppc4xx_sdram_ddr2_realize() 670 if (!ppc4xx_sdram_banks(s->dram_mr, s->nbanks, s->bank, in ppc4xx_sdram_ddr2_realize() 676 s->bank[i].bcr = sdram_ddr2_bcr(s->bank[i].base, s->bank[i].size); in ppc4xx_sdram_ddr2_realize() [all …]
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/qemu/hw/misc/ |
H A D | ivshmem.c | 259 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector]; in ivshmem_vector_notify() 357 s->msi_vectors[vector].pdev = PCI_DEVICE(s); in watch_vector_notifier() 414 s->peers = g_renew(Peer, s->peers, nb_peers); in resize_peers() 504 s->ivshmem_bar2 = &s->server_bar2; in process_msg_shmem() 511 if (posn >= s->nb_peers || posn == s->vm_id) { in process_msg_disconnect() 580 assert(s->msg_buffered_bytes < sizeof(s->msg_buf)); in ivshmem_can_receive() 581 return sizeof(s->msg_buf) - s->msg_buffered_bytes; in ivshmem_can_receive() 594 if (s->msg_buffered_bytes < sizeof(s->msg_buf)) { in ivshmem_read() 732 s->msi_vectors = g_new0(MSIVector, s->vectors); in ivshmem_setup_interrupts() 850 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s, in ivshmem_common_realize() [all …]
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H A D | arm_sysctl.c | 101 s->leds = 0; in arm_sysctl_reset() 102 s->lockval = 0; in arm_sysctl_reset() 103 s->cfgdata1 = 0; in arm_sysctl_reset() 104 s->cfgdata2 = 0; in arm_sysctl_reset() 105 s->flags = 0; in arm_sysctl_reset() 106 s->resetlevel = 0; in arm_sysctl_reset() 116 s->db_clock[i] = s->db_clock_reset[i]; in arm_sysctl_reset() 120 s->sys_clcd = 0; in arm_sysctl_reset() 140 return s->leds; in arm_sysctl_read() 603 memory_region_init_io(&s->iomem, OBJECT(dev), &arm_sysctl_ops, s, in arm_sysctl_init() [all …]
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H A D | sifive_u_otp.c | 76 return s->fuse[s->pa & SIFIVE_U_OTP_PA_MASK]; in sifive_u_otp_read() 156 if (s->pwe && !s->pas) { in sifive_u_otp_write() 157 if (GET_FUSEARRAY_BIT(s->fuse_wo, s->pa, s->paio)) { in sifive_u_otp_write() 160 s->pa, s->paio); in sifive_u_otp_write() 165 SET_FUSEARRAY_BIT(s->fuse, s->pa, s->paio, s->pdin); in sifive_u_otp_write() 177 SET_FUSEARRAY_BIT(s->fuse_wo, s->pa, s->paio, WRITTEN_BIT_ON); in sifive_u_otp_write() 244 memset(s->fuse, 0xff, sizeof(s->fuse)); in sifive_u_otp_realize() 247 s->fuse[SIFIVE_U_OTP_SERIAL_ADDR] = s->serial; in sifive_u_otp_realize() 248 s->fuse[SIFIVE_U_OTP_SERIAL_ADDR + 1] = ~(s->serial); in sifive_u_otp_realize() 250 if (s->blk) { in sifive_u_otp_realize() [all …]
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/qemu/hw/m68k/ |
H A D | mcf5206.c | 45 if ((s->tmr & TMR_ORI) != 0 && (s->ter & TER_REF)) in m5206_timer_update() 53 s->tmr = 0; in m5206_timer_reset() 54 s->trr = 0; in m5206_timer_reset() 88 ptimer_set_limit(s->timer, s->trr, 0); in m5206_timer_recalibrate() 112 return s->trr - ptimer_get_count(s->timer); in m5206_timer_read() 154 s->irq = irq; in m5206_timer_init() 192 active = s->ipr & ~s->imr; in m5206_find_pending_irq() 285 s->par = 0; in m5206_mbar_reset() 596 s->pic = qemu_allocate_irqs(m5206_mbar_set_irq, s, 14); in mcf5206_mbar_realize() 597 m5206_timer_init(&s->timer[0], s->pic[9]); in mcf5206_mbar_realize() [all …]
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/qemu/hw/display/ |
H A D | omap_lcdc.c | 55 if (s->frame_done && (s->interrupts & 1)) { in omap_lcd_interrupts() 60 if (s->palette_done && (s->interrupts & 2)) { in omap_lcd_interrupts() 107 s++; in draw_line2_32() 134 s++; in draw_line4_32() 154 s++; in draw_line8_32() 348 if (!s->dma->mpu->port[s->dma->src].addr_valid(s->dma->mpu, in omap_lcd_update() 367 s->dma->phys_framebuffer[0] = s->dma->src_f1_top; in omap_lcd_update() 370 if (s->plm != 2 && !s->palette_done) { in omap_lcd_update() 385 return (s->tft << 23) | (s->plm << 20) | in omap_lcdc_read() 387 (s->mono << 1) | s->enable | s->ctrl | 0xfe000c34; in omap_lcdc_read() [all …]
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H A D | pl110.c | 210 return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR); in pl110_enabled() 232 if ((s->version != VERSION_PL111) && (s->bpp == BPP_16)) { in pl110_update_display() 299 s->cols, s->rows, in pl110_update_display() 316 qemu_console_resize(s->con, s->cols, s->rows); in pl110_invalidate_display() 358 if (width != s->cols || height != s->rows) { in pl110_resize() 371 if (s->int_status & s->int_mask) { in pl110_update() 427 return s->int_status & s->int_mask; in pl110_read() 460 pl110_resize(s, n, s->rows); in pl110_write() 465 pl110_resize(s, s->cols, n); in pl110_write() 495 qemu_console_resize(s->con, s->cols, s->rows); in pl110_write() [all …]
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H A D | dm163.c | 61 s->sin = 0; in dm163_reset_hold() 62 s->dck = 0; in dm163_reset_hold() 69 memset(s->outputs, 0, sizeof(s->outputs)); in dm163_reset_hold() 75 memset(s->buffer[i], 0, sizeof(s->buffer[0])); in dm163_reset_hold() 92 s->selbk ? s->bank1_shift_register : s->bank0_shift_register; in dm163_dck_gpio_handler() 111 if (s->rst_b && !s->en_b) { in dm163_propagate_outputs() 112 memcpy(s->outputs, s->latched_outputs, sizeof(s->outputs)); in dm163_propagate_outputs() 114 memset(s->outputs, 0, sizeof(s->outputs)); in dm163_propagate_outputs() 136 s->buffer_idx_of_row[row] = s->last_buffer_idx; in dm163_propagate_outputs() 198 s->latched_outputs[led] = dm163_bank0(s, led) * dm163_bank1(s, led); in dm163_lat_b_gpio_handler() [all …]
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H A D | g364fb.c | 116 xmin = s->width; in g364fb_draw_graphic8() 248 if (s->width == 0 || s->height == 0) in g364fb_update_display() 253 qemu_console_resize(s->con, s->width, s->height); in g364fb_update_display() 272 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size); in g364fb_invalidate_display() 281 memset(s->color_palette, 0, sizeof(s->color_palette)); in g364fb_reset() 282 memset(s->cursor_palette, 0, sizeof(s->cursor_palette)); in g364fb_reset() 283 memset(s->cursor, 0, sizeof(s->cursor)); in g364fb_reset() 285 s->ctla = 0; in g364fb_reset() 287 s->width = s->height = 0; in g364fb_reset() 339 s->depth = depths[(s->ctla & 0x00700000) >> 20]; in g364fb_update_depth() [all …]
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H A D | vmware_vga.c | 566 if (!s->config || !s->enable) { in vmsvga_fifo_length() 576 if ((s->fifo_min | s->fifo_max | s->fifo_next | s->fifo_stop) & 3) { in vmsvga_fifo_length() 592 num = s->fifo_next - s->fifo_stop; in vmsvga_fifo_length() 594 num += s->fifo_max - s->fifo_min; in vmsvga_fifo_length() 604 if (s->fifo_stop >= s->fifo_max) { in vmsvga_fifo_read_raw() 605 s->fifo_stop = s->fifo_min; in vmsvga_fifo_read_raw() 1009 s->vga.hw_ops->invalidate(&s->vga); in vmsvga_value_write() 1010 if (s->enable && s->config) { in vmsvga_value_write() 1087 dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); in vmsvga_value_write() 1131 trace_vmware_setmode(s->new_width, s->new_height, s->new_depth); in vmsvga_check_size() [all …]
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/qemu/hw/sensor/ |
H A D | tmp421.c | 183 s->buf[s->len++] = s->config[0]; in tmp421_read() 186 s->buf[s->len++] = s->config[1]; in tmp421_read() 189 s->buf[s->len++] = s->rate; in tmp421_read() 192 s->buf[s->len++] = s->status; in tmp421_read() 197 s->buf[s->len++] = (((uint16_t) s->temperature[0]) >> 8); in tmp421_read() 201 s->buf[s->len++] = (((uint16_t) s->temperature[1]) >> 8); in tmp421_read() 205 s->buf[s->len++] = (((uint16_t) s->temperature[2]) >> 8); in tmp421_read() 209 s->buf[s->len++] = (((uint16_t) s->temperature[3]) >> 8); in tmp421_read() 233 s->rate = s->buf[0]; in tmp421_write() 236 s->config[0] = s->buf[0]; in tmp421_write() [all …]
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/qemu/hw/arm/ |
H A D | xlnx-versal-virt.c | 61 s->fdt = create_device_tree(&s->fdt_size); in fdt_create() 62 if (!s->fdt) { in fdt_create() 68 s->phandle.gic = qemu_fdt_alloc_phandle(s->fdt); in fdt_create() 70 s->phandle.ethernet_phy[i] = qemu_fdt_alloc_phandle(s->fdt); in fdt_create() 72 s->phandle.clk_25Mhz = qemu_fdt_alloc_phandle(s->fdt); in fdt_create() 73 s->phandle.clk_125Mhz = qemu_fdt_alloc_phandle(s->fdt); in fdt_create() 75 s->phandle.usb = qemu_fdt_alloc_phandle(s->fdt); in fdt_create() 76 s->phandle.dwc = qemu_fdt_alloc_phandle(s->fdt); in fdt_create() 181 qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.usb); in fdt_add_usb_xhci_nodes() 205 qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc); in fdt_add_usb_xhci_nodes() [all …]
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H A D | aspeed_ast2400.c | 255 memory_region_init(&s->spi_boot_container, OBJECT(s), in aspeed_ast2400_soc_realize() 317 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0, in aspeed_ast2400_soc_realize() 351 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0, in aspeed_ast2400_soc_realize() 363 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 1, in aspeed_ast2400_soc_realize() 379 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0, in aspeed_ast2400_soc_realize() 381 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 1, in aspeed_ast2400_soc_realize() 400 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdmc), 0, in aspeed_ast2400_soc_realize() 438 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->xdma), 0, in aspeed_ast2400_soc_realize() 447 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0, in aspeed_ast2400_soc_realize() 456 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0, in aspeed_ast2400_soc_realize() [all …]
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/qemu/chardev/ |
H A D | char-socket.c | 55 s->state = state; in tcp_chr_change_state() 334 if (!s->ioc) { in tcp_chr_add_watch() 382 if (s->ioc) { in tcp_chr_free_connection() 386 s->sioc = NULL; in tcp_chr_free_connection() 388 s->ioc = NULL; in tcp_chr_free_connection() 449 if (s->addr) { in update_disconnected_filename() 476 if (s->reconnect_time && !s->reconnect_timer) { in tcp_chr_disconnect_locked() 603 s->hup_source = qio_channel_create_watch(s->ioc, G_IO_HUP); in update_ioc_handlers() 832 s->ioc, s->tls_creds, in tcp_chr_tls_init() 837 s->ioc, s->tls_creds, in tcp_chr_tls_init() [all …]
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/qemu/hw/usb/ |
H A D | dev-smartcard-reader.c | 587 if (s->current_bulk_in != NULL || s->bulk_in_pending_num == 0) { in ccid_bulk_in_get() 629 ccid_reset(s); in ccid_detach() 638 ccid_reset(s); in ccid_handle_reset() 730 uint8_t ret = ccid_card_status(s) | (s->bmCommandStatus << 6); in ccid_calc_status() 846 if (s->card) { in ccid_write_data_block_atr() 1082 len = MIN(s->current_bulk_in->len - s->current_bulk_in->pos, in ccid_bulk_in_copy_to_guest() 1089 if (s->current_bulk_in->pos == s->current_bulk_in->len in ccid_bulk_in_copy_to_guest() 1217 ccid_reset(s); in ccid_card_card_removed() 1339 ccid_reset(s); in ccid_realize() 1353 s->dev.state = s->state_vmstate; in ccid_post_load() [all …]
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/qemu/hw/net/ |
H A D | allwinner-sun8i-emac.c | 285 allwinner_sun8i_emac_mii_reset(s, s->mii_st & in allwinner_sun8i_emac_mii_cmd() 288 s->mii_cr = s->mii_data & ~(MII_REG_CR_RESET | in allwinner_sun8i_emac_mii_cmd() 293 s->mii_adv = s->mii_data; in allwinner_sun8i_emac_mii_cmd() 307 s->mii_data = s->mii_cr; in allwinner_sun8i_emac_mii_cmd() 310 s->mii_data = s->mii_st; in allwinner_sun8i_emac_mii_cmd() 319 s->mii_data = s->mii_adv; in allwinner_sun8i_emac_mii_cmd() 339 qemu_set_irq(s->irq, (s->int_sta & s->int_en) != 0); in allwinner_sun8i_emac_update_irq() 403 allwinner_sun8i_emac_get_desc(s, desc, s->tx_desc_curr); in allwinner_sun8i_emac_tx_desc() 444 s->rx_desc_curr = allwinner_sun8i_emac_rx_desc(s, &desc, in allwinner_sun8i_emac_receive() 496 s->rx_desc_curr = s->rx_desc_head; in allwinner_sun8i_emac_receive() [all …]
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H A D | cadence_gem.c | 579 s->regs[R_ISR] |= flag & ~(s->regs[R_IMR]); in gem_set_isr() 595 memset(&s->regs_ro[0], 0, sizeof(s->regs_ro)); in gem_init_register_masks() 626 memset(&s->regs_wo[0], 0, sizeof(s->regs_wo)); in gem_init_register_masks() 703 qemu_set_irq(s->irq[0], !!s->regs[R_ISR]); in gem_update_int_status() 1152 address_space_write(&s->dma_as, rx_desc_get_buffer(s, s->rx_desc[q]) + in gem_receive() 1455 memset(&s->regs[0], 0, sizeof(s->regs)); in gem_reset() 1463 s->regs[R_MODID] = s->revision; in gem_reset() 1469 s->regs[R_JUMBO_MAX_LEN] = s->jumbo_max_len; in gem_reset() 1579 s->regs[offset] &= ~(s->regs_rtc[offset]); in gem_read() 1606 readonly = s->regs[offset] & (s->regs_ro[offset] | s->regs_w1c[offset]); in gem_write() [all …]
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H A D | vmxnet3.c | 1155 memcpy(&s->conf.macaddr.a, &s->perm_mac.a, sizeof(s->perm_mac.a)); in vmxnet3_reset_mac() 1352 return s->msix_used || msi_enabled(PCI_DEVICE(s)) in vmxnet3_verify_intx() 1461 assert(vmxnet3_verify_intx(s, s->event_int_idx)); in vmxnet3_activate_device() 1527 net_tx_pkt_init(&s->tx_pkt, s->max_tx_frags); in vmxnet3_activate_device() 2033 vmxnet3_trigger_interrupt(s, s->event_int_idx); in vmxnet3_set_link_status() 2070 memcpy(&s->perm_mac.a, &s->conf.macaddr.a, sizeof(s->perm_mac.a)); in vmxnet3_net_init() 2083 s->peer_has_vhdr = vmxnet3_peer_has_vnet_hdr(s); in vmxnet3_net_init() 2147 msix_uninit(d, &s->msix_bar, &s->msix_bar); in vmxnet3_cleanup_msix() 2206 memory_region_init_io(&s->bar0, OBJECT(s), &b0_ops, s, in vmxnet3_pci_realize() 2211 memory_region_init_io(&s->bar1, OBJECT(s), &b1_ops, s, in vmxnet3_pci_realize() [all …]
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/qemu/hw/ssi/ |
H A D | xlnx-versal-ospi.c | 361 s->regs[R_IRQ_STATUS_REG] |= s->regs[R_IRQ_MASK_REG] & set_mask; in set_irq() 366 qemu_set_irq(s->irq, !!(s->regs[R_IRQ_STATUS_REG] & in ospi_update_irq_line() 461 return s->rd_ind_op[0].completed && s->wr_ind_op[0].completed; in ospi_ind_op_all_completed() 755 fifo8_push(&s->rx_sram, fifo8_pop(&s->rx_fifo)); in ospi_ind_read() 921 fifo8_push(&s->tx_fifo, fifo8_pop(&s->tx_sram)); in ospi_ind_write() 1004 s->stig_membank[i] = fifo8_pop(&s->rx_fifo); in ospi_stig_fill_membank() 1065 while (cs < s->num_cs && block >= flash_blocks(s, cs)) { in ospi_block_address() 1654 return s->dac_with_indac || !s->dac_enable; in ospi_is_indac_active() 1742 s->cs_lines = g_new0(qemu_irq, s->num_cs); in xlnx_versal_ospi_realize() 1765 s->regs_info, s->regs, in xlnx_versal_ospi_init() [all …]
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/qemu/tests/qtest/ |
H A D | aspeed_fsi-test.c | 92 base = aspeed_fsi_readl(s, reg); in test_fsi_reg_change() 93 aspeed_fsi_writel(s, reg, newval); in test_fsi_reg_change() 94 curval = aspeed_fsi_readl(s, reg); in test_fsi_reg_change() 96 aspeed_fsi_writel(s, reg, base); in test_fsi_reg_change() 97 curval = aspeed_fsi_readl(s, reg); in test_fsi_reg_change() 103 QTestState *s = (QTestState *)data; in test_fsi0_master_regs() local 118 QTestState *s = (QTestState *)data; in test_fsi1_master_regs() local 133 QTestState *s = (QTestState *)data; in test_fsi0_getcfam_addr0() local 157 QTestState *s = (QTestState *)data; in test_fsi1_getcfam_addr0() local 181 QTestState *s; in main() local [all …]
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/qemu/hw/audio/ |
H A D | adlib.c | 152 AUD_init_time_stamp_out (s->voice, &s->ats); in timer_handler() 192 if (!(s->active && s->enabled) || !samples) { in adlib_callback() 204 s->pos = (s->pos + written) % s->samples; in adlib_callback() 211 samples = MIN (samples, s->samples - s->pos); in adlib_callback() 216 YM3812UpdateOne (s->opl, s->mixbuf + s->pos, samples); in adlib_callback() 223 s->pos = (s->pos + written) % s->samples; in adlib_callback() 262 s->opl = OPLCreate (3579545, s->freq); in adlib_realizefn() 268 OPLSetTimerHandler(s->opl, timer_handler, s); in adlib_realizefn() 281 s, in adlib_realizefn() 292 s->mixbuf = g_malloc0 (s->samples << SHIFT); in adlib_realizefn() [all …]
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/qemu/block/ |
H A D | mirror.c | 199 MirrorBlockJob *s = op->s; in mirror_iteration_done() local 236 MirrorBlockJob *s = op->s; in mirror_write_complete() local 253 MirrorBlockJob *s = op->s; in mirror_read_complete() local 350 MirrorBlockJob *s = op->s; in mirror_co_read() local 355 max_bytes = s->granularity * s->max_iov; in mirror_co_read() 446 .s = s, in mirror_perform() 967 if (s->base == blk_bs(s->target)) { in mirror_run() 1008 s->buf_size = MAX(s->buf_size, s->target_cluster_size); in mirror_run() 1074 trace_mirror_yield(s, cnt, s->buf_free_count, s->in_flight); in mirror_run() 1458 .s = s, in active_write_prepare() [all …]
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/qemu/hw/gpio/ |
H A D | npcm7xx_gpio.c | 84 qemu_set_irq(s->irq, !!(s->regs[NPCM7XX_GPIO_EVST] in npcm7xx_gpio_update_events() 100 drive_en = s->regs[NPCM7XX_GPIO_OE] & ~(s->regs[NPCM7XX_GPIO_OTYP] in npcm7xx_gpio_update_pins() 117 s->pin_level = s->ext_level & s->ext_driven; in npcm7xx_gpio_update_pins() 121 s->pin_level |= not_driven & s->regs[NPCM7XX_GPIO_PU]; in npcm7xx_gpio_update_pins() 145 s->regs[NPCM7XX_GPIO_DIN] = ((s->pin_level & s->regs[NPCM7XX_GPIO_IEM]) in npcm7xx_gpio_update_pins() 338 s->ext_level = deposit32(s->ext_level, line, 1, level > 0); in npcm7xx_gpio_set_input() 347 memset(s->regs, 0, sizeof(s->regs)); in npcm7xx_gpio_enter_reset() 349 s->regs[NPCM7XX_GPIO_PU] = s->reset_pu; in npcm7xx_gpio_enter_reset() 350 s->regs[NPCM7XX_GPIO_PD] = s->reset_pd; in npcm7xx_gpio_enter_reset() 351 s->regs[NPCM7XX_GPIO_OSRC] = s->reset_osrc; in npcm7xx_gpio_enter_reset() [all …]
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