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Searched refs:AHB3LPENR (Results 1 – 25 of 45) sorted by relevance

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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A Dstm32h7xx_hal_rcc.h4253 #define __HAL_RCC_MDMA_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_MDMALPEN))
4254 #define __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_DMA2DLPEN))
4257 #define __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_JPGDECLPEN))
4260 #define __HAL_RCC_FLASH_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FLASHLPEN))
4261 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
4262 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
4263 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_SDMMC1LPEN))
4264 #define __HAL_RCC_DTCM1_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_DTCM1LPEN))
4265 #define __HAL_RCC_DTCM2_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_DTCM2LPEN))
4266 #define __HAL_RCC_ITCM_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_ITCMLPEN))
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H A Dstm32h7xx_ll_bus.h493 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
495 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
529 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockSleep()
2770 SET_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_EnableClockSleep()
2772 tmpreg = READ_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_EnableClockSleep()
2804 CLEAR_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_DisableClockSleep()
4446 SET_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
4448 tmpreg = READ_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
4480 CLEAR_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_DisableClockSleep()
/dports/devel/qbs/qbs-src-1.21.0/examples/baremetal/stm32f4discovery/blueblink/
H A Dsystem.h97 __IO uint32_t AHB3LPENR; member
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_rcc.c2365 RCC->AHB3LPENR |= RCC_AHB3Periph; in RCC_AHB3PeriphClockLPModeCmd()
2369 RCC->AHB3LPENR &= ~RCC_AHB3Periph; in RCC_AHB3PeriphClockLPModeCmd()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_rcc.c2365 RCC->AHB3LPENR |= RCC_AHB3Periph; in RCC_AHB3PeriphClockLPModeCmd()
2369 RCC->AHB3LPENR &= ~RCC_AHB3Periph; in RCC_AHB3PeriphClockLPModeCmd()
/dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/arm/
H A Dstm32f429.pp124 AHB3LPENR,
H A Dstm32f401xx.pp264 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f411xe.pp265 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f407xx.pp466 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f446xx.pp419 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
/dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/arm/
H A Dstm32f429.pp124 AHB3LPENR,
H A Dstm32f401xx.pp264 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f411xe.pp265 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f407xx.pp466 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f446xx.pp419 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
/dports/lang/fpc/fpc-3.2.2/rtl/embedded/arm/
H A Dstm32f429.pp124 AHB3LPENR,
H A Dstm32f401xx.pp264 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f411xe.pp265 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f407xx.pp466 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f446xx.pp419 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
/dports/lang/fpc-utils/fpc-3.2.2/rtl/embedded/arm/
H A Dstm32f429.pp124 AHB3LPENR,
H A Dstm32f401xx.pp264 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f411xe.pp265 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f407xx.pp466 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register
H A Dstm32f446xx.pp419 AHB3LPENR : longword; // RCC AHB3 peripheral clock enable in low power mode register

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