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Searched refs:CPSR_I (Results 1 – 25 of 48) sorted by relevance

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/dports/games/libretro-stella2014/stella2014-libretro-64f9364/stella/src/emucore/
H A DThumbulator.hxx55 #define CPSR_I (1<<7) macro
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/target-arm/
H A Dhelper.c206 env->uncached_cpsr = ARM_CPU_MODE_SVC | CPSR_A | CPSR_F | CPSR_I; in cpu_reset()
210 env->uncached_cpsr &= ~CPSR_I; in cpu_reset()
749 mask = CPSR_I; in do_interrupt()
774 mask = CPSR_I; in do_interrupt()
793 mask = CPSR_A | CPSR_I; in do_interrupt()
799 mask = CPSR_A | CPSR_I; in do_interrupt()
806 mask = CPSR_A | CPSR_I; in do_interrupt()
813 mask = CPSR_A | CPSR_I | CPSR_F; in do_interrupt()
1862 return (env->uncached_cpsr & CPSR_I) != 0; in HELPER()
1915 env->uncached_cpsr |= CPSR_I; in HELPER()
[all …]
H A Dcpu.h238 #define CPSR_I (1 << 7) macro
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dcpu.h438 #define CPSR_I (1U << 7) macro
458 #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F)
H A Dhelper.c678 ret |= CPSR_I; in isr_read()
3520 mask = CPSR_I; in arm_cpu_do_interrupt()
3550 mask = CPSR_I; in arm_cpu_do_interrupt()
3578 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt()
3590 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt()
3597 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt()
3604 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt()
3610 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt()
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dcpu.h438 #define CPSR_I (1U << 7) macro
458 #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F)
H A Dhelper.c678 ret |= CPSR_I; in isr_read()
3520 mask = CPSR_I; in arm_cpu_do_interrupt()
3550 mask = CPSR_I; in arm_cpu_do_interrupt()
3578 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt()
3590 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt()
3597 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt()
3604 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt()
3610 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dmachine.c504 if (val & CPSR_I) { in get_cpsr()
H A Dcpu.h1031 #define CPSR_I (1U << 7) macro
1051 #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F)
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dmachine.c554 if (val & CPSR_I) { in get_cpsr()
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dmachine.c554 if (val & CPSR_I) { in get_cpsr()
H A Dhelper.c2094 ret |= CPSR_I; in isr_read()
2098 ret |= CPSR_I; in isr_read()
9476 mask |= CPSR_I; in arm_cpu_do_interrupt_aarch32_hyp()
9531 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
9540 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
9553 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9564 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9571 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9583 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt_aarch32()
9594 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dmachine.c554 if (val & CPSR_I) { in get_cpsr()
H A Dhelper.c2141 ret |= CPSR_I; in isr_read()
2145 ret |= CPSR_I; in isr_read()
9316 mask |= CPSR_I; in arm_cpu_do_interrupt_aarch32_hyp()
9371 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
9380 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
9393 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9404 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9411 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9423 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt_aarch32()
9434 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dmachine.c553 if (val & CPSR_I) { in get_cpsr()
H A Dhelper.c1944 ret |= CPSR_I; in isr_read()
1948 ret |= CPSR_I; in isr_read()
8187 mask |= CPSR_I; in arm_cpu_do_interrupt_aarch32_hyp()
8242 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
8251 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
8264 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
8275 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
8282 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
8294 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt_aarch32()
8305 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
[all …]
H A Dcpu.h1145 #define CPSR_I (1U << 7) macro
1165 #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F)
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dmachine.c553 if (val & CPSR_I) { in get_cpsr()
H A Dhelper.c1944 ret |= CPSR_I; in isr_read()
1948 ret |= CPSR_I; in isr_read()
8187 mask |= CPSR_I; in arm_cpu_do_interrupt_aarch32_hyp()
8242 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
8251 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
8264 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
8275 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
8282 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
8294 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt_aarch32()
8305 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
[all …]
H A Dcpu.h1145 #define CPSR_I (1U << 7) macro
1165 #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F)
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dmachine.c554 if (val & CPSR_I) { in get_cpsr()
H A Dhelper.c2141 ret |= CPSR_I; in isr_read()
2145 ret |= CPSR_I; in isr_read()
9312 mask |= CPSR_I; in arm_cpu_do_interrupt_aarch32_hyp()
9367 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
9376 mask = CPSR_I; in arm_cpu_do_interrupt_aarch32()
9389 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9400 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9407 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
9419 mask = CPSR_A | CPSR_I | CPSR_F; in arm_cpu_do_interrupt_aarch32()
9430 mask = CPSR_A | CPSR_I; in arm_cpu_do_interrupt_aarch32()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dmachine.c574 if (val & CPSR_I) { in get_cpsr()
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dmachine.c574 if (val & CPSR_I) { in get_cpsr()
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dcpu-exec.c488 || !(env->uncached_cpsr & CPSR_I))) { in cpu_exec()

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