/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/target-arm/ |
H A D | cpu.h | 241 #define CPSR_IT_2_7 (0xfc00) macro 253 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 294 if (mask & CPSR_IT_2_7) { in xpsr_write()
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H A D | helper.c | 393 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/ |
H A D | cpu.h | 441 #define CPSR_IT_2_7 (0xfc00U) macro 460 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 579 if (mask & CPSR_IT_2_7) { in xpsr_write()
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H A D | helper.c | 3076 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/ |
H A D | cpu.h | 441 #define CPSR_IT_2_7 (0xfc00U) macro 460 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 579 if (mask & CPSR_IT_2_7) { in xpsr_write()
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H A D | helper.c | 3076 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/ |
H A D | cpu.h | 1034 #define CPSR_IT_2_7 (0xfc00U) macro 1053 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1066 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 6123 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/ |
H A D | cpu.h | 1148 #define CPSR_IT_2_7 (0xfc00U) macro 1167 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1180 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 7510 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu42/qemu-4.2.1/target/arm/ |
H A D | cpu.h | 1148 #define CPSR_IT_2_7 (0xfc00U) macro 1167 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1180 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 7510 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu5/qemu-5.2.0/target/arm/ |
H A D | cpu.h | 1233 #define CPSR_IT_2_7 (0xfc00U) macro 1247 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1258 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 8767 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/ |
H A D | cpu.h | 1201 #define CPSR_IT_2_7 (0xfc00U) macro 1215 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1226 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 8607 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/ |
H A D | cpu.h | 1201 #define CPSR_IT_2_7 (0xfc00U) macro 1215 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1226 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 8606 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu60/qemu-6.0.0/target/arm/ |
H A D | cpu.h | 1249 #define CPSR_IT_2_7 (0xfc00U) macro 1265 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1276 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 8895 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/ |
H A D | cpu.h | 1261 #define CPSR_IT_2_7 (0xfc00U) macro 1277 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1288 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 9222 if (mask & CPSR_IT_2_7) { in cpsr_write()
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/dports/emulators/qemu/qemu-6.2.0/target/arm/ |
H A D | cpu.h | 1261 #define CPSR_IT_2_7 (0xfc00U) macro 1277 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) 1288 #define XPSR_IT_2_7 CPSR_IT_2_7
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H A D | helper.c | 8960 if (mask & CPSR_IT_2_7) { in cpsr_write()
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