Home
last modified time | relevance | path

Searched refs:HCR_TPU (Results 1 – 22 of 22) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/include/asm/
H A Dkvm_arm.h33 #define HCR_TPU (UL(1) << 24) macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/include/asm/
H A Dkvm_arm.h33 #define HCR_TPU (UL(1) << 24) macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/include/asm/
H A Dkvm_arm.h33 #define HCR_TPU (UL(1) << 24) macro
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dcpu.h611 #define HCR_TPU (1ULL << 24) macro
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dcpu.h611 #define HCR_TPU (1ULL << 24) macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dcpu.h1237 #define HCR_TPU (1ULL << 24) macro
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dcpu.h1359 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4773 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dcpu.h1359 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4773 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dcpu.h1440 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4429 if (arm_hcr_el2_eff(env) & HCR_TPU) { in aa64_cacheop_pou_access()
5395 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dcpu.h1407 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4460 if (arm_hcr_el2_eff(env) & HCR_TPU) { in aa64_cacheop_pou_access()
5431 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dcpu.h1407 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4460 if (arm_hcr_el2_eff(env) & HCR_TPU) { in aa64_cacheop_pou_access()
5431 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dcpu.h1460 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4507 if (arm_hcr_el2_eff(env) & HCR_TPU) { in aa64_cacheop_pou_access()
5487 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dcpu.h1478 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4480 if (arm_hcr_el2_eff(env) & HCR_TPU) { in aa64_cacheop_pou_access()
5626 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dcpu.h1478 #define HCR_TPU (1ULL << 24) macro
H A Dhelper.c4256 if (arm_hcr_el2_eff(env) & HCR_TPU) { in aa64_cacheop_pou_access()
5402 HCR_TID0 | HCR_TID2 | HCR_TPCP | HCR_TPU | in arm_hcr_el2_eff()