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Searched refs:ISA_AND (Results 1 – 8 of 8) sorted by relevance

/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/Compiler/CISACodeGen/
H A DisaDef.h38 DECLARE_CISA_OPCODE(EOPCODE_AND, "and", ISA_AND)
H A DCISABuilder.hpp901 LogicOp(ISA_AND, dst, src0, src1); in And()
H A DCISABuilder.cpp2799 VMask ? ISA_OR : ISA_AND, in SetVectorMask()
3229 case ISA_AND: in GenericAlu()
/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/visa/
H A DCommon_ISA_util.cpp235 case ISA_AND: in GetGenOpcodeFromVISAOpcode()
792 case ISA_AND: in Get_Pseudo_Opcode()
H A DIsaDescription.cpp55 { ISA_AND, ISA_Inst_Logic, "and", 2, 1 },
539 { ALL, ISA_AND, ISA_Inst_Logic, "and", 5, SAME_DATA_TYPE,
H A DBuildCISAIRImpl.cpp2695 if (opcode != ISA_AND && in CISA_create_logic_instruction()
/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/visa/include/
H A Dvisa_igc_common_header.h286 ISA_AND = 0x20, enumerator
/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/VectorCompiler/lib/GenXCodeGen/
H A DGenXCisaBuilder.cpp3859 Opcode = ISA_AND; in buildControlRegUpdate()
4224 Opcode = ISA_AND; in buildBinaryOperator()
4302 Opcode = ISA_AND; in buildBoolBinaryOperator()
5393 generateLogicOrShift(ISA_AND, HwtidSR0, sr0, SR0Mask); in buildGetHWID()
5402 generateLogicOrShift(ISA_AND, HwtidTmp0, HwtidSR0, TmpMask); in buildGetHWID()
5406 generateLogicOrShift(ISA_AND, HwtidTmp1, HwtidTmp1, ~TmpMask); in buildGetHWID()