/dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1242 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1258 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1259 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1267 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1268 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1269 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1270 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 4791 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 4807 SDValue ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 4808 SDValue ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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H A D | SelectionDAGBuilder.cpp | 6171 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local 6180 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall() 6190 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall() 6197 RotateOpcode = IsFSHL ? ISD::ROTR : ISD::ROTL; in visitIntrinsicCall() 6209 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : NShAmt); in visitIntrinsicCall() 6210 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, X, IsFSHL ? NShAmt : ShAmt); in visitIntrinsicCall() 6218 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : InvShAmt); in visitIntrinsicCall() 6219 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, Y, IsFSHL ? InvShAmt : ShAmt); in visitIntrinsicCall() 6231 setValue(&I, DAG.getSelect(sdl, VT, IsZeroShift, IsFSHL ? X : Y, Or)); in visitIntrinsicCall()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1678 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1703 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1704 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1705 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1706 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6242 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6248 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6260 if (IsFSHL) { in expandFunnelShift() 6282 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6283 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1665 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1690 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1691 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1692 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1693 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6396 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6402 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6414 if (IsFSHL) { in expandFunnelShift() 6436 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6437 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1665 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1690 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1691 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1692 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1693 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6396 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6402 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6414 if (IsFSHL) { in expandFunnelShift() 6436 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6437 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1697 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1713 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1714 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1722 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1723 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1724 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1725 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6173 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6187 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6188 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1544 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1560 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1561 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1569 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1570 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1571 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1572 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 5953 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 5969 SDValue ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 5970 SDValue ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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H A D | SelectionDAGBuilder.cpp | 6344 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local 6353 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall() 6363 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall() 6370 RotateOpcode = IsFSHL ? ISD::ROTR : ISD::ROTL; in visitIntrinsicCall() 6382 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : NShAmt); in visitIntrinsicCall() 6383 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, X, IsFSHL ? NShAmt : ShAmt); in visitIntrinsicCall() 6391 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : InvShAmt); in visitIntrinsicCall() 6392 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, Y, IsFSHL ? InvShAmt : ShAmt); in visitIntrinsicCall() 6404 setValue(&I, DAG.getSelect(sdl, VT, IsZeroShift, IsFSHL ? X : Y, Or)); in visitIntrinsicCall()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1671 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1687 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1688 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1696 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1697 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1698 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1699 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6166 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6180 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6181 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1544 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1560 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1561 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1569 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1570 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1571 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1572 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 5949 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 5965 SDValue ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 5966 SDValue ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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H A D | SelectionDAGBuilder.cpp | 6344 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local 6353 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall() 6363 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall() 6370 RotateOpcode = IsFSHL ? ISD::ROTR : ISD::ROTL; in visitIntrinsicCall() 6382 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : NShAmt); in visitIntrinsicCall() 6383 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, X, IsFSHL ? NShAmt : ShAmt); in visitIntrinsicCall() 6391 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : InvShAmt); in visitIntrinsicCall() 6392 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, Y, IsFSHL ? InvShAmt : ShAmt); in visitIntrinsicCall() 6404 setValue(&I, DAG.getSelect(sdl, VT, IsZeroShift, IsFSHL ? X : Y, Or)); in visitIntrinsicCall()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1544 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1560 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1561 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1569 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1570 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1571 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1572 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 5953 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 5969 SDValue ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 5970 SDValue ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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H A D | SelectionDAGBuilder.cpp | 6344 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local 6353 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall() 6363 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall() 6370 RotateOpcode = IsFSHL ? ISD::ROTR : ISD::ROTL; in visitIntrinsicCall() 6382 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : NShAmt); in visitIntrinsicCall() 6383 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, X, IsFSHL ? NShAmt : ShAmt); in visitIntrinsicCall() 6391 SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : InvShAmt); in visitIntrinsicCall() 6392 SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, Y, IsFSHL ? InvShAmt : ShAmt); in visitIntrinsicCall() 6404 setValue(&I, DAG.getSelect(sdl, VT, IsZeroShift, IsFSHL ? X : Y, Or)); in visitIntrinsicCall()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1674 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1699 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1700 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1701 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1702 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6503 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6509 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6521 if (IsFSHL) { in expandFunnelShift() 6543 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6544 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1674 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1699 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1700 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1701 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1702 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6503 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6509 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6521 if (IsFSHL) { in expandFunnelShift() 6543 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6544 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1674 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1699 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1700 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1701 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1702 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6503 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6509 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6521 if (IsFSHL) { in expandFunnelShift() 6543 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6544 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1682 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1707 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1708 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1709 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1710 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6513 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6519 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6531 if (IsFSHL) { in expandFunnelShift() 6553 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6554 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1674 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1699 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1700 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1701 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1702 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6503 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6509 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6521 if (IsFSHL) { in expandFunnelShift() 6543 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6544 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1674 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local 1699 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1700 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1701 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1702 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 6503 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local 6509 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift() 6521 if (IsFSHL) { in expandFunnelShift() 6543 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift() 6544 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift() [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 5824 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5825 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 5836 if (IsFSHL) { in lowerFunnelShiftWithInverse() 5862 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5894 if (IsFSHL) { in lowerFunnelShiftAsShifts() 5920 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 5921 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 5824 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5825 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 5836 if (IsFSHL) { in lowerFunnelShiftWithInverse() 5862 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5894 if (IsFSHL) { in lowerFunnelShiftAsShifts() 5920 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 5921 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 5824 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5825 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 5836 if (IsFSHL) { in lowerFunnelShiftWithInverse() 5862 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5894 if (IsFSHL) { in lowerFunnelShiftAsShifts() 5920 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 5921 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 5824 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5825 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 5836 if (IsFSHL) { in lowerFunnelShiftWithInverse() 5862 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5894 if (IsFSHL) { in lowerFunnelShiftAsShifts() 5920 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 5921 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 5824 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5825 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 5836 if (IsFSHL) { in lowerFunnelShiftWithInverse() 5862 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5894 if (IsFSHL) { in lowerFunnelShiftAsShifts() 5920 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 5921 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 5934 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local 5935 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() 5946 if (IsFSHL) { in lowerFunnelShiftWithInverse() 5972 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local 5985 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts() 5986 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts() 6004 if (IsFSHL) { in lowerFunnelShiftAsShifts() 6030 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local 6031 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
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